Data transmission method, system, device, medium and program product
By verifying data frames with enable bits, the method improves communication reliability and reduces error rates between board cards in chip testing devices, addressing the issue of high interference in existing communication methods.
Patent Information
- Application Number
- CN202510480721.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-16
- Publication Date
- 2025-07-15
AI Technical Summary
The communication method between the boards and cards in the chip test equipment adopts a bus-based transmission method, which leads to a high bit error rate and seriously affects the communication quality.
The host communication board sends a target data frame to the slave communication board, generates the second verification data by adding a functional data packet with high enable bits, and matches it with the first verification data to determine the validity of the data frame, and uses 8B/10B encoding and CRC verification algorithms to ensure the reliability of data transmission.
Improve the reliability of data frames, reduce the bit error rate, and ensure the accuracy and efficiency of communication.
Smart Images
Figure CN120321150A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of device communication technologies, and in particular, to a data transmission method, system, device, medium, and program product. Background Art
[0002] Chip test equipment is used to test the functions and / or performance of chips. In recent years, as the functions of chip test equipment have become increasingly powerful, the hardware architecture of chip test equipment has also been continuously optimized. In the related art, when testing a chip, it is often necessary for multiple types of boards in the chip test equipment (such as control boards, acquisition boards, processing boards, etc.) to cooperate to complete the test of a certain function of the chip. Therefore, the communication accuracy between different boards is the key to ensuring the accuracy of chip testing.
[0003] In the process of implementing this application, it is found through research that in the related art, the communication method between different boards in chip test equipment usually adopts a bus-based transmission method. However, due to factors such as physical link interference, the bus-based communication method often results in a high error rate during cross-board data transmission, seriously affecting the communication quality. Summary of the Invention
[0004] To solve the above technical problems, an embodiment of this application provides a data transmission method, system, device, medium, and program product.
[0005] In one aspect of the embodiments of this application, a data transmission method is provided, including: a host communication board sends a target data frame to a slave communication board in a preset data sending manner, where the target data frame includes a first preset number of function data packets and first check data; the slave communication board obtains the target data frame in a preset receiving and decoding manner, and processes the target data frame in a preset checking manner to determine the validity of the target data frame, where the preset checking manner includes: adding a high enable bit to each function data packet respectively, generating second check data based on the function data packets with the high enable bit, matching the first check data and the second check data, and determining that the target data frame is valid when the first check data and the second check data are consistent.
[0006] Another aspect of the embodiments of the present application provides a data transmission system, including: a first sending module, configured to send a target data frame from a host communication board to a slave communication board in a preset data sending manner, where the target data frame includes a first preset number of functional data packets and first check data; a first receiving and parsing module, configured to obtain the target data frame by the slave communication board in a preset receiving and decoding manner, and process the target data frame in a preset checking manner to determine the validity of the target data frame, where the preset checking manner includes: adding a high enable bit to each functional data packet respectively, generating second check data based on the functional data packets with high enable bits, matching the first check data and the second check data, and determining that the target data frame is valid when the first check data and the second check data are consistent.
[0007] Another aspect of the embodiments of the present application provides a chip testing device, where the chip testing device includes a host computer and a test head, the host computer and / or the test head includes a host communication board and a slave communication board, a clock transmission channel, a first data transmission channel, and a second data transmission channel between the host communication board and the slave communication board, and the chip testing device further includes the above data transmission system.
[0008] Another aspect of the embodiments of the present application provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the above data transmission method is implemented.
[0009] Another aspect of the embodiments of the present application provides a computer program product, including computer program instructions, and when the computer program instructions are executed by a processor, the above data transmission method is implemented.
[0010] The data transmission method, system, device, medium and program product in the embodiments of the present application. The host communication board sends a target data frame to the slave communication board in a preset data sending manner. The target data frame includes a first preset number of functional data packets and first check data. The slave communication board acquires the target data frame in a preset receiving and decoding manner, and processes the target data frame in a preset parsing and checking manner to determine the validity of the target data frame. The preset parsing and checking manner includes: adding a high enable bit to each functional data packet respectively, and generating second check data based on the functional data packet with the high enable bit, matching the first check data and the second check data, and when the first check data and the second check data are consistent, determining that the target data frame is valid. Thus, in the embodiments of the present application, a verification mechanism is added. When the slave communication board receives the target data frame, it calculates the second check data of the target data frame, and uses the second check data to match the first check data in the target data frame to determine the validity of the received target data frame, thereby improving the reliability of the target data frame and reducing the error rate of the target data frame.
[0011] In addition, in the embodiments of the present application, each functional data packet is identified by adding a high enable bit to the functional data packet, so that the slave communication board can efficiently and accurately calculate the second check data through the identified functional data packet (the functional data packet with the high enable bit), avoiding the situation of generating the second check data using incorrect data packets when there are a large number of data packets in the slave communication board, thereby improving the reliability of the second check data, and further improving the reliability of verifying the target data frame.
[0012] The technical solution of the present application will be further described in detail below with reference to the drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] The drawings forming a part of the specification depict the embodiments of the present application and, together with the description, are used to explain the principles of the present application.
[0014] Referring to the drawings, the present application can be more clearly understood according to the following detailed description, where:
[0015] Figure 1 is a flowchart of a data transmission method provided by an exemplary embodiment of the present application.
[0016] Figure 2 is a schematic diagram of a data transmission method provided by an application example of the present application.
[0017] Figure 3 is a flowchart of a data transmission method provided by another exemplary embodiment of the present application.
[0018] Figure 4It is a schematic diagram of the link establishment process between the host communication board and the slave communication board provided by an application example of the present application.
[0019] Figure 5 It is a schematic flow diagram of the data transmission method provided by another exemplary embodiment of the present application.
[0020] Figure 6 It is a schematic diagram of the data transmission method provided by another application example of the present application.
[0021] Figure 7 It is a schematic diagram of the data transmission method provided by still another application example of the present application.
[0022] Figure 8 It is a block diagram of the structure of the data transmission system provided by an exemplary embodiment of the present disclosure.
[0023] Figure 9 It is a schematic diagram of the chip testing device provided by an exemplary embodiment of the present application.
[0024] Figure 10 It is a schematic diagram of the structure of an application embodiment of the electronic device of the present disclosure. Detailed Description of the Embodiments
[0025] Now, various exemplary embodiments of the present application will be described in detail with reference to the accompanying drawings. It should be noted that: Unless otherwise specifically stated, the relative arrangements, numerical expressions, and numerical values of the components and steps set forth in these embodiments do not limit the scope of the present application.
[0026] Those skilled in the art can understand that the terms "first", "second", etc. in the embodiments of the present application are only used to distinguish different steps, devices, or modules, etc., and neither represent any specific technical meaning nor indicate an inevitable logical order between them.
[0027] It should also be understood that in the embodiments of the present application, "a plurality of" may refer to two or more, and "at least one" may refer to one, two, or more.
[0028] It should also be understood that for any component, data, or structure mentioned in the embodiments of the present application, unless specifically defined or otherwise indicated by the context, it is generally understood to be one or more.
[0029] In addition, the term " / and" in the present application is only a description of the association relationship between associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in the present application generally represents an "or" relationship between the associated objects before and after.
[0030] It should also be understood that the descriptions of the various embodiments in this application emphasize the differences between the various embodiments. Their similarities or resemblances can be referred to each other. For the sake of brevity, they will not be elaborated one by one.
[0031] Meanwhile, it should be understood that, for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.
[0032] The following description of at least one exemplary embodiment is actually merely illustrative and in no way restricts this application and its application or use.
[0033] Technologies, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, the said technologies, methods, and devices should be regarded as part of the specification.
[0034] It should be noted that: like reference numerals and letters indicate like items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.
[0035] The embodiments of this application can be applied to electronic devices such as terminal devices, computer systems, servers, etc., which can operate together with many other general-purpose or special-purpose computing system environments or configurations. Examples of well-known terminal devices, computing systems, environments, and / or configurations suitable for use with electronic devices such as terminal devices, computer systems, servers, etc. include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network personal computers, small computer systems, large computer systems, and distributed cloud computing technology environments including any of the above systems, and so on.
[0036] Terminal devices, computer systems, servers and other electronic devices can be described in the general context of computer system executable instructions (such as program modules) executed by a computer system. Generally, program modules can include routines, programs, target programs, components, logic, data structures, etc., which perform specific tasks or implement specific abstract data types. The computer system / server can be implemented in a distributed cloud computing environment, where tasks are executed by remote processing devices linked through a communication network. In a distributed cloud computing environment, program modules can be located on local or remote computing system storage media including storage devices.
[0037] In the process of implementing this application, through research, it is found that the communication method between cross-board cards in chip test equipment adopts a bus-based transmission method. However, due to factors such as physical link interference, the bus-based communication method often results in a high error rate during cross-board card data transmission, seriously affecting the communication quality.
[0038] Figure 1 This is a schematic flowchart of a data transmission method provided by an exemplary embodiment of the present application. This embodiment can be applied to chip test equipment, such as Figure 1 As shown, the data storage method may include the following steps:
[0039] Step S110, the host communication board sends a target data frame to the slave communication board in a preset data sending manner.
[0040] Among them, the target data frame includes a first preset number of functional data packets and first check data. The first preset number is an integer greater than or equal to 1. The functional data packet represents the target data to be transmitted. The target data can be, for example, at least one of the following: text, numbers, pictures, sounds, videos, etc. The size of each functional data packet can be set according to actual needs. For example, the size of the functional data packet can be 8bit. The first check data is used to verify the integrity and accuracy of the target data frame, and the first check data can be generated according to each functional data packet.
[0041] The host communication board and the slave communication board are communicatively connected. In one implementation, the preset communication method can be, for example, serial communication. Exemplarily, the preset communication method can adopt serial communication standards such as Recommended Standard 232 or Recommended Standard 485. The chip test equipment is used to test the functions and / or performances of chips, wafers, integrated circuits, etc. For example, the chip test equipment can be an Automatic Test Equipment (ATE). The chip test equipment includes a host computer and a slave computer. The host computer can be a computing device for controlling the slave computer to test the chips, wafers, or integrated circuits to be tested, as well as storing and displaying test results, etc. The computing device can include, for example: desktop computers, tablet computers, laptop computers, servers, or smart phones, etc. The slave computer can be used to test the chips, wafers, or integrated circuits to be tested. For example, the slave computer can include a test head, etc. The host communication board and the slave communication board can be respectively arranged in the host computer and the slave computer, or both can be arranged in the slave computer. Exemplarily, the host communication board and the slave communication board can be boards including a Field Programmable Gate Array (FPGA), etc.
[0042] Step S120, the slave communication board obtains the target data frame in a preset receiving and decoding manner, and processes the target data frame in a preset checking manner to determine the validity of the target data frame.
[0043] Among them, the preset verification method includes: adding a high enable bit to each functional data packet respectively, generating second verification data based on the functional data packet with the high enable bit, matching the first verification data and the second verification data, and determining that the target data frame is valid when the first verification data and the second verification data are consistent.
[0044] The enable bit is a bit used to control whether a certain function is enabled, usually represented by 0 or 1. When the enable bit is 1, it represents a high-level signal, that is, a high enable bit; when the enable bit is 0, it represents a low-level signal, that is, a low enable bit. The second verification data is generated by the functional data packets with each high enable bit. The preset receiving and decoding method can be used to decode the target data frame.
[0045] In one embodiment, the slave communication board receives the target data frame, adds a high-level signal to each functional data packet in the target data frame to add a high enable bit to the functional data packet. The second verification data can be generated by calculating each high enable bit according to a preset verification algorithm, and the first verification data is matched with the second verification data. When the first verification data and the second verification data are consistent, it is determined that the received target data frame is valid, and the slave communication board can perform subsequent processing such as sending the target data frame to other boards, storing it, or executing the operations indicated by the target data frame; when the first verification data and the second verification data are inconsistent, it is determined that the target data frame is invalid, and the target data frame is discarded.
[0046] In the embodiments of the present application, a verification mechanism is added. When the slave communication board receives the target data frame, it calculates the second verification data of the target data frame and uses the second verification data to match the first verification data in the target data frame to determine the validity of the received target data frame, thereby improving the reliability of the target data frame and reducing the error rate of the target data frame. In addition, the method of adding a high enable bit to the functional data packet is used to identify each functional data packet, so that the slave communication board can efficiently and accurately calculate the second verification data through the identified functional data packet (the functional data packet with the high enable bit), avoiding the situation of generating the second verification data using incorrect data packets when there are a large number of data packets in the slave communication board, thereby improving the reliability of the second verification data and further improving the reliability of verifying the target data frame.
[0047] In some alternative embodiments, in the embodiments of the present application, the target data frame can be generated in the following manner: the host communication board processes the target data in a preset data frame generation manner to obtain the target data frame.
[0048] Among them, the preset data frame generation method includes: splitting the target data into a first preset number of functional data packets, generating first check data according to each functional data packet by using a preset check algorithm, and forming data encapsulation header data and trailer data from each functional data packet and the first check data to obtain the target data frame.
[0049] Among them, the target data frame may include header data, a first preset number of functional data packets, first check data, and trailer data. The preset check algorithm may be, for example, Cyclic Redundancy Check (CRC). Exemplarily, CRC can be used to calculate each functional data packet to obtain the first check data.
[0050] In one implementation, the target data is split into a first preset number of functional data packets according to a preset size (e.g., 8 bit). The data content and data size of the header data and trailer data are preset. Exemplarily, the size of the header data and trailer data may be 9 bit, the header data is 55aa, and the trailer data is aa55.
[0051] Correspondingly, the preset data sending method in the embodiments of the present application may include: encoding and sending the header data, each functional data packet, the first check data, and the trailer data respectively.
[0052] In one implementation, the host communication board can encode the header data, each functional data packet, the first check data, and the trailer data in parallel, and then use serial encoding methods such as 8B / 10B (8 bits / 10 bits) encoding to encode the header data, each functional data packet, the first check data, and the trailer data respectively, and send them in sequence according to a preset sending order in a serial output manner. Among them, the preset sending order is: header data, each functional data packet, the first check data, and the trailer data.
[0053] In the embodiments of the present application, by splitting the target data into a first preset number of functional data packets, generating first check data through a preset check algorithm, and forming data encapsulation header data and trailer data from each functional data packet and the first check data, efficient generation of the target data frame is achieved, and the integrity and accuracy of the target data frame can be effectively guaranteed through the first check data.
[0054] In some optional implementations, the preset receiving and decoding method in the embodiments of the present disclosure may include: in response to decoding the header data of the target data frame, decoding the data after the header data until the trailer data of the target data frame is decoded to obtain the target data frame.
[0055] In one embodiment, the host communication board and the slave communication board may pre-agree on a data encoding method and fixed communication content. Among them, the pre-agreed encoding method may be, for example, 8B / 10B encoding, and the fixed communication content may include the data content of the packet header data and the data content of the packet tail data.
[0056] The slave communication board receives the data sent by the host communication board and decodes the received data using the pre-agreed encoding method. When the packet header data is decoded, the slave communication board sequentially receives and decodes the data after the packet header data, and when the packet tail data is decoded, it is determined that the reception of the target data frame is completed.
[0057] In the embodiments of the present application, the reception of the target data frame is located by the packet header data and the packet tail data, thereby enabling the rapid reception of the target data frame.
[0058] In some alternative embodiments, the preset reception and decoding method in the embodiments of the present disclosure may further include: in response to not receiving the packet tail data within the first preset duration after decoding the packet header data, re-establishing the communication connection between the host communication board and the slave communication board; or, in response to not receiving the packet header data of the next data frame within the second preset duration after decoding the packet tail data of the target data frame, re-establishing the communication connection between the host communication board and the slave communication board.
[0059] Among them, the first preset duration and the second preset duration may be the same or different. In one embodiment, when the slave communication board does not decode the packet tail data within the first preset duration after decoding the packet header data, it can be determined that the communication between the slave communication board and the host communication board is disconnected, and the communication connection between the host communication board and the slave communication board is re-established. After that, the host communication board re-sends the target data frame to the slave communication board.
[0060] In one embodiment, the next data frame represents the next data frame of the target data frame. When the slave communication board does not receive the packet header data of the next data frame within the second preset duration after decoding the packet tail data of the target data frame, it can be determined that the communication between the slave communication board and the host communication board is disconnected, and the communication connection between the host communication board and the slave communication board is re-established. After that, the host communication board re-sends the next data frame to the slave communication board.
[0061] In the embodiments of the present application, when the packet tail data is not received within a long time (the first preset duration) after receiving the packet header data, or when the packet header data of the next data frame is not received within a long time (the second preset duration) after receiving the packet tail data of the target data frame, the communication connection between the host communication board and the slave communication board can be re-established, thereby ensuring the communication efficiency between the host communication board and the slave communication board and avoiding the phenomenon of communication jamming.
[0062] In some alternative embodiments, in the embodiments of the present application, a first data transmission channel and a second data transmission channel are provided between the host communication board and the slave communication board.
[0063] Correspondingly, step S110 in the embodiments of the present application may include: the host communication board sending a target data frame to the slave communication board through the first data transmission channel in a preset data sending manner.
[0064] The data transmission method in the embodiments of the present application further includes: the slave communication board sending response data for the target data frame to the host communication board through the second data transmission channel.
[0065] Among them, the first data transmission channel is used to transmit data from the host communication board to the slave communication board. The second data transmission channel is used to transmit data from the slave communication board to the host communication board. In one embodiment, a plurality of first data transmission channels and a plurality of second data transmission channels may be provided between the host communication board and the slave communication board, and the plurality of first data transmission channels and the plurality of second data transmission channels may transmit data in parallel.
[0066] In the embodiments of the present application, setting the first data transmission channel and the second data transmission channel between the host communication board and the slave communication board can effectively ensure the data transmission efficiency between the host communication board and the slave communication board and avoid data conflicts.
[0067] In some alternative embodiments, in the embodiments of the present application, a system clock is provided in the host communication board, and a clock transmission channel is provided between the host communication board and the slave communication board.
[0068] Among them, the clock transmission channel is used to transmit a clock signal. The system clock is used to control data sending and generate a sampling clock. The sampling clock is used to control the sampling frequency of received data.
[0069] Correspondingly, the host communication board performs frequency multiplication processing on the system clock to obtain a sampling clock, so that the slave communication board can obtain the clock signal of the sampling clock through the clock transmission channel and receive the target data frame based on the clock signal.
[0070] In one embodiment, before step S110, the host communication board may perform frequency multiplication (Clock Multiplication) processing on the system clock by using a Phase-Locked Loop (PLL) or the like to obtain a sampling clock, and the clock signal output by the sampling clock is n times the clock signal output by the system clock, where n≥1.
[0071] The host communication board card sends the target data frame based on the clock signal of the system clock. The slave communication board card captures the clock signal of the sampling clock through clock transmission communication and receives the target data frame based on this clock signal.
[0072] In the embodiment of the present application, by performing frequency doubling processing on the system clock to obtain the sampling clock and receiving the target data frame based on the clock signal output by the sampling clock, the integrity of the received target data frame can be effectively ensured. In addition, only three data lines (the first data transmission channel, the second data transmission channel, and the clock transmission channel) need to be set between the host communication board card and the slave communication board card to complete the data transmission between the host communication board card and the slave communication board card, without occupying additional pins and with less physical resource occupation.
[0073] Figure 2 It is a schematic diagram of the data transmission method provided by an application example of the present application. As Figure 2 shown, the host communication board card may include: a sending framing module 1, a receiving parsing module 1, a serial / parallel conversion module 1, a clock generation module, and a training module 1. The slave communication board card may include: a sending framing module 2, a receiving parsing module 2, a serial / parallel conversion module 2, and a training module 2. A clock transmission channel, a first data transmission channel, and a second data transmission channel are set between the host communication board card and the slave communication board card.
[0074] The clock sending module includes the system clock and the sampling clock. The clock generation module outputs the clock signal generated by the system clock and the clock signal generated by the sampling clock. Among them, the sampling clock is obtained by doubling the frequency of the system clock.
[0075] The host communication board card sending the target data frame to the slave communication board card may include:
[0076] In the host communication board card, the sending framing module 1 divides the target data into functional data packets of a first preset number. According to each functional data packet, using CRC, the first check data is generated. The data encapsulation header data and trailer data are formed by each functional data packet and the first check data to obtain the target data frame. Then, the header data, each functional data packet, the first check data, and the trailer data are serially encoded by the 8B / 10B encoding method, and then sent to the serial / parallel conversion module 1. The serial / parallel conversion module 1 captures the clock signal generated by the system clock and, based on this clock signal, in a serial output manner, sequentially sends the header data, each functional data packet, the first check data, and the trailer data to the slave communication board card through the first data transmission channel.
[0077] In the slave communication board, the serial / parallel conversion module 2 captures the clock signal generated by the sampling clock through the clock transmission channel, receives the target data frame based on the clock signal, converts the first data frame into data that can be processed in parallel, and then sends the target data frame to the receiving and parsing module 2. The receiving and parsing module 2 decodes the packet header data, each functional data packet, the first check data, and the packet tail data using the 8B / 10B encoding method, generates the second check data based on each functional data packet using CRC, matches the first check data and the second check data, determines that the target data frame is valid when the first check data and the second check data are consistent, and discards the target data frame when the first check data and the second check data are inconsistent.
[0078] Figure 3 It is a schematic flowchart of the data transmission method provided by another exemplary embodiment of the present application. In some alternative embodiments, as Figure 3 shown, the following steps may further be included before step S110 in the implementation of the present application:
[0079] Step S210, the host communication board continuously sends preset connection establishment data to the slave communication board.
[0080] Among them, the host communication board and the slave communication board can pre-agree on the preset connection establishment data. Within the third preset time period, the host communication board continuously sends the preset connection establishment data to the slave communication board through the first data transmission channel based on the clock signal of the system clock.
[0081] Step S220, in response to the slave communication board stably receiving the preset connection establishment data, the slave communication board sends the preset connection establishment data to the host communication board.
[0082] Among them, the slave communication board receives the preset connection establishment data based on the clock signal generated by the sampling clock. When the slave communication board continuously receives the second preset number of preset connection establishment data within the third preset time period, it can be determined that the slave communication board stably receives the preset connection establishment data. When the slave communication board fails to continuously receive the second preset number of preset connection establishment data within the third preset time period, it is determined that the slave communication board cannot stably receive the preset connection establishment data, and the host communication board resends the preset connection establishment data to the slave communication board until the slave communication board can stably receive the preset connection establishment data.
[0083] Within the third preset time period, the slave communication board continuously sends the preset connection establishment data to the host communication board through the second data transmission channel based on the clock signal generated by the system clock.
[0084] Step S230, in response to the host communication board stably receiving the preset connection establishment data, the host communication board sends the preset encoded data to the slave communication board.
[0085] Among them, the host communication board receives the preset connection data based on the clock signal generated by the sampling clock. When the host communication board continuously receives the preset connection data of the second preset number within the third preset time length, it can be determined that the host communication board can stably receive the preset connection data. When the host communication board does not continuously receive the preset connection data of the second preset number within the third preset time length, it is determined that the host communication board cannot stably receive the preset connection data, and steps S210 to S220 are executed until the host communication board can stably receive the preset connection data.
[0086] The host communication board and the slave communication board may pre-agree on a preset encoding method (e.g., 8B / 10B encoding) and preset data. The host communication board may encode the preset data using the preset encoding method to obtain preset encoded data, and within a third preset time period, the host communication board continuously sends the preset encoded data to the slave communication board through the first data transmission channel.
[0087] Step S240 , in response to the slave communication board stably receiving the preset coded data, the slave communication board sends the preset coded data to the host communication board.
[0088] The slave communication board receives preset coded data based on a clock signal generated by a sampling clock, and decodes the preset coded data in a preset coding manner. When the decoded data is the preset data, it is determined that the preset coded data is received.
[0089] Within the third preset time length, when the slave communication board continuously receives the second preset number of preset coded data, it can be determined that the slave communication board can stably receive the preset coded data. When the slave communication board fails to continuously receive the second preset number of preset coded data, it is determined that the slave communication board cannot stably receive the preset coded data.
[0090] The slave communication board card may encode the preset data in a preset encoding manner to obtain preset encoded data. Within a third preset time length, the slave communication board card continuously sends the preset encoded data to the host communication board card through the second data transmission channel.
[0091] Step S250, in response to the host communication card continuously and stably receiving the preset coded data, it is determined that the link between the host communication card and the slave communication card is successfully established.
[0092] The host communication board receives preset coded data based on a clock signal generated by a sampling clock, and decodes the preset coded data in a preset coding manner. When the decoded data is the preset data, it is determined that the preset coded data is received.
[0093] Within the third preset duration, when the host communication board continuously receives the second preset number of preset encoded data, it can be determined that the host communication board can stably receive the preset encoded data. When the host communication board fails to continuously receive the second preset number of preset encoded data, it is determined that the host communication board cannot stably receive the preset encoded data.
[0094] In the embodiments of the present application, by mutually sending preset connection establishment data and preset encoded data between the host communication board and the slave communication board to determine whether the connection between the host communication board and the slave communication board is successful, the reliability of subsequent data transmission between the host communication board and the slave communication board is ensured, and the data transmission risk is reduced.
[0095] In some alternative embodiments, the data transmission method in the embodiments of the present application may further include: in response to the slave communication board or the host communication board failing to stably receive the preset encoded data, performing an operation of the host communication board continuously sending the preset connection establishment data to the slave communication board.
[0096] Among them, when the host communication board fails to stably receive the preset encoded data, perform the operations of steps S210 to S230 until the slave communication board stably receives the preset encoded data; when the slave communication board fails to stably receive the preset encoded data, perform the operations of steps S210 to S240 until the host communication board stably receives the preset encoded data.
[0097] In the embodiments of the present application, by setting a disconnection mechanism between the host communication board and the slave communication board, that is, when the host communication board or the slave communication board fails to stably receive the preset encoded data, re - establish the connection between the host communication board and the slave communication board, realizing efficient handshake connection establishment between the host communication board and the slave communication board.
[0098] Figure 4 It is a schematic diagram of the connection establishment process between the host communication board and the slave communication board provided by an application example of the present application. As Figure 2 and Figure 4 shown, the host communication board and the slave communication board can perform handshake connection establishment in the following manner:
[0099] STAGE1: The training module 1 of the host communication board sends the binary data 10101010 (preset connection establishment data) to the serial / parallel conversion module 1, and the serial / parallel conversion module 1 continuously sends this binary data to the slave communication board; the serial / parallel conversion module 2 of the slave communication board receives this binary data and sends it to the training module 2, and the slave communication board can send response data of all 0s to the host communication board;
[0100] STAGE2: When the slave communication board stably receives the preset connection establishment data, the training module 2 sends the binary data to the serial / parallel conversion module 2, and the serial / parallel conversion module 2 sends the binary data to the host communication board;
[0101] STAGE3: When the host communication board stably receives the preset connection establishment data, the training module 1 of the host communication board encodes the K code (preset data) by 8B / 10B encoding method to generate preset encoded data, and sends the preset encoded data to the slave communication board through the serial / parallel conversion module 1;
[0102] STAGE4: The serial / parallel conversion module 2 of the slave communication board receives the preset encoded data and sends it to the training module 2. When the slave communication board stably receives the preset encoded data, the training module 2 encodes the K code by 8B / 10B encoding method to generate preset encoded data, and sends the preset encoded data to the host communication board through the serial / parallel conversion module 2. When the host communication board continuously and stably receives the preset encoded data, it is determined that the handshake connection establishment between the host communication board and the slave communication board is successful.
[0103] Figure 5 is a schematic flowchart of a data transmission method provided by another exemplary embodiment of the present application. In some alternative embodiments, as Figure 5 shown, the data transmission method in the embodiments of the present application may further include the following steps:
[0104] Step S310, the slave communication board processes the target data in a preset data frame generation manner to obtain a target data frame, and sends it to the host communication board through the second data transmission channel in a preset data sending manner.
[0105] In one embodiment, the slave communication board sends the target data frame to the host communication board based on the clock signal generated by the system clock.
[0106] Step S320, the host communication board obtains the target data frame in a preset receiving and decoding manner, and processes the target data frame in a preset verification manner to determine the validity of the target data frame.
[0107] In one embodiment, the host communication board receives the target data frame based on the clock signal generated by the sampling clock.
[0108] In the embodiments of the present application, the slave communication board generates a target data frame in a preset data frame generation manner and sends it in a preset data sending manner, and the host communication board obtains the target data frame in a preset receiving and decoding manner and verifies the validity of the target data frame, thereby realizing efficient communication between the slave communication board and the host communication board.
[0109] In an application example, as Figure 2 shown, the slave communication board sending the target data frame to the host communication board may include:
[0110] In the slave communication board, the transmission framing module 2 divides the target data into a first preset number of functional data packets. According to each functional data packet, using CRC, it generates the first check data. It encapsulates the header data and the tail data for the data formed by each functional data packet and the first check data to obtain the target data frame, and performs serial encoding on the header data, each functional data packet, the first check data, and the tail data through the 8B / 10B encoding method, and then sends it to the serial / parallel conversion module 2. The serial / parallel conversion module 2 captures the clock signal generated by the system clock, and based on this clock signal, in a serial output manner, sequentially sends the header data, each functional data packet, the first check data, and the tail data to the host communication board through the second data transmission channel.
[0111] In the host communication board, the serial / parallel conversion module 1 captures the clock signal generated by the sampling clock through the clock transmission channel, and based on this clock signal, receives the target data frame, and converts the first data frame into data that can be processed in parallel, and then sends the target data frame to the receiving and parsing module 1. The receiving and parsing module 1 decodes the header data, each functional data packet, the first check data, and the tail data using the 8B / 10B encoding method, uses CRC to generate the second check data based on each functional data packet, matches the first check data and the second check data. When the first check data and the second check data are consistent, it determines that the target data frame is valid. When the first check data and the second check data are inconsistent, it discards the target data frame.
[0112] Figure 6 is a schematic diagram of the data transmission method provided by another application example of the present application. Figure 7 is a schematic diagram of the data transmission method provided by another application example of the present application.
[0113] As Figure 6 and Figure 7 shown, the host communication board and the slave communication board perform the operations of steps S210 to S250 to perform handshake and link establishment for the host communication board and the slave communication board.
[0114] When the host communication board sends the target data frame to the slave communication board, as Figure 6 shown, in the host communication board:
[0115] Determine whether there is a disconnection between the host communication board and the slave communication board. When it is determined that there is a disconnection, re - execute the handshake link - establishment between the host communication board and the slave communication board; when it is determined that there is no disconnection, obtain the target data, split the target data into a first preset number of functional data packets, generate first check data according to each functional data packet using a preset check algorithm, add 9 - bit header data, encode the 9 - bit header data and each functional data packet through an 8B / 10B encoding method, and sequentially send the 9 - bit header data and each functional data packet in a serial manner. Determine whether each functional data packet has been sent. When it is determined that the sending is not completed, continue to execute the encoding and sending operations. When it is determined that the sending is completed, add the first check data and trailer data, encode the first check data and trailer data, and sequentially send the first check data and trailer data in a serial sending manner to complete the sending of the target data frame.
[0116] As Figure 7 shown, in the slave communication board:
[0117] Determine whether there is a disconnection between the host communication board and the slave communication board. When it is determined that there is a disconnection, re - execute the handshake link - establishment between the host communication board and the slave communication board. When it is determined that there is no disconnection, receive the data sent by the slave communication board, decode the received data through an 8B / 10B encoding method, determine whether 9 - bit header data is decoded within a second preset time period. If the 9 - bit header data is not decoded, execute the operation of determining whether there is a disconnection between the host communication board and the slave communication board. If the 9 - bit header data is decoded, determine whether trailer data is decoded within a first preset time period. If the trailer data is not decoded, cache the 9 - bit header data and the received functional data packets, and execute the operation of determining whether there is a disconnection between the host communication board and the slave communication board. If the trailer data is decoded, add a high - enable bit to each functional data packet, generate second check data for the high - enable bit through CRC, and determine whether the first check data and the second check data are consistent. If they are consistent, mark the target data frame as valid. If they are not consistent, mark the target data frame as invalid.
[0118] Figure 8 is a structural block diagram of a data transmission system provided by an exemplary embodiment of the present disclosure. As Figure 8 shown, the data transmission system includes:
[0119] A first sending module 410, configured to send a target data frame from the host communication board to the slave communication board in a preset data sending manner, where the target data frame includes a first preset number of functional data packets and first check data;
[0120] The first receiving and parsing module 420 is configured to obtain the target data frame by the slave communication board in a preset receiving and decoding manner, and process the target data frame in a preset verification manner to determine the validity of the target data frame. Wherein, the preset verification manner includes: adding a high enable bit to each function data packet respectively, generating second verification data based on the function data packet with the high enable bit, matching the first verification data and the second verification data, and determining that the target data frame is valid when the first verification data and the second verification data are consistent.
[0121] In some alternative embodiments, the preset receiving and decoding manner includes: in response to decoding the header data of the target data frame, decoding the data after the header data until the tail data of the target data frame is decoded to obtain the target data frame.
[0122] In some alternative embodiments, the preset receiving and decoding manner further includes: in response to not receiving the tail data within a first preset time period after decoding the header data, re - establishing the communication connection between the host communication board and the slave communication board; or, in response to not receiving the header data of the next data frame within a second preset time period after decoding the tail data, re - establishing the communication connection between the host communication board and the slave communication board.
[0123] In some alternative embodiments, the data transmission system in the embodiments of the present application further includes:
[0124] A data frame generation module, configured to process the target data by the host communication board in a preset data frame generation manner to obtain the target data frame. Wherein, the preset data frame generation manner includes: splitting the target data into the first preset number of function data packets; generating the first verification data according to each function data packet by using a preset verification algorithm; encapsulating the header data and the tail data for the data formed by the function data packets and the first verification data to obtain the target data frame;
[0125] The preset data sending manner includes: encoding and sending the header data, each function data packet, the first verification data, and the tail data respectively.
[0126] In some alternative embodiments, in the embodiments of the present application, a first data transmission channel and a second data transmission channel are provided between the host communication board and the slave communication board;
[0127] The first sending module 410 is specifically configured to send the target data frame from the host communication board to the slave communication board through the first data transmission channel in the preset data sending manner;
[0128] The data transmission system in the embodiment of the present application further includes:
[0129] A response sending module, configured to send response data for the target data frame from the slave communication board to the host communication board through the second data transmission channel.
[0130] In some alternative embodiments, in the embodiment of the present application, a system clock is set in the host communication board, and a clock transmission channel is provided between the host communication board and the slave communication board;
[0131] The data transmission system in the embodiment of the present application further includes:
[0132] A frequency multiplication clock module, configured to perform frequency multiplication processing on the system clock by the host communication board to obtain a sampling clock, so that the slave communication board acquires the clock signal of the sampling clock through the clock transmission channel and receives the target data frame based on the clock signal.
[0133] In some alternative embodiments, the data transmission system in the embodiment of the present application further includes:
[0134] A first link establishment module, configured to continuously send preset link establishment data from the host communication board to the slave communication board;
[0135] A second link establishment module, configured to, in response to the slave communication board stably receiving the preset link establishment data, send the preset link establishment data from the slave communication board to the host communication board;
[0136] A third link establishment module, configured to, in response to the host communication board stably receiving the preset link establishment data, send preset coding data from the host communication board to the slave communication board;
[0137] A fourth link establishment module, configured to, in response to the slave communication board stably receiving the preset coding data, send the preset coding data from the slave communication board to the host communication board;
[0138] A fifth link establishment module, configured to determine that the link between the host communication board and the slave communication board is successfully established in response to the host communication board continuously and stably receiving the preset coding data.
[0139] In some alternative embodiments, the data transmission system in the embodiment of the present application further includes:
[0140] A link disconnection response module, configured to perform the operation of continuously sending preset link establishment data from the host communication board to the slave communication board in response to the slave communication board or the host communication board failing to stably receive the preset coding data.
[0141] In some alternative embodiments, the data transmission system in the embodiments of the present application further includes:
[0142] A second sending module, configured to process target data by the slave communication board to obtain the target data frame in a preset data frame generation manner, and send the target data frame to the master communication board through a second data transmission channel in the preset data sending manner;
[0143] A second receiving and parsing module, configured to obtain the target data frame by the master communication board in the preset receiving and decoding manner, and process the target data frame in the preset verification manner to determine the validity of the target data frame.
[0144] The data transmission system in the embodiments of the present disclosure corresponds to the embodiments of the above-mentioned data transmission method of the present disclosure, and the relevant content can be referred to each other, and will not be elaborated here.
[0145] For the beneficial technical effects corresponding to the exemplary embodiments of the data transmission system in the embodiments of the present disclosure, reference can be made to the corresponding beneficial technical effects in the corresponding exemplary method part above, and will not be elaborated here.
[0146] Figure 9 It is a schematic diagram of a chip testing device provided by an exemplary embodiment of the present application. In some alternative embodiments, as Figure 9 shown, the chip testing device 500 includes a host computer 510 and a test head 520. The host computer 510 and / or the test head 520 include a master communication board and a slave communication board. There are a clock transmission channel, a first data transmission channel and a second data transmission channel between the master communication board and the slave communication board. The chip testing device further includes the above-mentioned data transmission system.
[0147] The chip testing device in the embodiments of the present application corresponds to the embodiments of the above-mentioned data transmission system of the present application, and the relevant content can be referred to each other, and will not be elaborated here.
[0148] For the beneficial technical effects corresponding to the exemplary embodiments of the chip testing device in the embodiments of the present application, reference can be made to the corresponding beneficial technical effects in the corresponding exemplary system part above, and will not be elaborated here.
[0149] In addition, the embodiments of the present disclosure further provide an electronic device, including:
[0150] A memory, configured to store a computer program;
[0151] A processor, configured to execute the computer program stored in the memory, and when the computer program is executed, implement the data transmission method described in any one of the above embodiments of the present disclosure.
[0152] Figure 10 This is a schematic structural diagram of an application embodiment of the disclosed electronic device. Next, with reference to Figure 10 the following, the electronic device according to the embodiments of the present disclosure will be described. The electronic device may be any one or both of the first device and the second device, or a stand-alone device independent of them, and the stand-alone device may communicate with the first device and the second device to receive the input signals collected from them.
[0153] As Figure 10 shown, the electronic device includes one or more processors and a memory.
[0154] The processor may be a central processing unit (CPU) or other forms of processing units with data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device to perform desired functions.
[0155] The memory may include one or more computer program products, and the computer program products may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory, etc. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor may run the program instructions to implement the data transmission methods of the various embodiments of the present disclosure described above and / or other desired functions.
[0156] In one example, the electronic device may further include: an input device and an output device, and these components are interconnected through a bus system and / or other forms of connection mechanisms (not shown).
[0157] In addition, the input device may further include, for example, a keyboard, a mouse, etc.
[0158] The output device may output various information to the outside, including the determined distance information, direction information, etc. The output device may include, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, etc.
[0159] Of course, for simplicity, Figure 10 only some of the components related to the present disclosure in the electronic device are shown in
[0160] In addition to the above methods and devices, embodiments of the present disclosure may also be computer program products, which include computer program instructions that, when run on a processor, cause the processor to execute the steps in the data transmission methods according to various embodiments of the present disclosure described in the above part of this specification.
[0161] The computer program product may be written in any combination of one or more programming languages for programming code to perform the operations of the embodiments of the present disclosure. The programming languages include object-oriented programming languages such as Java, C++, etc., and also include conventional procedural programming languages such as the "C" language or similar programming languages. The programming code may be executed entirely on the user's computing device, partially on the user's device, executed as an independent software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.
[0162] In addition, embodiments of the present disclosure may also be computer-readable storage media, on which computer program instructions are stored, and when the computer program instructions are run on a processor, cause the processor to execute the steps in the data transmission methods according to various embodiments of the present disclosure described in the above part of this specification.
[0163] The computer-readable storage medium may adopt any combination of one or more readable media. The readable media may be a readable signal medium or a readable storage medium. The readable storage medium may include, for example, but not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or components, or any combination of the above. More specific examples (non-exhaustive list) of the readable storage medium include: electrical connections with one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the above.
[0164] Those of ordinary skill in the art can understand that all or part of the steps to implement the above method embodiments can be completed by hardware related to program instructions. The foregoing program may be stored in a computer-readable storage medium, and when the program is executed, it performs the steps including the above method embodiments; and the foregoing storage medium includes: ROM, RAM, magnetic disks, or optical disks and other various media that can store program code.
[0165] The basic principles of the present disclosure have been described in conjunction with specific embodiments. However, it should be noted that the advantages, benefits, effects, etc. mentioned in the present disclosure are only examples and not limitations. It cannot be considered that these advantages, benefits, effects, etc. are essential for each embodiment of the present disclosure. Additionally, the above-mentioned specific details are only for illustrative and easy-to-understand purposes and are not limitations. The above details do not limit the present disclosure to necessarily adopt the above specific details for implementation.
[0166] Each embodiment in this specification is described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. For the same or similar parts among the embodiments, reference can be made to each other. For system embodiments, since they basically correspond to method embodiments, they are described relatively simply. For relevant parts, reference can be made to the partial description of the method embodiments.
[0167] The block diagrams of the devices, apparatuses, equipment, and systems involved in the present disclosure are only illustrative examples and do not intend to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any way. Words such as "including", "comprising", "having", etc. are open-ended terms, meaning "including but not limited to", and can be used interchangeably with each other. The word "or" and "and" used herein refer to the word "and / or" and can be used interchangeably with each other, unless the context clearly indicates otherwise. The word "such as" used herein refers to the phrase "such as but not limited to" and can be used interchangeably with each other.
[0168] The methods and apparatuses of the present disclosure can be implemented in many ways. For example, the methods and apparatuses of the present disclosure can be implemented through software, hardware, firmware, or any combination of software, hardware, and firmware. The above order of the steps for the method is only for illustration. The steps of the method of the present disclosure are not limited to the above specific order described, unless otherwise specifically stated in other ways. Additionally, in some embodiments, the present disclosure can also be implemented as a program recorded in a recording medium, and these programs include machine-readable instructions for implementing the methods according to the present disclosure. Therefore, the present disclosure also covers the recording medium storing the programs for executing the methods according to the present disclosure.
[0169] It should also be noted that in the apparatuses, equipment, and methods of the present disclosure, each component or each step can be decomposed and / or recombined. These decompositions and / or recombinations should be regarded as equivalent solutions of the present disclosure.
[0170] The foregoing description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present disclosure. Thus, the present disclosure is not intended to be limited to the aspects shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein. The foregoing description has been presented for purposes of illustration and description. In addition, the description is not intended to limit embodiments of the present disclosure to the form disclosed herein. Although numerous example aspects and embodiments have been discussed above, those skilled in the art will recognize some variations, modifications, alterations, additions, and subcombinations thereof.
Claims
1. A data transmission method, characterized in that, including: The host communication board sends a target data frame to the slave communication board in a preset data sending manner, where the target data frame includes a first preset number of function data packets and first check data; The slave communication board obtains the target data frame in a preset receiving and decoding manner, and processes the target data frame in a preset checking manner to determine the validity of the target data frame. The preset checking manner includes: adding a high enable bit to each function data packet respectively, generating second check data based on the function data packets with the high enable bit, matching the first check data and the second check data, and determining that the target data frame is valid when the first check data and the second check data are consistent.
2. The method according to claim 1, wherein The preset receiving and decoding manner includes: In response to decoding the header data of the target data frame, decoding the data after the header data until the tail data of the target data frame is decoded to obtain the target data frame.
3. The method according to claim 1 or 2, characterized in that The preset receiving and decoding manner further includes: In response to not receiving the tail data within a first preset duration after decoding the header data, re - establishing the communication connection between the host communication board and the slave communication board; or, In response to not receiving the header data of the next data frame within a second preset duration after decoding the tail data, re - establishing the communication connection between the host communication board and the slave communication board.
4. The method according to any one of claims 1-3, characterized in that It also includes: The host communication board processes the target data in a preset data frame generation manner to obtain the target data frame. The preset data frame generation manner includes: splitting the target data into the first preset number of function data packets; generating the first check data according to each function data packet by using a preset check algorithm; encapsulating the header data and the tail data for the data formed by the function data packets and the first check data to obtain the target data frame; The preset data sending manner includes: Encoding and sending the header data, each function data packet, the first check data and the tail data respectively.
5. The method according to any one of claims 1-4, characterized in that, A first data transmission channel and a second data transmission channel are set between the host communication board and the slave communication board; The host communication board sends a target data frame to the slave communication board in a preset data sending manner, including: The host communication board sends the target data frame to the slave communication board through the first data transmission channel in the preset data sending manner; The method further includes: The slave communication board sends response data for the target data frame to the host communication board through the second data transmission channel.
6. The method according to any one of claims 1-5, characterized in that, A system clock is set in the host communication board, and a clock transmission channel is set between the host communication board and the slave communication board. The method further includes: The host communication board performs frequency multiplication processing on the system clock to obtain a sampling clock, so that the slave communication board obtains the clock signal of the sampling clock through the clock transmission channel and receives the target data frame based on the clock signal.
7. According to the method as claimed in any one of claims 1 to 6, characterized in that, Before the host communication board sends a target data frame to the slave communication board in a preset data sending manner, it further includes: The host communication board continuously sends preset connection establishment data to the slave communication board; In response to the slave communication board stably receiving the preset connection establishment data, the slave communication board sends the preset connection establishment data to the host communication board; In response to the host communication board stably receiving the preset connection establishment data, the host communication board sends preset encoded data to the slave communication board; In response to the slave communication board stably receiving the preset encoded data, the slave communication board sends the preset encoded data to the host communication board; In response to the host communication board continuously and stably receiving the preset encoded data, it is determined that the link between the host communication board and the slave communication board is successfully established.
8. The method according to claim 7, wherein It further includes: In response to the slave communication board or the host communication board failing to stably receive the preset encoded data, perform the operation of the host communication board continuously sending preset connection establishment data to the slave communication board.
9. The method according to any one of claims 1-8, characterized in that, It further includes: The slave communication board processes the target data in a preset data frame generation manner to obtain the target data frame, and sends it to the host communication board through the second data transmission channel in the preset data sending manner; The host communication board obtains the target data frame in the preset reception and decoding manner, and processes the target data frame in the preset verification manner to determine the validity of the target data frame.
10. A data transmission system, characterized in that, It includes: A first sending module, configured to send a target data frame from the host communication board to the slave communication board in a preset data sending manner, where the target data frame includes a first preset number of function data packets and first verification data; A first receiving and parsing module, configured to obtain the target data frame by the slave communication board in a preset reception and decoding manner, and process the target data frame in a preset verification manner to determine the validity of the target data frame, where the preset verification manner includes: respectively adding a high enable bit to each function data packet, generating second verification data based on the function data packets with the high enable bit, matching the first verification data and the second verification data, and determining that the target data frame is valid when the first verification data and the second verification data are consistent.
11. A chip testing device, characterized in that, The chip test device includes a host computer and a test head, and the host computer and / or the test head includes a host communication board and a slave communication board, a clock transmission channel, a first data transmission channel and a second data transmission channel between the host communication board and the slave communication board, and the chip test device further includes the data transmission system according to claim 10.
12. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the data transmission method according to any one of claims 1-9 above.
13. A computer program product, comprising computer program instructions, characterized in that, When the computer program instructions are executed by a processor, they implement the data transmission method according to any one of claims 1-9 above.