Indium phosphide substrate and semiconductor epitaxial wafer

Abstract

The indium phosphide substrate has a diameter of 50 mm or more and a waviness (Wz) of 800 nm or less for the entire substrate surface except for the edge portion, and the waviness (Wz) for the entire substrate surface except for the edge portion is measured in the following order (1) to (2). (1) A region within 5 mm from the outer periphery to the center is set as an edge portion, and the whole wafer surface except the region within 5 mm from the outer periphery to the center of the wafer is set as the whole substrate surface except the edge portion. (2) The waviness Wz is measured using a white interferometry function of a laser microscope. The waviness Wz is obtained by taking the center of the substrate surface in the short dimension direction in the range of 1 mm * 40 mm as a reference line and taking 20 lines at intervals of 4.5 [mu] m as a measurement interval, and the waviness Wz is obtained by taking the total 11 of the reference lines and 10 surrounding lines which move in parallel with respect to the short dimension direction as the waviness of 40 mm in the long dimension direction, and the average value of the waviness Wz is taken as the waviness Wz.

Description

Technical Field

[0001] The present invention relates to an indium phosphide substrate and a semiconductor epitaxial wafer. Background Art

[0002] Indium phosphide (InP) is a III-V compound semiconductor material composed of indium (In) of Group III and phosphorus (P) of Group V. As characteristics of a semiconductor material, it has the following characteristics: a bandgap of 1.35 eV, an electron mobility of ~5400 cm 2 / V·s, and the electron mobility under a high electric field becomes a value higher than that of other common semiconductor materials such as silicon and gallium arsenide. In addition, it has the following characteristics: the stable crystal structure at normal temperature and pressure is the zinc blende structure of cubic crystal, and its lattice constant is larger than that of compound semiconductors such as gallium arsenide (GaAs) and gallium phosphide (GaP).

[0003] In silicon photonics, the following method is used: after epitaxial growth on an InP substrate, it is bonded to a Si substrate by a method such as bonding to fabricate a device. It can be considered that in the bonding process, the bonding of the InP epitaxial growth layer to the Si device is extremely important for the characteristics of the device, and the waviness of the substrate surface is also transmitted to the surface of the film after epitaxial growth, which is related to the bonding accuracy. Thus, the control of the waviness of the surface of the InP epitaxial growth layer when bonded to the Si device is very important.

[0004] In Patent Document 1, a technique is disclosed in which mirror polishing is performed in a rotating polishing disk with a polishing cloth using a specified mirror polishing liquid for an InP wafer, thereby suppressing the surface waviness of the InP wafer.

[0005] In Patent Document 2, a technique regarding a grinding method of a semiconductor wafer is disclosed. The grinding method of the semiconductor wafer is characterized in that the semiconductor wafer is adsorbed on the surface of a plurality of disk-shaped chucks rotatably arranged on the circumference, a disk-shaped grinding wheel having at least the size of the circumference rotates in the direction opposite to the rotation direction of the chuck, water is sprayed from a nozzle provided at the center of the grinding wheel, and then a drying gas is sprayed to grind the semiconductor wafer. In this technique, the chuck and the grinding wheel are relatively approached in the rotation axis direction to contact, water is sprayed from the nozzle, and then a drying gas is sprayed, and the grinding wheel grinds the surfaces of a plurality of wafers to a specified thickness at once, thereby suppressing the waviness of the substrate.

[0006] In Patent Document 3, a method for grinding indium phosphide is disclosed, which is characterized by using a mixed solution of a solution obtained by dissolving bromine in methanol and an aqueous colloidal silica solution for grinding. Further, by adjusting such a mixed solution, the substrate is ground, thereby suppressing the waviness of the substrate caused by etch marks.

[0007] Prior Art Documents

[0008] Patent Documents

[0009] Patent Document 1: Japanese Patent Publication No. 07-027881

[0010] Patent Document 2: Japanese Patent No. 3316939

[0011] Patent Document 3: Japanese Unexamined Patent Application Publication No. 58-145604 Summary of the Invention

[0012] Problems to be Solved by the Invention

[0013] As described above, it is considered that when an InP epitaxial layer is grown on an InP substrate and then bonded to an Si substrate to form a device, the bonding between the InP epitaxial layer and the Si device is extremely important for the characteristics of the device. Also, the waviness of the substrate surface is transmitted to the surface of the film after epitaxial growth, which is related to the bonding accuracy. Therefore, when epitaxial growth is performed using an InP substrate with a large waviness across the entire surface, there is a problem that the bonding cannot be carried out smoothly.

[0014] The techniques disclosed in Patent Documents 1 and 2 suppress the waviness of the substrate, but do not disclose to what extent the waviness is suppressed across the entire substrate.

[0015] In addition, the technique disclosed in Patent Document 3 suppresses the waviness of the substrate caused by etch marks, focuses on the local waviness of the substrate, and relates to a technique for suppressing the local waviness. Thus, in Patent Document 3, a technique for suppressing the waviness across the entire substrate is not disclosed.

[0016] The present invention has been completed to solve the above-described technical problems, and an object thereof is to provide an indium phosphide substrate and a semiconductor epitaxial wafer with suppressed surface waviness.

[0017] Means for Solving the Problems

[0018] The above-described technical problems are solved by the following specific embodiments of the present invention.

[0019] (1) An indium phosphide substrate, wherein the diameter is 50 mm or more, and the waviness Wz of the entire substrate surface except for the edge portion is 800 nm or less.

[0020] (2) The indium phosphide substrate according to (1), wherein the waviness Wz of the entire substrate surface except for the edge portion is 500 to 800 nm.

[0021] (3) The indium phosphide substrate according to (1) or (2), wherein the diameter is 50 to 150 mm.

[0022] (4) A semiconductor epitaxial wafer, which has the indium phosphide substrate according to any one of (1) to (3) and an epitaxial crystal layer provided on the main surface of the indium phosphide substrate.

[0023] Advantages of the Invention

[0024] According to an embodiment of the present invention, an indium phosphide substrate and a semiconductor epitaxial wafer with suppressed surface waviness can be provided. Description of the Drawings

[0025] Figure 1 It is a schematic view of the surface of the indium phosphide substrate according to an embodiment of the present invention.

[0026] Figure 2 It is a schematic view of the wafer surface for explaining the calculation method of the waviness Wz. Detailed Embodiments

[0027] Next, the detailed embodiments of the present invention will be described with reference to the drawings. It should be understood that the present invention is not limited to the following embodiments, and within the scope not departing from the gist of the present invention, design changes, improvements, etc. can be appropriately made based on the ordinary knowledge of those skilled in the art.

[0028] [Indium Phosphide Substrate]

[0029] Hereinafter, the configuration of the indium phosphide substrate of the present embodiment will be described.

[0030] The indium phosphide (InP) substrate of the present embodiment includes: a substrate surface (main surface), a substrate back surface, and an edge portion. The edge portion may also have: an orientation flat (OF: Orientation Flat) indicating the orientation of the crystal and an index flat (IF: Index Flat) for distinguishing the main surface and the back surface of the substrate.

[0031] The main surface of the indium phosphide substrate can be set as the surface for forming the epitaxial crystal layer. The surface for forming the epitaxial crystal layer means the surface on which epitaxial growth is actually carried out when the indium phosphide substrate of the present embodiment is used as a substrate for epitaxial growth in order to form a semiconductor element structure.

[0032] The main surface of the indium phosphide substrate is formed to have a diameter of 50 mm or more. In addition, the diameter of the main surface of the indium phosphide substrate may be 50 to 150 mm. The planar shape of the indium phosphide substrate may be circular or rectangular such as a quadrilateral.

[0033] The thickness of the indium phosphide substrate is not particularly limited. For example, it is preferably 300 to 900 μm, more preferably 300 to 700 μm. Especially when the diameter (aperture) of the indium phosphide substrate is large, if the thickness of the indium phosphide substrate is less than 300 μm, it may crack, and if the thickness of the indium phosphide substrate exceeds 900 μm, there may sometimes be a problem of waste of the base material crystal.

[0034] The indium phosphide substrate of this embodiment may contain Zn (zinc) as a dopant (impurity) in such a way that the carrier concentration becomes 1×10 16 cm －3 or more and 1×10 19 cm －3 or less, and may also contain S (sulfur) as a dopant (impurity) in such a way that the carrier concentration becomes 1×10 16 cm －3 or more and 1×10 19 cm －3 or less, and may also contain Sn (tin) as a dopant (impurity) in such a way that the carrier concentration becomes 1×10 16 cm －3 or more and 1×10 19 cm －3 or less, and may also contain Fe (iron) as a dopant (impurity) in such a way that the resistivity becomes 1×10 5 Ωcm or more and 1×10 8 Ωcm or less.

[0035] Figure 1 FIG. shows a schematic view of the surface of the indium phosphide substrate according to an embodiment of the present invention. The indium phosphide substrate is formed in a substantially disk shape and has OF and IF. It should be noted that Figure 1 is a drawing for understanding the edge portion in the indium phosphide substrate according to an embodiment of the present invention, and the indium phosphide substrate according to an embodiment of the present invention is not limited to such a shape. In particular, it may not have OF and IF.

[0036] In the indium phosphide substrate according to an embodiment of the present invention, the waviness Wz of the entire substrate surface except for the edge portion is controlled to be 800 nm or less. In the present invention, the region within about 5 mm from the outer periphery toward the center of the wafer excluding the influence of roll-off is defined as the "edge portion", and the entire surface of the wafer excluding the region within 5 mm from the outer periphery toward the center of the wafer excluding the influence of roll-off is defined as the "entire substrate surface except for the edge portion". That is, in the present invention, the "entire substrate surface except for the edge portion" means Figure 1 the circular region at the center shown as the "waviness measurement region" in

[0037] Since the wafer is ground simultaneously over the entire surface, the edge portion (the region within about 5 mm from the outer periphery toward the center) that is affected by roll-off due to grinding is not included, and the center portion is measured to represent the waviness of the entire wafer. In addition, since the waviness is periodic, it can be considered to be fixed regardless of the aperture.

[0038] In the present invention, the "waviness Wz" of the entire substrate surface except for the edge portion is the "maximum height waviness" defined in JIS B 0601:2013. By measuring the waviness Wz, the average value of the waviness of the entire substrate surface except for the edge portion can be quantified.

[0039] The waviness Wz of the entire substrate surface except for the edge portion of the indium phosphide substrate can be measured using the white interference measurement function of the laser microscope VKX-3000 manufactured by KEYENCE CORPORATION. When measuring the waviness Wz of the entire substrate surface except for the edge portion of the indium phosphide substrate, an interference measurement 10x lens is used to measure the waviness (Wz: maximum height waviness) curve of the contour curve of a range of about 1 mm × 40 mm obtained in such a way that the center of the wafer becomes the measurement range, and the cut-off wavelength λc = 25 mm is set to obtain the waviness. When calculating the waviness Wz, as Figure 2 shown, with the center in the short dimension direction of the substrate surface in the range of about 1 mm × 40 mm as the reference line, 20 lines at an interval of about 4.5 μm (the basic interval specified by the laser microscope VKX-3000) are set as one measurement interval (about 4.5 μm × 20 lines = about 90 μm interval), and the waviness of 11 lines in total, which is the sum of 10 surrounding lines parallel to the short dimension direction and the reference line, spanning 40 mm in the long dimension direction is obtained, and its average value is taken as Wz. It should be noted that the average value is automatically measured by the white interference measurement function of the laser microscope VKX-3000 manufactured by KEYENCE CORPORATION.

[0040] In order to ignore the effects such as thermal expansion, the measurement is carried out in a clean room maintained at room temperature of 22 ± 5°C. It should be noted that the various setting conditions of the white interference measurement function of the laser microscope VKX-3000 are as follows.

[0041] · Tilt correction: Automatic.

[0042] · DCL / BCL: None.

[0043] · Measurement category: Waviness.

[0044] · Cutoff wavelength: Do not set λs and λf. λc is 25 mm.

[0045] · Correction of end effect: Effective.

[0046] · Double Gaussian: Off.

[0047] · Stylus mode: Off.

[0048] · Number of reference wavelengths: 1.

[0049] · Number of profiles: 11.

[0050] Since the wafer is ground simultaneously over the entire surface, there is no in-plane position dependence. If the waviness curve of the above-mentioned part is evaluated, it represents the waviness of the entire wafer required for the bonding process and is measured. In addition, since the waviness is periodic, it can be considered to be fixed regardless of the aperture.

[0051] If the waviness Wz of the entire surface of the indium phosphide substrate except for the edge part is 800 nm or less, an indium phosphide substrate can be provided in which the surface waviness after epitaxial growth is reduced, and even when bonded to a Si substrate including a Si device, poor adhesion caused by the influence of the waviness is well suppressed. The waviness Wz of the entire surface of the indium phosphide substrate except for the edge part is preferably 700 nm or less, more preferably 680 nm or less. In addition, the lower limit value of the waviness Wz is not particularly limited, and Wz can be 500 to 800 nm.

[0052] 〔Manufacturing method of indium phosphide substrate〕

[0053] Next, the manufacturing method of the indium phosphide substrate according to the embodiment of the present invention will be described.

[0054] As a manufacturing method of the indium phosphide substrate, first, an ingot of indium phosphide is produced by a known method.

[0055] Next, the ingot of indium phosphide is ground to form a cylinder. At this time, an orientation flat (OF) and an index flat (IF) may be formed at a specified position on the outer peripheral portion of the wafer.

[0056] Next, a wafer having a main surface and a back surface is cut out from the ground indium phosphide ingot. At this time, using a wire saw or the like, both ends of the crystal of the indium phosphide ingot are cut along a specified crystal plane, and a plurality of wafers are cut out with a thickness of 750 to 850 μm.

[0057] In the process of cutting out the wafer, it is preferable to continuously supply a new wire while reciprocating the wire in the horizontal direction, and to move the table carrying the indium phosphide ingot in the vertical direction toward the wire.

[0058] The cutting conditions of the ingot using a wire saw are shown below.

[0059] · New wire supply speed of the wire: 10 to 60 m / min.

[0060] · Reciprocating speed of the wire: 300 to 350 m / min.

[0061] · Vertical movement speed of the table carrying the indium phosphide ingot: 200 to 400 μm / min.

[0062] · Management of the abrasive of the wire saw: It is set to use abrasive GC#1200 and cutting oil PS-LP-500D, and the abrasive is managed so as to be 300 to 400 mPa·s when the rotational speed of the rotor shaft of the viscometer is 60 rpm. The viscosity can be measured using a TVB-10 viscometer manufactured by Toki Sangyo Co., Ltd.

[0063] Next, in order to remove the processed damaged layer generated in the cutting process using a wire saw, the cut wafer is etched on both sides (primary etching) using a specified etching solution. The wafer can be etched by immersing the entire wafer in the etching solution. As the etching solution, for example, a mixed solution of 85 mass% phosphoric acid aqueous solution and 30 mass% hydrogen peroxide is preferably used to etch a total of 5 to 15 μm from both sides.

[0064] Next, chamfering is performed on the outer peripheral portion of the wafer, and it is controlled to be 50 mm or more in diameter. After chamfering, both sides of the wafer are coarsely ground. The coarse grinding process is also called a lapping process, and it is ground using a specified abrasive material, thereby removing the unevenness on the wafer surface while maintaining the flatness of the wafer. Here, in the above cutting using a wire saw, waviness is generated on the entire wafer due to the offset of the wire. The present inventors found that in order to remove this waviness, it is necessary to remove the waviness by polishing after slicing (the process of cutting out the wafer from the ingot). Specifically, it is necessary to remove a total thickness of 100 μm or more by polishing on the front and back surfaces of the wafer while applying a pressure of 100 g / cm 2 or more. It should be noted that in order to increase the polishing amount, it is preferable to thicken the thickness of the wafer at the time of slicing as appropriate.

[0065] Next, the wafer is etched on both sides (secondary etching) using a specified etching solution. The wafer can be etched by immersing the entire wafer in the etching solution. As the etching solution, for example, a mixed solution of 85% by mass phosphoric acid aqueous solution, 30% by mass hydrogen peroxide water, and ultrapure water is preferably used to etch a total of 7 to 15 μm from both sides.

[0066] Next, both sides of the wafer are polished. This process is for removing the waviness that was not removed in the above polishing process. From the perspective of productivity, it is preferable to polish both sides of multiple wafers simultaneously. In order to uniformly remove the waviness in the in-plane direction of all wafers being polished simultaneously, when polishing both sides of the wafer using the upper plate and the lower plate, sufficient polishing liquid needs to be supplied to the wafer from multiple polishing liquid supply ports in such a way that the entire polishing pads provided on the upper plate and the lower plate are sufficiently penetrated by the polishing liquid. Specifically, by supplying the polishing liquid at a flow rate of 0.07 mL / min·cm 2 or more to the upper plate or the lower plate per unit area, uniform polishing of both sides of the wafer can be achieved. As a result, the waviness that was not removed in the polishing process can be removed. In this way, the waviness Wz of the entire substrate surface except for the edge portion can be controlled to 800 nm or less.

[0067] Next, the main surface of the wafer is polished using a polishing material for mirror polishing to finish it into a mirror surface.

[0068] Next, cleaning is performed, thereby manufacturing the indium phosphide substrate of the embodiment of the present invention. In addition, after the above mirror finishing, etching, mirror polishing, cleaning, etc. can also be performed to manufacture the indium phosphide substrate.

[0069] 〔Semiconductor epitaxial wafer〕

[0070] A semiconductor thin film can be epitaxially grown on the main surface of an indium phosphide substrate in an embodiment of the present invention by a known method, thereby forming an epitaxial crystal layer and manufacturing a semiconductor epitaxial wafer. As an example of the epitaxial growth, a HEMT (High Electron Mobility Transistor) structure can be formed by epitaxially growing an InAlAs buffer layer, an InGaAs channel layer, an InAlAs spacer layer, and an InP electron supply layer on the main surface of an indium phosphide substrate. In the case of manufacturing a semiconductor epitaxial wafer having such a HEMT structure, generally, an indium phosphide substrate that has been mirror-finished is subjected to an etching treatment using an etching solution such as sulfuric acid / hydrogen peroxide to remove impurities such as silicon (Si) attached to the substrate surface. In a state where the back surface of the etched indium phosphide substrate is in contact with and supported by a pedestal, an epitaxial crystal layer is formed on the main surface of the indium phosphide substrate by molecular beam epitaxy (MBE: Molecular Beam Epitaxy) or metalorganic chemical vapor deposition (MOCVD: MetalOrganic Chemical Vapor Deposition).

[0071] The semiconductor epitaxial wafer according to an embodiment of the present invention is manufactured using the indium phosphide substrate according to an embodiment of the present invention in which the waviness of the entire substrate surface is suppressed as described above. Therefore, the surface waviness after epitaxial growth is reduced, and even when bonded to a Si substrate including Si devices, poor adhesion caused by the influence of waviness is well suppressed.

[0072] Examples

[0073] Hereinafter, examples for better understanding of the present invention and its advantages are provided, but the present invention is not limited to these examples.

[0074] (Examples 1 and 2)

[0075] Examples 1 and 2 are manufactured as described below.

[0076] First, an indium phosphide ingot is prepared.

[0077] Next, the indium phosphide ingot is ground to form a cylinder. At this time, an orientation flat (OF) and an indication flat (IF) are formed at specified positions in the outer peripheral portion of the wafer.

[0078] Next, wafers having a main surface and a back surface are cut out from the ground indium phosphide ingot. At this time, a wire saw or the like is used to cut the crystal ends of the indium phosphide ingot along a specified crystal plane, and a plurality of wafers are cut out to a thickness of 0.84 mm.

[0079] In the process of cutting out wafers, while reciprocating the wire horizontally, new wire is continuously fed all the time, and the table carrying the indium phosphide ingot is moved toward the wire in the vertical direction.

[0080] The cutting conditions of the ingot using a wire saw are shown below.

[0081] · Supply speed of new wire of the wire: 10 - 60 m / min.

[0082] · Reciprocating speed of the wire: 320 m / min.

[0083] · Vertical direction moving speed of the table carrying the indium phosphide ingot: 330 μm / min.

[0084] · Management of the abrasive of the wire saw: It is set to use abrasive GC#1200 and cutting oil PS - LP - 500D, and the abrasive is managed so as to be 300 - 400 mPa·s when the rotational speed of the rotor shaft of the viscometer is 60 rpm. The viscosity can be measured using a TVB - 10 viscometer manufactured by Toki Sangyo Co., Ltd.

[0085] Next, in order to remove the processed and deteriorated layer generated in the cutting process using the wire saw, the cut wafers are etched from both sides for a total of 15 μm (primary etching) using a mixed solution of 85 mass% phosphoric acid aqueous solution and 30 mass% hydrogen peroxide water. The wafers are etched by immersing the entire wafers in the etching solution.

[0086] Next, chamfering of the outer peripheral portion of the wafer is performed, and it is controlled to be 50 mm or more in diameter. After chamfering, both sides of the wafer are coarsely ground (polished). Specifically, while applying a pressure of 150 g / cm 2 thickness of 120 μm in total is removed from the front and back surfaces of the wafer by polishing.

[0087] Next, the wafers are etched from both sides for a total of 7 μm (secondary etching) using a mixed solution of 85 mass% phosphoric acid aqueous solution, 30 mass% hydrogen peroxide water, and ultrapure water. The wafers are etched by immersing the entire wafers in the etching solution.

[0088] Next, both sides of the wafer are ground. This process is a process for removing the waviness that was not removed in the above polishing process. In this double - side grinding process, when grinding both sides of the wafer using the upper plate and the lower plate, sufficient grinding fluid is supplied to the wafer from a plurality of grinding fluid supply ports so that the entire grinding pads provided on the upper plate and the lower plate are sufficiently penetrated by the grinding fluid. Specifically, it is set to supply 0.072 mL / min·cm to the unit area of the upper plate or the lower plate 2The abrasive slurry with a flow rate (total amount of abrasive slurry). It should be noted that the areas of the upper and lower plates used are 5608 cm 2 .

[0089] Next, the main surface of the wafer is polished using a polishing material for mirror polishing to finish it into a mirror surface.

[0090] Next, cleaning is performed to fabricate a sample of an indium phosphide substrate with a diameter of 76.2 mm having the shape as Figure 1 shown.

[0091] (Comparative Examples 1 - 5)

[0092] Regarding Comparative Examples 1 - 5, in the polishing process, a total thickness of 40 μm is removed from the front and back surfaces of the wafer by polishing; and in the double-sided grinding process after the secondary etching, the above-mentioned total amount of abrasive slurry is set to 0.065 mL / min·cm 2 , and other than that, samples of indium phosphide substrates with a diameter of 76.2 mm having the shape as Figure 1 shown are fabricated under the same conditions as in Examples 1 and 2.

[0093] (Evaluation of Waviness Wz)

[0094] For the samples of indium phosphide substrates in Examples 1 and 2 and Comparative Examples 1 - 5, the waviness Wz of the entire substrate surface except for the edge portion is measured by the following method respectively.

[0095] That is, for each sample of the indium phosphide substrate with a diameter of 76.2 mm having IF and OF as Figure 1 shown in Examples 1 and 2 and Comparative Examples 1 - 5, the area within about 5 mm from the outer periphery to the center is set as the "edge portion", and the entire wafer surface except for the area within 5 mm from the outer periphery to the center of the wafer excluding the influence of roll-off is set as the "entire substrate surface except for the edge portion".

[0096] Next, the waviness Wz of the waviness measurement area is measured using the white interference measurement function of the laser microscope VKX - 3000 manufactured by KEYENCE Corporation. At the time of the measurement, a 10x lens for interference measurement is used, and the waviness curve of a range of about 1 mm × 40 mm obtained with the center of the wafer being the center of the measurement range is measured, and the waviness is obtained by setting the cut-off wavelength λc = 25 mm. When calculating the waviness Wz, as Figure 2As shown, taking the center in the short dimension direction of the substrate surface in the range of about 1 mm × 40 mm as the reference line, 20 lines at an interval of about 4.5 μm (the basic interval specified by the laser microscope VKX-3000) are set as one measurement interval (about 4.5 μm × 20 lines = about 90 μm interval), and the waviness of 11 lines in total, which is the sum of 10 surrounding lines parallelly moved in the short dimension direction and the reference line, spanning 40 mm in the long dimension direction, is obtained, and its average value is taken as Wz. It should be noted that the said average value is automatically measured by the white interference measurement function of the laser microscope VKX-3000 manufactured by KEYENCE CORPORATION.

[0097] In order to ignore the influence of thermal expansion and the like, the measurement is carried out in a clean room managed at a room temperature of 22 ± 5°C. It should be noted that the various setting conditions of the white interference measurement function of the laser microscope VKX-3000 are as follows.

[0098] · Tilt correction: Automatic.

[0099] · DCL / BCL: None.

[0100] · Measurement category: Waviness.

[0101] · Cut-off wavelength: Neither λs nor λf is set. λc is 25 mm.

[0102] · Correction of end effect: Effective.

[0103] · Double Gaussian: Off.

[0104] · Stylus mode: Off.

[0105] · Number of reference wavelengths: 1.

[0106] · Number of profiles: 11.

[0107] The above manufacturing conditions and evaluation results are shown in Table 1.

[0108] [Table 1]

[0109]

[0110] (Consideration)

[0111] The waviness Wz of the entire substrate surface except for the edge part in Examples 1 and 2 is 800 nm or less, and the surface waviness is well suppressed.

[0112] In contrast, the waviness Wz of the entire substrate surface except for the edge part in Comparative Examples 1 to 5 exceeds 800 nm.

[0113] It should be noted that in Example 1 and Example 2, the total polishing amount of the front and back surfaces of the wafer is the same at 120 μm, and the total amount of polishing liquid for the front and back surfaces of the wafer is also the same at 0.072 mL / min·cm 2 , but the waviness Wz of the entire substrate surface except for the edge portions is different values of 572.7 nm and 668.8 nm, respectively. Similarly, in Comparative Examples 1 to 5, the total polishing amount of the front and back surfaces of the wafer is the same at 40 μm, and the total amount of polishing liquid for the front and back surfaces of the wafer is also the same at 0.065 mL / min·cm 2 , but the waviness Wz of the entire substrate surface except for the edge portions is different values between 895.4 and 1097.2 nm. It is considered that this is due to the different waviness after cutting caused by the unevenness of temperature and the like during wire saw cutting.

Claims

1. An indium phosphide substrate, wherein, having a diameter of 50 mm or more, the waviness Wz of the entire surface of the substrate except for the edge portion is 800 nm or less, the waviness Wz of the entire surface of the substrate except for the edge portion is measured in the order of 1 to 2 below, 1: For an indium phosphide substrate, a region within 5 mm from the outer periphery toward the center is defined as the "edge portion", and the entire surface of the wafer except for the region within 5 mm from the outer periphery toward the center is defined as the "entire surface of the substrate except for the edge portion"; 2: Next, the waviness Wz is measured using the white interference measurement function of a laser microscope. At the time of the measurement, a 10-fold lens for interference measurement is used, and the waviness curve of a 1 mm × 40 mm range obtained with the center of the wafer being the center of the measurement range is measured. The waviness is obtained by setting the cut-off wavelength λc = 25 mm. When calculating the waviness Wz, with the center in the short dimension direction of the substrate surface in the 1 mm × 40 mm range as the reference line, 20 lines at 4.5 μm intervals are set as one measurement interval, and the waviness of 11 lines in total, which is the sum of 10 surrounding lines parallel to the short dimension direction and the reference line, spanning 40 mm in the long dimension direction is obtained, and the average value thereof is taken as the waviness Wz.

2. The indium phosphide substrate according to claim 1, wherein the waviness Wz of the entire surface of the substrate except for the edge portion is 500 to 800 nm.

3. The indium phosphide substrate according to claim 1 or 2, wherein the diameter is 50 to 150 mm.

4. A semiconductor epitaxial wafer, wherein, comprising an indium phosphide substrate according to claim 1 or 2 and an epitaxial crystal layer provided on the main surface of the indium phosphide substrate.

5. A semiconductor epitaxial wafer, wherein, comprising an indium phosphide substrate according to claim 3 and an epitaxial crystal layer provided on the main surface of the indium phosphide substrate.

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