Cavity integrated circuit
By using continuous walls and covers to enclose the cavity of the sensor in the cavity integrated circuit package, the problem of foreign substance contamination is solved, ensuring the normal operation of the sensor, and improving the reliability and performance of the cavity integrated circuit.
Patent Information
- Application Number
- CN202510001243.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-01-16
- Filing Date
- 2025-01-02
- Publication Date
- 2025-07-18
AI Technical Summary
During the manufacturing process, existing cavity integrated circuit packaging is susceptible to contamination by foreign substances such as solder and molding materials, which affects the normal operation of the sensor.
The cavity of the sensor is closed by a continuous wall and a cover, by forming a metal plated wall surrounding the sensor on the active surface of the substrate and covering a laminated film on the top of it to form a closed cavity to prevent the entry of foreign substances.
Effectively protect the sensor from external substances, ensure that the sensor is not damaged during manufacturing, installation and use, and improve the reliability and performance of the cavity integrated circuit.
Smart Images
Figure CN120333513A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to an electronic device, and more particularly to an integrated circuit package including a sensor disposed in a capped cavity. Background Art
[0002] Cavity integrated circuit (IC) packages are used as sensor packages to measure various physical properties of the environment such as humidity, temperature, light, sound, pressure, adverse environmental conditions, etc. Thus, the cavity package includes a sensor disposed in the cavity to sense the physical property and other circuitry to process the sensed physical property. For the sensor to operate properly, the cavity must be free of any substances (e.g., solder, molding compound, external surroundings, etc.). Any substances that enter the cavity during the manufacture of the cavity package may impair the operation of the sensor. Summary of the Invention
[0003] In the described example, an electronic device includes a substrate having an active surface and a sensor disposed on the active surface of the substrate, the sensor being in communication with the active surface of the substrate. The electronic device further includes a continuous wall having an open top disposed on the active surface of the substrate, the continuous wall surrounding the sensor. A cover is disposed on the top surface of the continuous wall, wherein the cover closes the open top of the continuous wall to form a cavity inside the continuous wall to prevent foreign substances from entering the cavity.
[0004] In another described example, a method includes: providing a substrate, wherein the substrate includes an active surface; and placing a sensor on the active surface of the substrate. A continuous wall is deposited on the active surface of the substrate around the sensor. A cover is formed over the continuous wall to close the open top of the continuous wall, thereby forming a cavity inside the continuous wall. Brief Description of the Drawings
[0005] Figure 1A is a cross-sectional view of an example electronic device.
[0006] Figure 1B is a cross-sectional view of an alternative example electronic device including a molding compound.
[0007] Figure 2 is for manufacturing Figure 1A a block diagram illustration of a method of an electronic device.
[0008] Figure 3A is a top view of a substrate array (wafer).
[0009] Figure 3B shows in an early stage of the manufacture of an electronic device a cross-sectional view of a single-substrate chip (hereinafter referred to as "substrate") from Figure 3A the substrate array.
[0010] Figure 3C A cross-sectional view of an electronic device in Figure 3B showing a sensor disposed on an active surface of a substrate.
[0011] Figure 3D A cross-sectional view of an electronic device in Figure 3C after depositing a conductive metal pad on an active surface of a substrate.
[0012] Figure 3E A cross-sectional view of an electronic device in Figure 3D after forming a first laminated film on an active surface of a substrate.
[0013] Figure 3F A side view of an electronic device in Figure 3E after patterning a first photoresist material layer.
[0014] Figure 3G A side view of an electronic device in Figure 3F after undergoing a first etching process and removing the first photoresist material layer.
[0015] Figure 3H A cross-sectional view of an electronic device in Figure 3G after patterning a second photoresist material layer.
[0016] Figure 3I A cross-sectional view of an electronic device in Figure 3H after undergoing a second etching process and removing the second photoresist material layer.
[0017] Figure 3J A cross-sectional view of an electronic device in Figure 3I after patterning a third photoresist material layer.
[0018] Figure 3K A cross-sectional view of an electronic device in Figure 3J after undergoing a plating process and removing the third photoresist material layer.
[0019] Figure 3L A cross-sectional view of an electronic device in Figure 3K after forming a second laminated film.
[0020] Figure 3M A cross-sectional view of an electronic device in Figure 3L after removing an outer portion of the second laminated film.
[0021] Figure 3N A cross-sectional view of an electronic device in Figure 3M after depositing solder balls on an under-bump metallization layer. Detailed Implementation Manner
[0022] A cavity integrated circuit (IC) package is used as a sensor package to measure various physical properties of an environment such as humidity, temperature, light, sound, pressure, adverse environmental conditions, etc. Thus, the cavity package includes a sensor disposed in the cavity to sense the physical property and other circuitry to process the sensed physical property. For the sensor to operate properly, the cavity must be free of any external elements or substances (e.g., solder, molding compound, external environmental elements, etc.).
[0023] Some IC packages include a cavity in the form of a ring composed of a plated circular wall. In some cavity packages, the cavity is open. In other words, the top of the cavity is open, which is called an open cavity package (OCP). Thus, the sensor inside the cavity is exposed to the external environment. However, the remaining package circuitry outside the cavity is covered with a molding compound to protect the external circuitry from the external environment.
[0024] In other cavity packages, the top of the cavity is covered or closed, which is called a closed (covered) cavity package (CCP). The current process for creating and covering the cavity requires several lithography steps. First, a first laminate film is deposited on the substrate. The first laminate film is exposed and developed to form the walls of the cavity. Another laminate film is deposited on the first laminate film. Then the second laminate film is exposed and developed to form a cover over the cavity. Additional lithography steps are required to deposit a metal plating in the openings formed in the first and second laminate films to form the conductive terminals of the IC package.
[0025] Another process for covering the top of the cavity involves depositing solder across the top of the cavity. However, during the reflow process, the solder flows down along the inner surface of the cavity wall into the cavity area. In other processes, the plated solder dome or solder paste dome cannot completely close the top opening of the cavity, thus leaving an opening in the cavity cover or dome. Therefore, during the formation of the molding compound, the molding compound may enter the cavity through the opening in the cover or dome, thereby impairing the operation of the sensor.
[0026] An electronic device is disclosed herein, and more specifically, a cavity integrated circuit (IC) package that overcomes the challenges described above and a method of manufacturing the package. The electronic device includes a substrate that includes a sensor and a trench etched around the sensor to isolate the sensor from stresses that may occur during manufacturing, installation, and / or use. The electronic device further includes a metal plated wall formed on the active surface of the substrate surrounding the sensor. A cover including a laminate film is formed on the wall surrounding the sensor, thereby forming a cavity that encloses the sensor. The electronic device further includes an under bump metallization (UBM) layer formed on the active surface of the die. Solder is deposited on the UBM layer to form an electrical connection from the active surface of the substrate to an external electronic device (e.g., a printed circuit board (PCB)).
[0027] Figure 1A is a cross-sectional view of an example electronic device 100A that includes a substrate (e.g., a silicon wafer) 102, a sensor 104 formed in or on an active surface 106 of the substrate 102, and a cavity 108 that houses the sensor 104. The electronic device 100A can be constituted by an integrated circuit (IC), including (but not limited to) flip-chip packages, ball grid array (BGA) packages, etc. Although Figure 1A the illustrated example electronic device 100A shows a substrate 102 having a single sensor 104 disposed in the cavity 108, in other examples, the electronic device 100 can include multiple cavities having one or more sensors disposed in each cavity. Thus, Figure 1A the illustrated electronic device 100A is for illustrative purposes only and is not intended to limit the scope of the present invention.
[0028] The substrate 102 includes a continuous trench 110 formed around the sensor 104 for isolating the sensor 104 from stress during the manufacture, installation, or use of the electronic device 100A. In one example, at the wafer level, the sensor 104 is integrated into the active surface 106 of the substrate 102 such that the top surface of the sensor 104 is substantially flush with the active surface 106 of the substrate 102. In another example, the sensor 104 can be partially integrated into the active surface 106 of the substrate 102 such that the sensor 104 extends partially above the active surface 106 of the substrate 102. In yet another example, the sensor 104 can be disposed on the active surface 106 of the substrate 102 such that the sensor 104 is completely above the substrate 102. The sensor 104 can be configured to sense any of a variety of physical properties, such as humidity, light, sound, pressure, bulk acoustic waves, surface acoustic waves, stress, temperature, current, voltage, power, motion, acceleration, magnetic fields, and other physical properties. The active surface 106 of the substrate can include other circuitry coupled to the sensor 104 that is configured to receive and process signals from the sensor 104 in an appropriate manner. For example, a probe element (not shown) that interrogates the sensor 104 to generate a signal can be disposed under the sensor 104, across the sensor 104, or partially around the sensor, or sandwiched above and below the sensor 104 in the form of an interdigital lateral comb pattern. The interrogation signal can be in the form of frequency, current, resistance, capacitance, etc.
[0029] A conductive pad 112 is disposed on the active surface 106 of the substrate 102. An interconnect (UBM layer) 114 is electroplated onto the conductive pad 112, and solder 116 is deposited on the top surface of the interconnect 114. The conductive pad 112, the interconnect 114, and the solder 116 form an electrical connection from the substrate 102 to an external electronic device (e.g., a printed circuit board (PCB)).
[0030] A first laminate film 118 is formed on the active surface 106 of the substrate 102 and includes continuous openings 120 aligned with the trenches 110. In Figure 1A the illustrated example, the first laminate film 118 is formed above the sensor 104. Additionally, the first laminate film 118 includes an opening 122 formed above the conductive pad 112, thereby exposing the conductive pad 112 to receive the interconnect 114.
[0031] A continuous wall (e.g., a plated metal wall) 124 is formed on the first laminate film 118 and surrounds the sensor 104. The continuous wall 124 has an open top and is formed via an electroplating process as explained below and can have any shape (e.g., circular, square, rectangular, etc.). The continuous wall 124 can be formed of a metal such as (but not limited to) copper, aluminum, nickel, iron, etc. The dimensions of the continuous wall 124 are specific to the sensing application. For example, the continuous wall 124 can have a height in the range of 5 μm to 500 μm and a width (thickness) in the range of 5 μm to 1000 μm. The continuous wall 124 can have an inner diameter in the range of 10 μm to 1000 μm.
[0032] A cover (e.g., a second laminate film) 126 is formed on top of the continuous wall 124 and closes the open top, thereby enclosing the sensor 104 to protect the sensor from external elements or substances (e.g., solder, molding compound, external environmental elements, etc.). The cover 126 can have a thickness in the range of 5 μm to 500 μm. In Figure 1B an alternative example of the electronic device 100B shown in the cross-sectional view, as an option, a molding compound 128 can be formed above the substrate 102, the sensor 104, and the cavity 108 to increase protection from external elements.
[0033] Figure 2 and 3A -3N illustrate a manufacturing process associated with the fabrication of the Figure 1A illustrated electronic device 100A. Specifically, Figure 2 is a block diagram illustration of manufacturing process step 200, and Figures 3A - 3N illustrates a manufacturing process associated with the formation of the Figure 1A illustrated electronic device 100A. Although depicted sequentially for convenience, at least some of the actions shown can be performed in a different order and / or in parallel. Alternatively, some embodiments can perform only some of the actions shown. Furthermore, although Figure 2 and 3A -3N show examples that are example methods of showing the Figure 1A example configuration, other methods and configurations are also possible. It should be understood that although Figure 2 and 3AThe method shown in -3N depicts the manufacturing process of a single electronic device, but the process is applicable to an array of electronic devices. Thus, after manufacturing the array of electronic devices, the array is singulated to separate each electronic device 100A from the array.
[0034] See Figure 2 and Figures 3A - 3N , Figure 1A The manufacturing process of the electronic device 100A shown starts at a substrate array (e.g., a wafer) 300 at 202, as Figure 3A shown. Specifically, Figure 3A is a schematic diagram of the substrate array 300 according to various examples. For example, the substrate array 300 can be a silicon wafer. The manufacturing techniques described below can be performed on individual substrates (wafers) chips 302 (after singulation), or the techniques can be performed more efficiently on a mass scale, such as simultaneously on multiple substrate chips 302 of the substrate array 300 (before singulation). For convenience and clarity, the remaining figures show a single substrate (wafer) chip 302, and it should be understood that the processes described herein performed on a single substrate chip 302 can also be performed on the remaining substrate chips 302 of the substrate array 300 (e.g., sequentially, simultaneously).
[0035] Figure 3B shows a cross-sectional view of a single substrate chip (hereinafter referred to as "substrate") 302 singulated from the substrate array 300. At 204, a sensor 304 is deposited on the active surface 306 of the substrate 302, thereby creating Figure 3C the configuration of. As explained above, in another example, the sensor 304 can be integrated into the active surface 306 of the substrate 302 such that the top surface of the sensor 304 is substantially flush with the active surface 306 of the substrate 302. In yet another example, the sensor 304 can be partially integrated into the active surface 306 of the substrate 302. For example, in an application where the sensor 304 is configured to sense humidity, the sensor 304 is integrated into the substrate 302 as a lateral capacitor. The lateral capacitor uses a transducer dielectric (e.g., polyimide) on top as a functional material, which will change the dielectric constant as the humidity level changes, resulting in a change in capacitance.
[0036] At 206, a conductive pad 308 is deposited on the active surface 306 of the substrate 302, thereby creating Figure 3D the configuration in. The conductive pad 308 can be made of a conductive metal (e.g., copper, aluminum, etc.). At 208, a first laminate film 310 is deposited on the active surface 306 of the substrate 302 such that the first laminate film 310 covers the sensor 304 and the conductive pad 308, thereby creating Figure 3EConfiguration. At 210, a first photoresist material layer 312 is overlaid with a first laminate film 310 and is patterned and developed to expose an opening 314 in the first photoresist material layer 312 above the conductive pad 308 and an opening 316 surrounding the sensor 304, thereby creating Figure 3F Configuration. The first photoresist material layer 312 can have a thickness that varies corresponding to the wavelength of the radiation used to pattern the first photoresist material layer 312. The first photoresist material layer 312 can be formed over the first laminate film 310 via spin coating or spin casting deposition techniques, selectively irradiated (e.g., via deep ultraviolet (DUV) irradiation) and developed to form the opening 314.
[0037] At 212, Figure 3F The configuration in undergoes a first etching process 400 to form an opening 318 in the first laminate film 310 above the conductive pad 308, thereby exposing the surface of the conductive pad 308, and also to form a continuous opening 320 surrounding the sensor 304 in the first laminate film 310. The first photoresist material layer 312 is then removed, thereby creating Figure 3G Configuration. At 214, a second photoresist material layer 322 is overlaid with the first laminate film 310 and is patterned and developed to expose a continuous opening 324 in the second photoresist material layer 322 that is aligned with the continuous opening 320 in the first laminate film 310, thereby creating Figure 3H Configuration. The second photoresist material layer 322 can have a thickness that varies corresponding to the wavelength of the radiation used to pattern the second photoresist material layer 322. The second photoresist material layer 322 can be formed over the first laminate film 310 via spin coating or spin casting deposition techniques, selectively irradiated (e.g., via deep ultraviolet (DUV) irradiation) and developed to form the opening 324.
[0038] At 216, Figure 3H The configuration in undergoes a second etching process 410 to form a continuous trench 326 surrounding the sensor 304 in the substrate 302. The second photoresist material layer 322 is then removed, thereby creating Figure 3I Configuration. At 218, a third photoresist material layer 328 is overlaid with the first laminate film 310 and is patterned and developed to expose an opening 330 in the third photoresist material layer 328 above the conductive pad 308 and an opening 332 between the continuous trench 326 and the conductive pad 308, thereby creating Figure 3JConfiguration. The third photoresist material layer 328 may have a thickness that varies corresponding to the wavelength of the radiation used to pattern the third photoresist material layer 328. The third photoresist material layer 328 may be formed over the first laminate film 310 via a spin coating or spin casting deposition technique, selectively irradiated (e.g., via deep ultraviolet (DUV) irradiation), and developed to form openings 330, 332.
[0039] At 220, Figure 3J The configuration in is subjected to a plating process 420 to form interconnects (e.g., UBM layer) 334 on the conductive pads 308 and a continuous wall 336 surrounding the sensor 304 and the continuous trench 326 on the first laminate film 310. The third photoresist material layer 328 is then removed, thereby resulting in Figure 3K Configuration. At 222, a second laminate film 338 is deposited on the interconnects 334 and the continuous wall 336, thereby forming a cavity 340 covering the sensor 304, thereby resulting in Figure 3L Configuration. At 224, a portion of the second laminate film 338 that forms a cover 342 above the cavity 340 is exposed to ultraviolet (UV) light 430, thereby allowing an outer portion 344 of the second laminate film 338 to be removed via a liquid solution, thereby resulting in Figure 3M Configuration. Specifically, the second laminate film 338 is a negative photoresist material layer that becomes crosslinked when exposed to UV light. Thus, any portion of the second laminate film 338 that is not exposed to UV light can be washed away by a liquid solution. Accordingly, only the portion of the second laminate film 338 that forms the cover 342 is exposed to the UV light 430, and the outer portion 344 is removed via a liquid solution. At 226, solder 346 is placed on the interconnects 334, thereby resulting in Figure 3N The electronic device 348 shown in the configuration.
[0040] Examples of the present disclosure are described above. Of course, it is not possible to describe every conceivable combination of components or methods for the purpose of describing the present disclosure, but one of ordinary skill in the art will recognize that many additional combinations and permutations of the present disclosure are possible. Accordingly, the present disclosure is intended to cover all such alterations, modifications, and variations that fall within the spirit and scope of the appended claims. Additionally, where the present disclosure or claims recite "a," "an," "first," or "another" element or the equivalent thereof, it should be construed to include one or more of such elements, neither requiring nor precluding two or more of such elements. Further, insofar as the term "comprising" is used in the detailed description or claims, this term is intended to be inclusive in a manner similar to the term "including" as interpreted when used as a transitional word in a claim. Finally, the term "based on" is interpreted to mean at least in part based on.
Claims
1. An electronic device, comprising: A substrate having an active surface; A sensor disposed on the active surface of the substrate, the sensor being in communication with the active surface of the substrate; A continuous wall disposed on the active surface of the substrate, the continuous wall surrounding the sensor, the continuous wall having an open top; And A cover disposed on the top surface of the continuous wall, the cover closing the open top of the continuous wall to form a cavity inside the continuous wall to prevent foreign substances from entering the cavity.
2. The electronic device according to claim 1, wherein the substrate includes continuous trenches defined therein, the continuous trenches surrounding the sensor to isolate the sensor from stresses that may occur during manufacturing, installation, and / or use.
3. The electronic device according to claim 2, further comprising a conductive pad disposed on the active surface of the substrate.
4. The electronic device according to claim 3, further comprising a first laminated film formed on the active surface of the substrate, the first laminated film being formed above the sensor.
5. The electronic device according to claim 4, wherein the first laminated film includes continuous openings aligned with the continuous trenches and an opening aligned with the conductive pad to thereby expose the conductive pad.
6. The electronic device according to claim 4, wherein the continuous wall is formed on the first laminated film.
7. The electronic device according to claim 4, wherein the cover is composed of a second laminated film.
8. The electronic device according to claim 3, further comprising an interconnect formed on the conductive pad, the conductive pad and the interconnect providing an electrical connection from the substrate to an external electronic device via solder.
9. The electronic device according to claim 8, wherein the interconnect is an under-bump metallization layer.
10. The electronic device according to claim 1, further comprising a molding compound formed above the substrate, the sensor, and the cavity.
11. The electronic device according to claim 1, wherein the continuous wall has a circular, square, or rectangular shape.
12. A method, comprising: Providing a substrate having an active surface; Placing a sensor on the active surface of the substrate; Depositing a continuous wall around the sensor on the active surface of the substrate; And Forming a cover above the continuous wall to close the open top of the continuous wall, thereby forming a cavity inside the continuous wall.
13. The method according to claim 12, wherein providing the substrate includes etching continuous trenches in the substrate, the continuous trenches surrounding the sensor.
14. The method according to claim 13, wherein providing the substrate further includes depositing a conductive pad on the active surface of the substrate.
15. The method according to claim 14, wherein before depositing the continuous wall on the active surface of the substrate, the method includes depositing a first laminated film on the active surface of the substrate, and the first laminated film is formed above the sensor.
16. The method according to claim 15, further comprising etching continuous openings in the first laminated film, and the continuous openings are aligned with the continuous trenches in the substrate.
17. The method according to claim 16, further comprising etching an opening in the first laminated film, and the opening is aligned with the conductive pad to thereby expose the conductive pad.
18. The method according to claim 14, wherein depositing the continuous wall on the active surface of the substrate includes performing an electroplating process to deposit metal on the active surface of the substrate to form the continuous wall.
19. The method according to claim 18, further comprising performing the electroplating process to form an interconnect on the conductive pad.
20. The method according to claim 19, wherein the continuous wall is formed in a circular, square or rectangular shape.