Method and device for determining change parameters of two-dimensional ferroelectric transistor in polarization process and medium

Abstract

The invention discloses a method, a system and a device for determining change parameters of a two-dimensional ferroelectric transistor in a polarization process, and a storage medium. The method comprises the following steps: determining the intrinsic carrier concentration of a molybdenum disulfide region of the two-dimensional ferroelectric transistor, and obtaining a first capacitance-voltage curve of the molybdenum disulfide region when PZT is polarized; a plurality of second capacitance-voltage curves of different carrier concentrations in the molybdenum disulfide area are obtained through finite element analysis; comparing the first capacitance-voltage curve with each second capacitance-voltage curve, and determining a target carrier concentration-voltage curve; and according to the intrinsic carrier concentration, determining the voltage range of the carrier concentration of the two-dimensional ferroelectric transistor influenced by the PZT polarization from the target carrier concentration-voltage curve. The method can be widely applied to the technical field of semiconductors.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method, system, device and storage medium for determining the change parameters of a two-dimensional ferroelectric transistor during the polarization process. Background Art

[0002] In the related art, the voltage range in which PZT polarization affects the carrier concentration of a two-dimensional ferroelectric transistor can be used for the design and performance optimization of the two-dimensional ferroelectric transistor. However, in daily design experiments, since the capacitance-voltage curve of the molybdenum disulfide region of the two-dimensional ferroelectric transistor cannot be accurately obtained directly, data often needs to be manually collected and calculated. And the capacitance-voltage curve is often the most critical parameter for determining the voltage range in which PZT polarization affects the carrier concentration of the two-dimensional ferroelectric transistor, which results in an inaccurate voltage range in which PZT polarization affects the carrier concentration of the two-dimensional ferroelectric transistor in the related art, and further affects the subsequent design and performance optimization process of the two-dimensional ferroelectric transistor. Therefore, there are still technical problems to be solved in the related art. Summary of the Invention

[0003] The purpose of the present application is to solve at least to some extent one of the technical problems existing in the prior art.

[0004] To this end, an object of an embodiment of the present application is to provide a method, system, device and storage medium for determining the change parameters of a two-dimensional ferroelectric transistor during the polarization process, and this solution can improve data accuracy.

[0005] In order to achieve the above technical purpose, the technical solutions adopted in the embodiments of the present application include: A method for determining the change parameters of a two-dimensional ferroelectric transistor during the polarization process, including: determining the intrinsic carrier concentration of the molybdenum disulfide region of the two-dimensional ferroelectric transistor and obtaining the first capacitance-voltage curve of the molybdenum disulfide region of the two-dimensional ferroelectric transistor during PZT polarization; obtaining a plurality of second capacitance-voltage curves of different carrier concentrations of the molybdenum disulfide region through finite element analysis; comparing the first capacitance-voltage curve and each of the second capacitance-voltage curves to determine the target carrier concentration-voltage curve; and determining the voltage range in which PZT polarization affects the carrier concentration of the two-dimensional ferroelectric transistor from the target carrier concentration-voltage curve according to the intrinsic carrier concentration.

[0006] In addition, according to the above-mentioned embodiment of the present invention, a method for determining the change parameters of a two-dimensional ferroelectric transistor during the polarization process may further have the following additional technical features:

[0007] Further, in the embodiments of the present application, the determination of the intrinsic carrier concentration in the molybdenum disulfide region of the two-dimensional ferroelectric transistor specifically includes: obtaining a third capacitance-voltage curve and a dC / dV curve of the molybdenum disulfide region through sMIM testing; establishing a MIS structure model to determine a fourth capacitance-voltage curve and a dC / dV-amplitude curve at different doping concentrations; and determining the intrinsic carrier concentration in the molybdenum disulfide region according to the third capacitance-voltage curve, the fourth capacitance-voltage curve, the dC / dV curve, and the dC / dV-amplitude curve.

[0008] Further, in the embodiments of the present application, the obtaining of a plurality of second capacitance-voltage curves with different carrier concentrations in the molybdenum disulfide region through finite element analysis specifically includes: configuring the simulation material parameters of the two-dimensional ferroelectric transistor and establishing a semiconductor finite element equilibrium equation and a semiconductor frequency domain perturbation equation; adjusting the doping concentration and the applied voltage of the two-dimensional ferroelectric transistor, and extracting the insulating thin gate terminal charges corresponding to a plurality of different doping concentrations of the two-dimensional ferroelectric transistor; and normalizing the insulating thin gate terminal charges to obtain a plurality of second capacitance-voltage curves.

[0009] Further, in the embodiments of the present application, the semiconductor finite element equilibrium equation includes:

[0010]

[0011] E fn =E fp =E f0

[0012] J n =nqμ n ,J p =pqμ n

[0013] Where n is the electron concentration, p is the hole concentration, Nc is the effective density of states in the conduction band, Nv is the effective density of states in the valence band, q is the electric charge quantity, E fn is the Fermi level of electrons, E fp is the Fermi level of holes, E c is the conduction band energy level, E v is the valence band energy level, k B is the Boltzmann constant, T is the temperature, is the ionized donor concentration, is the ionized acceptor concentration, μ n and μ p are the electron mobilities.

[0014] Further, in the embodiments of the present application, the semiconductor frequency domain perturbation equilibrium equation includes:

[0015]

[0016] Among them, is the Hamiltonian operator, and q is the electric charge.

[0017] Furthermore, the boundary conditions of the finite element analysis include the insulating thin gate interface condition and the insulator interface condition;

[0018] The insulating thin gate interface condition includes:

[0019]

[0020] n1·J n =0, n1·J p =0;

[0021] The insulator interface condition includes

[0022] n1·J n =0, n1·J p =0

[0023] n1 is the number of boundary grids, ε ins is the dielectric constant of the insulating layer, ε0 is the permittivity of free space, d ins is the thickness of the insulating layer, V is the boundary electric potential, V0 is the applied voltage, is the metal work function V eq,adj is the equilibrium electric potential.

[0024] Furthermore, each of the second capacitance-voltage curves corresponds to a carrier concentration-voltage curve. Comparing the first capacitance-voltage curve and each of the second capacitance-voltage curves to determine the target carrier concentration-voltage curve specifically includes:

[0025] Comparing the first capacitance-voltage curve and each of the second capacitance-voltage curves;

[0026] Determining the second capacitance-voltage curve that fits the first capacitance-voltage curve as the target curve; taking the carrier concentration-voltage curve corresponding to the target curve as the target carrier concentration-voltage curve.

[0027] On the other hand, the embodiment of the present application further provides a system for determining the variation parameters of a two-dimensional ferroelectric transistor during the polarization process, including:

[0028] A first processing unit, configured to determine the intrinsic carrier concentration in the molybdenum disulfide region of the two-dimensional ferroelectric transistor and obtain the first capacitance-voltage curve of the molybdenum disulfide region of the two-dimensional ferroelectric transistor during PZT polarization;

[0029] A second processing unit, configured to obtain a plurality of second capacitance-voltage curves with different carrier concentrations in the molybdenum disulfide region through finite element analysis;

[0030] A third processing unit, configured to compare the first capacitance-voltage curve and each of the second capacitance-voltage curves to determine a target carrier concentration-voltage curve;

[0031] A fourth processing unit, configured to determine, according to the intrinsic carrier concentration, a voltage range in which the PZT polarization affects the carrier concentration of the two-dimensional ferroelectric transistor from the target carrier concentration-voltage curve.

[0032] On the other hand, the present application further provides a device for determining the change parameters of a two-dimensional ferroelectric transistor during the polarization process, including:

[0033] At least one processor;

[0034] At least one memory, configured to store at least one program;

[0035] When the at least one program is executed by the at least one processor, the at least one processor implements a method for determining the change parameters of a two-dimensional ferroelectric transistor during the polarization process as described in any one of the invention content.

[0036] In addition, the present application further provides a computer-readable storage medium, in which instructions executable by a processor are stored, and the instructions executable by the processor are used to execute a method for determining the change parameters of a two-dimensional ferroelectric transistor during the polarization process as described in any one of the above.

[0037] The advantages and beneficial effects of the present application will be partially given in the following description, partially will become obvious from the following description, or will be understood through the practice of the present application:

[0038] The present application can determine the intrinsic carrier concentration in the molybdenum disulfide region of a two-dimensional ferroelectric transistor and obtain the first capacitance-voltage curve of the molybdenum disulfide region during PZT polarization; obtain a plurality of second capacitance-voltage curves with different carrier concentrations in the molybdenum disulfide region through finite element analysis; compare the first capacitance-voltage curve and each of the second capacitance-voltage curves to determine a target carrier concentration-voltage curve; and determine, according to the intrinsic carrier concentration, a voltage range in which the PZT polarization affects the carrier concentration of the two-dimensional ferroelectric transistor from the target carrier concentration-voltage curve. The present application provides a new method for determining the voltage range of the carrier concentration of a two-dimensional ferroelectric transistor, improves the accuracy of determining the voltage range of the carrier concentration of a two-dimensional ferroelectric transistor, and provides a basis for the subsequent optimization of the device. Description of the Drawings

[0039] Figure 1Schematic diagram of the steps of a method for determining the changing parameters of a two-dimensional ferroelectric transistor during the polarization process in a specific embodiment of the present invention;

[0040] Figure 2 Schematic diagram of the sMIM and PFM experimental tests of a ferroelectric-semiconductor heterojunction in a specific embodiment of the present invention;

[0041] Figure 3 sMIM-C-V of a metal probe-insulator-semiconductor (MIS) structure sample in a specific embodiment of the present invention;

[0042] Figure 4 dC / dV - amplitude curve of a metal probe-insulator-semiconductor (MIS) structure sample in a specific embodiment of the present invention;

[0043] Figure 5 sMIM-C-V characteristic curve in a specific embodiment of the present invention if;

[0044] Figure 6 Schematic diagram of the mesh division structure in a specific embodiment of the present invention;

[0045] Figure 7 Carrier concentration - voltage curve fitted by finite element simulation in a specific embodiment of the present invention;

[0046] Figure 8 Schematic diagram of the structure of a system for determining the changing parameters of a two-dimensional ferroelectric transistor during the polarization process in a specific embodiment of the present invention;

[0047] Figure 9 Schematic diagram of the structure of a device for determining the changing parameters of a two-dimensional ferroelectric transistor during the polarization process in a specific embodiment of the present invention. Detailed implementation manners

[0048] The following describes in detail the embodiments of the present invention. The principles and processes of the method, system, device, and storage medium for determining the changing parameters of a two-dimensional ferroelectric transistor during the polarization process in the embodiments of the present invention are described as follows.

[0049] Refer to Figure 1 , A method for determining the changing parameters of a two-dimensional ferroelectric transistor during the polarization process of the present application includes the following steps S101 - step S104.

[0050] S101. Determine the intrinsic carrier concentration of the molybdenum disulfide region of the two-dimensional ferroelectric transistor and obtain the first capacitance-voltage curve of the molybdenum disulfide region during PZT polarization.

[0051] S102. Obtain a plurality of second capacitance-voltage curves with different carrier concentrations in the molybdenum disulfide region through finite element analysis.

[0052] S103. Compare the first capacitance-voltage curve and each second capacitance-voltage curve to determine the target carrier concentration-voltage curve.

[0053] S104. According to the intrinsic carrier concentration, determine the voltage range in which the PZT polarization affects the carrier concentration of the two-dimensional ferroelectric transistor from the target carrier concentration-voltage curve.

[0054] Further, in some feasible embodiments of the present application, the step of determining the intrinsic carrier concentration of the molybdenum disulfide region of the two-dimensional ferroelectric transistor specifically includes steps S201-S203.

[0055] S201. Obtain the third capacitance-voltage curve and the dC / dV curve of the molybdenum disulfide region through sMIM testing.

[0056] S202. Establish an MIS structure model and determine the fourth capacitance-voltage curve and the dC / dV-amplitude curve at different doping concentrations.

[0057] S203. Determine the intrinsic carrier concentration of the molybdenum disulfide region according to the third capacitance-voltage curve, the fourth capacitance-voltage curve, the dC / dV curve, and the dC / dV-amplitude curve.

[0058] Further, in some feasible embodiments of the present application, the step of obtaining a plurality of second capacitance-voltage curves with different carrier concentrations in the molybdenum disulfide region through finite element analysis specifically includes steps S301-S303.

[0059] S301. Configure the simulation material parameters of the two-dimensional ferroelectric transistor and establish the semiconductor finite element equilibrium equation and the semiconductor frequency domain perturbation equation.

[0060] S302. Adjust the doping concentration and the applied voltage of the two-dimensional ferroelectric transistor, and extract the insulating thin gate terminal charges corresponding to several different doping concentrations of the two-dimensional ferroelectric transistor.

[0061] S303. Normalize the insulating thin gate terminal charges to obtain a plurality of second capacitance-voltage curves.

[0062] Further, in some feasible embodiments of the present application, the semiconductor finite element equilibrium equation includes:

[0063]

[0064] E fn =E fp =Ef0

[0065] J n = nqu n , J p = pqμ n

[0066] Where n is the electron concentration, p is the hole concentration, Nc is the effective density of states in the conduction band, Nv is the effective density of states in the valence band, q is the electric charge, Efn is the Fermi level of electrons, Efp is the Fermi level of holes, Ec is the conduction band energy level, Ev is the valence band energy level, kB is the Boltzmann constant, and T is the temperature. The second equation is the charge balance equation, total charge = charge × (hole concentration - electron concentration + ionized donor concentration - ionized acceptor concentration). The third equation assumes that the Fermi levels of electrons and holes Efn and Efp are equal and equal to the Fermi level. The fourth and fifth equations are the electron current density equations, and μn and μp are the electron mobilities.

[0067] Furthermore, in some feasible embodiments of the present application, the semiconductor frequency domain perturbation balance equation includes:

[0068]

[0069] Where, is the Hamiltonian operator.

[0070] Furthermore, in some feasible embodiments of the present application, the boundary conditions for finite element analysis include the insulating thin gate interface condition and the insulator interface condition;

[0071] The insulating thin gate interface condition includes:

[0072] n1·J n = 0, n1·J p = 0

[0073] The insulator interface condition includes:

[0074]

[0075] n1·J n = 0, n1·J p = 0

[0076] n1 is the number of boundary grids, ε ins is the dielectric constant of the insulating layer, ε0 is the vacuum dielectric constant, d ins is the thickness of the insulating layer, V is the boundary electric potential, V0 is the applied voltage, is the metal work function V eq,adj is the equilibrium electric potential.

[0077] Further, in some feasible embodiments of the present application, each second capacitance-voltage curve corresponds to a carrier concentration-voltage curve. The step of comparing the first capacitance-voltage curve and each second capacitance-voltage curve to determine the target carrier concentration-voltage curve specifically includes steps S401 - S402.

[0078] S401. Compare the first capacitance-voltage curve and each second capacitance-voltage curve.

[0079] S402. Determine the second capacitance-voltage curve that fits the first capacitance-voltage curve as the target curve. Take the carrier concentration-voltage curve corresponding to the target curve as the target carrier concentration-voltage curve.

[0080] The following describes the specific implementation principle of the present application with reference to the accompanying drawings:

[0081] Traditionally, the characterization of ferroelectricity and carriers in FeFETs has mainly been carried out at the device level. For the polarization characteristics of the ferroelectric layer in FeFETs, a corresponding metal-ferroelectric-metal (MFM) capacitor is often prepared for testing. However, this indirect evaluation method may not accurately represent the polarization characteristics of the ferroelectric layer in metal-ferroelectric-semiconductor (MFS)-type FeFETs. For example, the ferroelectricity of HfO2 strongly depends on the strain effect of the adjacent layer 29, 30, so the test needs to be completed in situ. For the carrier characterization of the device, tests such as I-V and C-V are often used to obtain the overall electrical transport characteristics and indirectly infer information such as doping concentration. However, for mechanically exfoliated micron-scale 2D materials, C-V testing is usually difficult. In addition, optical methods such as SHG 32 and Terahertz Time-Domain Spectroscopy (THz-TDS) 33 are also used to study ferroelectric polarization and carrier characteristics respectively. However, the ferroelectric domain structure in 2D FeFETs is usually at the nanoscale 2, exceeding the spatial resolution limit of the above testing methods. Therefore, in order to better reveal the mechanism by which the carrier distribution in 2D FeFETs is regulated by ferroelectric polarization, a more refined in-situ microscopy method is needed.

[0082] Atomic force microscopy (AFM) has been widely used in 2D FeFET research due to its nanoscale spatial resolution and versatility. In terms of polarization characterization, piezoresponse force microscopy (PFM) has witnessed a series of important achievements in 2D ferroelectrics, ferroelectrics with slip, and their device applications. In terms of carrier characterization, scanning Kelvin probe microscopy (SKPM) is often used to characterize the surface potential of devices, indirectly reflecting the carrier distribution. In addition, conductive atomic force microscopy (cAFM) and scanning spreading resistance microscopy (SSRM) have also been successively used for microscopic electrical measurements. However, these tests all have certain limitations. Since KPFM is based on tapping mode measurement, its spatial resolution is difficult to observe nano-ferroelectric domains; the additional voltage applied by cAFM to measure the loop current may affect the heterojunction state; SSRM is easily affected by the parasitic series resistance existing in the system. Therefore, high-resolution characterization of carrier distribution at the nanoscale is not easy, and it is even more challenging to further achieve correlated characterization with polarization distribution.

[0083] 3.1 Experimental Characterization Principle

[0084] The experimental characterization is based on scanning microwave impedance microscopy (sMIM) and piezoresponse force microscopy (PFM):

[0085] 1. sMIM: Measures the admittance between the conductive probe tip and the sample in the microwave frequency band (about 3 GHz), providing high-spatial-resolution capacitance and impedance images.

[0086] 2. PFM: Characterizes the polarization properties of ferroelectric materials.

[0087] As Figures 2 - 4 shown, sMIM measures the admittance between the conductive probe tip and the sample in the microwave frequency band, where the sMIM-C signal changes with the increase in the conductivity of the sample. By applying different DC voltages, the C-V characteristics and dC / dV characteristics of the sample can be obtained, and then the carrier concentration distribution and majority carrier type can be analyzed. Figure 2 Shows a schematic diagram of the experimental test of ferroelectric-semiconductor heterojunction by sMIM and PFM. Figure 3 and Figure 4 respectively show the sMIM-C-V of the metal probe-insulator-semiconductor (MIS) structure sample and the dC / dV-amplitude curve of the metal probe-insulator-semiconductor (MIS) structure sample.

[0088] 3.2 Combining Experiment and Simulation to Determine Carrier Concentration

[0089] By combining experiment with the finite element simulation method, first determine the intrinsic carrier concentration of few-layer molybdenum disulfide:

[0090] 1. Obtain the C-V and dC / dV curves of the molybdenum disulfide region through sMIM testing.

[0091] 2. Establish an MIS structure model, simulate the C-V and dC / dV-amplitude curves under different doping concentrations, and confirm that the intrinsic carrier concentration of few-layer molybdenum disulfide is 1018 cm -3 .

[0092] I. Establish the finite element equilibrium equation

[0093] 1. Finite element equilibrium equation of semiconductor

[0094]

[0095] E fn = E fp = E f0

[0096] J n = nqμ n , J p = pqμ n

[0097] The first equation is the relationship between electron and hole concentrations. Among them, n is the electron concentration, p is the hole concentration, N c and Nv are the effective density of states of the conduction band and valence band respectively, q is the charge quantity, E fn and E fp are the Fermi levels of electrons and holes, Ec and Ev are the conduction band and valence band energy levels, kB is the Boltzmann constant, T is the temperature, N d and N a are the donor concentration and acceptor concentration respectively, and are the ionized donor concentration and acceptor concentration respectively.

[0098] The second equation is the charge balance equation, total charge quantity = charge quantity × (hole concentration - electron concentration + ionized donor concentration - ionized acceptor concentration);

[0099] The third equation assumes that the Fermi levels of electrons and holes Efn and Efp are equal and equal to the Fermi level;

[0100] The fourth and fifth equations are the electron current density equations, μn and μp are the electron mobilities.

[0101] 2. Frequency domain perturbation equilibrium equation of semiconductor

[0102]

[0103] The frequency domain perturbation formula is that the integral of the carrier concentration with respect to time t is equal to the divergence of the current density.

[0104] II. Determine the boundary conditions

[0105] 1. Insulator interface

[0106] n1·J n = 0, n1·J p = 0

[0107] n1 is the number of boundary grids.

[0108] 2. Insulating thin gate interface

[0109]

[0110] n1·J n = 0, n1·J p = 0

[0111] n1 is the number of boundary grids, ε ins is the dielectric constant of the insulating layer, ε0 is the permittivity of free space, d ins is the thickness of the insulating layer, V is the boundary electric potential, V0 is the applied voltage, is the metal work function V eq,adj is the equilibrium electric potential, is the Hamiltonian operator.

[0112] III. Finite element modeling.

[0113] Refer to Figure 6 , and perform finite element modeling and mesh generation according to the dimensions of the experimental sample;

[0114] Set the simulated material parameters according to the dimensions of the experimental sample. By establishing the semiconductor equilibrium and frequency domain perturbation equations, change the doping concentration N A and the applied voltage V0, extract the charges at the insulating thin gate terminal, which is the key factor for quantitative analysis, and finally obtain its normalized capacitance-voltage curve.

[0115] IV. Quantitative analysis

[0116] By comparing the experimental sMIM-C-V characteristic curve with the finite element simulation data, determine the simulated C-V curve that best fits the experimental data, and determine the two-dimensional carrier concentration of molybdenum disulfide. Figure 5 Shows the experimental sMIM-C-V characteristic curve and Figure 7 shows the carrier concentration-voltage curve fitted by finite element simulation.

[0117] 3.3 Influence of ferroelectric polarization on carrier concentration

[0118] Furthermore, by combining experiments and simulations, determine the influence of ferroelectric polarization on the carrier concentration of molybdenum disulfide (MoS2):

[0119] 1. Obtain the C-V curve of the carrier concentration of molybdenum disulfide regulated by PZT polarization through sMIM testing.

[0120] 2. Determine the influence range of PZT polarization reversal on the carrier concentration and quantify its influence.

[0121] Establish the same model according to 3.2. By changing the voltage applied to the insulating substrate, obtain the same simulated C-V curve. Compare the experimental sMIM-C-V curve with the simulated C-V curve to obtain the voltage range in which the polarization affects the carrier concentration, extract the majority carrier concentration n, and obtain the range of the change in the carrier concentration of molybdenum disulfide affected by the polarization.

[0122] In addition, referring to Figure 8 , corresponding to the method of Figure 1 , an embodiment of the present application also provides a system for determining the change parameters of a two-dimensional ferroelectric transistor during the polarization process. The system may include: a first processing unit 1001, a second processing unit 1002, a third processing unit 1003, and a fourth processing unit 1004. Among them, the first unit 1001 can determine the intrinsic carrier concentration of the molybdenum disulfide region of the two-dimensional ferroelectric transistor and obtain the first capacitance-voltage curve of the molybdenum disulfide region during PZT polarization. The second processing unit 1002 can obtain a plurality of second capacitance-voltage curves of different carrier concentrations of the molybdenum disulfide region through finite element analysis. The third processing unit 1003 can compare the first capacitance-voltage curve and each of the second capacitance-voltage curves to determine the target carrier concentration-voltage curve. The fourth processing unit 1004 is used to determine the voltage range in which the PZT polarization affects the carrier concentration of the two-dimensional ferroelectric transistor from the target carrier concentration-voltage curve according to the intrinsic carrier concentration.

[0123] It should be noted that the third unit can be any integrated circuit unit or microprocessor unit obtained by integrating a processing function chip and its peripheral circuits through existing integration technologies. The first processing unit and the second processing unit can also be any integrated circuit module or microprocessor module obtained by integrating a processing function chip and its peripheral circuits through existing integration technologies. The first processing unit and the second processing unit may also include one or more memories. One or more memories can be used to store the specific algorithms for compression adjustment processing in the present application.

[0124] It should be noted that the content in the embodiments of the method for determining the change parameters of the two-dimensional ferroelectric transistor during the polarization process is applicable to the embodiments of the system for determining the change parameters of the two-dimensional ferroelectric transistor during the polarization process. The functions specifically implemented in the embodiments of the system for determining the change parameters of the two-dimensional ferroelectric transistor during the polarization process are the same as those in the embodiments of the method for determining the change parameters of the two-dimensional ferroelectric transistor during the polarization process, and the beneficial effects achieved are also the same as those in the embodiments of the method for determining the change parameters of the two-dimensional ferroelectric transistor during the polarization process.

[0125] In addition, in some embodiments of the present application, the system for determining the change parameters of the two-dimensional ferroelectric transistor during the polarization process can also be divided into two modules, namely, a traffic analysis module A and a compression module B: The traffic analysis module A is used to determine whether to perform compression by judging the characteristics of the request message. The compression module B can integrate any one or more of the methods described in the above method embodiments for determining the change parameters of the two-dimensional ferroelectric transistor during the polarization process. The compression module B directly compresses the DNS response message that meets the preset traffic characteristics output by the traffic analysis module A to obtain the target response message and responds with the compressed response message to the client.

[0126] Corresponding to Figure 1 the method of Figure 9 , the embodiments of the present application also provide a device for determining the change parameters of the two-dimensional ferroelectric transistor during the polarization process, and its specific structure can be referred to

[0127] at least one processor 1011;

[0128] at least one memory 1012, used to store at least one program;

[0129] When the at least one program is executed by the at least one processor, the at least one processor implements the method for determining the change parameters of the two-dimensional ferroelectric transistor during the polarization process.

[0130] The content in the above method embodiments is applicable to the embodiments of this device. The functions specifically implemented in the embodiments of this device are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those in the above method embodiments.

[0131] Corresponding to Figure 1 the method of

[0132] The content in the embodiments of the method for determining the change parameters of the two-dimensional ferroelectric transistor in the above polarization process is applicable to the embodiments of this storage medium. The functions specifically implemented in the embodiments of this storage medium are the same as those in the embodiments of the method for determining the change parameters of the two-dimensional ferroelectric transistor in the above polarization process, and the beneficial effects achieved are also the same as those in the embodiments of the method for determining the change parameters of the two-dimensional ferroelectric transistor in the above polarization process.

[0133] In some alternative embodiments, the functions / operations mentioned in the block diagrams may not occur in the order mentioned in the operation diagrams. For example, depending on the functions / operations involved, two consecutive blocks shown may actually be executed substantially simultaneously or the blocks can sometimes be executed in the reverse order. Additionally, the embodiments presented and described in the flowcharts of this application are provided by way of example for the purpose of providing a more comprehensive understanding of the technology. The disclosed method is not limited to the operations and logical flows presented herein. Alternative embodiments are contemplated where the order of various operations is changed and where sub-operations described as part of a larger operation are executed independently.

[0134] Furthermore, although this application has been described in the context of functional modules, it should be understood that, unless otherwise stated to the contrary, one or more of the functions and / or features may be integrated in a single physical device and / or software module, or one or more functions and / or features may be implemented in separate physical devices or software modules. It can also be understood that a detailed discussion of the actual implementation of each module is not necessary for understanding this application. Rather, given the attributes, functions, and internal relationships of the various functional modules in the devices disclosed herein, the actual implementation of the modules will be understood within the ordinary skill of an engineer. Thus, those skilled in the art can implement this application as set forth in the claims without undue experimentation. It can also be understood that the specific concepts disclosed are merely illustrative and are not intended to limit the scope of this application, which is determined by the full scope of the appended claims and their equivalents.

[0135] If the above-described functions are implemented in the form of software function units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several programs for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of this application. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs.

[0136] The logic and / or steps represented in the flowchart or described in other ways herein, for example, can be considered as a predefined sequence list of executable programs for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by a program execution system, apparatus, or device (such as a computer-based system, a system including a processor, or other systems that can obtain and execute the program from the program execution system, apparatus, or device), or in conjunction with these program execution systems, apparatus, or devices. For the purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by or in conjunction with a program execution system, apparatus, or device.

[0137] More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection part with one or more wirings (electronic device), a portable computer disk cartridge (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, a computer-readable medium can even be paper or other suitable media on which the program can be printed, because the program can be obtained electronically, for example, by optically scanning the paper or other media, followed by editing, interpretation, or other appropriate processing when necessary, and then stored in a computer memory.

[0138] It should be understood that various parts of the present application can be implemented by hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable program execution system. For example, if implemented by hardware, as in another embodiment, any one or a combination of the following techniques well known in the art can be used: discrete logic circuits having logic gate circuits for implementing logical functions on data signals, application specific integrated circuits having appropriate combinational logic gate circuits, programmable gate arrays (PGAs), field programmable gate arrays (FPGAs), and the like.

[0139] In the foregoing description of the present specification, descriptions referring to the terms "one embodiment / example", "another embodiment / example", or "certain embodiments / examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0140] Although the embodiments of the present application have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present application. The scope of the present application is defined by the claims and their equivalents.

[0141] The above has specifically described the preferred embodiments of the present application, but the present application is not limited to the described embodiments. Those skilled in the art can also make various equivalent deformations or substitutions without departing from the spirit of the present application, and these equivalent deformations or substitutions are all included within the scope defined by the claims of the present application.

Claims

1. A method for determining the change parameters of a two-dimensional ferroelectric transistor during the polarization process, characterized in that It includes the following steps: Determine the intrinsic carrier concentration of the molybdenum disulfide region of the two-dimensional ferroelectric field-effect transistor and obtain the first capacitance-voltage curve of the molybdenum disulfide region; Obtain several second capacitance-voltage curves of different carrier concentrations in the molybdenum disulfide region through finite element analysis; Compare the first capacitance-voltage curve and each of the second capacitance-voltage curves to determine the target carrier concentration-voltage curve; According to the intrinsic carrier concentration, determine the voltage range in which the PZT polarization affects the carrier concentration of the two-dimensional ferroelectric transistor from the target carrier concentration-voltage curve.

2. The method for determining the variation parameters of a two-dimensional ferroelectric transistor during the polarization process according to claim 1, wherein The determination of the intrinsic carrier concentration of the molybdenum disulfide region of the two-dimensional ferroelectric transistor specifically includes: Obtain the third capacitance-voltage curve and the dC / dV curve of the molybdenum disulfide region through sMIM testing; Establish an MIS structure model and determine the fourth capacitance-voltage curve and the dC / dV-amplitude curve at different doping concentrations; Determine the intrinsic carrier concentration of the molybdenum disulfide region according to the third capacitance-voltage curve, the fourth capacitance-voltage curve, the dC / dV curve, and the dC / dV-amplitude curve.

3. The method for determining the change parameters of a two-dimensional ferroelectric transistor during the polarization process according to claim 1, characterized in that The obtaining of several second capacitance-voltage curves of different carrier concentrations in the molybdenum disulfide region through finite element analysis specifically includes: Configure the simulation material parameters of the two-dimensional ferroelectric transistor and establish the semiconductor finite element equilibrium equation and the semiconductor frequency domain perturbation equation; Adjust the doping concentration and the applied voltage of the two-dimensional ferroelectric transistor, and extract the insulating thin gate terminal charges corresponding to several different doping concentrations of the two-dimensional ferroelectric transistor; Normalize the insulating thin gate terminal charges to obtain several second capacitance-voltage curves.

4. The method for determining the change parameters of a two-dimensional ferroelectric transistor during the polarization process according to claim 3, wherein The semiconductor finite element equilibrium equation includes: E fn = E fp = E f0 J n = nqμ n , J p = pqμ n where n is the electron concentration, p is the hole concentration, Nc is the effective density of states in the conduction band, Nv is the effective density of states in the valence band, q is the electric charge, E fn is the Fermi level of electrons, E fp is the Fermi level of holes, E c is the conduction band energy level, E v is the valence band energy level, k B is the Boltzmann constant, T is the temperature, is the ionized donor concentration, is the ionized acceptor concentration, μ n and μ p is the electron mobility.

5. The method for determining the variation parameters of a two-dimensional ferroelectric transistor during the polarization process according to claim 4, characterized in that The semiconductor frequency domain perturbation equilibrium equation includes: Among them, is the Hamiltonian operator, and q is the electric charge.

6. The method for determining the change parameters of a two-dimensional ferroelectric transistor during the polarization process according to claim 4, wherein The boundary conditions of the finite element analysis include the insulating thin gate interface condition and the insulator interface condition; The insulating thin gate interface condition includes: n1·J n = 0, n1·J p = 0 The insulator interface condition includes. n1·J n = 0, n1·J p = 0 n1 is the number of boundary grids, ε ins is the dielectric constant of the insulating layer, ε0 is the permittivity of free space, d ins is the thickness of the insulating layer, V is the boundary electric potential, V0 is the applied voltage, is the metal work function V eq,adj is the equilibrium electric potential.

7. The method for determining the change parameters of a two-dimensional ferroelectric transistor during the polarization process according to claim 1, wherein Each of the second capacitance-voltage curves corresponds to a carrier concentration-voltage curve. The comparison of the first capacitance-voltage curve and each of the second capacitance-voltage curves to determine the target carrier concentration-voltage curve specifically includes: Compare the first capacitance-voltage curve and each of the second capacitance-voltage curves; Determine the second capacitance-voltage curve that fits the first capacitance-voltage curve as the target curve; Use the carrier concentration-voltage curve corresponding to the target curve as the target carrier concentration-voltage curve.

8. A system for determining the changing parameters of a two-dimensional ferroelectric transistor during a polarization process, characterized in that, It includes: The first processing unit is used to determine the intrinsic carrier concentration of the molybdenum disulfide region of the two-dimensional ferroelectric transistor and obtain the first capacitance-voltage curve of the molybdenum disulfide region of the two-dimensional ferroelectric transistor during PZT polarization; The second processing unit is used to obtain several second capacitance-voltage curves of different carrier concentrations in the molybdenum disulfide region through finite element analysis; The third processing unit is used to compare the first capacitance-voltage curve and each of the second capacitance-voltage curves to determine the target carrier concentration-voltage curve; A fourth processing unit, configured to determine, according to the intrinsic carrier concentration, a voltage range in which the PZT polarization affects the carrier concentration of the two-dimensional ferroelectric transistor from the target carrier concentration-voltage curve.

9. A device for determining the change parameters of a two-dimensional ferroelectric transistor during a polarization process, characterized in that Comprising: At least one processor; At least one memory for storing at least one program; When the at least one program is executed by the at least one processor, the at least one processor implements a method for determining change parameters of a two-dimensional ferroelectric transistor during a polarization process as described in any one of claims 1-7.

10. A computer-readable storage medium storing instructions executable by a processor, characterized in that, The instructions executable by the processor, when executed by the processor, are used to execute a method for determining change parameters of a two-dimensional ferroelectric transistor during a polarization process as described in any one of claims 1-7.

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