Rfid tag chip and power management method thereof

Abstract

The application discloses an RFID tag chip and a power management method thereof, and relates to the field of radio frequency technology.The RFID tag chip comprises a radio frequency antenna, which is suitable for receiving high-frequency electromagnetic wave signals or ultrahigh-frequency electromagnetic wave signals; a high-frequency analog circuit and a high-frequency digital circuit, the high-frequency analog circuit is configured to demodulate the high-frequency electromagnetic wave signals, and generate a high-frequency reset signal when the high-frequency electromagnetic wave signals are received; an ultrahigh-frequency analog circuit and an ultrahigh-frequency digital circuit, the ultrahigh-frequency analog circuit is configured to demodulate the ultrahigh-frequency electromagnetic wave signals, and generate an ultrahigh-frequency reset signal when the ultrahigh-frequency electromagnetic wave signals are received; and a power management module, which is configured to control the power-off of at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultrahigh-frequency analog circuit and the ultrahigh-frequency digital circuit according to at least one of the high-frequency reset signal and the ultrahigh-frequency reset signal.The RFID tag chip has no static power consumption and dynamic power consumption, and has low power consumption.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of radio frequency technology, in particular to an RFID tag chip and a power management method thereof. BACKGROUND

[0002] Dual-frequency RFID (Radio Frequency Identification) technology combines the advantages of high frequency and ultra-high frequency to realize non-contact automatic identification and plays an important role in power systems. As a kind of digital-analog hybrid chip, the power consumption problem of the RFID tag chip has always been a key factor restricting its performance and application range. The power consumption of the RFID tag chip mainly comes from dynamic power consumption and static power consumption. The dynamic power consumption includes flip power consumption and short-circuit power consumption, which is mainly generated by the digital circuit when performing functions. The static power consumption is mainly composed of leakage current power consumption. Even in the case of not performing any operation, there will be a small current flowing in the chip, thereby generating power consumption. In the related technology, the clock gating technology is used to close the clock of the digital module that does not work, so as to reduce the dynamic power consumption of the RFID chip. However, this method cannot reduce the static power consumption of the chip, and therefore, the power consumption of the RFID chip is still high. SUMMARY

[0003] The present application aims to at least solve one of the technical problems in the related art. To this end, the first object of the present application is to provide an RFID tag chip, according to at least one of a high-frequency reset signal and an ultra-high-frequency reset signal, it can be judged which circuits in the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit do not need to work, and the power management module can control the circuit to power down, so that the circuit enters the closed state, therefore, the circuit will not have static power consumption and dynamic power consumption, thereby reducing the power consumption of the RFID tag chip.

[0004] The second object of the present application is to provide a power management method of an RFID tag chip.

[0005] To achieve the above object, according to an embodiment of the first aspect of the present application, an RFID tag chip is provided, comprising: a radio frequency antenna adapted to receive a high frequency electromagnetic wave signal or an ultra-high frequency electromagnetic wave signal; a high frequency analog circuit and a high frequency digital circuit, the high frequency analog circuit being configured to demodulate the high frequency electromagnetic wave signal to obtain a high frequency downlink command, and generate a high frequency reset signal in the case of receiving the high frequency electromagnetic wave signal, the high frequency digital circuit being configured to execute the high frequency downlink command; an ultra-high frequency analog circuit and an ultra-high frequency digital circuit, the ultra-high frequency analog circuit being configured to demodulate the ultra-high frequency electromagnetic wave signal to obtain an ultra-high frequency downlink command, and generate an ultra-high frequency reset signal in the case of receiving the ultra-high frequency electromagnetic wave signal, the ultra-high frequency digital circuit being configured to execute the ultra-high frequency downlink command; a power management module, the power management module being configured to control at least two of the high frequency analog circuit and the high frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit to power down according to at least one of the high frequency reset signal and the ultra-high frequency reset signal.

[0006] According to the RFID tag chip of the embodiment of the present application, the RFID tag chip comprises a radio frequency antenna, a high frequency analog circuit and a high frequency digital circuit, an ultra-high frequency analog circuit and an ultra-high frequency digital circuit, and a power management module, wherein the radio frequency antenna is adapted to receive a high frequency electromagnetic wave signal or an ultra-high frequency electromagnetic wave signal, the high frequency analog circuit is configured to demodulate the high frequency electromagnetic wave signal to obtain a high frequency downlink command, and generate a high frequency reset signal in the case of receiving the high frequency electromagnetic wave signal, the high frequency digital circuit is configured to execute the high frequency downlink command, the ultra-high frequency analog circuit is configured to demodulate the ultra-high frequency electromagnetic wave signal to obtain an ultra-high frequency downlink command, and generate an ultra-high frequency reset signal in the case of receiving the ultra-high frequency electromagnetic wave signal, the ultra-high frequency digital circuit is configured to execute the ultra-high frequency downlink command, and the power management module is configured to control at least two of the high frequency analog circuit and the high frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit to power down according to at least one of the high frequency reset signal and the ultra-high frequency reset signal. Thus, according to at least one of the high frequency reset signal and the ultra-high frequency reset signal, it can be determined which of the high frequency analog circuit and the high frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit do not need to work, and the power management module can control the circuit to power down, so that the circuit enters an off state, and therefore, the circuit has no static power consumption and dynamic power consumption, thereby reducing the power consumption of the RFID tag chip.

[0007] According to one embodiment of the present application, the power management module is further configured to, in the case of receiving the high-frequency reset signal and not receiving the super-high-frequency reset signal, perform power-off control on the super-high-frequency analog circuit and the super-high-frequency digital circuit; or in the case of not receiving the high-frequency reset signal and receiving the super-high-frequency reset signal, perform power-off control on the high-frequency analog circuit and the high-frequency digital circuit; or in the case of receiving the high-frequency reset signal and the super-high-frequency reset signal, perform power-off control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the super-high-frequency analog circuit and the super-high-frequency digital circuit according to a first generation time of the high-frequency reset signal and a second generation time of the super-high-frequency reset signal.

[0008] According to one embodiment of the present application, the power management module is further configured to, in the case of the first generation time being earlier than the second generation time, perform power-off control on the super-high-frequency analog circuit and the super-high-frequency digital circuit; or in the case of the second generation time being earlier than the first generation time, perform power-off control on the high-frequency analog circuit and the high-frequency digital circuit; or in the case of the first generation time being the same as the second generation time, perform power-off control on at least two of the high-frequency analog circuit and the high-frequency digital circuit and the super-high-frequency analog circuit and the super-high-frequency digital circuit according to a first analysis time of the high-frequency digital circuit on the high-frequency downlink command and a second analysis time of the super-high-frequency digital circuit on the super-high-frequency downlink command.

[0009] According to one embodiment of the present application, the power management module is further configured to, in the case of the first analysis time being earlier than the second analysis time, perform power-off control on the super-high-frequency analog circuit and the super-high-frequency digital circuit; or in the case of the second analysis time being earlier than the first analysis time, perform power-off control on the high-frequency analog circuit and the high-frequency digital circuit; or in the case of the first analysis time being the same as the second analysis time, perform power-off control on the high-frequency analog circuit and the super-high-frequency digital circuit and the super-high-frequency analog circuit and the super-high-frequency digital circuit respectively.

[0010] According to one embodiment of the present application, the high-frequency analog circuit comprises: a high-frequency reset generation module configured to generate a high-frequency reset signal in the case of receiving a high-frequency electromagnetic wave signal, and send the high-frequency reset signal to the power management module; a high-frequency power generation unit configured to generate a power supply of the high-frequency digital circuit according to the high-frequency electromagnetic wave signal in the case of receiving the high-frequency electromagnetic wave signal; a high-frequency demodulation module configured to demodulate the high-frequency electromagnetic wave signal to generate a high-frequency downlink command, and send the high-frequency downlink command to the high-frequency digital circuit, so that the high-frequency digital circuit executes the high-frequency downlink command and returns high-frequency uplink data; and a high-frequency modulation module configured to modulate the high-frequency uplink data to generate a high-frequency electromagnetic carrier, and transmit the high-frequency electromagnetic carrier to the radio frequency antenna to transmit the high-frequency electromagnetic carrier through the radio frequency antenna.

[0011] According to one embodiment of the present application, the high-frequency digital circuit comprises: a high-frequency downlink decoding module configured to decode the high-frequency downlink command to obtain a high-frequency decoding signal; a high-frequency command parsing module configured to parse the high-frequency decoding signal to obtain a high-frequency command type and a high-frequency command parameter; a high-frequency state control module configured to control the state of the RFID tag chip according to the high-frequency command type and the high-frequency command parameter, and determine the type of high-frequency uplink data; and a high-frequency uplink encoding module configured to encode the uplink data according to the type of high-frequency uplink data and the state of the RFID tag chip to generate high-frequency uplink data.

[0012] According to one embodiment of the present application, the power management module is connected to the high-frequency downlink decoding module, the high-frequency command parsing module, the high-frequency state control module and the high-frequency uplink encoding module, and is further configured to provide the power supply of the high-frequency digital circuit to the high-frequency downlink decoding module after receiving the high-frequency reset signal, so as to power on the high-frequency downlink decoding module, and provide the power supply of the high-frequency digital circuit to the high-frequency command parsing module, the high-frequency state control module and the high-frequency uplink encoding module in sequence after receiving the control signal sent by the high-frequency downlink decoding module, so as to power on the high-frequency command parsing module, the high-frequency state control module and the high-frequency uplink encoding module in sequence.

[0013] According to one embodiment of the present application, the power management module is further configured to control the high-frequency uplink encoding module, the high-frequency state control module and the high-frequency command parsing module to power off in sequence in the case that the RFID tag chip executes the high-frequency downlink command.

[0014] According to one embodiment of the present application, the ultra-high-frequency analog circuit comprises: an ultra-high-frequency reset generation module configured to generate an ultra-high-frequency reset signal in the case that an ultra-high-frequency electromagnetic wave signal is received, and send the ultra-high-frequency reset signal to the power management module; an ultra-high-frequency power generation unit configured to generate a power supply of the ultra-high-frequency digital circuit according to the ultra-high-frequency electromagnetic wave signal in the case that the ultra-high-frequency electromagnetic wave signal is received; an ultra-high-frequency demodulation module configured to demodulate the ultra-high-frequency electromagnetic wave signal to generate an ultra-high-frequency downlink command, and send the ultra-high-frequency downlink command to the high-frequency digital circuit, so that the high-frequency digital circuit executes the ultra-high-frequency downlink command and returns ultra-high-frequency uplink data; and an ultra-high-frequency modulation module configured to modulate the ultra-high-frequency uplink data to generate an ultra-high-frequency electromagnetic carrier, and transmit the ultra-high-frequency electromagnetic carrier to the radio frequency antenna, so that the radio frequency antenna transmits the ultra-high-frequency electromagnetic carrier.

[0015] According to one embodiment of the present application, the UHF digital circuit comprises: a UHF downlink decoding module configured to decode a UHF downlink command to obtain a UHF decoding signal; a UHF command parsing module configured to parse the UHF decoding signal to obtain a UHF command type and a UHF command parameter; a UHF state control module configured to control a state of the RFID tag chip according to the UHF command type and the UHF command parameter, and determine a type of UHF uplink data; and a UHF uplink encoding module configured to encode the UHF uplink data according to the type of UHF uplink data and the state of the RFID tag chip to generate UHF uplink data.

[0016] According to one embodiment of the present application, the power management module is connected to the UHF downlink decoding module, the UHF command parsing module, the UHF state control module and the UHF uplink encoding module, and is further configured to provide a power supply of the UHF digital circuit to the UHF downlink decoding module after receiving a UHF reset signal, so as to power on the UHF downlink decoding module, and provide the power supply of the UHF digital circuit to the UHF command parsing module, the UHF state control module and the UHF uplink encoding module in sequence after receiving a control signal sent by the UHF downlink decoding module, so as to power on the UHF command parsing module, the UHF state control module and the UHF uplink encoding module in sequence.

[0017] According to one embodiment of the present application, the power management module is further configured to control the UHF uplink encoding module, the UHF state control module and the UHF command parsing module to power off in sequence in the case that the RFID tag chip executes the UHF downlink command.

[0018] According to one embodiment of the present application, the power management module comprises: a high-frequency power switch connected to the high-frequency analog circuit and the high-frequency digital circuit, and configured to control power on and power off of the high-frequency analog circuit and the high-frequency digital circuit; and a UHF power switch connected to the UHF analog circuit and the UHF digital circuit, and configured to control power on and power off of the UHF analog circuit and the UHF digital circuit.

[0019] To achieve the above object, according to the second aspect of the present application, a power management method of an RFID tag chip is provided. The RFID tag chip comprises a radio frequency antenna, a high frequency analog circuit and a high frequency digital circuit, an ultra-high frequency analog circuit and an ultra-high frequency digital circuit. The radio frequency antenna is adapted to receive a high frequency electromagnetic wave signal or an ultra-high frequency electromagnetic wave signal. The high frequency analog circuit is configured to demodulate the high frequency electromagnetic wave signal to obtain a high frequency downlink command, and generate a high frequency reset signal in the case of receiving the high frequency electromagnetic wave signal. The high frequency digital circuit is configured to execute the high frequency downlink command. The ultra-high frequency analog circuit is configured to demodulate the ultra-high frequency electromagnetic wave signal to obtain an ultra-high frequency downlink command, and generate an ultra-high frequency reset signal in the case of receiving the ultra-high frequency electromagnetic wave signal. The ultra-high frequency digital circuit is configured to execute the ultra-high frequency downlink command. The method comprises: powering down at least two of the high frequency analog circuit and the high frequency digital circuit, and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit according to at least one of the high frequency reset signal and the ultra-high frequency reset signal.

[0020] According to the power management method of the RFID tag chip, at least two of the high frequency analog circuit and the high frequency digital circuit, and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit are powered down according to at least one of the high frequency reset signal and the ultra-high frequency reset signal. The RFID tag chip comprises a radio frequency antenna, a high frequency analog circuit and a high frequency digital circuit, an ultra-high frequency analog circuit and an ultra-high frequency digital circuit. The radio frequency antenna is adapted to receive a high frequency electromagnetic wave signal or an ultra-high frequency electromagnetic wave signal. The high frequency analog circuit is configured to demodulate the high frequency electromagnetic wave signal to obtain a high frequency downlink command, and generate a high frequency reset signal in the case of receiving the high frequency electromagnetic wave signal. The high frequency digital circuit is configured to execute the high frequency downlink command. The ultra-high frequency analog circuit is configured to demodulate the ultra-high frequency electromagnetic wave signal to obtain an ultra-high frequency downlink command, and generate an ultra-high frequency reset signal in the case of receiving the ultra-high frequency electromagnetic wave signal. The ultra-high frequency digital circuit is configured to execute the ultra-high frequency downlink command. Thus, according to at least one of the high frequency reset signal and the ultra-high frequency reset signal, it can be determined which of the high frequency analog circuit and the high frequency digital circuit, and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit do not need to work. The power management module can control the power down of the circuit to make the circuit enter the off state, so that the circuit has no static power consumption and dynamic power consumption, thereby reducing the power consumption of the RFID tag chip.

[0021] According to one embodiment of the present application, the power-down control of at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal comprises: in the case of receiving the high-frequency reset signal and not receiving the ultra-high-frequency reset signal, the power-down control of the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit; or in the case of not receiving the high-frequency reset signal and receiving the ultra-high-frequency reset signal, the power-down control of the high-frequency analog circuit and the high-frequency digital circuit; or in the case of receiving the high-frequency reset signal and the ultra-high-frequency reset signal, the power-down control of at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit according to the first generation time of the high-frequency reset signal and the second generation time of the ultra-high-frequency reset signal.

[0022] According to one embodiment of the present application, the high-frequency analog circuit comprises a high-frequency reset generation module, a high-frequency power supply generation unit, a high-frequency demodulation module and a high-frequency modulation module, the high-frequency reset generation module is configured to generate a high-frequency reset signal in the case of receiving a high-frequency electromagnetic wave signal, the high-frequency power supply generation unit is configured to generate a power supply of a high-frequency digital circuit according to the high-frequency electromagnetic wave signal in the case of receiving the high-frequency electromagnetic wave signal, the high-frequency demodulation module is configured to demodulate the high-frequency electromagnetic wave signal to generate a high-frequency downlink command and send the high-frequency downlink command to the high-frequency digital circuit so that the high-frequency digital circuit executes the high-frequency downlink command and returns high-frequency uplink data, the high-frequency modulation module is configured to modulate the high-frequency uplink data to generate a high-frequency electromagnetic carrier and transmit the high-frequency electromagnetic carrier to a radio frequency antenna to transmit the high-frequency electromagnetic carrier through the radio frequency antenna, the high-frequency digital circuit comprises a high-frequency downlink decoding module, a high-frequency command parsing module, a high-frequency state control module and a high-frequency uplink encoding module, the high-frequency downlink decoding module is configured to decode the high-frequency downlink command to obtain a high-frequency decoding signal, the high-frequency command parsing module is configured to parse the high-frequency decoding signal to obtain a high-frequency command type and a high-frequency command parameter, the high-frequency state control module is configured to control the state of the RFID tag chip according to the high-frequency command type and the high-frequency command parameter and determine the type of the high-frequency uplink data, and the high-frequency uplink encoding module is configured to encode the uplink data according to the type of the high-frequency uplink data and the state of the RFID tag chip to generate the high-frequency uplink data, and the method further comprises: after receiving the high-frequency reset signal, providing the power supply of the high-frequency digital circuit to the high-frequency downlink decoding module to power on the high-frequency downlink decoding module; and after receiving a control signal sent by the high-frequency downlink decoding module, sequentially providing the power supply of the high-frequency digital circuit to the high-frequency command parsing module, the high-frequency state control module and the high-frequency uplink encoding module to sequentially power on the high-frequency command parsing module, the high-frequency state control module and the high-frequency uplink encoding module.

[0023] According to one embodiment of the present application, the method further comprises: in the case that the RFID tag chip executes the high frequency downlink command, controlling the high frequency uplink coding module, the high frequency state control module and the high frequency command analysis module to be powered off in sequence.

[0024] According to one embodiment of the present application, the ultra-high frequency analog circuit comprises an ultra-high frequency reset generation module, an ultra-high frequency power generation unit, an ultra-high frequency demodulation module and an ultra-high frequency modulation module, the ultra-high frequency reset generation module is configured to generate an ultra-high frequency reset signal in the case of receiving an ultra-high frequency electromagnetic wave signal, the ultra-high frequency power generation unit is configured to generate a power supply of the ultra-high frequency digital circuit according to the ultra-high frequency electromagnetic wave signal or the ultra-high frequency electromagnetic wave signal in the case of receiving the ultra-high frequency electromagnetic wave signal, the ultra-high frequency demodulation module is configured to demodulate the ultra-high frequency electromagnetic wave signal to generate an ultra-high frequency downlink command, and send the ultra-high frequency downlink command to the high frequency digital circuit, so that the high frequency digital circuit executes the ultra-high frequency downlink command and returns ultra-high frequency uplink data, the ultra-high frequency modulation module is configured to modulate the ultra-high frequency uplink data to generate an ultra-high frequency electromagnetic carrier wave, and transmit the ultra-high frequency electromagnetic carrier wave to the radio frequency antenna, so that the ultra-high frequency electromagnetic carrier wave is transmitted through the radio frequency antenna, the ultra-high frequency digital circuit comprises an ultra-high frequency downlink decoding module, an ultra-high frequency command analysis module, an ultra-high frequency state control module and an ultra-high frequency uplink coding module, the ultra-high frequency downlink decoding module is configured to decode the ultra-high frequency downlink command to obtain an ultra-high frequency decoding signal, the ultra-high frequency command analysis module is configured to analyze the ultra-high frequency decoding signal to obtain an ultra-high frequency command type and an ultra-high frequency command parameter, the ultra-high frequency state control module is configured to control the state of the RFID tag chip according to the ultra-high frequency command type and the ultra-high frequency command parameter, and determine the type of the ultra-high frequency uplink data, and the ultra-high frequency uplink coding module is configured to encode the uplink data according to the type of the ultra-high frequency uplink data and the state of the RFID tag chip to generate the ultra-high frequency uplink data, the method further comprises: after receiving the ultra-high frequency reset signal, providing the power supply of the ultra-high frequency digital circuit to the ultra-high frequency downlink decoding module to power on the ultra-high frequency downlink decoding module; and after receiving the control signal sent by the ultra-high frequency downlink decoding module, providing the power supply of the ultra-high frequency digital circuit to the ultra-high frequency command analysis module, the ultra-high frequency state control module and the ultra-high frequency uplink coding module in sequence to power on the ultra-high frequency command analysis module, the ultra-high frequency state control module and the ultra-high frequency uplink coding module in sequence.

[0025] According to one embodiment of the present application, the method further comprises: in the case that the RFID tag chip executes the high frequency downlink command, controlling the high frequency uplink coding module, the high frequency state control module and the high frequency command analysis module to be powered off in sequence.

[0026] Additional aspects and advantages of the present application will be given, in part, in the following description, become apparent from the following description, or be learned by practice of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 is a structural schematic diagram of an RFID tag chip according to an embodiment of the present application;

[0028] Figure 2 is a structural schematic diagram of a high-frequency analog circuit and a high-frequency digital circuit according to an embodiment of the present application;

[0029] Figure 3 is a flowchart of an RFID tag chip working in a high-frequency protocol stack according to an embodiment of the present application;

[0030] Figure 4 is a structural schematic diagram of an ultra-high-frequency analog circuit and an ultra-high-frequency digital circuit according to an embodiment of the present application;

[0031] Figure 5 is a flowchart of an RFID tag chip working in an ultra-high-frequency protocol stack according to an embodiment of the present application;

[0032] Figure 6 is a structural schematic diagram of a power management module according to an embodiment of the present application;

[0033] Figure 7 is a flowchart of a power management method of an RFID tag chip according to an embodiment of the present application. DETAILED DESCRIPTION

[0034] Embodiments of the present application are described in detail below with reference to the accompanying drawings, in which like reference numerals indicate like elements or elements having the same or similar function throughout the several views. The embodiments described below are exemplary and are intended to be illustrative of the present application, and are not to be construed as limiting the present application.

[0035] An RFID tag chip and a power management method thereof according to an embodiment of the present application are described below with reference to the accompanying drawings.

[0036] Figure 1 is a structural schematic diagram of an RFID tag chip according to an embodiment of the present application. As shown in Figure 1 , the RFID tag chip 1000 includes a radio frequency antenna 100, a high-frequency analog circuit 200, a high-frequency digital circuit 300, an ultra-high-frequency analog circuit 400, an ultra-high-frequency digital circuit 500, and a power management module 600.

[0037] The radio frequency antenna 100 is adapted to receive high frequency electromagnetic wave signals or ultra-high frequency electromagnetic wave signals; the high frequency analog circuit 200 is configured to demodulate the high frequency electromagnetic wave signals to obtain high frequency downlink commands, and generate a high frequency reset signal in the case of receiving the high frequency electromagnetic wave signals; the high frequency digital circuit 300 is configured to execute the high frequency downlink commands; the ultra-high frequency analog circuit 400 is configured to demodulate the ultra-high frequency electromagnetic wave signals, and generate an ultra-high frequency reset signal in the case of receiving the ultra-high frequency electromagnetic wave signals; the ultra-high frequency digital circuit 500 is configured to execute the ultra-high frequency downlink commands; and the power management module 600 is configured to perform power down control on at least two of the high frequency analog circuit 200 and the high frequency digital circuit 300, and the ultra-high frequency analog circuit 400 and the ultra-high frequency digital circuit 500, according to at least one of the high frequency reset signal and the ultra-high frequency reset signal.

[0038] Specifically, the high frequency analog circuit 200 and the high frequency digital circuit 300 can identify and execute high frequency electromagnetic wave signals, and the ultra-high frequency analog circuit 400 and the ultra-high frequency digital circuit 500 can identify and execute ultra-high frequency electromagnetic wave signals, wherein the frequency of the high frequency electromagnetic wave signal is usually around 13.56MHz, and the frequency of the ultra-high frequency electromagnetic wave signal is usually between 860MHz and 960MHz. When the radio frequency antenna 100 receives a high frequency electromagnetic wave signal, the high frequency analog circuit 200 demodulates the high frequency electromagnetic wave signal to generate a high frequency downlink command, at the same time, the high frequency analog circuit 200 generates a high frequency reset signal, and the high frequency digital circuit 300 executes the high frequency downlink command; when the radio frequency antenna 100 receives an ultra-high frequency electromagnetic wave signal, the ultra-high frequency analog circuit 400 demodulates the ultra-high frequency electromagnetic wave signal to generate an ultra-high frequency downlink command, at the same time, the ultra-high frequency analog circuit 400 generates an ultra-high frequency reset signal, and the ultra-high frequency digital circuit 500 executes the high frequency downlink command. The power management module 600 is connected with the high frequency analog circuit 200, the high frequency digital circuit 300, the ultra-high frequency analog circuit 400 and the ultra-high frequency digital circuit 500 respectively, if the high frequency analog circuit 200 generates a high frequency reset signal, the high frequency analog circuit 200 sends the high frequency reset signal to the power management module 600, if the ultra-high frequency analog circuit 400 generates an ultra-high frequency reset signal, the ultra-high frequency analog circuit 400 sends the ultra-high frequency reset signal to the power management module 600. The power management module 600 can determine which circuits in the high frequency analog circuit 200, the high frequency digital circuit 300, the ultra-high frequency analog circuit 400 and the ultra-high frequency digital circuit 500 need to work and which circuits do not need to work according to at least one of the high frequency reset signal and the ultra-high frequency reset signal, and then controls the circuits that do not need to work to power off, for example, if the power management module 600 only receives the high frequency reset signal, indicating that the radio frequency antenna 100 receives the high frequency electromagnetic wave signal, then the high frequency analog circuit 200 and the high frequency digital circuit 300 need to work, and the ultra-high frequency analog circuit 400 and the ultra-high frequency digital circuit 500 do not need to work, therefore, the power management module 600 controls the ultra-high frequency analog circuit 400 and the ultra-high frequency digital circuit 500 to power off.

[0039] It should be noted that the high frequency analog circuit 200 and the high frequency digital circuit 300 need to be powered on or powered off at the same time, and the ultra-high frequency analog circuit 400 and the ultra-high frequency digital circuit 500 need to be powered on or powered off at the same time.

[0040] In the above embodiment, because the high-frequency reset signal and the ultra-high-frequency reset signal are generated according to the high-frequency electromagnetic wave signal and the ultra-high-frequency electromagnetic wave signal, the power management module can determine, according to the high-frequency reset signal and / or the ultra-high-frequency reset signal, which circuits in the high-frequency analog circuit, the high-frequency digital circuit, the ultra-high-frequency analog circuit, and the ultra-high-frequency digital circuit do not need to work, and then control the circuits that do not need to work to power down, so that the circuits enter a closed state, and thus the circuits do not have static power consumption and dynamic power consumption, thereby reducing the power consumption of the RFID tag chip.

[0041] In some embodiments, the power management module 600 is further configured to, in the case of receiving the high-frequency reset signal and not receiving the ultra-high-frequency reset signal, perform power-down control on the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500; or in the case of not receiving the high-frequency reset signal and receiving the ultra-high-frequency reset signal, perform power-down control on the high-frequency analog circuit 200 and the high-frequency digital circuit 300; or in the case of receiving the high-frequency reset signal and the ultra-high-frequency reset signal, perform power-down control on at least two of the high-frequency analog circuit 200 and the high-frequency digital circuit 300 and the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 according to the first generation time of the high-frequency reset signal and the second generation time of the ultra-high-frequency reset signal.

[0042] Specifically, if the power management module 600 receives the high frequency reset signal and does not receive the super high frequency reset signal, it indicates that the radio frequency antenna 100 receives the high frequency electromagnetic wave signal and does not receive the super high frequency electromagnetic wave signal, so the high frequency analog circuit 200 and the high frequency digital circuit 300 need to work according to the high frequency electromagnetic wave signal, and the super high frequency analog circuit 400 and the super high frequency digital circuit 500 do not need to work, therefore, the power management module 600 controls the power down of the super high frequency analog circuit 400 and the super high frequency digital circuit 500; if the power management module 600 receives the super high frequency reset signal and does not receive the high frequency reset signal, it indicates that the radio frequency antenna 100 receives the super high frequency electromagnetic wave signal and does not receive the high frequency electromagnetic wave signal, so the super high frequency analog circuit 400 and the super high frequency digital circuit 500 need to work according to the super high frequency electromagnetic wave signal, and the high frequency analog circuit 200 and the high frequency digital circuit 300 do not need to work, therefore, the power management module 600 controls the power down of the high frequency analog circuit 200 and the high frequency digital circuit 300; if the power management module 600 receives the super high frequency reset signal and the high frequency reset signal, it indicates that the radio frequency antenna 100 receives the high frequency electromagnetic wave signal and the super high frequency electromagnetic wave signal, then according to the first generation time of the high frequency reset signal and the second generation time of the super high frequency reset signal, that is, the order in which the high frequency reset signal and the super high frequency reset signal become 1 first, it can be judged which part of the circuit executes the command first and which part of the circuit executes the command later, the circuit which executes the command later can be powered down first, so that the circuit which executes the command later is turned off, thereby reducing the power consumption of the RFID tag chip 1000.

[0043] In some embodiments, the power management module 600 is further configured to, in the case that the first generation time is earlier than the second generation time, control the power down of the super high frequency analog circuit 400 and the super high frequency digital circuit 500; or in the case that the second generation time is earlier than the first generation time, control the power down of the high frequency analog circuit 200 and the high frequency digital circuit 300; or in the case that the first generation time is the same as the second generation time, according to the first parsing time of the high frequency digital circuit 300 to the high frequency downlink command and the second parsing time of the super high frequency digital circuit 500 to the super high frequency downlink command, control the power down of at least two of the high frequency analog circuit 200 and the high frequency digital circuit 300 and the super high frequency analog circuit 400 and the super high frequency digital circuit 500.

[0044] Specifically, if the first generation time is earlier than the second generation time, indicating that the generation time of the high-frequency reset signal is earlier than the generation time of the ultra-high-frequency reset signal, the high-frequency analog circuit 200 and the high-frequency digital circuit 300 will execute the high-frequency down command first, and the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 will execute the ultra-high-frequency down command later, therefore, the power management module 600 controls the power down of the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500; if the second generation time is earlier than the first generation time, indicating that the generation time of the ultra-high-frequency reset signal is earlier than the generation time of the high-frequency reset signal, the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 will execute the ultra-high-frequency down command first, and the high-frequency analog circuit 200 and the high-frequency digital circuit 300 will execute the high-frequency down command later, therefore, the power management module 600 controls the power down of the high-frequency analog circuit 200 and the high-frequency digital circuit 300; if the ultra-high-frequency reset signal and the high-frequency reset signal are generated at the same time, according to the analysis time of the high-frequency down command and the ultra-high-frequency down command, it is determined which part of the circuit executes the command first and which part of the circuit executes the command later, and the circuit executing the command later is powered down first to make the circuit executing the command later closed, thereby reducing the power consumption of the RFID tag chip 1000.

[0045] In some embodiments, the power management module 600 is further configured to, in the case that the first analysis time is earlier than the second analysis time, control the power down of the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500; or in the case that the second analysis time is earlier than the first analysis time, control the power down of the high-frequency analog circuit 200 and the high-frequency digital circuit 300; or in the case that the first analysis time is the same as the second analysis time, control the power down of the high-frequency analog circuit 200 and the ultra-high-frequency digital circuit 500 and the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 respectively.

[0046] Specifically, if the first parsing time is earlier than the second parsing time, it indicates that the high-frequency downlink command is parsed first. In this case, the high-frequency analog circuit 200 and the high-frequency digital circuit 300 will execute the high-frequency downlink command first, and the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 will execute the ultra-high-frequency downlink command later. Therefore, the power management module 600 controls the power-down of the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500. If the second parsing time is earlier than the first parsing time, it indicates that the ultra-high-frequency downlink command is parsed first. In this case, the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 will execute the ultra-high-frequency downlink command first, and the high-frequency analog circuit 200 and the high-frequency digital circuit 300 will execute the high-frequency downlink command later. Therefore, the power management module 600 controls the power-down of the high-frequency analog circuit 200 and the high-frequency digital circuit 300. If the ultra-high-frequency downlink command and the high-frequency downlink command are parsed simultaneously, in order to avoid RFID malfunction, the power management module 600 powers down the high-frequency analog circuit 200, the high-frequency digital circuit 300, the ultra-high-frequency analog circuit 400, and the ultra-high-frequency digital circuit 500.

[0047] In some embodiments, such as Figure 2 As shown, the high-frequency analog circuit 200 includes: a high-frequency reset generation module 210, a high-frequency power generation unit 220, a high-frequency demodulation module 230, and a high-frequency modulation module 240. The high-frequency reset generation module 210 is configured to generate a high-frequency reset signal upon receiving a high-frequency electromagnetic wave signal and to send the high-frequency reset signal to the power management module 600. The high-frequency power generation unit 220 is configured to generate a power supply for the high-frequency digital circuit 300 based on the high-frequency electromagnetic wave signal upon receiving the signal. The high-frequency demodulation module 230 is configured to demodulate the high-frequency electromagnetic wave signal to generate a high-frequency downlink command and send the high-frequency downlink command to the high-frequency digital circuit 300 so that the high-frequency digital circuit 300 executes the high-frequency downlink command and returns high-frequency uplink data. The high-frequency modulation module 240 is configured to modulate the high-frequency uplink data to generate a high-frequency electromagnetic carrier and transmit the high-frequency electromagnetic carrier to the radio frequency antenna 100 for transmission via the radio frequency antenna 100.

[0048] It can be understood that the high frequency reset generation module 210 generates a high frequency reset signal in the case of receiving a high frequency electromagnetic wave signal, and the power management module 600 will power on and reset the RFID chip after receiving the high frequency reset signal. The high frequency power generation unit 220 generates a power supply for the high frequency digital circuit 300 according to the high frequency electromagnetic wave signal, and the power management module 600 controls whether the high frequency power generation unit 220 generates the power supply for the high frequency digital circuit 300 and whether the power supply for the high frequency digital circuit 300 is provided to the high frequency digital circuit 300. The high frequency demodulation module 230 demodulates the high frequency electromagnetic wave signal to restore the original baseband signal from the high frequency electromagnetic wave signal, obtains a high frequency downlink command, and the high frequency digital circuit 300 executes the high frequency downlink command. After the high frequency digital circuit 300 executes the high frequency downlink command, it needs to feed back data to the reader, so the high frequency digital circuit 300 returns high frequency uplink data. The high frequency modulation module 240 receives the high frequency uplink data and modulates the high frequency uplink data to generate a high frequency electromagnetic carrier that the radio frequency antenna 100 can transmit, and transmits it to the reader through the radio frequency antenna 100.

[0049] In an alternative embodiment, as shown in Figure 2 The high frequency analog circuit 200 further includes a high frequency clock generation module 250 for generating a clock signal of the high frequency digital circuit 300, so that the high frequency digital circuit 300 works according to the clock signal. The working clock of the RFID tag chip 1000 can be generated by clock gating technology in the related art, and the power management logic in the related art is combined on the basis of the clock gating technology in the related art, thereby further reducing the power consumption of the RFID tag chip 1000. The high frequency power generation unit 220 includes a high frequency rectification module 221, a high frequency limiting module 222, and a high frequency voltage stabilizing module 223. The high frequency rectification module 221 is connected with the radio frequency antenna 100, the high frequency limiting module 222 is connected with the high frequency rectification module 221 and the power management module 600 respectively, and the high frequency voltage stabilizing module 223 is connected with the high frequency limiting module 222 and the power management module 600 respectively. The high frequency rectification module 221 rectifies the high frequency electromagnetic wave signal to generate a first direct current signal, the high frequency limiting module 222 generates a high voltage power supply HF_VDDH for the high frequency digital circuit 300 according to the first preset voltage amplitude and the first direct current signal, and provides the high voltage power supply HF_VDDH for the high frequency digital circuit 300 to the power management module 600, and the high frequency voltage stabilizing module 223 generates a low voltage power supply HF_VDD for the high frequency digital circuit 300 according to the high voltage power supply HF_VDDH for the high frequency digital circuit 300, and provides the low voltage power supply HF_VDD for the high frequency digital circuit 300 to the power management module 600.

[0050] In some embodiments, as Figure 2As shown, the high-frequency digital circuit 300 comprises a high-frequency downlink decoding module 310, a high-frequency command parsing module 320, a high-frequency state control module 330, and a high-frequency uplink encoding module 340. The high-frequency downlink decoding module 310 is configured to decode the high-frequency downlink command to obtain a high-frequency decoding signal. The high-frequency command parsing module 320 is configured to parse the high-frequency decoding signal to obtain a high-frequency command type and a high-frequency command parameter. The high-frequency state control module 330 is configured to control the state of the RFID tag chip 1000 according to the high-frequency command type and the high-frequency command parameter, and determine the type of high-frequency uplink data. The high-frequency uplink encoding module 340 is configured to encode the uplink data according to the type of high-frequency uplink data and the state of the RFID tag chip to generate the high-frequency uplink data.

[0051] That is, after the high-frequency downlink decoding module 310 receives the high-frequency downlink command sent by the high-frequency demodulation module 230, the high-frequency downlink decoding module 310 decodes the high-frequency downlink command to obtain a high-frequency decoding signal, which comprises a reqa command or a wupa command. The reqa command is used to detect whether the smart card is in a wireless radio frequency field, and the wupa command is used to wake up the smart card that has entered a stop state to return to a ready state. The high-frequency command parsing module 320 usually parses the high-frequency decoding signal according to a preset command protocol and format to obtain a high-frequency command type and a high-frequency command parameter. The high-frequency state control module 330 controls the state of the RFID tag chip 1000 according to the high-frequency command type and the high-frequency command parameter to execute the high-frequency downlink command. After the execution is completed, the high-frequency state control module 330 determines the type of high-frequency uplink data. After the high-frequency uplink encoding module 340 receives the type of high-frequency uplink data sent by the high-frequency state control module 330, the high-frequency uplink encoding module 340 encodes the uplink data according to the type of high-frequency uplink data and the state of the RFID tag chip to generate the high-frequency uplink data, and then sends the high-frequency uplink data to the high-frequency modulation module 240.

[0052] In some embodiments, as Figure 2 and Figure 3As shown, the power management module 600 is connected with the high-frequency downlink decoding module 310, the high-frequency command analysis module 320, the high-frequency state control module 330 and the high-frequency uplink encoding module 340 respectively. The power management module 600 is further configured to, after receiving the high-frequency reset signal, provide the power supply of the high-frequency digital circuit 300 to the high-frequency downlink decoding module 310 to power on the high-frequency downlink decoding module 310, and after receiving the control signal sent by the high-frequency downlink decoding module 310, provide the power supply of the high-frequency digital circuit 300 to the high-frequency command analysis module 320, the high-frequency state control module 330 and the high-frequency uplink encoding module 340 in sequence to power on the high-frequency command analysis module 320, the high-frequency state control module 330 and the high-frequency uplink encoding module 340 in sequence.

[0053] Specifically, when the radio frequency antenna 100 receives the high-frequency electromagnetic wave signal, the RFID tag chip 1000 works in the high-frequency protocol stack. After the power management module 600 receives the high-frequency reset signal, it is powered on and reset. After the RFID tag chip 1000 is powered on and reset and initialization is completed, the power supply of the high-frequency digital circuit 300 is provided to the high-frequency downlink decoding module 310 to power on the high-frequency downlink decoding module 310. At this time, the RFID tag chip 1000 is in the IDLE (idle) state. After the high-frequency downlink decoding module 310 decodes the high-frequency decoding signal (reqa command or wupa command) for the first time, the high-frequency downlink decoding module 310 sends a control signal to the power management module 600. After receiving the control signal, the power management module 600 controls the high-frequency command analysis module 320, the high-frequency state control module 330 and the high-frequency uplink encoding module 340 to be powered on in sequence, and then executes the high-frequency downlink command.

[0054] Further, in some embodiments, as Figure 3 As shown, the power management module 600 is further configured to, in the case that the RFID tag chip 1000 executes the high-frequency downlink command, control the high-frequency uplink encoding module 340, the high-frequency state control module 330 and the high-frequency command analysis module 320 to be powered off in sequence.

[0055] Specifically, after the RFID tag chip 1000 completes execution of the high-frequency downlink command, the RFID tag chip 1000 returns to the idle state (IDLE state). If the RFID tag chip 1000 does not return to the idle state (IDLE state), the high-frequency downlink command is continuously executed. If the RFID tag chip 1000 returns to the idle state (IDLE state), the power management module 600 controls the high-frequency uplink encoding module 340, the high-frequency state control module 330, and the high-frequency command analysis module 320 to be powered off in sequence, waits for the high-frequency decoding signal (reqa command or wupa command), and after the high-frequency decoding signal (reqa command or wupa command) arrives, controls the high-frequency command analysis module 320, the high-frequency state control module 330, and the high-frequency uplink encoding module 340 to be powered on in sequence again if the high-frequency downlink decoding module 310 decodes the high-frequency decoding signal (reqa command or wupa command).

[0056] In the above embodiment, after the chip is powered on, if the high-frequency downlink decoding module decodes the high-frequency command, the high-frequency command analysis module, the high-frequency state control module, and the high-frequency uplink encoding module are controlled to be powered on in sequence. After the high-frequency command is executed, the high-frequency uplink encoding module, the high-frequency state control module, and the high-frequency command analysis module are controlled to be powered off in sequence, thereby achieving low standby power consumption.

[0057] In some embodiments, as shown in Figure 4 The ultrahigh-frequency analog circuit 400 includes an ultrahigh-frequency reset generation module 410, an ultrahigh-frequency power generation unit 420, an ultrahigh-frequency demodulation module 430, and an ultrahigh-frequency modulation module 440. The ultrahigh-frequency reset generation module 410 is configured to generate an ultrahigh-frequency reset signal when an ultrahigh-frequency electromagnetic wave signal is received, and send the ultrahigh-frequency reset signal to the power management module 600. The ultrahigh-frequency power generation unit 420 is configured to generate a power supply for the ultrahigh-frequency digital circuit 500 according to the ultrahigh-frequency electromagnetic wave signal when the ultrahigh-frequency electromagnetic wave signal is received. The ultrahigh-frequency demodulation module 430 is configured to demodulate the ultrahigh-frequency electromagnetic wave signal to generate an ultrahigh-frequency downlink command, and send the ultrahigh-frequency downlink command to the high-frequency digital circuit 300, so that the high-frequency digital circuit 300 executes the ultrahigh-frequency downlink command and returns ultrahigh-frequency uplink data. The ultrahigh-frequency modulation module 440 is configured to modulate the ultrahigh-frequency uplink data to generate an ultrahigh-frequency electromagnetic carrier, and transmit the ultrahigh-frequency electromagnetic carrier to the radio frequency antenna 100 to transmit the ultrahigh-frequency electromagnetic carrier through the radio frequency antenna 100.

[0058] It can be understood that the working principle of the super high frequency analog circuit 400 is similar to that of the high frequency analog circuit 200. The super high frequency reset generation module 410 generates a super high frequency reset signal in the case of receiving a super high frequency electromagnetic wave signal, and the power management module 600 powers up and resets the RFID chip after receiving the super high frequency reset signal. The super high frequency power generation unit 420 generates a power supply for the super high frequency digital circuit 500 according to the super high frequency electromagnetic wave signal, and the power management module 600 controls whether the super high frequency power generation unit 420 generates the power supply for the super high frequency digital circuit 500 and whether the power supply for the super high frequency digital circuit 500 is provided to the super high frequency digital circuit 500. The super high frequency demodulation module 430 demodulates the super high frequency electromagnetic wave signal to restore the original baseband signal from the super high frequency electromagnetic wave signal, obtains a super high frequency downlink command, and the super high frequency digital circuit 500 executes the super high frequency downlink command. After the super high frequency digital circuit 500 executes the super high frequency downlink command, it needs to feed back data to the reader, so the super high frequency digital circuit 500 returns super high frequency uplink data. The super high frequency modulation module 440 receives the super high frequency uplink data, modulates the super high frequency uplink data to generate a super high frequency electromagnetic carrier wave that can be transmitted by the radio frequency antenna 100, and transmits it to the reader through the radio frequency antenna 100.

[0059] In an alternative embodiment, as Figure 4As shown, the UHF analog circuit 400 further comprises a UHF clock generation module 450, which is configured to generate a clock signal for the UHF digital circuit 500, so that the UHF digital circuit 500 works according to the clock signal. The working clock of the RFID tag chip 1000 can be generated by using the clock gating technology in the related art, and the power management logic in the embodiment is combined on the basis of the clock gating technology in the related art, so as to further reduce the power consumption of the RFID tag chip 1000. The UHF power generation unit 420 comprises a UHF rectification module 421, a UHF limiting module 422 and a UHF voltage stabilizing module 423. The UHF rectification module 421 is connected with the radio frequency antenna 100. The UHF limiting module 422 is connected with the UHF rectification module 421 and the power management module 600 respectively. The UHF voltage stabilizing module 423 is connected with the UHF limiting module 422 and the power management module 600 respectively. The UHF rectification module 421 rectifies the UHF electromagnetic wave signal to generate a second direct current signal. The UHF limiting module 422 generates a high-voltage power supply UHF_VDDH for the UHF digital circuit 500 according to the second preset voltage amplitude and the second direct current signal, and provides the high-voltage power supply UHF_VDDH for the UHF digital circuit 500 to the power management module 600. The UHF voltage stabilizing module 423 generates a low-voltage power supply UHF_VDD for the UHF digital circuit 500 according to the high-voltage power supply UHF_VDDH for the UHF digital circuit 500, and provides the low-voltage power supply UHF_VDD for the UHF digital circuit 500 to the power management module 600.

[0060] In some embodiments, as Figure 4 As shown, the UHF digital circuit 500 comprises a UHF downlink decoding module 510, a UHF command analysis module 520, a UHF state control module 530 and a UHF uplink encoding module 540. The UHF downlink decoding module 510 is configured to decode the UHF downlink command to obtain a UHF decoding signal. The UHF command analysis module 520 is configured to analyze the UHF decoding signal to obtain a UHF command type and a UHF command parameter. The UHF state control module 530 is configured to control the state of the RFID tag chip 1000 according to the UHF command type and the UHF command parameter, and determine the type of the UHF uplink data. The UHF uplink encoding module 540 is configured to encode the uplink data according to the type of the UHF uplink data and the state of the RFID tag chip to generate the UHF uplink data.

[0061] In other words, after receiving the UHF downlink command from the UHF demodulation module 430, the UHF downlink decoding module 510 decodes the UHF downlink command to obtain the UHF decoded signal, which includes a query command. The UHF command parsing module 520 typically parses the UHF decoded signal according to a preset command protocol and format to obtain the UHF command type and parameters. The UHF status control module 530 controls the status of the RFID tag chip 1000 based on the UHF command type and parameters to execute the UHF downlink command. After execution, the UHF status control module 530 determines the type of UHF uplink data. After receiving the type of UHF uplink data from the UHF status control module 530, the UHF uplink encoding module 540 encodes the uplink data according to the type and status of the RFID tag chip, generating UHF uplink data, and then sends the UHF uplink data to the UHF modulation module 440.

[0062] In some embodiments, such as Figure 4 and Figure 5 As shown, the power management module 600 is connected to the UHF downlink decoding module 510, the UHF command parsing module 520, the UHF status control module 530, and the UHF uplink encoding module 540, respectively. The power management module 600 is also configured to provide the power supply of the UHF digital circuit 500 to the UHF downlink decoding module 510 after receiving the UHF reset signal, so as to power on the UHF downlink decoding module 510. After receiving the control signal sent by the UHF downlink decoding module 510, the power supply of the UHF digital circuit 500 is sequentially provided to the UHF command parsing module 520, the UHF status control module 530, and the UHF uplink encoding module 540, so as to power on the UHF command parsing module 520, the UHF status control module 530, and the UHF uplink encoding module 540 in sequence.

[0063] Specifically, when the radio frequency antenna 100 receives the ultra-high frequency electromagnetic wave signal, the RFID tag chip 1000 works in the ultra-high frequency protocol stack. After the power management module 600 receives the ultra-high frequency reset signal, it performs power-on and reset. After the RFID tag chip 1000 is powered on and reset and initialization is completed, the power supply of the ultra-high frequency digital circuit 500 is provided to the ultra-high frequency downlink decoding module 510 to power on the ultra-high frequency downlink decoding module 510. At this time, the RFID tag chip 1000 is in the READY (ready) state. After the ultra-high frequency downlink decoding module 510 decodes the ultra-high frequency decoding signal (query command) for the first time, the ultra-high frequency downlink decoding module 510 sends a control signal to the power management module 600. After receiving the control signal, the power management module 600 controls the ultra-high frequency command analysis module 520, the ultra-high frequency state control module 530, and the ultra-high frequency uplink encoding module 540 to be powered on in turn, and then executes the ultra-high frequency downlink command.

[0064] Further, in some embodiments, as shown in Figure 5 The power management module 600 is further configured to control the ultra-high frequency uplink encoding module 540, the ultra-high frequency state control module 530, and the ultra-high frequency command analysis module 520 to be powered off in turn in the case that the RFID tag chip 1000 executes the ultra-high frequency downlink command.

[0065] Specifically, after the RFID tag chip 1000 executes the ultra-high frequency downlink command, the RFID tag chip 1000 will return to the ready state (READY state). If the RFID tag chip 1000 does not return to the ready state (READY state), the ultra-high frequency downlink command is continued to be executed. If the RFID tag chip 1000 returns to the ready state (READY state), the power management module 600 controls the ultra-high frequency uplink encoding module 540, the ultra-high frequency state control module 530, and the ultra-high frequency command analysis module 520 to be powered off in turn, waits for the ultra-high frequency decoding signal (query command), and after the ultra-high frequency decoding signal (query command) arrives, if the ultra-high frequency downlink decoding module 510 decodes the ultra-high frequency decoding signal (query command), the ultra-high frequency command analysis module 520, the ultra-high frequency state control module 530, and the ultra-high frequency uplink encoding module 540 are controlled to be powered on in turn again.

[0066] In the above embodiment, after the chip is powered on, if the ultra-high frequency downlink decoding module decodes the ultra-high frequency command, the ultra-high frequency command analysis module, the ultra-high frequency state control module, and the ultra-high frequency uplink encoding module are controlled to be powered on in turn. After the execution of the ultra-high frequency command is completed, the ultra-high frequency uplink encoding module, the ultra-high frequency state control module, and the ultra-high frequency command analysis module are controlled to be powered off in turn, thereby realizing low standby power consumption.

[0067] In some embodiments, as shown inFigure 6 As shown in the figure, the power management module 600 comprises a high-frequency power switch 610 and an ultra-high-frequency power switch 620, wherein the high-frequency power switch 610 is connected with the high-frequency analog circuit 200 and the high-frequency digital circuit 300 respectively, and the high-frequency power switch 610 is configured to control the power-on and power-off of the high-frequency analog circuit 200 and the high-frequency digital circuit 300; the ultra-high-frequency power switch 620 is connected with the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500 respectively, and the ultra-high-frequency power switch 620 is configured to control the power-on and power-off of the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500.

[0068] It can be understood that the high-frequency power switch 610 is used to control the power-on and power-off of the high-frequency analog circuit 200 and the high-frequency digital circuit 300; and the ultra-high-frequency power switch 620 is used to control the power-on and power-off of the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500. When the high-frequency reset signal is received and the ultra-high-frequency reset signal is not received, the power management module 600 controls the ultra-high-frequency power switch 620 to power off the ultra-high-frequency analog circuit 400 and the ultra-high-frequency digital circuit 500; when the ultra-high-frequency reset signal is received and the high-frequency reset signal is not received, the power management module 600 controls the high-frequency power switch 610 to power off the high-frequency analog circuit 200 and the high-frequency digital circuit 300.

[0069] In summary, according to the RFID tag chip of the embodiment of the present application, according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal, it can be determined which circuits in the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit do not need to work, and the power management module can control the circuits that do not need to work to be powered off, so that the circuits enter the closed state, thus the circuits do not have static power consumption and dynamic power consumption, thereby reducing the power consumption of the RFID tag chip; and it does not affect the circuits that need to work, realizes seamless switching and compatibility of the high-frequency and ultra-high-frequency protocols, and improves the flexibility and application range of the RFID tag chip. In addition, after the high-frequency uplink decoding module / ultra-high-frequency uplink decoding module decodes the valid command, the corresponding modules are controlled to be powered on in turn, and after the command execution is completed, the corresponding modules are controlled to be powered off in turn, thereby further reducing the standby power consumption of the chip.

[0070] Corresponding to the above embodiment, the embodiment of the present application also provides a power management method of an RFID tag chip 1000. As shown in the figure, Figure 1As shown, the RFID tag chip 1000 includes a radio frequency antenna 100, a high frequency analog circuit 200 and a high frequency digital circuit 300, an ultra-high frequency analog circuit 400 and an ultra-high frequency digital circuit 500. The radio frequency antenna 100 is adapted to receive high frequency electromagnetic wave signals or ultra-high frequency electromagnetic wave signals. The high frequency analog circuit 200 is configured to demodulate the high frequency electromagnetic wave signals to obtain high frequency downlink commands, and generate a high frequency reset signal in the case of receiving the high frequency electromagnetic wave signals. The high frequency digital circuit 300 is configured to execute the high frequency downlink commands. The ultra-high frequency analog circuit 400 is configured to demodulate the ultra-high frequency electromagnetic wave signals, and generate an ultra-high frequency reset signal in the case of receiving the ultra-high frequency electromagnetic wave signals. The ultra-high frequency digital circuit 500 is configured to execute the ultra-high frequency downlink commands. Figure 7 As shown, the power management method of the RFID tag chip includes:

[0071] S101, according to at least one of the high frequency reset signal and the ultra-high frequency reset signal, power down control at least two of the high frequency analog circuit and the high frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit.

[0072] In some embodiments, according to at least one of the high frequency reset signal and the ultra-high frequency reset signal, power down control at least two of the high frequency analog circuit and the high frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit includes: in the case of receiving the high frequency reset signal and not receiving the ultra-high frequency reset signal, power down control the ultra-high frequency analog circuit and the ultra-high frequency digital circuit; or in the case of not receiving the high frequency reset signal and receiving the ultra-high frequency reset signal, power down control the high frequency analog circuit and the high frequency digital circuit; or in the case of receiving the high frequency reset signal and the ultra-high frequency reset signal, according to the first generation time of the high frequency reset signal and the second generation time of the ultra-high frequency reset signal, power down control at least two of the high frequency analog circuit and the high frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit.

[0073] In some embodiments, according to the first generation time of the high frequency reset signal and the second generation time of the ultra-high frequency reset signal, power down control at least two of the high frequency analog circuit and the high frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit includes: in the case of the first generation time being earlier than the second generation time, power down control the ultra-high frequency analog circuit and the ultra-high frequency digital circuit; or in the case of the second generation time being earlier than the first generation time, power down control the high frequency analog circuit and the high frequency digital circuit; or in the case of the first generation time being the same as the second generation time, according to the first analysis time of the high frequency digital circuit to the high frequency downlink command and the second analysis time of the ultra-high frequency digital circuit to the ultra-high frequency downlink command, power down control at least two of the high frequency analog circuit and the high frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit.

[0074] In some embodiments, according to a first resolving time of the high-frequency digital circuit to the high-frequency downlink command and a second resolving time of the ultra-high-frequency digital circuit to the ultra-high-frequency downlink command, the power-off control of at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit includes: in the case that the first resolving time is earlier than the second resolving time, the power-off control of the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit; or in the case that the second resolving time is earlier than the first resolving time, the power-off control of the high-frequency analog circuit and the high-frequency digital circuit; or in the case that the first resolving time is the same as the second resolving time, the power-off control of the high-frequency analog circuit and the ultra-high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit respectively.

[0075] In some embodiments, as Figure 2As shown, the high-frequency analog circuit 200 includes a high-frequency reset generation module 210, a high-frequency power generation unit 220, a high-frequency demodulation module 230, and a high-frequency modulation module 240. The high-frequency reset generation module 210 is configured to generate a high-frequency reset signal when a high-frequency electromagnetic wave signal is received, and send the high-frequency reset signal to the power management module 600. The high-frequency power generation unit 220 is configured to generate a power supply for the high-frequency digital circuit 300 according to the high-frequency electromagnetic wave signal when the high-frequency electromagnetic wave signal is received. The high-frequency demodulation module 230 is configured to demodulate the high-frequency electromagnetic wave signal to generate a high-frequency downlink command, and send the high-frequency downlink command to the high-frequency digital circuit 300, so that the high-frequency digital circuit 300 executes the high-frequency downlink command and returns high-frequency uplink data. The high-frequency modulation module 240 is configured to modulate the high-frequency uplink data to generate a high-frequency electromagnetic carrier, and transmit the high-frequency electromagnetic carrier to the radio frequency antenna 100, so that the high-frequency electromagnetic carrier is transmitted by the radio frequency antenna 100. The high-frequency digital circuit 300 includes a high-frequency downlink decoding module 310, a high-frequency command parsing module 320, a high-frequency state control module 330, and a high-frequency uplink encoding module 340. The high-frequency downlink decoding module 310 is configured to decode the high-frequency downlink command to obtain a high-frequency decoding signal. The high-frequency command parsing module 320 is configured to parse the high-frequency decoding signal to obtain a high-frequency command type and a high-frequency command parameter. The high-frequency state control module 330 is configured to control the state of the RFID tag chip 1000 according to the high-frequency command type and the high-frequency command parameter, and determine the type of the high-frequency uplink data. The high-frequency uplink encoding module 340 is configured to encode the uplink data according to the type of the high-frequency uplink data and the state of the RFID tag chip to generate the high-frequency uplink data. The method further includes: after receiving the high-frequency reset signal, providing the power supply of the high-frequency digital circuit to the high-frequency downlink decoding module to power on the high-frequency downlink decoding module; and after receiving the control signal sent by the high-frequency downlink decoding module, providing the power supply of the high-frequency digital circuit to the high-frequency command parsing module, the high-frequency state control module, and the high-frequency uplink encoding module in sequence to power on the high-frequency command parsing module, the high-frequency state control module, and the high-frequency uplink encoding module in sequence.

[0076] In some embodiments, the method further includes: powering off the high-frequency uplink encoding module, the high-frequency state control module, and the high-frequency command parsing module in sequence when the RFID tag chip completes execution of the high-frequency downlink command.

[0077] In some embodiments, as Figure 4As shown, the ultra-high frequency analog circuit 400 includes: an ultra-high frequency reset generation module 410, an ultra-high frequency power generation unit 420, an ultra-high frequency demodulation module 430, and an ultra-high frequency modulation module 440, the ultra-high frequency reset generation module 410 is configured to generate an ultra-high frequency reset signal in the case of receiving an ultra-high frequency electromagnetic wave signal, and send the ultra-high frequency reset signal to the power management module 600, the ultra-high frequency power generation unit 420 is configured to generate a power supply for the ultra-high frequency digital circuit 500 according to the ultra-high frequency electromagnetic wave signal in the case of receiving the ultra-high frequency electromagnetic wave signal, the ultra-high frequency demodulation module 430 is configured to demodulate the ultra-high frequency electromagnetic wave signal to generate an ultra-high frequency downlink command, and send the ultra-high frequency downlink command to the high-frequency digital circuit 300, so that the high-frequency digital circuit 300 executes the ultra-high frequency downlink command and returns the ultra-high frequency uplink data, the ultra-high frequency modulation module 440 is configured to modulate the ultra-high frequency uplink data to generate an ultra-high frequency electromagnetic carrier, and transmit the ultra-high frequency electromagnetic carrier to the radio frequency antenna 100, so that the ultra-high frequency electromagnetic carrier is transmitted through the radio frequency antenna 100, the ultra-high frequency digital circuit 500 includes: an ultra-high frequency downlink decoding module 510, an ultra-high frequency command analysis module 520, an ultra-high frequency state control module 530, and an ultra-high frequency uplink encoding module 540, the ultra-high frequency downlink decoding module 510 is configured to decode the ultra-high frequency downlink command to obtain an ultra-high frequency decoding signal, the ultra-high frequency command analysis module 520 is configured to analyze the ultra-high frequency decoding signal to obtain an ultra-high frequency command type and an ultra-high frequency command parameter, the ultra-high frequency state control module 530 is configured to control the state of the RFID tag chip 1000 according to the high-frequency command type and the high-frequency command parameter, and determine the type of the ultra-high frequency uplink data, and the ultra-high frequency uplink encoding module 540 is configured to encode the uplink data according to the type of the ultra-high frequency uplink data and the state of the RFID tag chip to generate the ultra-high frequency uplink data, the method further includes: after receiving the ultra-high frequency reset signal, providing the power supply of the ultra-high frequency digital circuit to the ultra-high frequency downlink decoding module to power on the ultra-high frequency downlink decoding module; after receiving the control signal sent by the ultra-high frequency downlink decoding module, providing the power supply of the ultra-high frequency digital circuit to the ultra-high frequency command analysis module, the ultra-high frequency state control module and the ultra-high frequency uplink encoding module in turn, so that the ultra-high frequency command analysis module, the ultra-high frequency state control module and the ultra-high frequency uplink encoding module are powered on in turn.

[0078] In some embodiments, the method further includes: in the case that the RFID tag chip executes the ultra-high frequency downlink command, controlling the ultra-high frequency uplink encoding module, the ultra-high frequency state control module and the ultra-high frequency command analysis module to be powered off in turn.

[0079] It should be noted that the specific implementation of the power management method of the RFID tag chip of the embodiment of the present application corresponds to the specific implementation of the RFID tag chip of the aforementioned embodiment of the present application one by one, and will not be repeated here.

[0080] According to the power management method of the RFID tag chip of the embodiment of the present application, at least one of the high-frequency reset signal and the ultra-high-frequency reset signal is used to control the power-down of at least two of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit, wherein the RFID tag chip includes a radio frequency antenna, a high-frequency analog circuit and a high-frequency digital circuit, an ultra-high-frequency analog circuit and an ultra-high-frequency digital circuit, the radio frequency antenna is adapted to receive a high-frequency electromagnetic wave signal or an ultra-high-frequency electromagnetic wave signal, the high-frequency analog circuit is configured to demodulate the high-frequency electromagnetic wave signal to obtain a high-frequency downlink command, and generate a high-frequency reset signal in the case of receiving the high-frequency electromagnetic wave signal, the high-frequency digital circuit is configured to execute the high-frequency downlink command, the ultra-high-frequency analog circuit is configured to demodulate the ultra-high-frequency electromagnetic wave signal to obtain an ultra-high-frequency downlink command, and generate an ultra-high-frequency reset signal in the case of receiving the ultra-high-frequency electromagnetic wave signal, and the ultra-high-frequency digital circuit is configured to execute the ultra-high-frequency downlink command. Therefore, according to at least one of the high-frequency reset signal and the ultra-high-frequency reset signal, it can be determined which circuits of the high-frequency analog circuit and the high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit do not need to work, and the power management module can control the power-down of the circuit to make the circuit enter the off state, so that the circuit will not have static power consumption and dynamic power consumption, thereby reducing the power consumption of the RFID tag chip.

[0081] It is to be appreciated that the above description and the examples that follow are intended to be illustrative only and that changes can be made to the description, as represented by the above listed elements, by the steps recited in the flow charts, and by the examples that follow, without departing from the spirit of the application. Accordingly, the scope of the present application is intended to be defined only by the appended claims.

[0082] It should be understood that aspects of the application can be implemented in hardware, software, firmware or a combination thereof. In the above embodiments, various steps or methods can be implemented in software or firmware that is stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any of the following technologies, known in the art, can be used: a hybrid of the above technologies, a combination of any of the above technologies, etc.

[0083] In the description of the present application, the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. The illustrative appearances of the above-mentioned terms in various places in the specification are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0084] In addition, the terms "first", "second" and the like in the embodiments of the present application are used only for the purpose of description, and can not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated in the embodiments. Therefore, the features defined with the terms "first", "second" and the like in the embodiments of the present application can be explicitly or implicitly indicated to include at least one of the features in the embodiments. In the description of the present application, the meaning of the word "plurality" is at least two or two or more, for example, two, three, four, etc., unless otherwise specifically limited in the embodiments.

[0085] In the present application, unless otherwise specifically related or limited in the embodiments, the terms "mounting", "connecting", "connecting" and "fixing" and the like appearing in the embodiments should be understood broadly, for example, the connection can be fixed connection, or detachable connection, or integral, which can be understood, or mechanical connection, electrical connection, etc. Of course, it can also be directly connected, or indirectly connected through an intermediate medium, or the internal communication of two elements, or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific implementation.

[0086] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limiting the present application, and those skilled in the art can make changes, modifications, replacements and modifications to the above embodiments within the scope of the present application.

Claims

1. An RFID tag chip, characterized by The application relates to a power management module for a radio frequency antenna, comprising: a radio frequency antenna adapted to receive high frequency electromagnetic wave signals or ultra-high frequency electromagnetic wave signals; a high frequency analog circuit configured to demodulate the high frequency electromagnetic wave signals to obtain high frequency downlink commands, and generate a high frequency reset signal when the high frequency electromagnetic wave signals are received, and a high frequency digital circuit configured to execute the high frequency downlink commands; an ultra-high frequency analog circuit configured to demodulate the ultra-high frequency electromagnetic wave signals to obtain ultra-high frequency downlink commands, and generate an ultra-high frequency reset signal when the ultra-high frequency electromagnetic wave signals are received, and an ultra-high frequency digital circuit configured to execute the ultra-high frequency downlink commands; a power management module configured to control the high frequency analog circuit and the high frequency digital circuit to power down simultaneously according to at least one of the high frequency reset signal and the ultra-high frequency reset signal, and / or control the ultra-high frequency analog circuit and the ultra-high frequency digital circuit to power down simultaneously.

2. The RFID tag chip of claim 1, wherein, The power management module is further configured to, control the ultra-high frequency analog circuit and the ultra-high frequency digital circuit to power down when the high frequency reset signal is received and the ultra-high frequency reset signal is not received; or control the high frequency analog circuit and the high frequency digital circuit to power down when the high frequency reset signal is not received and the ultra-high frequency reset signal is received; or control at least two of the high frequency analog circuit and the high frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit to power down according to a first generation time of the high frequency reset signal and a second generation time of the ultra-high frequency reset signal when the high frequency reset signal and the ultra-high frequency reset signal are received.

3. The RFID tag chip of claim 2, wherein, The power management module is further configured to, control the ultra-high frequency analog circuit and the ultra-high frequency digital circuit to power down when the first generation time is earlier than the second generation time; or control the high frequency analog circuit and the high frequency digital circuit to power down when the second generation time is earlier than the first generation time; or control at least two of the high frequency analog circuit and the high frequency digital circuit and the ultra-high frequency analog circuit and the ultra-high frequency digital circuit to power down according to a first analysis time of the high frequency digital circuit to the high frequency downlink commands and a second analysis time of the ultra-high frequency digital circuit to the ultra-high frequency downlink commands when the first generation time is the same as the second generation time.

4. The RFID tag chip of claim 3, wherein, The power management module is further configured to, control the ultra-high frequency analog circuit and the ultra-high frequency digital circuit to power down when the first analysis time is earlier than the second analysis time; or control the high frequency analog circuit and the high frequency digital circuit to power down when the second analysis time is earlier than the first analysis time; or In the case that the first resolution time is the same as the second resolution time, the high-frequency analog circuit and the ultra-high-frequency digital circuit and the ultra-high-frequency analog circuit and the ultra-high-frequency digital circuit are powered off respectively.

5. The RFID tag chip of claim 1, wherein, The high-frequency analog circuit comprises: A high-frequency reset generation module configured to generate the high-frequency reset signal when the high-frequency electromagnetic wave signal is received, and send the high-frequency reset signal to the power management module; A high-frequency power generation unit configured to generate the power supply of the high-frequency digital circuit according to the high-frequency electromagnetic wave signal when the high-frequency electromagnetic wave signal is received; A high-frequency demodulation module configured to demodulate the high-frequency electromagnetic wave signal to generate the high-frequency downlink command, and send the high-frequency downlink command to the high-frequency digital circuit, so that the high-frequency digital circuit executes the high-frequency downlink command and returns high-frequency uplink data; A high-frequency modulation module configured to modulate the high-frequency uplink data to generate a high-frequency electromagnetic carrier, and transmit the high-frequency electromagnetic carrier to the radio frequency antenna, so that the high-frequency electromagnetic carrier is transmitted through the radio frequency antenna.

6. The RFID tag chip of claim 5, wherein, The high-frequency digital circuit comprises: A high-frequency downlink decoding module configured to decode the high-frequency downlink command to obtain a high-frequency decoding signal; A high-frequency command resolution module configured to resolve the high-frequency decoding signal to obtain a high-frequency command type and a high-frequency command parameter; A high-frequency state control module configured to control the state of the RFID tag chip according to the high-frequency command type and the high-frequency command parameter, and determine the type of the high-frequency uplink data; A high-frequency uplink encoding module configured to encode the uplink data according to the type of the high-frequency uplink data and the state of the RFID tag chip to generate the high-frequency uplink data.

7. The RFID tag chip of claim 6, wherein, The power management module is connected to the high-frequency downlink decoding module, the high-frequency command resolution module, the high-frequency state control module and the high-frequency uplink encoding module respectively, and the power management module is further configured to provide the power supply of the high-frequency digital circuit to the high-frequency downlink decoding module after receiving the high-frequency reset signal, so that the high-frequency downlink decoding module is powered on, and provide the power supply of the high-frequency digital circuit to the high-frequency command resolution module, the high-frequency state control module and the high-frequency uplink encoding module in turn after receiving the control signal sent by the high-frequency downlink decoding module, so that the high-frequency command resolution module, the high-frequency state control module and the high-frequency uplink encoding module are powered on in turn.

8. The RFID tag chip of claim 6, wherein, The power management module is further configured to control the high-frequency uplink encoding module, the high-frequency state control module, the high-frequency command resolution module and the high-frequency downlink decoding module to be powered off in turn when the RFID tag chip executes the high-frequency downlink command.

9. The RFID tag chip of claim 1, wherein, The ultra-high-frequency analog circuit comprises: The ultra-high frequency reset generation module is configured to generate the ultra-high frequency reset signal when the ultra-high frequency electromagnetic wave signal is received, and send the ultra-high frequency reset signal to the power management module; The ultra-high frequency power generation unit is configured to generate the power supply of the ultra-high frequency digital circuit according to the ultra-high frequency electromagnetic wave signal when the ultra-high frequency electromagnetic wave signal is received; The ultra-high frequency demodulation module is configured to demodulate the ultra-high frequency electromagnetic wave signal to generate the ultra-high frequency downlink command, and send the ultra-high frequency downlink command to the high frequency digital circuit, so that the high frequency digital circuit executes the ultra-high frequency downlink command and returns the ultra-high frequency uplink data; The ultra-high frequency modulation module is configured to modulate the ultra-high frequency uplink data to generate the ultra-high frequency electromagnetic carrier, and transmit the ultra-high frequency electromagnetic carrier to the radio frequency antenna to transmit the ultra-high frequency electromagnetic carrier through the radio frequency antenna.

10. The RFID tag chip of claim 9, wherein, The ultra-high frequency digital circuit comprises: The ultra-high frequency downlink decoding module is configured to decode the ultra-high frequency downlink command to obtain an ultra-high frequency decoding signal; The ultra-high frequency command analysis module is configured to analyze the ultra-high frequency decoding signal to obtain an ultra-high frequency command type and an ultra-high frequency command parameter; The ultra-high frequency state control module is configured to control the state of the RFID tag chip according to the ultra-high frequency command type and the ultra-high frequency command parameter, and determine the type of the ultra-high frequency uplink data; The ultra-high frequency uplink encoding module is configured to encode the uplink data according to the type of the ultra-high frequency uplink data and the state of the RFID tag chip to generate the ultra-high frequency uplink data.

11. The RFID tag chip of claim 10, wherein, The power management module is connected with the ultra-high frequency downlink decoding module, the ultra-high frequency command analysis module, the ultra-high frequency state control module and the ultra-high frequency uplink encoding module, and the power management module is further configured to provide the power supply of the ultra-high frequency digital circuit to the ultra-high frequency downlink decoding module after receiving the ultra-high frequency reset signal, so that the ultra-high frequency downlink decoding module is powered on, and provide the power supply of the ultra-high frequency digital circuit to the ultra-high frequency command analysis module, the ultra-high frequency state control module and the ultra-high frequency uplink encoding module in sequence after receiving the control signal sent by the ultra-high frequency downlink decoding module, so that the ultra-high frequency command analysis module, the ultra-high frequency state control module and the ultra-high frequency uplink encoding module are powered on in sequence.

12. The RFID tag chip of claim 11, wherein, The power management module is further configured to control the ultra-high frequency uplink encoding module, the ultra-high frequency state control module, the ultra-high frequency command analysis module and the ultra-high frequency downlink decoding module to be powered off in sequence when the RFID tag chip executes the ultra-high frequency downlink command.

13. The RFID tag chip of any of claims 1-12, wherein, The power management module comprises: The high frequency power switch is connected with the high frequency analog circuit and the high frequency digital circuit, and is configured to control the power-on and power-off of the high frequency analog circuit and the high frequency digital circuit. A super-high frequency power switch connected to the super-high frequency analog circuit and the super-high frequency digital circuit, respectively, and configured to control power-on and power-off of the super-high frequency analog circuit and the super-high frequency digital circuit.

14. A power management method for an RFID tag chip, characterized by, The RFID tag chip comprises a radio frequency antenna, a high frequency analog circuit and a high frequency digital circuit, a super-high frequency analog circuit and a super-high frequency digital circuit, the radio frequency antenna is adapted to receive a high frequency electromagnetic wave signal or a super-high frequency electromagnetic wave signal, the high frequency analog circuit is configured to demodulate the high frequency electromagnetic wave signal to obtain a high frequency downlink command, and generate a high frequency reset signal when the high frequency electromagnetic wave signal is received, the high frequency digital circuit is configured to execute the high frequency downlink command, the super-high frequency analog circuit is configured to demodulate the super-high frequency electromagnetic wave signal to obtain a super-high frequency downlink command, and generate a super-high frequency reset signal when the super-high frequency electromagnetic wave signal is received, and the super-high frequency digital circuit is configured to execute the super-high frequency downlink command, and the method comprises: According to at least one of the high frequency reset signal and the super-high frequency reset signal, controlling the high frequency analog circuit and the high frequency digital circuit to be powered off at the same time, and / or controlling the super-high frequency analog circuit and the super-high frequency digital circuit to be powered off at the same time.

15. The power management method of claim 14, wherein, Controlling the high frequency analog circuit and the high frequency digital circuit to be powered off at the same time, and / or controlling the super-high frequency analog circuit and the super-high frequency digital circuit to be powered off at the same time, comprises: In the case of receiving the high frequency reset signal and not receiving the super-high frequency reset signal, powering off the super-high frequency analog circuit and the super-high frequency digital circuit; or In the case of not receiving the high frequency reset signal and receiving the super-high frequency reset signal, powering off the high frequency analog circuit and the high frequency digital circuit; or In the case of receiving the high frequency reset signal and the super-high frequency reset signal, according to the first generation time of the high frequency reset signal and the second generation time of the super-high frequency reset signal, powering off at least two of the high frequency analog circuit and the high frequency digital circuit and the super-high frequency analog circuit and the super-high frequency digital circuit.

16. The power management method of claim 14, wherein, The high-frequency analog circuit includes a high-frequency reset generation module, a high-frequency power generation unit, a high-frequency demodulation module, and a high-frequency modulation module. The high-frequency reset generation module is configured to generate the high-frequency reset signal upon receiving the high-frequency electromagnetic wave signal. The high-frequency power generation unit is configured to generate a power supply for the high-frequency digital circuit according to the high-frequency electromagnetic wave signal upon receiving the high-frequency electromagnetic wave signal. The high-frequency demodulation module is configured to demodulate the high-frequency electromagnetic wave signal to generate the high-frequency downlink command and send the high-frequency downlink command to the high-frequency digital circuit so that the high-frequency digital circuit executes the high-frequency downlink command and returns high-frequency uplink data. The high-frequency modulation module is configured to modulate the high-frequency uplink data to generate a high-frequency electromagnetic carrier and transmit the high-frequency electromagnetic carrier to the radio frequency antenna for transmission by the radio frequency antenna. The high-frequency digital circuit includes a high-frequency downlink decoding module, a high-frequency command parsing module, a high-frequency state control module, and a high-frequency uplink encoding module. The high-frequency downlink decoding module is configured to decode the high-frequency downlink command to obtain a high-frequency decoding signal. The high-frequency command parsing module is configured to parse the high-frequency decoding signal to obtain a high-frequency command type and a high-frequency command parameter. The high-frequency state control module is configured to control the state of the RFID tag chip according to the high-frequency command type and the high-frequency command parameter and determine the type of the high-frequency uplink data. The high-frequency uplink encoding module is configured to encode the uplink data according to the type of the high-frequency uplink data and the state of the RFID tag chip to generate the high-frequency uplink data. The method further includes: After receiving the high-frequency reset signal, providing the power supply for the high-frequency digital circuit to the high-frequency downlink decoding module to power on the high-frequency downlink decoding module; After receiving the control signal sent by the high-frequency downlink decoding module, sequentially providing the power supply for the high-frequency digital circuit to the high-frequency command parsing module, the high-frequency state control module, and the high-frequency uplink encoding module to sequentially power on the high-frequency command parsing module, the high-frequency state control module, and the high-frequency uplink encoding module.

17. The power management method of claim 16, wherein, The method further includes: Upon completion of execution of the high-frequency downlink command by the RFID tag chip, sequentially powering off the high-frequency uplink encoding module, the high-frequency state control module, the high-frequency command parsing module, and the high-frequency downlink decoding module.

18. The power management method of claim 14, wherein, The super high frequency analog circuit includes a super high frequency reset generation module, a super high frequency power generation unit, a super high frequency demodulation module and a super high frequency modulation module. The super high frequency reset generation module is configured to generate the super high frequency reset signal when the super high frequency electromagnetic wave signal is received. The super high frequency power generation unit is configured to generate the power supply of the super high frequency digital circuit according to the super high frequency electromagnetic wave signal or the super high frequency electromagnetic wave signal when the super high frequency electromagnetic wave signal is received. The super high frequency demodulation module is configured to demodulate the super high frequency electromagnetic wave signal to generate the super high frequency downlink command, and send the super high frequency downlink command to the high frequency digital circuit, so that the high frequency digital circuit executes the super high frequency downlink command and returns the super high frequency uplink data. The super high frequency modulation module is configured to modulate the super high frequency uplink data to generate the super high frequency electromagnetic carrier, and transmit the super high frequency electromagnetic carrier to the radio frequency antenna to transmit the super high frequency electromagnetic carrier through the radio frequency antenna. The super high frequency digital circuit includes a super high frequency downlink decoding module, a super high frequency command analysis module, a super high frequency state control module and a super high frequency uplink encoding module. The super high frequency downlink decoding module is configured to decode the super high frequency downlink command to obtain a super high frequency decoding signal. The super high frequency command analysis module is configured to analyze the super high frequency decoding signal to obtain a super high frequency command type and a super high frequency command parameter. The super high frequency state control module is configured to control the state of the RFID tag chip according to the super high frequency command type and the super high frequency command parameter, and determine the type of the super high frequency uplink data. The super high frequency uplink encoding module is configured to encode the uplink data according to the type of the super high frequency uplink data and the state of the RFID tag chip to generate the super high frequency uplink data. The method further comprises: After receiving the super high frequency reset signal, the power supply of the super high frequency digital circuit is provided to the super high frequency downlink decoding module to power on the super high frequency downlink decoding module; After receiving the control signal sent by the super high frequency downlink decoding module, the power supply of the super high frequency digital circuit is sequentially provided to the super high frequency command analysis module, the super high frequency state control module and the super high frequency uplink encoding module, so that the super high frequency command analysis module, the super high frequency state control module and the super high frequency uplink encoding module are sequentially powered on.

19. The power management method of claim 18, wherein, The method further comprises: When the RFID tag chip executes the super high frequency downlink command, the super high frequency uplink encoding module, the super high frequency state control module, the super high frequency command analysis module and the super high frequency downlink decoding module are sequentially powered off.

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