Automatic transmitting and receiving circuit, automatic transmitting and receiving system and data transmission method

Abstract

The invention relates to an automatic transmitting and receiving circuit, an automatic transmitting and receiving system and a data transmission method. Relates to the field of electronic circuits and solves the problem of pin resource shortage. The circuit comprises a first access circuit module, a second access circuit module, a third access circuit module and a data transmission chip, the first access circuit module accesses a sending pin of a controller, a driver input pin of the data transmission chip and a control pin of the data transmission chip, generates a control signal according to a data signal sent by the controller and outputs the control signal to the control pin; the second access circuit module accesses a receiving pin of the controller and a receiver output pin of the data transmission chip; and the third access circuit module accesses a differential pin of the data transmission chip, and receives a differential signal from a communication opposite end or sends the differential signal to the communication opposite end. The technical scheme provided by the invention is suitable for an embedded system, and low-cost and high-reliability data transmission is realized.

Description

Technical Field

[0001] The present disclosure relates to the field of electronic circuits, and in particular to an automatic transceiver circuit, an automatic transceiver system and a data transmission method. Background Art

[0002] In an embedded system, the controller needs to allocate independent pins to send an enable signal to a transmission chip such as RS485 to control the transmission chip.

[0003] Since the hardware general purpose input / output (GPIO) pins of controllers such as MCU (microcontroller unit) are relatively scarce, with the continuous upgrading of application requirements, the deployment of embedded systems often faces the dilemma of insufficient pin resources. The use of hardware expansion chips or software simulation interfaces can alleviate the problem of GPIO pin shortage to a certain extent.

[0004] The use of hardware expansion chip solutions to enrich pin resources requires the addition of dedicated expansion chips or multiplexers in the circuit design, which increases the burden on circuit design complexity, hardware cost, power consumption, computing resources, etc., affecting system performance. The use of software simulation interface solutions will increase the occupation of computing resources and also affect the overall performance of the system. As system performance declines, pin switching may even become stuck and delayed during data transmission, leading to serious consequences such as data loss and transmission interruption.

[0005] In summary, there is a lack of effective controller pin resource management mechanism. Summary of the invention

[0006] In order to overcome the problems existing in the related art, the present disclosure provides an automatic transceiver circuit, an automatic transceiver system and a data transmission method.

[0007] According to a first aspect of an embodiment of the present disclosure, there is provided an automatic transceiver circuit, comprising: a first access circuit module, a second access circuit module, a third access circuit module and a data transmission chip; The first access circuit module is connected to the sending pin of the controller, the driver input pin of the data transmission chip and the control pin of the data transmission chip, generates a control signal according to the data signal sent by the controller and outputs it to the control pin; The second access circuit module is connected to the receiving pin of the controller and the receiver output pin of the data transmission chip; The third access circuit module is connected to the differential pins of the data transmission chip, and receives or sends differential signals from a communication peer end.

[0008] Further, the first access circuit module includes a first signal transmission module, a first resistor, a second resistor, a third resistor, and a first switch; The first signal transmission module is connected to the transmission pin of the controller and outputs a data signal through the first resistor; The gate of the first switch is connected to the first signal transmission module through the first resistor and is connected to the second resistor, the source is grounded, and the drain is connected to the control pin of the data transmission chip and accesses the operating voltage through the third resistor; One end of the second resistor is connected to the gate of the first switch, and the other end is grounded.

[0009] Further, the first signal transmission module includes a fourth resistor, a fifth resistor, and a first optocoupler; The first input pin of the first optocoupler accesses the operating voltage through the fourth resistor, the second input pin is connected to the transmission pin of the controller, the third output pin is grounded, the fourth output pin is connected to the gate of the first switch through the first resistor, and the fourth output pin is also connected to the driver input pin of the data transmission chip and accesses the operating voltage through the fifth resistor.

[0010] Further, the second access circuit module includes a sixth resistor, a seventh resistor, an eighth resistor, and a second optocoupler; The first input pin of the second optocoupler accesses the operating voltage through the seventh resistor, the second input pin is connected to the receiver output pin of the data transmission chip and accesses the operating voltage through the eighth resistor, the third output pin is grounded, and the fourth output pin accesses the receiving pin of the controller and accesses the operating voltage through the sixth resistor.

[0011] Further, the differential pins of the data transmission chip include a first differential pin and a second differential pin, and the third access circuit module includes a ninth resistor, a tenth resistor, an eleventh resistor, a first capacitor, a second capacitor, a first transmission end, and a second transmission end; One end of the ninth resistor accesses the second differential pin of the data transmission chip, the tenth resistor, and the second capacitor, and the other end is grounded; One end of the eleventh resistor accesses the first differential pin of the data transmission chip, the tenth resistor, and the first capacitor, and the other end accesses the operating voltage; One end of the tenth resistor is connected to the ninth resistor, and the other end is connected to the eleventh resistor; One pole of the first capacitor is connected to the eleventh resistor, and the other pole is grounded; One pole of the second capacitor is connected to the ninth resistor, and the other pole is grounded; The first transmission end is led out from the contact point between the tenth resistor and the eleventh resistor, and the second transmission end is led out from the contact point between the ninth resistor and the tenth resistor.

[0012] According to a second aspect of the embodiments of the present disclosure, an automatic transceiver system is provided, including a controller and at least one of the above automatic transceiver circuits; The sending pin of the controller is connected to the first access circuit module of each of the automatic transceiver circuits, and a data signal is sent to the first access circuit module to generate a control signal for the transmission chip through the first access circuit module.

[0013] According to a third aspect of the embodiments of the present disclosure, a data transmission method is provided, which is applicable to the above automatic transceiver circuit, and the method includes: Generating a control signal for the data transmission chip according to the data sending state of the controller; Sending the control signal to the data transmission chip to cooperate with the data transmission chip to cooperate with the controller for data transmission.

[0014] Further, the step of generating a control signal for the transmission chip according to the data sending state of the controller includes: When the controller does not send data, generating the control signal indicating the reception mode; When the controller sends data 1, generating the control signal indicating the high-impedance mode; When the controller sends data 0, generating the control signal indicating the transmission mode.

[0015] Further, the step of sending the control signal to the data transmission chip to cooperate with the data transmission chip to cooperate with the controller for data transmission includes: When the control signal indicates the reception mode, reading the signal received by the differential pin of the data transmission chip; When the control signal indicates the high-impedance mode, switching the differential pin to the high-impedance state; When the control signal indicates the transmission mode, outputting a low-level differential signal through the differential pin.

[0016] Further, the method further includes: When the control signal indicates the high-impedance mode, outputting a high-level differential signal generated by the third access circuit module to the communication peer.

[0017] The technical solutions provided by the embodiments of the present disclosure may include the following beneficial effects: The first access circuit module automatically generates a control signal according to the received data signal, and controls the data transmission chip based on the control signal. The third access circuit module sends a differential signal according to the state of the data transmission chip. Data transmission management is carried out without occupying the pins for control, solving the problem of tight pin resources and realizing low-cost and high-reliability data transmission.

[0018] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present disclosure, and are used together with the specification to explain the principles of the present disclosure.

[0020] Figure 1 is a schematic diagram of an automatic transceiver circuit shown according to an exemplary embodiment.

[0021] Figure 2 is a schematic diagram of an automatic transceiver system shown according to an exemplary embodiment.

[0022] Figure 3 is a flowchart of a data transmission method shown according to an exemplary embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0023] Here, the exemplary embodiments will be described in detail, and the examples are shown in the accompanying drawings. When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. On the contrary, they are only examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.

[0024] Adopting a hardware expansion chip solution to enrich the pin resources requires adding a dedicated expansion chip or multiplexer in the circuit design, which increases the burden in terms of circuit design complexity, hardware cost, power consumption, computing resources, etc., affecting the system performance. Adopting a software simulation interface solution will increase the occupation of computing power resources and also affect the overall system performance. As the system performance declines, pin switching may even become stuck and lag during data transmission, and then serious consequences such as data loss and transmission interruption may occur.

[0025] To solve the above problems, embodiments of the present disclosure provide an automatic transceiver circuit, an automatic transceiver system, and a data transmission method. By using a general-purpose circuit with a relatively low cost, control signals are automatically generated based on data signals, eliminating the need for the controller to send control signals through dedicated pins, saving pin resources, solving the problem of tight pin resources, and achieving low-cost and highly reliable data transmission.

[0026] An exemplary embodiment of the present disclosure provides an automatic transceiver circuit that realizes automatic generation of control signals based on data signals through a general circuit structure, reducing the pin resource pressure. The structure of the automatic transceiver circuit is as Figure 1 shown and includes: A first access circuit module 101, a second access circuit module 102, a third access circuit module 103, and a data transmission chip 104.

[0027] The first access circuit module 101 is connected to the transmit pin (USART1_TX) of the controller, the driver input pin (DI) of the data transmission chip 104, and the control pin of the data transmission chip 104, generates a control signal according to the data signal sent by the controller, and outputs it to the control pin.

[0028] According to an implementation manner, the data transmission chip has at least two control pins. The control pins can be a receive enable pin (RE) and / or a transmit enable pin (DE).

[0029] The second access circuit module 102 is connected to the receive pin of the controller and the receiver output pin (RO) of the data transmission chip 104.

[0030] The third access circuit module 103 is connected to the differential pins of the data transmission chip 104, and receives or sends differential signals to the communication peer from the communication peer.

[0031] According to an implementation manner, the differential pins of the data transmission chip 104 include a first differential pin (A) and a second differential pin B. The output data is determined by detecting the voltage difference between A and B.

[0032] According to an exemplary implementation manner, the first access circuit module 101 includes a first signal transmission module 1021, a first resistor R1, a second resistor R2, a third resistor R3, and a first switch Q1.

[0033] The first signal transmission module 1041 is connected to the transmit pin of the controller and outputs a data signal through R1.

[0034] The gate of Q1 (which can be the G pole) is connected to the first signal transmission module 1041 through the R1 and is also connected to R2. The source (which can be the S pole) is grounded, and the drain (which can be the D pole) is connected to the control pin of the data transmission chip 104 and accesses the operating voltage (such as VCC) through R3.

[0035] One end of the R2 is connected to the G pole of Q1, and the other end is grounded.

[0036] According to an exemplary embodiment, the first signal transmission module 1021 includes a fourth resistor R4, a fifth resistor R5, and a first optocoupler U11.

[0037] The first input pin of U11 accesses the operating voltage through R4, the second input pin is connected to the sending pin of the controller, the third output pin is grounded, the fourth output pin is connected to the gate of Q1 through the R1, and the fourth output pin is also connected to the DI pin of the data transmission chip 104 and accesses the operating voltage through R5. As Figure 1 shown, in U11, 1, 2, 3, and 4 respectively represent its first input pin, second input pin, third output pin, and fourth output pin.

[0038] According to an exemplary embodiment, Q1 can be a metal oxide semiconductor field effect transistor (MOSFET) such as a MOS transistor.

[0039] According to an exemplary embodiment, the second access circuit module 102 includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a second optocoupler U12.

[0040] The first input pin of U12 accesses the operating voltage through R7, the second input pin is connected to the RO pin of the data transmission chip 104 and accesses the operating voltage through R8, the third output pin is grounded, and the fourth output pin accesses the receiving pin (USART1_RX) of the controller and accesses the operating voltage through R6.

[0041] According to an exemplary embodiment, the differential pins of the data transmission chip 104 include a first differential pin A and a second differential pin B. The third access circuit module 1030 includes a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a first capacitor C1, a second capacitor C2, a first transmission end A1, and a second transmission end B1.

[0042] One end of the R9 accesses the B pin of the data transmission chip 104, R10, and C2, and the other end is grounded.

[0043] One end of R11 is connected to the A pin of the data transmission chip 104, R10 and C1, and the other end is connected to the working voltage.

[0044] One end of R10 is connected to R9 and the other end is connected to R11.

[0045] One terminal of C1 is connected to R11, and the other terminal is grounded.

[0046] One terminal of C2 is connected to R9, and the other terminal is grounded.

[0047] A1 is led out from the connection point between R10 and R11, and B1 is led out from the connection point between R9 and R10.

[0048] Further, the data transmission chip 104 includes a low power consumption half-duplex transceiver chip. According to an exemplary embodiment, the low power consumption half-duplex transceiver chip may be an RS485 chip, such as an SP3485 chip.

[0049] According to an exemplary embodiment, the automatic transceiver circuit further includes a third capacitor C3. The VCC pin of the data transmission chip 104 is connected to one electrode of the third capacitor, and the other electrode of the third capacitor is grounded. The GND pin of the data transmission chip 104 is grounded.

[0050] An exemplary embodiment of the present disclosure also provides an automatic transceiver system, such as Figure 2 As shown, the controller includes at least one Figure 1 The automatic transceiver circuit shown.

[0051] The sending pin of the controller is connected to the first connecting circuit module of each automatic transceiver circuit, and sends a data signal to the first connecting circuit module to generate a control signal of the transmission chip through the first connecting circuit module.

[0052] According to an exemplary embodiment, the automatic transceiver system includes multiple automatic transceiver circuits, a controller sends data signals to the multiple automatic transceiver circuits, and each automatic transceiver circuit automatically generates a control signal based on the received data signal to control its own data transmission chip to complete data transmission, thereby realizing data transmission of multiple automatic transceiver circuits under the control of the same controller.

[0053] According to an exemplary embodiment, the controller can access different buses based on the automatic transceiver system to communicate with multiple objects.

[0054] According to an exemplary embodiment, different automatic transceiver systems may be further configured to cooperate with each other, and data signals may be used in a time-sharing manner to achieve communication with different objects.

[0055] According to an exemplary embodiment, the controller may be an MCU. Through the automatic transceiver system, a multi-data transmission chip solution with low cost and high versatility can be achieved.

[0056] An exemplary embodiment of the present disclosure further provides a data transmission method, which is applicable to the automatic transceiver circuit provided in the embodiments of the present invention. The process of completing data transmission using this method is as Figure 3 shown and includes: Step 301: Generate a control signal for the data transmission chip according to the data sending state of the controller.

[0057] In this step, the automatic transceiver circuit generates a transmission chip signal according to the data sending state of the controller, specifically according to the data signal, to control the communication of the data transmission chip. It includes at least the following three situations: 1. When the controller does not send data, generate a control signal for the transmission chip indicating the receiving mode.

[0058] According to an exemplary embodiment, in the automatic transceiver circuit as Figure 1 shown, when the controller does not send data, USART1_TX is at a high level, the 4th pin of U11 outputs a high level to the gate of Q1, and Q1 conducts. At this time, both the RE and DE pins of the data transmission chip input a low-level control signal, and the data transmission chip enters the receiving mode, reads the differential signal through the A and B pins, and transmits it to the second access circuit module via the RO pin.

[0059] 2. When the controller sends data 1, generate a control signal for the transmission chip indicating the high-impedance mode.

[0060] In this case, a high-level differential signal generated by the third access circuit module is output to the communication peer. When the control signal of the transmission chip indicates the high-impedance mode, the differential pins of the data transmission chip do not output voltage / signals to the outside. At this time, the third access circuit module generates a signal and outputs it to the communication peer through A1 and B1.

[0061] According to an exemplary embodiment, in the automatic transceiver circuit as Figure 1 shown, when sending data, if sending 1, the 4th pin of U11 outputs a high level to the gate of Q1, and Q1 conducts. At this time, both the RE and DE pins of the data transmission chip input a low-level control signal, and the data transmission chip thus enters the receiving mode, and the A and B pins enter the high-impedance state and interrupt the output. Since R11 pulls A1 high and R9 pulls B1 low, the differential signal output at the A1 and B1 ends at this time indicates that the transmitted data is 1.

[0062] 3. When the controller sends data 0, generate a control signal for the transmission chip indicating the transmission mode.

[0063] According to an exemplary embodiment, in Figure 1 In the automatic transceiver circuit shown, when sending data, if sending 0, the fourth pin of U11 outputs a low level to the gate of Q1, and Q1 is turned off. At this time, the inputs of the RE and DE pins are pulled high to a high level, and the data transmission chip enters the transmission mode, reflecting the level on the DI to the AB pins for output. Therefore, the data transmitted at the A1 and B1 ends is 0.

[0064] Step 302: Send the control signal to the data transmission chip to cooperate with the data transmission chip to perform data transmission with the controller.

[0065] In this step, according to the content indicated by the control signal, the data transmission chip switches to the appropriate mode to complete the data interaction communication between the controller and the communication peer.

[0066] Specifically: When the control signal indicates the receive mode, read the signal received by the differential pins of the data transmission chip; When the control signal indicates the high-impedance mode, switch the differential pins to the high-impedance state; When the control signal indicates the transmission mode, output a low-level differential signal through the differential pins.

[0067] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure.

[0068] Embodiments of the present disclosure provide an automatic transceiver circuit, an automatic transceiver system, and a data transmission method. The first access circuit module automatically generates a control signal according to the received data signal, controls the data transmission chip based on the control signal, and the third access circuit module sends a differential signal according to the state of the data transmission chip. Data transmission management is performed without occupying the pins for control, solving the problem of tight pin resources and realizing low-cost and high-reliability data transmission.

[0069] There is no need to use a dedicated automatic transceiver chip, reducing the hardware cost. Since the corresponding functions of the automatic transceiver circuit are implemented using a simple circuit with strong versatility, there is no need for complex chip configuration, which reduces the software implementation difficulty on the basis of reducing the hardware cost, saves computing resources, ensures the resource support for the communication process, and makes the communication process more reliable and more real-time.

[0070] By referring to the high and low levels of the transmitted and received data, a control signal for controlling the transmission and reception of the data transmission chip is generated and input to the control pin of the data transmission chip, which ingeniously realizes the control of the data flow direction and saves the input / output interfaces / pins of the controller at the same time. The pin resources can be more widely utilized, thereby expanding the capabilities of the embedded system.

[0071] Those skilled in the art can also understand that the various illustrative logical blocks and steps listed in the embodiments of the present application can be implemented by electronic hardware, computer software, or a combination of both. Whether such a function is implemented by hardware or software depends on the specific application and the design requirements of the entire system. Those skilled in the art can use various methods to implement the described function for each specific application, but such implementation should not be construed as exceeding the scope protected by the embodiments of the present application.

[0072] In addition, the word "exemplary" is used herein to mean serving as an example, instance, or illustration. Any aspect or design described herein as "exemplary" is not necessarily to be understood as being advantageous compared to other aspects or designs. Instead, the use of the word exemplary is intended to present concepts in a concrete manner. As used herein, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". That is, unless otherwise specified or clear from the context, "X applies A or B" is intended to mean any arrangement in a natural inclusive arrangement. That is, if X applies A; X applies B; or X applies both A and B, then "X applies A or B" is satisfied in any of the foregoing instances. Additionally, unless otherwise specified or clear from the context referring to the singular form, the articles "a" and "an" as used in this application and the appended claims are generally understood to mean "one or more".

[0073] Similarly, although the present disclosure has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art upon reading and understanding this specification and the drawings. The present disclosure includes all such modifications and variations and is limited only by the scope of the claims. Specifically with respect to the various functions performed by the components described above (e.g., elements, resources, etc.), unless otherwise indicated, the terms used to describe such components are intended to correspond to any component (functionally equivalent) that performs the specific function of the described component, even if not structurally equivalent to the disclosed structure. Additionally, although a particular feature of the present disclosure may have been disclosed with respect to only one of several implementations, such a feature may, as may be desired and advantageous for any given or particular application, be combined with one or more other features of other implementations. Moreover, with respect to the use of "comprising", "having", "including", "contains", or variations thereof in the detailed description or claims, such terms are intended to be inclusive in a manner similar to the term "including".

[0074] Other embodiments of the present disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include known or customary techniques in the art that are not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of the present disclosure are pointed out by the following claims.

[0075] It should be understood that the present disclosure is not limited to the exact structures described above and shown in the drawings, and various modifications and changes may be made without departing from its scope. The scope of the present disclosure is limited only by the appended claims.

Claims

1. An automatic transceiver circuit, characterized in that, Comprising: A first access circuit module, a second access circuit module, a third access circuit module, and a data transmission chip; The first access circuit module accesses the transmission pin of the controller, the driver input pin of the data transmission chip, and the control pin of the data transmission chip, generates a control signal according to the data signal sent by the controller, and outputs it to the control pin; The second access circuit module accesses the reception pin of the controller and the receiver output pin of the data transmission chip; The third access circuit module accesses the differential pins of the data transmission chip, and receives or sends differential signals from / to the communication peer.

2. The automatic transceiver circuit according to claim 1, wherein The first access circuit module includes a first signal transmission module, a first resistor, a second resistor, a third resistor, and a first switch; The first signal transmission module accesses the transmission pin of the controller, and outputs a data signal through the first resistor; The gate of the first switch is connected to the first signal transmission module and the second resistor through the first resistor, the source is grounded, and the drain is connected to the control pin of the data transmission chip and accesses the operating voltage through the third resistor; One end of the second resistor is connected to the gate of the first switch, and the other end is grounded.

3. The automatic transceiver circuit according to claim 2, wherein The first signal transmission module includes a fourth resistor, a fifth resistor, and a first optocoupler; The first input pin of the first optocoupler accesses the operating voltage through the fourth resistor, the second input pin is connected to the transmission pin of the controller, the third output pin is grounded, the fourth output pin is connected to the gate of the first switch through the first resistor, and the fourth output pin is also connected to the driver input pin of the data transmission chip and accesses the operating voltage through the fifth resistor.

4. The automatic transceiver circuit according to claim 1, wherein The second access circuit module includes a sixth resistor, a seventh resistor, an eighth resistor, and a second optocoupler; The first input pin of the second optocoupler accesses the operating voltage through the seventh resistor, the second input pin is connected to the receiver output pin of the data transmission chip and accesses the operating voltage through the eighth resistor, the third output pin is grounded, and the fourth output pin accesses the reception pin of the controller and accesses the operating voltage through the sixth resistor.

5. The automatic transceiver circuit according to claim 1, wherein The differential pins of the data transmission chip include a first differential pin and a second differential pin, and the third access circuit module includes a ninth resistor, a tenth resistor, an eleventh resistor, a first capacitor, a second capacitor, a first transmission end, and a second transmission end; One end of the ninth resistor accesses the second differential pin of the data transmission chip, the tenth resistor, and the second capacitor, and the other end is grounded; One end of the eleventh resistor accesses the first differential pin of the data transmission chip, the tenth resistor, and the first capacitor, and the other end accesses the operating voltage; One end of the tenth resistor is connected to the ninth resistor, and the other end is connected to the eleventh resistor; One pole of the first capacitor is connected to the eleventh resistor, and the other pole is grounded; One pole of the second capacitor is connected to the ninth resistor, and the other pole is grounded; The first transmission end is led out from the contact point between the tenth resistor and the eleventh resistor, and the second transmission end is led out from the contact point between the ninth resistor and the tenth resistor.

6. An automatic receiving and transmitting system, characterized in that, Comprising a controller and at least one automatic transceiver circuit as described in any one of claims 1-5; The transmission pin of the controller is connected to the first access circuit module of each of the automatic transceiver circuits, and a data signal is sent to the first access circuit module to generate a control signal for the transmission chip through the first access circuit module.

7. A data transmission method, characterized in that Applicable to the automatic transceiver circuit as described in any one of claims 1 to 5, the method comprising: Generating a control signal for the data transmission chip according to the data transmission state of the controller; Sending the control signal to the data transmission chip to cooperate with the data transmission chip to cooperate with the controller for data transmission.

8. The data transmission method according to claim 7, wherein The step of generating a control signal for the transmission chip according to the data transmission state of the controller includes: When the controller does not send data, generating the control signal indicating the receiving mode; When the controller sends data 1, generating the control signal indicating the high-impedance mode; When the controller sends data 0, generating the control signal indicating the sending mode.

9. The data transmission method according to claim 8, wherein The step of sending the control signal to the data transmission chip to cooperate with the data transmission chip to cooperate with the controller for data transmission includes: When the control signal indicates the receiving mode, reading the signal received by the differential pin of the data transmission chip; When the control signal indicates the high-impedance mode, switching the differential pin to the high-impedance state; When the control signal indicates the sending mode, outputting a low-level differential signal through the differential pin.

10. The data transmission method according to claim 9, wherein The method further includes: When the control signal indicates the high-impedance mode, outputting a high-level differential signal generated by the third access circuit module to the communication peer.

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