Multi-channel parallel frequency offset estimation method
Through the multi-channel parallel frequency deviation estimation method and pipeline range limiting algorithm, the complexity and accuracy problems of the frequency deviation estimation calculation method on the FPGA are solved, and the frequency deviation compensation with low resource occupation is achieved.
Patent Information
- Application Number
- CN202510552942.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-29
- Publication Date
- 2025-07-18
AI Technical Summary
When the existing frequency offset estimation algorithm is implemented on FPGA, there are problems such as excessive complexity and low accuracy, especially excessive hardware resource utilization.
The frequency deviation estimation method of multiple parallel channels is used to calculate the signal and cross-correlation function values before frequency deviation correction by parallel N channels, and combine the two-stage pipeline range limit and the complex index calculated by CORDIC IP core to achieve frequency deviation compensation.
It effectively reduces the overhead of register resources and DSP resources, realizes low-complexity frequency deviation estimation, and saves hardware resources.
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Figure CN120342500A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the fields of optical fiber and terahertz communication, and in particular to a multi-channel parallel frequency offset estimation method. Background Art
[0002] At present, high-speed real-time coherent optical communication often uses coherent optical modules to implement. Due to its strong anti-interference ability and large channel capacity, it is suitable for large-capacity long-distance communication scenarios. However, due to the high hardware cost, long development cycle, and low algorithm flexibility of coherent optical modules, it is difficult to achieve low-cost flexible communication. As a programmable logic device, FPGA can, on the one hand, customize the modulation format, and on the other hand, can implement low-latency data processing in a parallel pipeline manner. In addition, the development and maintenance costs of FPGA are low and the cycle is short, which is suitable for implementing low-cost flexible real-time transmission. However, due to the limited logic resources of FPGA and the high complexity of the digital signal processing (DSP) in coherent optical communication, especially the frequency offset estimation algorithm, it is difficult to implement. Therefore, it is necessary to study a low-complexity parallel frequency offset estimation algorithm based on FPGA.
[0003] Existing frequency offset estimation algorithms are divided into time-domain FOE algorithms and frequency-domain FOE algorithms. One of the common time-domain algorithms is the Mth-FOE algorithm, which obtains the phase error component caused by the carrier frequency offset by calculating the Mth power operation of the conjugate multiplication result of two adjacent symbols. However, this algorithm is greatly affected by noise in actual transmission, and a large amount of data caching is often required to achieve a low bit error rate, which will result in more hardware resources required during actual transmission. In addition, the pilot-based FOE algorithm improves the anti-noise ability by increasing the pilot length, but it will occupy additional bandwidth and is not suitable for dynamic channel environments. For frequency-domain FOE algorithms, the fast Fourier transform (FFT) is usually used, and the algorithm accuracy depends on the number of points involved in the calculation. In actual transmission, a large number of calculation points are required, which will occupy a large amount of DSP resources of FPGA.
[0004] In summary, when the existing frequency offset estimation algorithms are implemented on FPGA, there are still problems of too high complexity and too low accuracy. Summary of the Invention
[0005] The technical problem to be solved by the present invention is to overcome the deficiencies of the prior art and provide a multi-channel parallel frequency offset estimation method, which can effectively reduce the register resource and DSP resource overhead.
[0006] The present invention adopts the following technical solutions to solve the above technical problems:
[0007] A multi-path parallel frequency offset estimation method proposed according to the present invention includes:
[0008] Step 1: Calculate the cross-correlation function value F(f(k), x) between the signal before frequency offset correction and the possible frequency offset value f(k) before normalization in parallel for N paths, where N is the number of parallel paths of the signal;
[0009] Step 2: Traverse the F(f(k), x) corresponding to P paths of parallel f(k) in a pipeline manner, and find the f(k) corresponding to the maximum F(f(k), x) as the frequency offset estimation value before normalization P is preset;
[0010] Step 3: Based on Realize the range limitation of f i (k) through a two-stage pipeline method to obtain the result f i (k) after the range limitation, f i ′(k); where f i (k) is the frequency offset estimation value before normalization corresponding to the i-th path at the k-th moment. The two-stage pipeline method includes a first-stage pipeline range limitation method for realizing the range limitation at different moments and a second-stage pipeline range limitation method for realizing the range limitation on different paths;
[0011] Step 4: Based on f i ′(k), perform frequency offset compensation on the signal before frequency offset correction in parallel for N paths to obtain the signal after frequency offset correction.
[0012] As a further optimization scheme of the multi-path parallel frequency offset estimation method described in the present invention, in Step 3, the range limitation of f i (k) is realized through a two-stage pipeline method, and is limited within the range of [-f BV , f BV to obtain the result f i (k) after the range limitation, f i ′(k); where f BV is a numerical value, f BV = 4f B , f B is the preset range of the possible frequency offset value before normalization.
[0013] As a further optimization scheme of the multi-path parallel frequency offset estimation method described in the present invention,
[0014]
[0015] Among them, x i(k) is the signal of the i-th path before frequency offset correction at time k, t ∈ [0, N - 1], and the possible value of the frequency offset f(k) before normalization at time k increases by 1 at each time, and the range change is an integer in [-f B , f B , M is the number of signals used for frequency offset estimation, and both f B and M are preset. F(f(k), x) is the cross-correlation function value of x and f(k) at time k, j is the imaginary unit, and x is the M signals before frequency offset correction.
[0016] As a further optimization scheme of the multi-path parallel frequency offset estimation method described in the present invention, the independent variables of the complex exponential function are all known, and the complex exponential is calculated offline using MATLAB and then stored in the read-only memory ROM in parallel for P paths. The parameter P is preset.
[0017] As a further optimization scheme of the multi-path parallel frequency offset estimation method described in the present invention,
[0018]
[0019] As a further optimization scheme of the multi-path parallel frequency offset estimation method described in the present invention, step two includes:
[0020] Step 2.1: Subtract each pair of P-path parallel F(f(k), x) at time k to obtain P(P - 1) differences;
[0021] Step 2.2: At time k, determine whether the differences all satisfy that the F(f(k), x) of the path to be determined is greater than or equal to the F(f(k), x) of the other P - 1 paths; record the F(f(k), x) that satisfies being greater than or equal to the F(f(k), x) of the other P - 1 paths and its corresponding f(k) as the maximum cross-correlation function value F(f max F(k), x) and its corresponding independent variable f max F(k);
[0022] Step 2.3: Compare the magnitudes of the maximum cross-correlation function values F(f max F(k - 1), x), F(f max F(k), x) at times k - 1 and k, and take the maximum cross-correlation function value as the maximum cross-correlation function value and its corresponding independent variable including time k and all previous times;
[0023] Step 2.4: Repeat steps 2.1 - 2.3 until all F(f(k), x) corresponding to f(k) ∈ [-f B , f B are traversed, and the independent variable corresponding to the obtained maximum cross-correlation function value is denoted as It is the frequency offset estimation value before normalization.
[0024] As a further optimized solution of the multi-path parallel frequency offset estimation method described in the present invention, in step 3, the range limitation of f i (k) is realized by means of a two-stage pipeline, and is limited to [-f BV , f BV , and the result f i ′(k) after the range limitation of f i (k) is obtained; specifically as follows:
[0025] The range limitation of the two-stage pipeline in parallel N paths is divided into N2 identical range limitations of two-stage pipelines in parallel N1 paths, where N1 and N2 are preset values, and N1 * N2 = N;
[0026] The first-stage pipeline range limitation method includes:
[0027] Step 3.1 Calculate the difference between the (N1 - 1)th path and the 0th path;
[0028]
[0029] Among them, f0(k) respectively correspond to f i (k) of the (N1 - 1)th path and the 0th path; f Δ (k - 1) is the range limitation compensation value corresponding to the k - 1 moment, and when k = 0, f Δ (-1) = 0; Δ0 respectively correspond to the difference between f i (k) and f Δ (k - 1) corresponding to the (N1 - 1)th path and the 0th path at the k moment;
[0030] Step 3.2 Judge whether or Δ0 belongs to the range [f BV *(l1 - 1), f BV *(l1 + 1)], and set the flag bit Flag[l1] corresponding to the one belonging to this range to 1, otherwise set it to 0; where l1 is an even number in the range [-N / 4, N / 4]; and Δ0 to 1, otherwise set it to 0; where l1 is an even number in the range [-N / 4, N / 4];
[0031] Step 3.3 Traverse all the flag bits Flag[l1] to judge whether they are 1. When Flag[l1] = 0, check the next flag bit of l1 + 2 until the l1 corresponding to Flag[l1] = 1 is found, and update the range limitation compensation value f Δ (k) at the k moment;
[0032] f Δ (k) = fΔ (k - 1)+l1*f BV (3 - 2)
[0033] Step 3.4. Parallelize N1 channels of f i (k) and f Δ (k) are subtracted to obtain the result Δ′ of the range limit of the first stage corresponding to the i-th channel at time k i (k);
[0034] Δ′ i (k)=f(k)-f Δ (k) (3 - 3)
[0035] The second - stage pipeline range - limiting method is as follows:
[0036] Step 3.5. Parallelize N1 channels to determine whether Δ′ i (k) belongs to the range [f BV *(l2 - 1), f BV *(l2 + 1)]. Set the flag bit Flag[l2] corresponding to the Δ′ i (k) belonging to this range to 1, otherwise set it to 0; where l2 is an even number in the range [-N1 / 4, N1 / 4].
[0037] Step 3.6. Traverse all flag bits Flag[l2] to determine whether they are 1. When Flag[l2]=0, check the next flag bit with l2 + 2 until the l2 corresponding to Flag[l2]=1 is found; and limit the range of f i (k) within [-f BV , f BV according to Equation (3 - 4);
[0038] f i ′(k)=Δ′ i (k)-l2*f BV (3 - 4)
[0039] where f i ′(k) is the result of the range limit of the second stage corresponding to the i - th channel at time k.
[0040] As a further optimization scheme of the multi - path parallel frequency offset estimation method described in the present invention, the signal after frequency offset correction in step four is:
[0041]
[0042] where y i (k) is the signal after frequency offset correction corresponding to the i - th channel at time k.
[0043] As a further optimized solution of the multi-channel parallel frequency offset estimation method described in the present invention, step four includes:
[0044] Step 4.1: Multiply -1 / 8f B by f i ′(k) to obtain the normalized frequency offset estimation value of the i-th path at time k within the restricted range, and then multiply it by -2π to obtain the frequency offset compensation phase value of the i-th path at time k;
[0045] Step 4.2: Calculate the complex exponential of the frequency offset compensation phase value .
[0046] Step 4.3: Delay the signal x i (k) before frequency offset correction to achieve correspondence in time with the result of the complex exponential operation .
[0047] Step 4.4: Multiply the signal x i (k) of the i-th path corresponding to time k before frequency offset correction by to obtain the signal y i (k) after frequency offset correction.
[0048] As a further optimized solution of the multi-channel parallel frequency offset estimation method described in the present invention, in step 4.2, use the CORDIC IP core to calculate the complex exponential of the frequency offset compensation phase value .
[0049] Compared with the prior art, the present invention adopts the above technical solutions and has the following technical effects:
[0050] (1) Based on the maximum likelihood estimation method, the present invention first calculates the fourth power of the signal before frequency offset correction at the receiving end to remove the modulation information, then multiplies it by the product of all possible values of frequency offset estimation and squares it to obtain the likelihood function. Then, the frequency offset value corresponding to the maximum value of the likelihood function is found through pipeline parallel multi-channels as the result of frequency offset estimation. Then, the range limitation is achieved through a two-stage pipeline method, which can be realized only by judgment and addition and subtraction, without a large number of register resources and DSP resources; after the range limitation is achieved, the CORDIC IP core is used to calculate the complex exponential, so as to realize frequency offset compensation for the symbol before frequency offset correction.
[0051] (2) The present invention can effectively reduce the overhead of register resources and DSP resources. BRIEF DESCRIPTION OF THE DRAWINGS
[0052] Figure 1 is a flowchart of the low-complexity multi-channel parallel frequency offset estimation method based on FPGA provided by the present invention;
[0053] Figure 2Flow chart of the two-stage pipeline range limitation algorithm provided by the present invention. Detailed implementation manners
[0054] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.
[0055] As Figure 1 shown is the schematic diagram of the frequency offset estimation algorithm, which is implemented in the following four steps.
[0056] Step 1: Calculate the cross-correlation function values of the signals before frequency offset correction and the estimated frequency offset values in parallel for N paths.
[0057]
[0058] Among them, x i (k) is the i-th path signal before frequency offset correction at time k, i ∈ [0, N - 1], the possible frequency offset value f(k) before normalization at time k is an integer that increases by 1 at each moment and the range change is [-f B , f B , M is the number of signals used for frequency offset estimation, f B and M are both preset, F(f(k), x) is the cross-correlation function value of x i (k) and f(k) at time k, and j is the imaginary unit.
[0059] The method for obtaining F(f(k), x) is as follows:
[0060] Step 1.1: Calculate the fourth power of the parallel N paths of x i (k);
[0061] Step 1.2: Read the complex exponents stored in the ROM in parallel for PN paths;
[0062] Step 1.3: x i(k) is copied into PN paths and then multiplied by the phases of the complex exponents in parallel with the PN paths and then added every N paths to obtain P paths of parallel complex numbers;
[0063] Step 1.4: Square the modulus of the P paths of parallel complex numbers to obtain F(f(k), x).
[0064] Step 2: Traverse all the cross-correlation function values in parallel in a four-way pipeline manner to find the frequency offset value corresponding to the maximum value.
[0065]
[0066] Among them, is the frequency offset estimation value before normalization.
[0067] Step 2.1 Take the difference between every two of the four-way parallel data F(f(k), x) at time k.
[0068] Step 2.2 At time k, determine whether the differences all satisfy that the F(f(k), x) of the path to be determined is greater than or equal to the F(f(k), x) of the other three paths; record the F(f(k), x) that satisfies being greater than or equal to the F(f(k), x) of the other three paths and its corresponding f(k) as the maximum cross-correlation function value F(f maxF (k), x) and its corresponding independent variable f maxF (k);
[0069] Step 2.3 Compare the magnitudes of the maximum cross-correlation function values F(f maxF (k - 1), x), F(f maxF (k), x), and take the maximum cross-correlation function value as the maximum cross-correlation function value F(f maxF , x) and its corresponding independent variable f maxF ;
[0070] Step 2.4 Repeat Steps 2.1 - 2.3 until all F(f(k), x) corresponding to f(k) ∈ [-f B , f B are traversed, and the independent variable f maxF corresponding to the obtained maximum cross-correlation function value F(f maxF is denoted as which is the frequency offset estimation value before normalization.
[0071] Step 3: Implement the limitation range of the two-stage pipeline. The reason for the need for the range limitation algorithm is that when using the CORDIC IP core to calculate the complex exponential during subsequent frequency offset compensation, its input range needs to be within the range of [-π, π]. After simplification, it is equivalent to restricting within the range of [-f BV , f BV (f BV = 4f B ). To save resources, here the 64-way parallel signals are divided into 4 groups of parallel 16-way signals. Therefore, the following introduces the range limitation algorithm process of the parallel 16-way two-stage pipeline. The flowchart of the range limitation algorithm of the parallel 16-way two-stage pipeline is as Figure 2 shown.
[0072] The range limitation algorithm of the first-stage pipeline implements the range limitation at different times.
[0073] Step 3.1 Calculate the difference between the 15th path and the 0th path.
[0074]
[0075] Among them, f 15 (k) and f0(k) respectively correspond to f i (k) of the 15th path and the 0th path. f Δ (k - 1) is the range limit compensation value at the moment of k - 1, and when k = 0, f Δ (-1) = 0; Δ 15 and Δ0 respectively correspond to the difference between f i (k) and f Δ (k - 1) of the 15th path and the 0th path at the moment of k; when k = 0, f Δ (-1) = 0, f Δ (k - 1) is calculated as shown in the following formula (3 - 2).
[0076] Step 3.2 Determine whether Δ 15 or Δ0 belongs to the range [f BV *(l1 - 1), f BV *(l1 + 1)], set the flag bit Flag[l] corresponding to the data belonging to this range to 1, otherwise set it to 0. Among them, l1 is an even number in the range of [-N / 4, N / 4].
[0077] Step 3.3 Traverse all flag bits Flag[l1] to determine whether it is 1. When Flag[l1] = 0, check the next flag bit of l1 + 2 until the l1 corresponding to Flag[l1] = 1 is found, and update the range limit compensation value f Δ (k) at the moment of k, as shown in formula (3 - 2).
[0078] f Δ (k) = f Δ (k - 1) + l1 * f BV (3 - 2)
[0079] Step 3.4 Parallel 16 - way data f i (k) is delayed by three clock cycles and then subtracted from f Δ (k) to obtain the result Δ′ i (k) of the first - stage range limit of the ith path at the moment of k.
[0080] Δ′ i (k) = f i (k) - f Δ (k)(3 - 3)
[0081] The second - stage pipeline range limit algorithm is used to implement the range limit on different paths.
[0082] Step 3.5 Parallel S = 16 - way to determine whether Δ′ i belongs to the range [f BV *(l2 - 1), fBV *(l2 + 1)], set the flag bit Flag[l2] corresponding to the data within this range to 1, otherwise set it to 0. Where l2 is an even number in the range [-S / 4, S / 4].
[0083] Step 3.6 traverses all the flag bits Flag[l2] to determine whether they are 1. When Flag[l2] = 0, check the next flag bit with l2 + 2 until the l2 corresponding to Flag[l2] = 1 is found. And according to Equation (3-4), set f i (k) to be restricted within the range [-f BV , f BV .
[0084] f i ′(k) = Δ′ i (k) - l2 * f BV (3 - 4)
[0085] Where f i ′(k) is the result of the range limitation of the second stage of the i-th path at time k.
[0086] Step Four: Perform frequency offset compensation on the signals before frequency offset correction for N paths in parallel.
[0087]
[0088] Where y i (k) is the signal of the i-th path after frequency offset correction at time k.
[0089] Step 4.1 Calculate -π / 4f B and multiply it by f i ′(k) to obtain the frequency offset compensation phase value.
[0090] Step 4.2 Use the CORDIC IP core to calculate the complex exponential of the frequency offset compensation phase value.
[0091] Step 4.3 Delay the signal x i (k) before frequency offset correction to achieve correspondence in time with the result of the complex exponential operation .
[0092] Step 4.4 Multiply the signal x i (k) of the i-th path before frequency offset correction at time k by to obtain the signal y i (k) after frequency offset correction.
[0093] In view of the problems of insufficient accuracy and high complexity of existing frequency offset estimation algorithms, this embodiment performs fixed-point conversion and simplification on the frequency offset estimation algorithm based on maximum likelihood estimation. On this basis, a multi-channel parallel pipeline implementation is adopted to find the frequency offset value corresponding to the maximum value, which can greatly save data processing time and only increase a small amount of register resources. At the same time, by using a two-stage pipeline limited range algorithm to replace the traditional limited range algorithm based on modulo operation, DSP resources and a large amount of register resources are saved. The resource occupancy comparison table of the two-stage pipeline range limitation algorithm and the traditional range limitation algorithm in this embodiment is shown in Table 1. As can be seen from Table 1, this embodiment can achieve low-complexity multi-channel parallel frequency offset estimation based on FPGA.
[0094]
[0095] Table 1 Resource occupancy comparison table of two-stage pipeline range limitation algorithm and traditional range limitation algorithm
[0096] As mentioned above, the above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered by the protection scope of the present invention.
Claims
1. A multi-path parallel frequency offset estimation method, characterized in that Including: Step 1: Calculate the cross-correlation function values F(f(k), x) of the signal before frequency offset correction and the possible frequency offset values f(k) before normalization in parallel for N paths, where N is the number of parallel paths of the signal. Step 2: Traverse F(f(k), x) corresponding to f(k) in parallel with P paths in a pipeline manner, and find the f(k) corresponding to the maximum value of F(f(k), x) as the frequency offset estimation value before normalization. P is preset. Step 3: Based on Implement f in the form of a two-stage pipeline i (k) within the range limit, to obtain f i (k) after the range limit, the result f i ′(k); where f i (k) is the frequency offset estimation value before normalization corresponding to the i-th path at time k. The two-stage pipeline method includes a first-stage pipeline range limit method for implementing range limits at different times and a second-stage pipeline range limit method for implementing range limits on different paths; Step 4. Based on f i ′(k), perform frequency offset compensation on the signal before frequency offset correction in parallel for N channels to obtain the signal after frequency offset correction.
2. The method for estimating frequency offset of multi-channel parallel according to claim 1, wherein In step three, the range limitation of f i (k) is implemented by means of a two-stage pipeline, and is limited to the range of [-f BV , f BV , and the result f i ′(k) after the range limitation of f i (k) is obtained; where f BV is a numerical value, f BV = 4f B , and f B is the range of possible values of the frequency offset before preset normalization.
3. The method for estimating frequency offset in multiple paths in parallel according to claim 2, characterized in that where x i (k) is the signal of the i-th path before frequency offset correction at time k, i ∈ [0, N - 1], the possible value of the frequency offset f(k) before normalization at time k increases by 1 at each time, and the range of variation is [-f B , f B , M is the number of signals used for frequency offset estimation, f B and M are both preset, F(f(k), x) is the cross-correlation function value of x and f(k) at time k, j is the imaginary unit, and x is the signal of M paths before frequency offset correction.
4. A method for estimating frequency offset in a multi-channel parallel manner according to claim 3, characterized in that The independent variables of the complex exponential function are all known, and the complex exponential is calculated offline using MATLAB. Then it is stored in a read-only memory ROM in parallel PN paths, where the parameter P is preset.
5. The method for estimating frequency offset in multiple paths in parallel according to claim 3, characterized in that 6. A method for estimating frequency offset of multiple paths in parallel according to claim 3, characterized in that, Step 2 includes: Step 2.1: Subtract each pair of the P-path parallel F(f(k), x) at time k to obtain P(P - 1) differences. Step 2.
2. At time k, determine whether the differences all satisfy that the F(f(k), x) of the path to be determined is greater than or equal to the F(f(k), x) of the other P - 1 paths; record the F(f(k), x) that satisfies being greater than or equal to the F(f(k), x) of the other P - 1 paths and its corresponding f(k) as the maximum cross - correlation function value F(f maxF (k), x) and its corresponding independent variable f maxF (k); Step 2.
3. Compare the magnitudes of the maximum cross-correlation function values F(f maxF (k - 1), x) and F(f maxF (k), x). Take the maximum cross-correlation function value as the maximum cross-correlation function value and its corresponding independent variable that include the k-th moment and all moments before the k-th moment; Step 2.
4. Repeat Steps 2.1 - 2.3 until F(f(k), x) corresponding to f(k) ∈ [-f B , f B is traversed, and the independent variable corresponding to the maximum cross - correlation function value obtained is denoted as which is the frequency offset estimation value before normalization.
7. A method for estimating frequency offset in a multi-channel parallel manner according to claim 3, characterized in that In step three, the range limitation of f i (k) is achieved through a two-stage pipeline, and is limited to [-f BV , f BV , and the result f i (k) after the range limitation of f i ′(k) is obtained; specifically as follows: The range limitation of the two-stage pipeline for N parallel paths is divided into N2 identical range limitations of two-stage pipelines for N1 parallel paths, where N1 and N2 are preset values and N1 * N2 = N. The first-stage pipeline range limitation method includes: Step 3.1: Calculate the difference between the (N1 - 1)-th path and the 0-th path. Among them, f0(k) respectively corresponds to f(k) of the (N1 - 1)-th path and the 0-th path; f Δ (k - 1) is the range limit compensation value corresponding to the k - 1 moment, and when k = 0, f Δ (-1) = 0; Δ0 respectively corresponds to the difference between f i (k) and f Δ (k - 1) of the (N1 - 1)-th path and the 0-th path at the k moment; Step 3.2, judgment Or whether Δ0 is within the range [f BV *(l1-1),f BV *(l1+1)], and the The flag bit Flag[l1] corresponding to Δ0 is set to 1, otherwise it is set to 0; where l1 is an even number in the range [-N / 4, N / 4]; Step 3.
3. Traverse all flag bits Flag[l1] to determine whether it is 1. When Flag[l1]=0, check the next flag bit by l1+2 until the l1 corresponding to Flag[l1]=1 is found, and update the range limit compensation value f Δ (k); f Δ f(k) = f Δ f(k - 1)+l1*f BV (3 - 2) Step 3.4, parallel N1 paths of f i (k) and f Δ (k) are subtracted to obtain the result Δ′ i (k) of the range limit of the first stage corresponding to the i-th path at time k; Δ′ i ψ(k) = f i ψ(k) - f Δ ψ(k) (3 - 3) The second-stage pipeline range limitation method is as follows: Step 3.5, Parallel N1-way judgment of Δ′ i (k) whether it belongs to the range [f BV *(l2 - 1), f BV *(l2 + 1)], and set the flag bit Flag[l2] corresponding to the Δ′ i (k) that belongs to this range to 1, otherwise set it to 0; where l2 is an even number in the range [-N1 / 4, N1 / 4]; Step 3.
6. Traverse all the flag bits Flag[l2] to determine whether it is 1. When Flag[l2] = 0, l2 + 2 is used to check the next flag bit until the l2 corresponding to Flag[l2] = 1 is found; and according to Equation (3-4), f i (k) is restricted within [-f BV , f BV ; f i ′(k) = Δ′ i (k) - l2 * f BV (3 - 4) Among them, f i ′(k) is the result of the range limitation of the second stage of the i-th path at the k-th moment.
8. A method for estimating frequency offset in a multi-path parallel manner according to claim 7, characterized in that, The signal after frequency offset correction in Step 4 is: Among them, y i (k) is the signal after frequency offset correction for the i-th path corresponding to the k-th moment.
9. A method for estimating frequency offset of multiple paths in parallel according to claim 8, characterized in that, Step 4 includes: Step 4.1: Multiply -1 / 8f B by f i ′(k) to obtain the normalized frequency offset estimation value of the ith path at time k within the restricted range, and then multiply it by -2π to obtain the frequency offset compensation phase value of the ith path at time k; Step 4.2, calculate the frequency offset compensation phase value of the complex exponential; Step 4.3, delay the signal x i (k) before frequency offset correction to achieve correspondence with the result of the complex exponential operation in terms of time; Step 4.4, the signal x i before frequency offset correction corresponding to the i-th path at time k is multiplied by to obtain the signal y i after frequency offset correction.
10. A method for estimating frequency offset in a multi-channel parallel manner according to claim 9, characterized in that, In step 4.2, use the CORDIC IP core to calculate the frequency offset compensation phase value of the complex exponential.