BMC master-slave hot standby and data communication method, system and device and medium
Through the dual BMC hot standby architecture and dual heartbeat detection mechanism, the server stability problem caused by a single BMC failure is solved, data consistency and normal communication status are achieved, business interruption is avoided, and server reliability is improved.
Patent Information
- Application Number
- CN202510314031.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-17
- Publication Date
- 2025-07-18
AI Technical Summary
In a multi-channel server environment, failure of a single BMC will cause hardware status to be unable to be monitored in real time, affecting the stability of equipment operation and remote management, especially in key business scenarios, which may cause service interruptions and troubleshooting difficulties, causing economic losses to the enterprise.
The dual BMC hot standby architecture is adopted, and the master and slave devices are elected through the principle of priority access, and the hot standby and data communication is configured through the network interface and serial port, and a dual heartbeat detection mechanism is set to ensure data consistency and normal communication status, including device switching and resetting when network communication is abnormal.
The BMC master-slave hot standby is realized, the server reliability is improved, data loss or service interruption caused by a single point of failure is avoided, and data consistency and normal communication status between master-slave BMCs are ensured.
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Figure CN120342847A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of server control, and particularly relates to a BMC master-slave hot standby and data communication method, system, device and medium. Background Art
[0002] In a multi-way server environment, the Baseboard Management Controller (BMC) is the core of the server hardware monitoring and management system. It monitors the server hardware status in real time, such as key parameters like temperature, voltage, fan speed, etc., and undertakes important tasks such as remotely managing the server, like power on / off, restart, firmware update, etc.
[0003] However, the architecture of a single BMC has significant hidden dangers. In a complex multi-way server system with extremely high requirements for stability, once this sole BMC fails, it is like cutting off the "nervous system" of the server. The hardware status of the server cannot be monitored in real time. Excessive temperature may go undetected, leading to hardware damage; abnormal voltage may also not be warned in time, affecting the normal operation of the device. In terms of remote management, administrators will be unable to perform power on / off operations on the server, and firmware update is even out of the question. Especially in critical business scenarios, such as servers in financial trading systems, large e-commerce platforms, etc., the unavailability of the BMC will trigger a chain reaction, causing service interruption, a large number of transactions cannot be completed, and the user experience is severely damaged. At the same time, fault troubleshooting will also become extremely difficult because without the key hardware status information provided by the BMC, it is difficult for technicians to quickly locate the root cause of the fault, and the repair time is greatly extended, bringing huge economic losses to the enterprise. Summary of the Invention
[0004] The purpose of the embodiments of the present invention is to provide a BMC master-slave hot standby and data communication method, system, device and medium, which is used to solve all or at least part of the technical problems existing in the above-mentioned prior art.
[0005] In a first aspect, an embodiment of the present application provides a BMC master-slave hot standby and data communication method, including: After the dual BMCs are powered on for the first time, the BMC master device and the BMC slave device are elected from the dual BMCs through the priority access principle; Configuration hot standby and data communication are carried out between the BMC master device and the BMC slave device through a network interface. If the network communication is abnormal, the status of the network communication detection program is started for reset, and heartbeat detection is carried out through the serial port between the BMC master device and the BMC slave device. If the heartbeat is abnormal, the BMC master-slave device switching and reset are carried out.
[0006] Optionally, after the dual BMCs are powered on for the first time, the BMC master device and the BMC slave device are elected from the dual BMCs through the priority access principle, including: After the dual BMC is powered on for the first time, it determines whether the electronic switch is in the pulled-high state. If it is, it waits for it to be pulled low; if not, it pulls up the electronic switch and reads the master-slave state from the memory. If the master-slave state does not exist in the memory, the BMC that preferentially pulls up the electronic switch is elected as the master device, and the BMC master device and BMC slave device information are written into the memory, and then the electronic switch is pulled low and exited.
[0007] Optionally, the process of configuring hot standby and data communication between the BMC master device and the BMC slave device through the network interface includes: After the dual BMC is powered on, it obtains the motherboard data and stores it in the D-Bus for backup. The BMC master device obtains the configuration information from the D-Bus and synchronizes the data to the BMC slave device regularly. After successful synchronization, it modifies the heartbeat signal stored on the d-bus. The BMC slave device obtains the motherboard information, waits for the BMC master device to request and return data, and writes the synchronized configuration information into the D-Bus and modifies the heartbeat signal stored on the D-Bus.
[0008] Optionally, if the network communication is abnormal, it starts to detect the status of the network communication program for reset, and performs heartbeat detection through the serial port between the BMC master device and the BMC slave device. If the heartbeat is abnormal, it performs BMC master-slave device switching and reset, including: After the dual BMC is powered on, after waiting for the configuration hot standby and data communication program between the BMC master device and the BMC slave device to start through the network interface, it obtains the master-slave state from the D-Bus and monitors the heartbeat signal stored on the D-Bus. If there is no heartbeat for a long time, it checks the status of the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface. If the program hangs, it restarts the program and waits for a preset time before continuing to monitor the heartbeat signal; if the program is normal, it starts the standby communication program. If the data is communicated normally, it records a warning error log. If the program cannot communicate normally, it determines that the other party has crashed after multiple retries. If the BMC slave device crashes, the BMC master device directly resets the BMC slave device. If the BMC master device crashes, the BMC slave device is switched to the master device, the master-slave relationship stored in the memory is changed, and the original master device is reset.
[0009] Optionally, the BMC master-slave hot standby and data communication method further includes: After the reset is completed, wait for a period of time and continue to judge the heartbeat signal on the D-Bus. If there is no heartbeat signal, it is considered that the communication interface used in the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface is abnormal. Record a serious error log and use the standby communication program to ensure the master-slave hot standby and data communication; if the heartbeat is restored, close the standby communication program.
[0010] Optionally, the start and stop of the standby communication program are controlled by a flag bit.
[0011] Optionally, check the status of the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface, including: Start the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface by systemd, and generate a service. Monitor the status of the configuration hot standby and data communication program between the BMC master device and the BMC slave device through systemctl status service name.
[0012] In a second aspect, an embodiment of the present application further provides a BMC master-slave hot standby and data communication system, including: Dual BMC, electronic switch, memory, PHY, and external management network port; Among them, the master-slave relationship of the dual BMC is stored in the memory. After the dual BMC is powered on, it reads through I2C and uses an electronic switch to prevent multi-master access. The external management network port is connected to the PHY through the electronic switch; the dual BMCs perform master-slave hot standby and data interaction through the network and serial port.
[0013] In a third aspect, an embodiment of the present application further provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the program, it implements the steps of the above-mentioned BMC master-slave hot standby and data communication method.
[0014] In a fourth aspect, an embodiment of the present application further provides a storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements the steps of the above-mentioned BMC master-slave hot standby and data communication method.
[0015] From the above technical solutions, it can be seen that the present invention has the following advantages: In the BMC master-slave hot standby and data communication method, system, device, and medium provided by the present application, the master-slave hot standby of the BMC is realized, the reliability of the server is improved, the data loss or service interruption caused by a single point of failure is avoided, and the data consistency and normal communication status between the master and slave BMCs are ensured through the data synchronization and double heartbeat detection mechanism. Description of the Drawings
[0016] To more clearly illustrate the technical solutions of the present invention, the accompanying drawings required in the description will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.
[0017] Figure 1 It is a flowchart of a BMC master-slave hot standby and data communication method provided by an embodiment of the present invention; Figure 2 It is a flowchart for judging BMC master-slave devices provided by an embodiment of the present invention; Figure 3 It is a flowchart of a data acquisition program provided by an embodiment of the present invention; Figure 4 It is a flowchart of heartbeat detection and synchronous data provided by an embodiment of the present invention; Figure 5 It is a flowchart of BMC master-slave device switching and reset provided by an embodiment of the present invention; Figure 6 It is a schematic structural diagram of a BMC master-slave hot standby and data communication system provided by an embodiment of the present invention; Figure 7 It is a schematic hardware structure diagram of an electronic device provided by an embodiment of the present invention. Detailed implementation manners
[0018] To better understand the technology of this application, the professional terms involved in this application are now explained: As a key component of the server hardware monitoring and management system, the Baseboard Management Controller (BMC) is crucial for its high availability and stability.
[0019] Electrically Erasable Programmable Read Only Memory (EEPROM) is a storage chip that does not lose data after power failure. EEPROM can erase existing information and reprogram on a computer or a dedicated device, and is generally used for plug and play.
[0020] The I2C bus is a simple, two-way, two-wire synchronous serial bus. It only requires two wires to transmit information between devices connected to the bus.
[0021] GPIO (General-purpose input / output), short for general-purpose input and output, functions similarly to P0 - P3 of 8051. Its pins can be freely programmed by users. Depending on practical considerations, the PINs can be used as general-purpose inputs (GPI), general-purpose outputs (GPO), or general-purpose input and outputs (GPIO), such as for clk generator, chip select, etc.
[0022] Universal Asynchronous Receiver / Transmitter (UART) is a general-purpose serial data bus used for asynchronous communication. This bus enables two-way communication and can achieve full-duplex transmission and reception. In embedded design, UART is used to communicate with a PC, including communicating with a monitoring debugger and other devices such as EEPROM.
[0023] Port Physical Layer (PHY) is a common abbreviation for the physical layer of the OSI model. Ethernet is a device that operates at the physical layer of the OSI model. An Ethernet PHY is a chip that can send and receive Ethernet data frames.
[0024] Reduced Gigabit Media Independent Interface (RGMII) is Reduced GMII (Gigabit Media Independent Interface). RGMII all use a 4-bit data interface, with a working clock of 125 MHz, and transmit data on both the rising and falling edges, so the transmission rate can reach 1000 Mbps.
[0025] In the following detailed description, various embodiments of the present disclosure will be described more comprehensively. The present disclosure can have various embodiments, and adjustments and changes can be made therein. However, it should be understood that there is no intention to limit the various embodiments of the present disclosure to the specific embodiments disclosed herein, but rather the present disclosure should be understood to cover all adjustments, equivalents, and / or alternative solutions that fall within the spirit and scope of the various embodiments of the present disclosure.
[0026] Hereinafter, the term "comprising" or "may comprise" which may be used in various embodiments of the present disclosure indicates the presence of the disclosed functions or operations, and does not limit the addition of one or more functions or operations. Further, as used in various embodiments of the present disclosure, the terms "comprising", "having" and their cognates are only intended to represent specific features, numbers, steps, operations or combinations of the foregoing items, and should not be construed as precluding the existence or addition of one or more other features, numbers, steps, operations or combinations of the foregoing items.
[0027] In various embodiments of the present disclosure, the expression "or" or "at least one of A or / and B" includes any combination or all combinations of the recited words. For example, the expression "A or B" or "at least one of A or / and B" may include A, may include B, or may include both A and B.
[0028] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention.
[0029] Refer to Figure 1 The figure shows a flowchart of the BMC master-slave hot standby and data communication method in a specific embodiment, including the following execution steps: Step 100: After the dual BMCs are powered on for the first time, the BMC master device and the BMC slave device are elected from the dual BMCs through the priority access principle.
[0030] Specifically, when executing step 100, the following steps may be specifically executed: After the dual BMCs are powered on for the first time, it is determined whether the electronic switch is in the pulled-high state. If so, wait for it to be pulled low; if not, pull up the electronic switch and read the master-slave state from the memory. If the master-slave state does not exist in the memory, the BMC that first pulls up the electronic switch is elected as the master device, and the BMC master device and BMC slave device information are written into the memory, and then the electronic switch is pulled low and exited.
[0031] Exemplarily, refer to Figure 2As shown, it is the flowchart for the master and slave devices to make judgments. After the BMC is powered on, it judges the status of the GPIO (electronic switch) (pulled high means occupied, pulled low means unoccupied). If it is in the pulled-high state, it waits for it to be pulled low. If it is in the pulled-low state, it pulls up the GPIO and reads the master-slave status from the EEPROM (memory). If the master-slave status does not exist in the EEPROM, it elects the BMC that pre-pulls up the GPIO as the master, writes the information that this BMC is the master and the other is the slave into the EEPROM (distinguishing devices by the UUID (abbreviation of Universally Unique Identifier, a software-constructed standard) inside the BMC), and pulls down the GPIO to exit.
[0032] Step 101: The BMC master device and the BMC slave device perform configuration hot standby and data communication through the network interface. If the network communication is abnormal, it starts to detect the status of the network communication program for reset, and performs heartbeat detection through the serial port between the BMC master device and the BMC slave device. If the heartbeat is abnormal, it performs BMC master-slave device switching and reset.
[0033] Specifically, the process of the BMC master device and the BMC slave device performing configuration hot standby and data communication through the network interface includes the following steps: S1: After the dual BMCs are powered on, they obtain the motherboard data and store it in the D-Bus for backup.
[0034] Exemplarily, refer to Figure 3 As shown, after the BMC is powered on, it waits for the data acquisition program to start. After starting, it continuously obtains the motherboard sensor data and updates the data on the D-BUS. The BMC obtains the motherboard data and stores it in the d-bus (D-Bus is a message bus system for inter-application communication, used for communication between processes.) for backup.
[0035] S2: The BMC master device obtains the configuration information from the D-Bus and synchronizes the data to the BMC slave device regularly. After successful synchronization, it modifies the heartbeat signal stored on the d-bus.
[0036] S3: The BMC slave device obtains the motherboard information, waits for the BMC master device to request and return data, and writes the synchronized configuration information into the D-Bus, modifying the heartbeat signal stored on the D-Bus.
[0037] Exemplarily, refer to Figure 4As shown, the process of configuration hot standby and data communication between the BMC master device and the BMC slave device through the network interface includes first making a master device judgment. If it is the master device, it sends a slave device data request to the slave device to synchronize the configuration information stored in the d-bus to the device, and judges whether there is a data reply. If so, it writes a value to the property of the d-bus storage heartbeat. Otherwise, it continues to send a slave device data request to the slave device to synchronize the configuration information stored in the d-bus to the device; if it is not the master device, it waits for the master device to request / synchronize data, judges whether there is a request / synchronize data. If so, it writes a value to the property of the d-bus storage heartbeat and stores the synchronized data in the d-bus. Otherwise, it waits for the master device to request / synchronize data.
[0038] Specifically, if the network communication is abnormal, the network communication program status detection is started for reset, and heartbeat detection is performed through the serial port between the BMC master device and the BMC slave device. If the heartbeat is abnormal, the BMC master-slave device switching and reset are performed, including the following steps: SA: After the dual BMCs are powered on, wait for the configuration hot standby and data communication program between the BMC master device and the BMC slave device to start through the network interface, obtain the master-slave status from the D-Bus, and monitor the heartbeat signal stored on the D-Bus.
[0039] SB: If there is no heartbeat for a long time, check the status of the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface. If the program hangs, restart the program and continue to monitor the heartbeat signal after waiting for a preset time; if the program is normal, start the standby communication program. If the data is communicated normally, record a warning error log. If the program cannot communicate normally, judge that the other party has crashed after multiple retries.
[0040] Specifically, checking the status of the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface includes: starting the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface by systemd, and generating a service, and monitoring the status of the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface by systemctl status service name.
[0041] SC: If the BMC slave device crashes, the BMC master device directly resets the BMC slave device. If the BMC master device crashes, the BMC slave device is switched to the master device, the master-slave relationship stored in the memory is changed, and the original master device is reset.
[0042] Further, after the reset is completed, wait for a period of time, and continue to judge the heartbeat signal on the D-Bus. If there is no heartbeat signal, it is considered that the communication interface used in the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface is abnormal, record a serious error log, and use the backup communication program to ensure master-slave hot standby and data communication; if the heartbeat is restored, close the backup communication program.
[0043] It should be understood that the start and stop of the backup communication program are controlled by a flag bit.
[0044] Exemplarily, if the network communication is abnormal, start the detection of the network communication program status for reset, and perform heartbeat detection through the serial port between the BMC master device and the BMC slave device. If the heartbeat is abnormal, perform BMC master-slave device switching and reset. For the specific process, refer to Figure 5 As shown, obtain the master-slave status, monitor whether the heartbeat on the d-bus changes. If not, detect the status of the main communication program (detect according to the systemd service Figure 4 the status of the program, Figure 4 the program is started through systemd, and a service will be generated in it. The status of the program can be monitored through systemctl status service name Figure 4 the status of the program). If the program hangs, restart the communication program and wait for a period of time, then continue to monitor whether the heartbeat on the d-bus changes. If the heartbeat on the d-bus changes, continue to monitor; if the main communication program is normal, if the program is normal, start the backup communication program of this program (the hardware communication interface is different). After starting, both thread programs are started, but the backup communication program does not work under the control of the flag bit, Figure 5 the part of monitoring the heartbeat, detecting the main communication program, and restarting in Figure 4 is a thread program. When it detects that the main program status is normal but the heartbeat does not change, start the backup communication program by modifying the flag bit of the backup communication program. The backup communication program and Figure 4 the program have the same working process. The difference between them is that there are two communication interfaces, I2C and UART, between the two BMC management boards, and the hardware communication interfaces they use are different. If the data can be normally communicated, record a warning error log. If the program cannot be normally communicated, then judge that the other party has crashed after multiple retries. At this time, if the slave device has crashed, the master device directly resets the slave device. If the master device has crashed, the slave device needs to be switched to the master device, change the master-slave relationship stored in the EEPROM, and reset the original master device. After the reset is completed, wait for a period of time, and continue to judge the heartbeat signal on the d-bus. If there is no heartbeat signal, it is considered that Figure 5 the communication interface used in the program is abnormal, record a serious error log, and continue to use Figure 4The communication program in, when Figure 5 the main thread program of Figure 4 monitors that the communication program in Figure 5 is abnormal, it starts the Figure 5 standby communication program of
[0045] to access the slave device through different hardware interfaces to prevent misjudgment of the status caused by hardware abnormalities or software program freezes. If the heartbeat is restored, it closes the
[0046] such as Figure 6 shown, the following is an embodiment of the BMC master-slave hot standby and data communication system provided by the present disclosure. It belongs to the same inventive concept as the BMC master-slave hot standby and data communication methods of the above embodiments. Details not described in detail in the embodiment of the BMC master-slave hot standby and data communication system can refer to the embodiments of the above BMC master-slave hot standby and data communication methods.
[0047] The BMC master-slave hot standby and data communication system includes a dual BMC, an electronic switch, a memory, a PHY, and an external management network port; wherein, the master-slave relationship of the dual BMC is stored in the memory. After the dual BMC is powered on, it reads through I2C and uses the electronic switch to prevent multi-master access. The external management network port is connected to the PHY through the electronic switch; the dual BMCs perform master-slave hot standby and data interaction through the network and serial port.
[0048] It should be understood that there are multiple mainboards in the chassis of the storage device. In this embodiment, 2 mainboards are taken as an example, and each mainboard corresponds to a BMC.
[0049] Figure 7 is a schematic hardware structure diagram of an electronic device for implementing various embodiments of the present invention.
[0050] The BMC master-slave hot standby and data communication method provided by the embodiments of the present application can be applied to electronic devices. Those skilled in the art can understand that the structure of the electronic devices involved in the embodiments of the present invention does not constitute a limitation on the electronic devices. The electronic devices may include more or fewer components than shown in the figures, or combine certain components, or have different component arrangements. In the embodiments of the present invention, the electronic devices include, but are not limited to, laptop computers, desktop computers, workbenches, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic devices may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the embodiments of the present application described herein and / or claimed.
[0051] The electronic device may include a processor, an external memory interface, an internal memory, a universal serial bus (USB) interface, a charging management module, a power management module, a battery, a wireless communication module, an audio module, a speaker, a microphone, a sensor module, a key, a camera, a display screen, and a SIM card interface, etc.
[0052] It can be understood that the structure schematically shown in the embodiments of the present application does not constitute a specific limitation on the electronic device. In other embodiments of the present application, the electronic device may include more or fewer components than shown in the figures, or combine certain components, or split certain components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.
[0053] The processor may include one or more processing units. For example, the processor may include a central processing unit (CPU), etc., an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Among them, different processing units may be independent devices or integrated in one or more processors.
[0054] Among them, the processor can be the nerve center and command center of the electronic device. The controller can generate operation control signals according to the instruction operation code and timing signal to complete the control of fetching and executing instructions.
[0055] A memory can also be set in the processor for storing instructions and data. In some embodiments, the memory in the processor is a cache memory. This memory can save the instructions or data that the processor has just used or recycled. If the processor needs to use the instruction or data again, it can directly call it from this memory. This avoids repeated accesses, reduces the waiting time of the processor, and thus improves the system efficiency.
[0056] The external memory interface can be used to connect to an external memory card, such as a MicroSD card, to implement the storage capacity expansion of the electronic device. The external memory card communicates with the processor through the external memory interface to achieve the data storage function. For example, files such as music and videos are saved in the external memory card.
[0057] The internal memory can be used to store computer-executable program codes, and the computer-executable program codes include instructions. The processor executes various functional applications and data processing of the electronic device by running the instructions stored in the internal memory. The internal memory can include a program storage area and a data storage area. The internal memory can include a high-speed random access memory and can also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.
[0058] The wireless communication function of the electronic device can be implemented through an antenna, a wireless communication module, a modulation and demodulation processor, a baseband processor, etc.
[0059] The wireless communication module can provide solutions for wireless communications applied to the electronic device, including wireless local area networks (WLANs) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite systems (GNSSs), frequency modulation (FM), near field communication (NFC), infrared technology (IR), etc.
[0060] The electronic device can implement audio functions, etc. through an audio module, a speaker, a receiver, a microphone, a headphone interface, an application processor, etc.
[0061] An electronic device can implement a shooting function through an ISP, a camera, a video codec, a GPU, a display screen, an application processor, etc.
[0062] An electronic device can implement a display function through a GPU, a display screen, an application processor, etc.
[0063] The GPU is a microprocessor for image processing, connecting the display screen and the application processor. The GPU is used to execute mathematical and geometric calculations for graphics rendering. The processor may include one or more GPUs, which execute program instructions to generate or change display information.
[0064] The display screen is used to display images, videos, etc. The display screen includes a display panel.
[0065] In the storage medium provided in this application, there is a program product capable of implementing the BMC master-slave hot standby and data communication method.
[0066] The BMC master-slave hot standby and data communication method includes: after the dual BMCs are powered on for the first time, the BMC master device and the BMC slave device are elected from the dual BMCs through the priority access principle; the BMC master device and the BMC slave device perform configured hot standby and data communication through a network interface. If the network communication is abnormal, the detection network communication program status is started for reset, and heartbeat detection is performed through the serial port between the BMC master device and the BMC slave device. If the heartbeat is abnormal, the BMC master-slave device switching and reset are performed.
[0067] In some possible implementation manners, the subject name of the present disclosure, the BMC master-slave hot standby and data communication method and system, can be implemented in the form of a program product, which includes program code. When the program product runs on a terminal device, the program code is used to cause the terminal device to execute the steps according to various exemplary embodiments of the present disclosure described in the above "Exemplary Method" section of this specification.
[0068] The storage medium of the present disclosure can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples (non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.
[0069] The foregoing description of the disclosed embodiments enables those skilled in the art to practice or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A BMC master-slave hot standby and data communication method, characterized in that Including: After the dual BMCs are powered on for the first time, the BMC master device and the BMC slave device are elected from the dual BMCs through the priority access principle; Configuration hot standby and data communication are carried out between the BMC master device and the BMC slave device through the network interface. If the network communication is abnormal, the status of the network communication detection program is started for reset, and the heartbeat detection is carried out through the serial port between the BMC master device and the BMC slave device. If the heartbeat is abnormal, the BMC master-slave device switching and reset are carried out.
2. The BMC master-slave hot standby and data communication method according to claim 1, wherein After the dual BMCs are powered on for the first time, the BMC master device and the BMC slave device are elected from the dual BMCs through the priority access principle, including: After the dual BMCs are powered on for the first time, it is judged whether the electronic switch is in the pulled-high state. If so, wait for it to be pulled low; if not, pull up the electronic switch and read the master-slave state from the memory; If the master-slave state does not exist in the memory, the BMC that first pulls up the electronic switch is elected as the master device, and the BMC master device and BMC slave device information are written into the memory, and then the electronic switch is pulled low and exited.
3. The BMC master-slave hot standby and data communication method according to claim 1, characterized in that, The process of configuration hot standby and data communication between the BMC master device and the BMC slave device through the network interface includes: After the dual BMCs are powered on, the motherboard data is obtained and stored in the D-Bus for standby; The BMC master device obtains the configuration information from the D-Bus and synchronizes the data to the BMC slave device regularly. After the synchronization is successful, the heartbeat signal stored on the d-bus is modified; The BMC slave device obtains the motherboard information, waits for the BMC master device to request and return data, and writes the synchronized configuration information into the D-Bus and modifies the heartbeat signal stored on the D-Bus.
4. The BMC master-slave hot standby and data communication method according to claim 3, characterized in that, If the network communication is abnormal, the status of the network communication detection program is started for reset, and the heartbeat detection is carried out through the serial port between the BMC master device and the BMC slave device. If the heartbeat is abnormal, the BMC master-slave device switching and reset are carried out, including: After the dual BMCs are powered on, wait for the configuration hot standby and data communication program between the BMC master device and the BMC slave device to start through the network interface, obtain the master-slave state from the D-Bus, and monitor the heartbeat signal stored on the D-Bus; If there is no heartbeat for a long time, check the status of the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface. If the program hangs, restart the program and wait for a preset time before continuing to monitor the heartbeat signal; if the program is normal, start the standby communication program. If the data communication is normal, record the warning error log. If the program cannot communicate normally, judge that the other party has crashed after multiple retries; If the BMC slave device has crashed, the BMC master device directly resets the BMC slave device. If the BMC master device has crashed, the BMC slave device is switched to the master device, the master-slave relationship stored in the memory is changed, and the original master device is reset.
5. The BMC master-slave hot standby and data communication method according to claim 4, characterized in that The BMC master-slave hot standby and data communication method further includes: After the reset is completed, wait for a period of time and continue to judge the heartbeat signal on the D-Bus. If there is no heartbeat signal, it is considered that the communication interface used in the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface is abnormal. Record a serious error log and use the standby communication program to ensure the master-slave hot standby and data communication; if the heartbeat is restored, close the standby communication program.
6. The BMC master-slave hot standby and data communication method according to claim 4, characterized in that, The start and stop of the standby communication program are controlled by a flag bit.
7. The BMC master-slave hot standby and data communication method according to claim 4, wherein Check the status of the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface, including: Start the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface by using systemd, and generate a service. Monitor the status of the configuration hot standby and data communication program between the BMC master device and the BMC slave device through the network interface by using systemctl status service name.
8. A BMC master-slave hot standby and data communication system, characterized in that Including: Dual BMC, electronic switch, memory, PHY, and external management network interface; Among them, the master-slave relationship of the dual BMC is stored in the memory. After the dual BMC is powered on, it reads through I2C and uses an electronic switch to prevent multi-master access. The external management network interface is connected to the PHY through the electronic switch; the dual BMCs perform master-slave hot standby and data interaction through the network and serial port.
9. An electronic device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein, When the processor executes the program, it implements the steps of the BMC master-slave hot standby and data communication method according to any one of claims 1 to 7.
10. A storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the BMC master-slave hot standby and data communication method according to any one of claims 1 to 7.