Apparatus and method for electrostatically clamping substrate
By setting a reflective surface on the substrate table of the extreme ultraviolet lithography equipment, the pollution and damage of charged particles on the front side of the wafer during electrostatic clamping is solved, and the yield and quality of lithography products are improved.
Patent Information
- Application Number
- CN202380084952.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-12-12
- Filing Date
- 2023-11-23
- Publication Date
- 2025-07-18
AI Technical Summary
In extreme ultraviolet lithography equipment, when electrostatically clamping the substrate, charged particles will contaminate and damage the front side of the wafer when they are released, affecting the yield and quality of the lithographic product.
The reflective surface design is adopted, including providing a reflective surface on the substrate stage to reflect charged particles, reducing their deposition on the front side of the wafer, and design includes an annular reflective surface and a reflective surface on the hardware element, with the surface roughness controlled below 0.8Ra to reduce diffuse reflection.
It effectively reduces the deposition of charged particles on the front side of the wafer, reduces the risk of damage and contamination of lithography products, and improves the yield and quality of lithography products.
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Figure CN120344908A_ABST
Abstract
Description
[0001] Cross - reference to related applications
[0002] This application claims priority to EP application 22212752.4, filed on Dec. 12, 2022, which is hereby incorporated by reference in its entirety. Technical Field
[0003] The present invention relates to an apparatus and method including an electrostatic chuck for clamping a substrate. Such a chuck can be used, for example, to hold a substrate in a deep vacuum environment. Electrostatic clamping can be used to hold a wafer positioned on a wafer stage of a lithographic apparatus. Background Art
[0004] A lithographic apparatus is a machine configured to apply a desired pattern onto a substrate. A lithographic apparatus can be used, for example, to manufacture integrated circuits (ICs). A lithographic apparatus can project a pattern present on a pattern forming device (e.g., a mask) onto a layer of radiation sensitive material (resist) provided on a substrate, for example.
[0005] To project a pattern onto a substrate, a lithographic apparatus can use electromagnetic radiation. The wavelength of this radiation determines the minimum size of the features that can be formed on the substrate. Compared to a lithographic apparatus using radiation having a wavelength of, for example, 193 nm, a lithographic apparatus using extreme ultraviolet (EUV) radiation having a wavelength in the range of 4 - 20 nm, such as 6.7 nm or 13.5 nm, can be used to form smaller features on a substrate.
[0006] In EUV, for example, during measurement and exposure sequences, a wafer is typically electrostatically clamped to a wafer stage chuck. To obtain good imaging overlay, the electrostatic clamping voltage can be very high, on the order of 3.2 kV. Another way to describe an electrostatic chuck is the pressure equivalent force. In an EUV lithographic apparatus, the pressure equivalent force can exceed 50 kPa. In the future, the clamping voltage or the pressure equivalent force may further increase.
[0007] The high electrostatic field caused by the clamping voltage results in charging of the chuck and the wafer surface, as well as any particles on these surfaces. When the clamping voltage is released to remove the wafer after exposure, these charged particles can be released and reach the front side (FS) of the wafer. Charged particles hitting the front side of the exposed wafer can be deposited on the front side and cause a yield loss in the final lithographic product on the wafer (such as multiple microchips). Here, note that the charged particles can have a size in the order of 0.1 to 5 μm.
[0008] As a result, when unloading a wafer from a wafer stage, wafer backside damage (wafer particles) and wafer backside contamination (contamination from an external scan source) have an additional transfer mechanism to reach the front or top of the wafer. When the wafer is lifted from an electrostatic chuck, particles that already have a charge (either on the wafer backside or on the wafer stage chuck) can be released. The released particles will have a high velocity and start to bounce through the scanner, and a portion of the particles will end up on the front side of the wafer. There, they can be harmful to the lithography product and have a negative impact on its specifications.
[0009] The present disclosure aims to eliminate or at least limit the impact of charged particles on the lithography product. Summary of the Invention
[0010] The present disclosure provides an apparatus, which includes:
[0011] at least one substrate stage for holding a substrate, the substrate stage being provided with an electrostatic chuck for electrostatically clamping the substrate; and
[0012] at least one reflective surface for reflecting charged particles in a direction away from the front side of the substrate.
[0013] In one embodiment, the apparatus includes: a thermal shield disposed above the at least one substrate stage, wherein a first reflective surface of the at least one reflective surfaces is disposed on a side of the thermal shield facing the at least one substrate stage. In one embodiment, the thermal shield can move perpendicular to the substrate stage in a direction towards and away from the substrate stage. In one embodiment, a plate can be provided below the thermal shield, and in one embodiment, the plate can move perpendicular to the substrate stage in a direction towards and away from the substrate stage by a plate moving device. During use, for example, during loading and / or unloading of the substrate, the plate can move according to the movement of the substrate. Thus, the gap between the substrate and the thermal shield / plate can be reduced. In one embodiment, the plate can move with the substrate.
[0014] In one embodiment, the first reflective surface has a shape that substantially corresponds to the perimeter of the substrate.
[0015] In one embodiment, the first reflective surface is annular and has an inclined surface that allows particles to be reflected laterally away from the substrate.
[0016] In one embodiment, the at least one substrate stage includes one or more hardware elements, and each side of the hardware element facing the substrate is provided with a second reflective surface of the at least one reflective surface.
[0017] In one embodiment, the second reflective surface is inclined in an upward direction, allowing particles to be reflected upward away from the substrate stage.
[0018] In one embodiment, at least one substrate stage includes a ring surrounding the substrate, the ring being provided with a third reflective surface having at least one reflective surface, the third reflective surface facing the periphery of the substrate. In one embodiment, the apparatus has a moving device for moving the ring in a direction perpendicular to the substrate stage, thereby moving the ring in the vertical direction. During use, in one embodiment, the ring can move according to the movement of the substrate, for example during loading and / or unloading of the substrate. The ring can move with the substrate, for example.
[0019] In one embodiment, the third reflective surface is inclined or curved in the downward direction, allowing particles to be reflected in the downward direction towards the back surface of the substrate stage and / or the substrate.
[0020] In one embodiment, the ring includes a plurality of separate block elements.
[0021] In one embodiment, the ring is arranged to engage with the periphery of the substrate, allowing the substrate to be positioned on the substrate stage.
[0022] In one embodiment, at least one reflective surface has a surface roughness of no more than 0.8 Ra.
[0023] In one embodiment, at least one reflective surface has a surface roughness in the range of 0.4 Ra to 0.05 Ra or lower.
[0024] According to another aspect, the present disclosure provides a wafer stage including the apparatus according to any one of claims 1 to 12.
[0025] According to another aspect, the present disclosure provides a lithography system including the apparatus according to any one of claims 1 to 12.
[0026] According to another aspect, the present disclosure provides a method including using the apparatus according to any one of claims 1 to 12.
[0027] The method may include the following steps:
[0028] Electrostatically clamp at least one substrate stage on the substrate stage;
[0029] Release the clamped substrate;
[0030] Lift the substrate from the substrate stage; and
[0031] Provide at least one reflective surface for reflecting charged particles in a direction away from the front side of the substrate. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] Embodiments of the present invention will now be described by way of example only, with reference to the accompanying schematic drawings, in which:
[0033] Figure 1 depicts a lithography system including a lithographic apparatus and a radiation source;
[0034] Figure 2A depicts a side view of a wafer stage, showing the state of the prior art system;
[0035] Figure 2B and Figure 2C depicts a side view of a wafer stage, showing an embodiment of the present disclosure including a reflective surface;
[0036] Figure 3 depicts a perspective view of the reflective surface of FIG. 2;
[0037] Figure 4 depicts a plan view of the reflective surface of FIG. 2;
[0038] Figure 5 is a perspective view of a substrate stage, including an example of the hardware near the substrate stage;
[0039] Figure 6A depicts a side view of a wafer stage, indicating the state of the prior art system;
[0040] Figure 6B and Figure 6C depicts a side view of a wafer stage, showing an embodiment of the present disclosure including two reflective surfaces;
[0041] Figure 7 depicts a perspective view of a substrate stage, which includes an embodiment of a reflective surface arranged around the periphery of the substrate on the substrate stage;
[0042] Figure 8 depicts a side view of the details of the substrate stage, indicating the substrate on the electrostatic chuck and the conventional substrate locator;
[0043] Figure 9 depicts a side view of the details of the substrate stage, indicating the substrate on the electrostatic chuck according to the present disclosure and the substrate locator provided with a reflective surface;
[0044] Figure 10 depicts a side view of the details of the substrate stage, indicating the substrate on the electrostatic chuck and the substrate locator with another embodiment of the reflective surface according to the present disclosure; and
[0045] Figure 11 depicts a side view of a wafer stage, which includes an embodiment of the present disclosure including three reflective surfaces. Detailed Description
[0046] Figure 1A lithography system is shown that includes a radiation source SO and a lithography apparatus LA. The radiation source SO is configured to generate an EUV radiation beam B and supply the EUV radiation beam B to the lithography apparatus LA. The lithography apparatus LA includes an illumination system IL, a support structure MT configured to support a patterning device MA (e.g., a mask), a projection system PS, and a substrate table WT configured to support a substrate W.
[0047] The illumination system IL is configured to condition the EUV radiation beam B before the EUV radiation beam B is incident on the patterning device MA. Additionally, the illumination system IL may include a faceted field mirror device 10 and a faceted pupil mirror device 11. The faceted field mirror device 10 and the faceted pupil mirror device 11 together provide the EUV radiation beam B with a desired cross-sectional shape and a desired intensity distribution. The illumination system IL may include other mirrors or devices in addition to or instead of the faceted field mirror device 10 and the faceted pupil mirror device 11.
[0048] After being conditioned in such a manner, the EUV radiation beam B interacts with the patterning device MA. As a result of this interaction, a patterned EUV radiation beam B' is produced. The projection system PS is configured to project the patterned EUV radiation beam B' onto the substrate W. For this purpose, the projection system PS may include a plurality of mirrors 13, 14 configured to project the patterned EUV radiation beam B' onto the substrate W held by the substrate table WT. The projection system PS may apply a reduction factor to the patterned EUV radiation beam B', thereby forming an image having features smaller than the corresponding features on the patterning device MA. For example, a reduction factor of 4 or 8 may be applied. Although in Figure 1 the projection system PS is shown as having only two mirrors 13, 14, the projection system PS may include a different number of mirrors (e.g., six or eight mirrors).
[0049] The substrate W may include a previously formed pattern. In this case, the lithography apparatus LA aligns the image formed by the patterned EUV radiation beam B' with the pattern previously formed on the substrate W.
[0050] A relative vacuum may be provided in the radiation source SO, in the illumination system IL, and / or in the projection system PS, i.e., a small amount of gas (e.g., hydrogen) at a pressure far below atmospheric pressure.
[0051] For example, Figure 1The radiation source SO shown is of a type that can be referred to as a laser-produced plasma (LPP) source. A laser system 1, which can include, for example, a CO2 laser, is arranged to deposit energy into a fuel, such as tin (Sn) provided from a fuel emitter 3, for example, via a laser beam 2. Although tin is mentioned in the following description, any suitable fuel can be used. The fuel can be, for example, in liquid form and can be, for example, a metal or an alloy. The fuel emitter 3 can include a nozzle configured to direct tin, for example in the form of droplets, along a trajectory towards a plasma formation region 4. The laser beam 2 is incident on the tin at the plasma formation region 4. Depositing the laser energy into the tin creates a tin plasma 7 at the plasma formation region 4. During the de-excitation and recombination of the electrons and ions of the plasma, radiation including EUV radiation is emitted from the plasma 7.
[0052] The EUV radiation from the plasma is collected and focused by a collector 5. The collector 5 includes, for example, a near-normal incidence radiation collector 5 (sometimes more generally referred to as a normal incidence radiation collector). The collector 5 can have a multilayer mirror structure arranged to reflect EUV radiation (for example, EUV radiation having a desired wavelength such as 13.5 nm). The collector 5 can have an elliptical configuration with two foci. The first focus can be at the plasma formation region 4 and the second focus can be at an intermediate focus 6, as described below.
[0053] The laser system 1 can be spatially separated from the radiation source SO. In this case, the laser beam 2 can be transmitted from the laser system 1 to the radiation source SO by means of a beam delivery system (not shown) including, for example, suitable steering mirrors and / or beam expanders and / or other optical devices. The laser system 1, the radiation source SO, and the beam delivery system can be considered together as a radiation system.
[0054] The radiation reflected by the collector 5 forms an EUV radiation beam B. The EUV radiation beam B is focused at the intermediate focus 6 to form an image at the intermediate focus 6 of the plasma present at the plasma formation region 4. The image at the intermediate focus 6 acts as a virtual radiation source for an illumination system IL. The radiation source SO is arranged such that the intermediate focus 6 is located at or near an opening 8 in an enclosure structure 9 of the radiation source SO.
[0055] Although Figure 1 the radiation source SO is depicted as a laser-produced plasma (LPP) source, any suitable source such as a discharge-produced plasma (DPP) source or a free electron laser (FEL) can be used to generate EUV radiation.
[0056] The part of the lithographic apparatus that includes the wafer stage can be referred to as the wafer stage WS. In Figure 1A wafer stage is schematically depicted. The wafer stage can be a separate container. The wafer stage can be filled, for example, with a small amount of gas having a predetermined composition. For EUV lithography, the small amount of gas herein typically also involves a low-vacuum environment. For example, hydrogen can be used as a buffer gas in the wafer stage WS at a pressure of about 100 Pa. During the exposure of the substrate W, hydrogen can flow over and along the substrate at a rate on the order of one or more standard liters per minute (slm).
[0057] The wafer stage can include more than one wafer stage. For example, the wafer stage can include a second substrate stage WT2 for holding a second substrate W2. Each substrate stage can be movable, allowing the corresponding substrate stage to change position. Refer to Figure 1 , for example, one substrate stage WT can be in an exposure position, allowing the corresponding substrate to be exposed to radiation B'. Another substrate stage WT2 can be in a measurement position, also referred to as a load / unload position. The measurement position of the wafer stage is typically provided with one or more sensors to measure relevant characteristics of the corresponding substrate, such as before the start of exposure. The features can include, but are not limited to, the position on the substrate stage, the surface height map (surface flatness), rotation, etc.
[0058] A substrate handler is typically arranged at or near the measurement position, allowing the substrate W2 to be removed from the wafer stage and a new substrate to be loaded into the wafer stage and onto the corresponding substrate stage. For examples and more details of a wafer stage including multiple substrate stages and one or more robotic handlers, see, for example, patent document US-11,105,619.
[0059] The wafer stage WS can include a thermal shield HS for protecting the corresponding substrate from heat in other parts of the lithography apparatus. The thermal shield can be arranged above the exposure position and / or above the load / unload position. The thermal shield can extend along the entire wafer stage, covering both the exposure position and the load position.
[0060] Generally referring to Figure 2, Figure 3 and Figure 4 , each substrate stage can typically be provided with an electrostatic chuck EC for holding the substrate. The chuck can also be referred to as a wafer chuck. For examples or details of the electrostatic chuck EC and its functions, refer to US-7,940,511 and US-2013 / 0,301,028, for example. The present disclosure relates to techniques for managing electrostatic particles emitted from the substrate when released from the electrostatic chuck.
[0061] For example, in an EUV lithography machine, but also potentially for other applications, the substrate is electrostatically clamped to the electrostatic chuck EC of the wafer stage chuck. The substrate is clamped in place during, for example, measurement and exposure sequences. In recent years, the applied clamping voltage has also increased. In order to obtain good imaging and overlay, the electrostatic clamping voltage can be, for example, as high as 3.2 kV. In the future, this clamping voltage may even increase further. The high clamping voltage can cause charging of the chuck EC, the lower surface of the substrate, referred to as the back side, and any particles that may have been deposited on or released from these surfaces. For example, the substrate can be lifted by a plurality of retractable lift pins 50. The pins 50 lift the substrate, allowing the processing tool to slide under the substrate and remove the substrate from the chuck. Positioning the substrate works in the reverse order, i.e., the processing tool positions the substrate on the pins 50, removes the processing tool, and retracts or lowers the pins 50 such that the substrate W will be positioned on the electrostatic chuck EC.
[0062] Reference Figure 2A , when releasing the clamping voltage and lifting the substrate to remove it from the chuck, charged particles 52 can be released from the surface of the chuck or the substrate.
[0063] The released particles can reflect off the surface. If the reflection is diffuse, at least some of the charged particles 54 can reflect in the direction of the front side FS of the substrate W due to surface roughness. On the front side of the substrate, the particles can be deposited on the front side of the substrate. Since the diameter of the particles can range from 0.1 μm to several μm, the particles have a size sufficient to interfere with the printed pattern or other structures, potentially resulting in a reduced yield or loss of the printed structure. Thus, the static charge and its release provide a potential transport mechanism for wafer backside damage (usually resulting in particles of the same material as the wafer) and wafer backside contamination (usually from external scan sources) to reach the top of the substrate when unloading the substrate. When lifting the wafer W from the chuck EC, particles 52 that already have a charge (on the wafer backside or the electrostatic chuck) can be released. The released particles will have a high velocity and start bouncing through the scanner, where a portion of the particles end up on the front side of the wafer, where they can be detrimental to the process.
[0064] Embodiments of the present disclosure implement several design changes to the wafer stage. Generally referring to Figure 2B, in one embodiment, a thermal shield HS, which is typically disposed above the substrate stage, may be provided with a first reflective surface 60 for guiding charged particles away from the front side FS of the substrate. The first reflective surface 60 may be disposed on a chamfer ring 62. The first reflective surface may be polished to reduce its surface roughness below a predetermined threshold. When the corresponding substrate stage is in the unload position, the ring 62 may be attached to the thermal shield HS at a position above the wafer W. The ring may be connected to the thermal shield using a connector 64. The connector 64 may include, but is not limited to, a welded connection, bolts, screws, rivets, etc. As described above, in one embodiment, the thermal shield itself or a separate plate (e.g., suspended from the thermal shield) mounted below the thermal shield may move towards and away from the wafer stage, thereby reducing any gap between the thermal shield and the wafer stage.
[0065] The ring 62 may have an inner perimeter 66 that substantially matches the outer perimeter 68 of the substrate W. Here, substantially matching may mean that the two perimeters are substantially similar. Substantially similar herein may include, for example, within a range of + / −50%, such as + / −20%. The ring 62 may have an outer perimeter within a range of 5% to 80% of the substrate diameter. The annular surface 60 may be substantially circular. Alternatively, the annular surface 60 may deviate from circular. The first reflective surface 60 may have a curvature, as Figure 2C and Figure 10 shown. The slope of the first reflective surface 60 may be in the range of 5 to 20 degrees. The latter means that the angle α at the outer perimeter of the ring is in the range of 5 to 20 degrees.
[0066] Generally referring to Figure 5 , the wafer stage WS may include one or more hardware elements 70, 72, 74 disposed near the wafer stage WT. The hardware elements herein may include, but are not limited to, sensors, robot gripper aligners, cables, connectors, etc. The hardware elements may be disposed, for example, on the substrate stage WT. The hardware elements may be disposed, for example, at various positions around the perimeter of the substrate W. If so, the hardware elements may have a side surface or a surface 78 facing the perimeter of the substrate W.
[0067] Referring to Figure 6A , when unloading the substrate, including the steps of releasing the clamping voltage and lifting the substrate W to remove the substrate from the electrostatic chuck EC, charged particles 52 may be released from the surface of the chuck EC or from the lower surface of the substrate.
[0068] The released particles may be reflected on the surface. The hardware item 70 (or 72, 74) positioned adjacent to the substrate W may have one or more side surfaces 78 facing the substrate W. If the reflection of the particles 52 on the side surface 78 is diffuse, then due to the surface roughness, at least some of the charged particles 54 may be reflected in the direction of the front side FS of the substrate W. The particles 54 may be reflected via more than one surface, asFigure 6A As shown. At the front side of the substrate, particles can be deposited on the front side of the substrate.
[0069] Generally referring to Figure 6B , one side of the hardware element 70 (or 72, 74) facing the substrate W can be provided with a second reflective surface 80 for guiding the particles 52 in a direction away from the front side of the substrate. Here, Figure 6B Only the hardware item 70 is shown as an example, but the reflective surface 80 can be applied to any of the hardware items 70, 72, 74 as exemplified in Figure 5 . The reflective surface 80 can be polished to limit its surface roughness below a preset threshold to limit diffuse reflection. Optionally, the second reflective surface can have a curvature in cross-section (similar to the curvature shown in Figure 6C ).
[0070] In an actual embodiment, the second reflective surface can be arranged at an angle β with respect to the horizontal plane. The angle β can be in the range of about 5 to 60 degrees, for example about 30 to 50 degrees, for example about 45 degrees. Here, the second reflective surface 80 can be inclined in the upward direction, allowing the particles 52 to be reflected in the upward direction relative to the electrostatic chuck EC and away from the substrate stage.
[0071] In one embodiment, at least one substrate stage WT can be provided with a ring 90 surrounding the substrate W. The ring 90 can include a plurality of individual blocks 92. The ring 90 serves as a positioning device for positioning the substrate relative to the substrate stage WT. In summary, the blocks 92 form the ring 90. Here, the blocks 92 can cover at least 90% or more of the periphery of the substrate W, for example at least 95%, for example at least 98%. The ring 90 is adapted to engage with the periphery 98 of the substrate, allowing the substrate to be positioned on the substrate stage. In one embodiment, the ring 90 can be moved in the vertical direction by a moving device, for example to follow the substrate during loading or unloading, so as to maintain a relatively small gap above the wafer.
[0072] Figure 8 An example of a prior art substrate stage is shown, which can be provided with a limited number (for example three or four) of blocks to position the substrate. The blocks can be referred to as wafer catchers. In fact, the wafer catcher can have a relatively rough surface 96 facing the substrate. As a result, the particles 52 can be reflected on the surface 96 in a diffuse manner, causing some of the particles 54 to reach the front side of the substrate. Here, relatively rough can mean a surface that causes diffuse reflection. Relatively rough can mean a surface roughness of Ra = 1.2 to 3.2 μm or greater. Ra < 1.2 μm can be defined as having a relatively easily achievable finish, a surface with medium surface roughness. A surface with Ra < 0.8 μm can be defined as having a quite good finish, a relatively smooth surface.
[0073] According to the present disclosure, the inner surface 100 of the ring 90 may be provided with a third reflective surface 100 for reflecting particles away from the front side of the substrate W.
[0074] As respectively shown in Figure 9 and Figure 10 , the third reflective surface 100 may be inclined or curved in a downward direction. The latter allows the particles 52 to be reflected in the downward direction, for example, towards the substrate table WT and / or towards the electrostatic chuck EC. For example, the surface 100 may be arranged at an angle γ with respect to the horizontal plane. Here, the angle γ may be in the range of about 45 to 85 degrees, for example, about 70 to 80 degrees. As shown in Figure 10 , the curvature of the surface 100 may have a radius on the order of 1 cm to 5 cm. In a practical embodiment, the horizontal distance d1 between the periphery of the substrate and the reflective surface 100 is as small as possible. The small dimension here may be on the order of 0.1 mm to 1 mm. The ring 90 and any block 92 included in the ring 90 may have a height d2 on the order of the height or thickness of the substrate W. The height may be, for example, in the range of about 0.5 mm to 1 mm.
[0075] Generally referring to Figure 11 , in one embodiment, the wafer stage WS according to the present disclosure may include a plurality of reflective surfaces for guiding the particles 52 away from the substrate. In particular, the reflective surfaces reflect the particles away from the front side of the substrate. The wafer stage may include a first reflective surface 60, a second reflective surface 80, and / or a third reflective surface 100.
[0076] In a practical embodiment, the corresponding reflective surfaces of the present disclosure prevent diffuse reflection. The surface may have a surface roughness not exceeding 0.4 Ra (μm). In one embodiment, the surface roughness may be at most 0.05 Ra. Here, Ra is the average roughness of the surface. Rz is the difference between the highest "peak" and the deepest "valley" in the surface. Ra is the average difference between all the peaks and valleys of the surface.
[0077] Although the lithographic apparatus may be specifically referred to herein for use in IC manufacturing, it should be understood that the lithographic apparatus described herein may have other applications. Possible other applications include the manufacture of integrated optical systems, the guiding and detecting patterns of magnetic domain memories, flat panel displays, liquid crystal displays (LCDs), thin film magnetic heads, etc.
[0078] Although embodiments of the invention may be specifically described herein in the context of a lithographic apparatus, embodiments of the invention may be used in other apparatus. Embodiments of the invention may form part of a mask inspection apparatus, a metrology apparatus or any apparatus for measuring or processing an object such as a wafer (or other substrate) or a mask (or other patterning device). Such apparatus are generally known as lithographic tools. Such lithographic tools may operate under vacuum conditions or ambient (non-vacuum) conditions.
[0079] Although the use of embodiments of the invention has been specifically described above in the context of optical lithography, it should be understood that the invention is not limited to optical lithography and may be used in other applications, such as imprint lithography, where the context allows.
[0080] Although specific embodiments of the invention have been described above, it should be understood that the invention may be practiced in ways other than those described. The foregoing description is intended to be illustrative, not limiting. Thus, it will be apparent to one of ordinary skill in the art that modifications may be made to the described invention without departing from the scope of the claims set forth below.
Claims
1. An apparatus, comprising: at least one substrate stage for holding a substrate, the substrate stage being provided with an electrostatic chuck for electrostatically chucking the substrate; and at least one reflective surface for reflecting charged particles in a direction away from the front side of the substrate.
2. The apparatus according to claim 1, comprising: a thermal shield, the thermal shield being disposed above the at least one substrate stage, wherein a first reflective surface of the at least one reflective surface is disposed on the thermal shield on a side of the thermal shield facing the at least one substrate stage.
3. The apparatus according to claim 2, wherein the first reflective surface has a shape generally corresponding to a perimeter of the substrate.
4. The apparatus according to claim 2 or 3, wherein the first reflective surface is annular and has an inclined surface that allows particles to be reflected laterally away from the substrate.
5. The apparatus according to any one of the preceding claims, wherein the at least one substrate stage includes one or more hardware elements, and each side of the hardware element facing the substrate is provided with a second reflective surface of the at least one reflective surface.
6. The apparatus according to claim 5, wherein the second reflective surface is inclined in an upward direction, allowing particles to be reflected away from the substrate stage in an upward direction.
7. The apparatus according to any one of the preceding claims, wherein the at least one substrate stage includes a ring surrounding the substrate, and the ring is provided with a third reflective surface of the at least one reflective surface facing the perimeter of the substrate.
8. The apparatus according to claim 7, wherein the third reflective surface is inclined or curved in a downward direction, allowing particles to be reflected in a downward direction towards the substrate stage and / or a back side of the substrate.
9. The apparatus according to claim 7 or 8, wherein the ring includes a plurality of discrete block elements.
10. The apparatus according to claim 7, 8 or 9, wherein the ring is arranged to engage with the perimeter of the substrate, allowing the substrate to be positioned on the substrate stage.
11. The apparatus according to any one of the preceding claims, wherein the at least one reflective surface has a surface roughness of not more than 0.8 Ra.
12. The apparatus according to any one of the preceding claims, wherein the at least one reflective surface has a surface roughness in the range of 0.4 Ra to 0.05 Ra or lower.
13. A wafer stage, comprising the apparatus according to any one of claims 1 to 12.
14. A lithography system, comprising the apparatus according to any one of claims 1 to 12.
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