A closed-loop control device for switching power supply and multi-channel analog quantity

Abstract

The present application belongs to the field of power supply technology, and in particular relates to a switching power supply and a closed-loop control device for multi-channel analog quantities, wherein the closed-loop control device for multi-channel analog quantities comprises a signal input module, a multi-channel voltage conversion module, and a logic conversion module, wherein the signal input module comprises a first signal connection terminal and a multi-channel variable input submodule, wherein each voltage conversion module is connected to each variable input submodule; and the logic conversion module comprises a first logic submodule, a second logic submodule, and four third logic submodules. The closed-loop control device for multi-channel analog quantities performs closed-loop conversion, comparison conversion, phase conversion, logic conversion, and pulse edge conversion processing on a clock signal, a reference signal, and a multi-channel sampled variable level signal input by the signal input module through the multi-channel voltage conversion module and the logic conversion module, and finally outputs a PWM signal of a phase-multi-channel adjustable full-bridge drive, thereby achieving the stability of synchronous control of multiple variable outputs.

Description

Technical Field

[0001] The present application belongs to the technical field of power supply, and in particular relates to a switching power supply and a closed-loop control device for multi-channel analog quantities. Background Art

[0002] The power supply output system has high requirements for the stability of output current, voltage, power supply temperature, ambient air pressure, etc. The current multi-analog closed-loop control technology of the power supply output system adopts the method of collecting a single output variable for constant output. For example, collecting the output current will produce a constant current power supply, and collecting the output voltage will produce a constant voltage power supply. This single variable constant control method cannot guarantee the stability of other variables and has certain limitations. It brings great inconvenience to the output stability of power supply design and development. Summary of the Invention

[0003] An embodiment of the present application provides a closed-loop control device for a switching power supply and multi-channel analog quantities to solve the problem that the existing power supply output adopts a control method of a single constant variable, which cannot guarantee the stability of other variables and has certain limitations in the power supply output.

[0004] In a first aspect, an embodiment of the present application provides a closed-loop control device for multi-channel analog quantities, comprising:

[0005] A signal input module, configured to connect to an input signal, the signal input module comprising a first signal connection terminal for inputting a clock signal and multiple variable input submodules, each of the variable input submodules comprising a second signal connection terminal for inputting a reference signal and a third signal connection terminal for inputting a sampled variable level signal;

[0006] Voltage conversion modules, the number of which corresponds to the number of the variable input submodules, each voltage conversion module being connected to each variable input submodule, each voltage conversion module being used to perform closed-loop conversion and comparison conversion processing on the reference signal and sampled variable level signal input to each variable input submodule, to obtain a voltage-converted level signal corresponding to each variable input submodule;

[0007] a logic conversion module, comprising a first logic submodule, a second logic submodule, and four third logic submodules, wherein the input end of the first logic submodule is connected to the first signal connection end, the output end of the first logic submodule is connected to the second logic submodule, the second logic submodule is further connected to the output end of each voltage conversion module, the output end of the second logic submodule is connected to the input end of each third logic submodule, and each third logic submodule is configured to output a PWM signal;

[0008] Among them, the first logic submodule is used to perform XOR processing on the clock signal to obtain a first processed signal; the second logic submodule is used to perform XOR and logic level conversion processing on each level signal and the first processed signal to obtain four logic conversion signals; each of the third logic submodules is used to perform pulse edge conversion processing on the input logic conversion signal to obtain a PWM signal.

[0009] Optionally, the closed-loop control device for multiple analog quantities includes a voltage supply module for providing a comparison voltage signal to each voltage conversion module, and the voltage supply module includes a first diode, a second diode, a constant current diode, a first capacitor, and a second capacitor. The first end of the constant current diode is connected to a DC bias power supply, and the second end of the constant current diode is respectively connected to the first end of the first capacitor, the first end of the second capacitor, the first end of the second diode and each voltage conversion module. The second end of the second diode is connected to the first end of the first diode, the second end of the first diode is connected to the first logic sub-module, and the second end of the first capacitor and the second end of the second capacitor are both grounded.

[0010] Optionally, each voltage conversion module includes a first operational amplifier, a second operational amplifier, and a comparator with an open collector, wherein the second end of the first operational amplifier is connected to the third signal connection end of one variable input submodule through a fifth resistor, the third end of the first operational amplifier is connected to the second signal connection end of one variable input submodule through a sixth resistor, the sixth end of the first operational amplifier is connected to the third end of the second operational amplifier through a ninth resistor and an eleventh resistor, the second end of the second operational amplifier is connected to the first end of the second operational amplifier, the first end of the second operational amplifier is further connected to the third end of the comparator through a twelfth resistor, the second end of the comparator is connected to the second end of the constant current diode, the seventh end of the comparator is connected to the input end of the second logic submodule, the first and fourth ends of the comparator are grounded, the fifth end of the comparator, the sixth end of the comparator, the eighth end of the comparator, the eighth end of the second operational amplifier, and the seventh end of the first operational amplifier are all connected to the positive DC bias power supply, and the fourth end of the first operational amplifier and the fourth end of the second operational amplifier are both connected to the negative DC bias power supply.

[0011] Optionally, the positive DC bias power supply is connected to the seventh end of the comparator through a thirteenth resistor, an eighth resistor and a third capacitor are connected in parallel between the second end of the first operational amplifier and the sixth end of the first operational amplifier, the third end of the first operational amplifier is also grounded through the seventh resistor, and the third end of the first operational amplifier is also grounded through a fourth capacitor.

[0012] Optionally, the first logic submodule includes a first OR gate element and a first XOR gate element, the first end of the first OR gate element is connected to the first signal connection end through a first resistor, the second end of the first OR gate element is respectively connected to the first end of the first OR gate element and the first end of the second resistor, the second end of the second resistor is grounded, the third end of the first OR gate element is respectively connected to the second end of the first diode and the first end of the third resistor, the second end of the third resistor is connected to the second end of the first XOR gate element, the first end of the first XOR gate element is grounded through a fourth resistor, and the third end of the first XOR gate element is connected to the second logic submodule.

[0013] Optionally, the second logic submodule includes a second OR gate element, a switch tube, a first D flip-flop, a second D flip-flop, a second XOR gate element, a third XOR gate element, and a fourth XOR gate element. The input end of the second OR gate element is connected to the output ends of the four voltage conversion modules, the output end of the second OR gate element is connected to the second end of the switch tube and the sixth end of the second D flip-flop respectively through a forty-first resistor, the control end of the switch tube is connected to the output end of the first logic submodule through a forty-second resistor, and the output end of the first logic submodule is also connected to the fifth end of the first D flip-flop and the fourth end of the second D flip-flop respectively; the third end of the switch tube, the fourth end of the first D flip-flop, the sixth end of the first D flip-flop, the third end of the second D flip-flop, and the fifth end of the second D flip-flop are all grounded; The first end of a D flip-flop is respectively connected to the input end of the first path of the third logic submodule and the first end of the third XOR gate element; the second end of the first D flip-flop is respectively connected to the third end of the first D flip-flop, the first end of the fourth XOR gate element, and the input end of the second path of the third logic submodule; the second end of the second D flip-flop is connected to the second end of the second XOR gate element via a forty-third resistor, the first end of the second XOR gate element is connected to the positive DC bias power supply via a forty-fourth resistor, the third end of the second XOR gate element is respectively connected to the second end of the third XOR gate element and the second end of the fourth XOR gate element; the third end of the third XOR gate element is connected to the input end of the third path of the third logic submodule, and the third end of the fourth XOR gate element is connected to the input end of the fourth path of the third logic submodule.

[0014] Optionally, the third logic submodule includes a Schmitt trigger and a NOR gate element, the input end of the Schmitt trigger is connected to the output end of the second logic submodule, the output end of the Schmitt trigger is connected to the first input end of the NOR gate element, the second input end of the NOR gate element is grounded through a fifty-third resistor, and the output end of the NOR gate element serves as the output end of the third logic submodule for outputting a PWM signal.

[0015] Optionally, a resistor and a capacitor are connected between the output end of the Schmitt trigger and the first input end of the NOR gate element, the first end of the resistor is connected to the output end of the Schmitt trigger, the second end of the resistor is respectively connected to the first end of the capacitor and the first input end of the NOR gate element, and the capacitor is grounded.

[0016] Optionally, the switch tube is a MOS tube, the gate of the MOS tube serves as the control end of the switch tube, the source of the MOS tube serves as the third end of the switch tube, and the drain of the MOS tube serves as the second end of the switch tube.

[0017] In a second aspect, an embodiment of the present application provides a switching power supply, comprising the above-mentioned closed-loop control device for multi-channel analog quantities.

[0018] An embodiment of the present application provides a switching power supply and a closed-loop control device for multi-channel analog quantities, wherein the closed-loop control device for multi-channel analog quantities includes a signal input module for connecting to an input signal, the signal input module including a first signal connection terminal for clock signal input and multi-channel variable input submodules, each channel of variable input submodule including a second signal connection terminal for reference signal input and a third signal connection terminal for sampling variable level signal input; a voltage conversion module, wherein the number of voltage conversion modules is set corresponding to the number of variable input submodules, each channel of voltage conversion module is connected to each channel of variable input submodule, and each channel of voltage conversion module is used to perform closed-loop conversion and comparison conversion processing on the reference signal and the sampling variable level signal input to each channel of variable input submodule, so as to obtain the voltage level corresponding to each channel of variable input submodule. Signal; a logic conversion module, including a first logic submodule, a second logic submodule and four third logic submodules, the input end of the first logic submodule is connected to the first signal connection end, the output end of the first logic submodule is connected to the second logic submodule, the second logic submodule is also connected to the output end of each voltage conversion module, the output end of the second logic submodule is connected to the input end of each third logic submodule, and each third logic submodule is used to output a PWM signal; wherein, the first logic submodule is used to perform XOR processing on the clock signal to obtain a first processed signal; the second logic submodule is used to perform XOR and logic level conversion processing on each level signal and the first processed signal to obtain four logic conversion signals; each third logic submodule is used to perform pulse edge conversion processing on the input logic conversion signal to obtain a PWM signal. The closed-loop control device for multi-channel analog quantities uses a multi-channel voltage conversion module and a logic conversion module to perform closed-loop conversion, comparison conversion, phase conversion, logic conversion, and pulse edge conversion on the clock signal, reference signal, and multi-channel sampling variable level signal input by the signal input module, and finally outputs a PWM signal with a phase-adjustable multi-channel full-bridge drive, thereby achieving synchronous control of the stability of multiple variable outputs and solving the problem that the existing power supply output adopts a control method of a single constant variable, which cannot guarantee the stability of other variables and has certain limitations in power supply output.

[0019] The switching power supply adopts a closed-loop control device with multiple analog quantities. During operation, the switching power supply can synchronously control the stability of multiple variable outputs to ensure the stability of the switching power supply operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] To more clearly illustrate the technical solution in one embodiment of the present application, the following briefly introduces the drawings required for describing the embodiment. Obviously, the drawings described below are only some embodiments of the present application. Those skilled in the art can also derive other drawings based on these drawings without inventive effort.

[0021] In order to more completely understand the present application and its beneficial effects, the following description will be given in conjunction with the accompanying drawings. In the following description, the same reference numerals represent the same parts.

[0022] Figure 1 A schematic diagram of the framework of a closed-loop control device for multi-channel analog quantities provided in one embodiment of the present application.

[0023] Figure 2 A circuit diagram of a closed-loop control device for multi-channel analog quantities provided by one embodiment of the present application.

[0024] Figure 3 For this application Figure 2 Enlarged view of point A in the middle.

[0025] Figure 4 For this application Figure 2 Enlarged view of point B in the middle.

[0026] Figure 5 A schematic diagram of comparator input and output signals in a closed-loop control device for multi-channel analog quantities provided by one embodiment of the present application.

[0027] Figure 6 A schematic diagram of input and output signals of a first logic submodule in a closed-loop control device for multi-channel analog quantities provided in one embodiment of the present application.

[0028] Figure 7 For this application Figure 2 Enlarged view of point C in the middle.

[0029] Figure 8 A signal diagram of the second logic submodule in a closed-loop control device for multi-channel analog quantities provided by one embodiment of the present application.

[0030] Figure 9 For this application Figure 2 Enlarged view of point D in the middle.

[0031] Figure 10 A signal diagram of the third logic submodule in a closed-loop control device for multi-channel analog quantities provided by one embodiment of the present application. DETAILED DESCRIPTION

[0032] The following will be combined with the drawings in one embodiment of the present application to clearly and completely describe the technical solution in one embodiment of the present application. Obviously, the described embodiment is only a part of the embodiments of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making any creative efforts shall fall within the scope of protection of this application.

[0033] One embodiment of the present application provides a closed-loop control device for a switching power supply and multiple analog outputs. This device addresses the problem that existing power supply output control methods employ a single constant variable, which cannot guarantee the stability of other variables and presents certain limitations in power supply output. This closed-loop control device for a switching power supply and multiple analog outputs is suitable for switching power supplies such as high-frequency pulse switching power supplies, high-power DC switching power supplies, and DC bias power supplies.

[0034] Example 1:

[0035] An embodiment of the present application provides a closed-loop control device for multiple analog quantities. For example, see Figure 1 , Figure 1 A schematic diagram of a closed-loop control device for multi-channel analog quantities provided in one embodiment of the present application is provided. Figure 2 A circuit diagram of a closed-loop control device for multi-channel analog quantities provided by one embodiment of the present application.

[0036] like Figure 1 and Figure 2 As shown, the present invention provides a closed-loop control device for multi-channel analog quantities, including a signal input module 10 , a multi-channel voltage conversion module 20 and a logic conversion module 30 .

[0037] Further, the multi-channel analog closed-loop control device, through a multi-channel voltage conversion module 20 and a logic conversion module 30, performs closed-loop conversion, comparison conversion, phase conversion, logic conversion, and pulse edge conversion on the clock signal and reference signal REF input from the signal input module 10, as well as the multi-channel sampled variable level signals, ultimately outputting a PWM signal for a four-phase adjustable full-bridge drive. In this embodiment, the multi-channel analog closed-loop control device utilizes a multi-channel analog closed-loop method to synchronously control the stability of multiple variable outputs during operation, thereby ensuring the stability of the power supply system.

[0038] In the embodiment of the invention of the application, the signal input module 10 is used to connect to the input signal. The signal input module includes a first signal connection terminal SYN for clock signal input and a multi-channel variable input sub-module. Each variable input sub-module includes a second signal connection terminal REF for reference signal input and a third signal connection terminal for sampling variable level signal input.

[0039] It is further explained that the variable input submodule is provided with four paths, and the corresponding voltage conversion module 20 is also provided with four paths. Figure 2 In the embodiment, the third signal connection terminals of the four variable input submodules are respectively marked as |FB-1|, |FB-2|, |FB-3| and |FB-4|. In this embodiment, the reference signal is set according to the requirements.

[0040] In the embodiment of the invention of the application, the number of voltage conversion modules 20 is set corresponding to the number of variable input sub-modules, each voltage conversion module 20 is connected to each variable input sub-module, and each voltage conversion module 20 is used to perform closed-loop transformation and comparison transformation processing on the reference signal and sampled variable level signal input into each variable input sub-module to obtain the voltage-converted level signal corresponding to each variable input sub-module.

[0041] It is further explained that each voltage conversion module 20 performs voltage conversion based on the input reference signal and the sampled variable level signal to obtain the level signal input to the logic conversion module 30.

[0042] In the embodiment of the invention disclosed in the application, the logic conversion module 30 includes a first logic submodule 31, a second logic submodule 32, and four third logic submodules 33. The input of the first logic submodule 31 is connected to the first signal connection terminal SYN, and the output of the first logic submodule 31 is connected to the second logic submodule 32. The second logic submodule 32 is also connected to the output of each voltage conversion module 20. The output of the second logic submodule 32 is connected to the input of each third logic submodule 33. Each third logic submodule 33 is configured to output a PWM signal. The first logic submodule 31 is configured to perform an XOR operation on the clock signal to obtain a first processed signal; the second logic submodule 32 is configured to perform an XOR operation and logic level conversion on each level signal and the first processed signal to obtain four logic conversion signals; and each third logic submodule 33 is configured to perform pulse edge conversion on the input logic conversion signal to obtain a PWM signal.

[0043] It is further explained that the logic conversion module 30 performs logic conversion on the level signal input from the voltage conversion module 20 and the clock signal input from the first signal connection terminal SNY through the first logic submodule 31, the second logic submodule 32 and the four third logic submodules 33 to output four PWM signals. Figure 2 As shown, the four output PWM signals are respectively recorded as DR4D, DR3C, DR1B, and DR2A. The output ends of the four-way third logic submodule 33 are connected to a full-bridge circuit comprising four bridge arms forming a power electronic conversion topology. For example, the first PWM signal DR4D is used as a drive signal for the upper transistor of the rear bridge arm of the full-bridge circuit, the second PWM signal DR3C is used as a drive signal for the lower transistor of the rear bridge arm of the full-bridge circuit, the third PWM signal DR1B is used as a drive signal for the upper transistor of the front bridge arm of the full-bridge circuit, and the fourth PWM signal DR2A is used as a drive signal for the lower transistor of the front bridge arm of the full-bridge circuit.

[0044] In the embodiment of the invention of the application, the closed-loop control device of the multi-channel analog quantity can synchronously control the stability of multiple variable outputs, thereby better ensuring the stability and reliability of the power supply system.

[0045] An embodiment of the present application provides a closed-loop control device for multi-channel analog quantities, including a signal input module for connecting to an input signal, the signal input module including a first signal connection terminal for clock signal input and multiple variable input submodules, each variable input submodule including a second signal connection terminal for reference signal input and a third signal connection terminal for sampled variable level signal input; a voltage conversion module, wherein the number of voltage conversion modules is arranged corresponding to the number of variable input submodules, each voltage conversion module is connected to each variable input submodule, and each voltage conversion module is used to perform closed-loop conversion and comparison conversion processing on the reference signal and sampled variable level signal input to each variable input submodule to obtain a voltage-converted level signal corresponding to each variable input submodule; and a logic conversion module. The system comprises a first logic submodule, a second logic submodule and four third logic submodules. The input end of the first logic submodule is connected to the first signal connection end, the output end of the first logic submodule is connected to the second logic submodule, the second logic submodule is further connected to the output end of each voltage conversion module, the output end of the second logic submodule is connected to the input end of each third logic submodule, and each third logic submodule is used to output a PWM signal. The first logic submodule is used to perform XOR processing on the clock signal to obtain a first processed signal. The second logic submodule is used to perform XOR and logic level conversion processing on each level signal and the first processed signal to obtain four logic conversion signals. Each third logic submodule is used to perform pulse edge conversion processing on the input logic conversion signal to obtain a PWM signal. The closed-loop control device for multi-channel analog quantities performs closed-loop conversion, comparison conversion, phase conversion, logic conversion, and pulse edge conversion processing on the clock signal, reference signal, and multi-channel sampling variable level signal input by the signal input module through a multi-channel voltage conversion module and a logic conversion module, and finally outputs a PWM signal with a phase-adjustable multi-channel full-bridge drive, thereby achieving the stability of synchronous control of multiple variable outputs, improving the power supply safety and reliability of the closed-loop control device using the multi-channel analog quantities, and solving the problem that the existing power supply output adopts a control method of a single constant variable, which cannot guarantee the stability of other variables and has certain limitations in power supply output.

[0046] Figure 3 For this application Figure 2 Enlarged view of point A in the middle.

[0047] like Figure 2 and Figure 3As shown, in the embodiment of the invention of the application, the closed-loop control device of the multi-channel analog quantity also includes a voltage supply module M1 for providing a comparison voltage signal to each voltage conversion module 20, and the voltage supply module M1 includes a first diode D1, a second diode D2, a constant current diode D3, a first capacitor C1 and a second capacitor C2. The first end of the constant current diode D3 is connected to the DC bias power supply, and the second end of the constant current diode D3 is respectively connected to the first end of the first capacitor C1, the first end of the second capacitor C2, the first end of the second diode D2 and each voltage conversion module 30. The second end of the second diode D2 is connected to the first end of the first diode D1, the second end of the first diode D1 is connected to the first logic sub-module 31, and the second end of the first capacitor C1 and the second end of the second capacitor C2 are both grounded.

[0048] It should be further noted that the DC bias power supply can be a 15V DC power supply. The first end of the constant current diode D3 is connected to the positive DC bias power supply. In this embodiment, the voltage supply module M1 is configured to convert the voltage provided by the DC bias power supply via the constant current diode D3 to provide a comparison voltage signal to each voltage conversion module 30. In this embodiment, the anode of the diode serves as the first end of the diode, and the cathode of the diode serves as the second end of the diode.

[0049] Figure 4 For this application Figure 2 The enlarged view of point B in the middle. Figure 5 A schematic diagram of the input and output signals of the comparator in a closed-loop control device for multi-channel analog quantities provided in one embodiment of the present application. Figure 5 In the example, U5-2 represents the comparison voltage signal outputted by the voltage supply module M1 to the input terminal of the comparator U5 (e.g. Figure 5 U5-3 represents the voltage signal output from the second operational amplifier to the input terminal of the comparator U5 (e.g. Figure 5 U5-7 represents the level signal at the output of the comparator U5; U8-2 represents the comparison voltage signal output from the voltage supply module M1 to the input of the comparator U8 (e.g. Figure 5 ), U8-3 represents the voltage signal output from the second operational amplifier to the input terminal of the comparator U8 (such as Figure 5 U8-7 represents the level signal at the output of the comparator U8; U11-2 represents the comparison voltage signal output from the voltage supply module M1 to the input of the comparator U11 (e.g. Figure 5 U11-3 represents the voltage signal output from the second operational amplifier to the input terminal of the comparator U11 (e.g. Figure 5 U11-7 represents the level signal at the output of the comparator U11; U14-2 represents the comparison voltage signal output from the voltage supply module M1 to the input of the comparator U14 (e.g. Figure 5 ), U14-3 represents the voltage signal output by the second operational amplifier to the input terminal of the comparator U14 (such as Figure 5 ), U14-7 represents the level signal at the output of the comparator U14.

[0050] In the embodiment of the invention of the application, the variable input submodule is provided with four paths, and the corresponding voltage conversion modules 20 are also provided with four paths. The four voltage conversion modules 20 are respectively recorded as the first voltage conversion module, the second voltage conversion module, the third voltage conversion module and the fourth voltage conversion module. Figure 2 and Figure 4 As shown, the first voltage conversion module 20 includes a first operational amplifier U3 (model OP07), a second operational amplifier U4 (model TL084CDR) and a comparator U5 (model LM211) with an open collector. The second end of the first operational amplifier U3 is connected to the third signal connection end of the variable input submodule through the fifth resistor R5. The third end of the first operational amplifier U3 is connected to the second signal connection end of the variable input submodule through the sixth resistor R6. The sixth end of the first operational amplifier U3 is connected to the third end of the second operational amplifier U4 through the ninth resistor R9 and the eleventh resistor R11. The second end of the second operational amplifier U4 is connected to the second The first terminal of the operational amplifier U4 is connected to the third terminal of the comparator U5 via a twelfth resistor R12. The second terminal of the comparator U5 is connected to the second terminal of the constant current diode D3. The seventh terminal of the comparator U5 is connected to the input terminal of the second logic submodule 32. The first and fourth terminals of the comparator U5 are grounded. The fifth terminal of the comparator U5, the sixth terminal of the comparator U5, the eighth terminal of the comparator U5, the eighth terminal of the second operational amplifier U4, and the seventh terminal of the first operational amplifier U3 are all connected to a positive DC bias power supply. The fourth terminal of the first operational amplifier U3 and the fourth terminal of the second operational amplifier U4 are both connected to a negative DC bias power supply. The positive DC bias power supply is connected to the seventh terminal of the comparator U5 via a thirteenth resistor R13. An eighth resistor R8 and a third capacitor C3 are connected in parallel between the second terminal of the first operational amplifier U3 and the sixth terminal of the first operational amplifier U3. The third terminal of the first operational amplifier U3 is also grounded via a seventh resistor R7. The third terminal of the first operational amplifier U3 is also grounded via a fourth capacitor C4.

[0051] It is further explained that if Figure 5As shown, the voltage conversion module 20 performs closed-loop conversion on the input reference signal and the sampled variable level signal through the first operational amplifier U3 and the second operational amplifier U4 to obtain a first conversion signal. The voltage conversion module 20 compares and converts the input first conversion voltage signal with the comparison voltage signal provided by the voltage supply module M1 through the comparator U5 to obtain a level signal. In this embodiment, the first operational amplifier of the second voltage conversion module 20 is denoted as U6, the second operational amplifier is denoted as U7, and the comparator is denoted as U8. The first operational amplifier of the third voltage conversion module 20 is denoted as U9, the second operational amplifier is denoted as U10, and the comparator is denoted as U11. The first operational amplifier of the fourth voltage conversion module 20 is denoted as U12, the second operational amplifier is denoted as U13, and the comparator is denoted as U14.

[0052] Figure 6 This is a schematic diagram of the input and output signals of the first logic submodule in a closed-loop control device for multi-channel analog quantities provided in one embodiment of the present application. Figure 6 In FIG, SYN and U1-1 represent clock signals; U2-3 represents the voltage signal at the output end of the first XOR gate element U2.

[0053] like Figure 2 、 Figure 3 and Figure 6 As shown, in the embodiment of the invention of the application, the first logic submodule 31 includes a first OR gate element U1 and a first XOR gate element U2, the first end of the first OR gate element U1 is connected to the first signal connection end SYN through a first resistor, the second end of the first OR gate element U1 is respectively connected to the first end of the first OR gate element U1 and the first end of the second resistor R2, the second end of the second resistor R2 is grounded, the third end of the first OR gate element U1 is respectively connected to the second end of the first diode D1 and the first end of the third resistor R3, the second end of the third resistor R3 is connected to the second end of the first XOR gate element U2, the first end of the first XOR gate element U2 is grounded through a fourth resistor R4, and the third end of the first XOR gate element U2 is connected to the second logic submodule 32.

[0054] It is further explained that if Figure 6 As shown, the first logic submodule 31 is used to perform OR gate and XOR gate processing on the input clock signal to obtain a first processed signal.

[0055] Figure 7 For this application Figure 2 The enlarged image of point C in the middle, Figure 8 This is a signal diagram of the second logic submodule in a closed-loop control device for multi-channel analog quantities provided by one embodiment of the present application. Figure 8 U16- represents the signal output from the second terminal of the first D flip-flop U16, U16-Q represents the signal output from the first terminal of the first D flip-flop U16, U15-1 represents the signal output from the second OR gate element U15; U17-S represents the signal from the sixth terminal of the second D flip-flop U17; U17-R represents the signal from the fourth terminal of the second D flip-flop U17, U17- It represents the signal at the second end of the second D flip-flop U17; U18-3 is the signal at the output end of the second XOR gate element U18; U19-3 is the signal at the output end of the third XOR gate element U19, and U20-3 is the signal at the output end of the fourth XOR gate element U20.

[0056] like Figure 2 、 Figure 7 and Figure 8 As shown, in the embodiment of the invention of the application, the second logic submodule 32 includes a second OR gate element U15 (model CD4072), a switch tube Q1, a first D flip-flop U16 (model CD4013), a second D flip-flop U17 (model CD4013), a second XOR gate element U18 (model CD4070), a third XOR gate element U19 (model CD4070) and a fourth XOR gate element U20 (model CD4070). The input end of the second OR gate element U18 is connected to the four-way voltage conversion module. The output end of the first logic submodule 31 is connected to the output end of the first logic submodule 31, the output end of the second OR gate element U15 is connected to the second end of the switch tube Q1 and the sixth end of the second D flip-flop U17 through the forty-first resistor R41, the control end of the switch tube Q1 is connected to the output end of the first logic submodule 31 through the forty-second resistor R42, and the output end of the first logic submodule 31 is further connected to the fifth end of the first D flip-flop U16 and the fourth end of the second D flip-flop U17. The third end of the switch tube Q1, the fourth end of the first D flip-flop U16, the sixth end of the first D flip-flop U16, the third end of the second D flip-flop U17, and the fifth end of the second D flip-flop U17 are all grounded. The first end of the first D flip-flop U16 is connected to the input end of the first third logic submodule 33 and the first end of the third XOR gate element U19, respectively. The second end of the first D flip-flop U16 is connected to the third end of the first D flip-flop U16, the first end of the fourth XOR gate element U20, and the input end of the second third logic submodule 33, respectively. The second end of the second D flip-flop U17 is connected to the forty-third resistor R41. The resistor R43 is connected to the second end of the second XOR gate element U18, the first end of the second XOR gate element U18 is connected to the positive DC bias power supply through the forty-fourth resistor R44, the third end of the second XOR gate element U18 is connected to the second end of the third XOR gate element U19 and the second end of the fourth XOR gate element U20 respectively; the third end of the third XOR gate element U19 is connected to the input end of the third logic sub-module 33 of the third path, and the third end of the fourth XOR gate element U20 is connected to the input end of the fourth logic sub-module 33.

[0057] It is further explained that the switch transistor Q1 can be a MOS transistor, the gate of the MOS transistor serves as the control terminal of the switch transistor Q1, the source of the MOS transistor serves as the third terminal of the switch transistor Q1, and the drain of the MOS transistor serves as the second terminal of the switch transistor Q1. In this embodiment, the second OR gate element U15 performs OR gate processing on the levels output by the four-way voltage conversion module 20 and then inputs them together with the signal output by the switch transistor Q1 into the sixth terminal of the second D flip-flop U17. Thereafter, the logic conversion processing is performed with the first processed signal input to the fourth terminal of the second D flip-flop U17 to obtain the first conversion signal U17- The first conversion signal is processed by the second XOR gate element U18 to obtain the third conversion signal U18-3; the first processed signal is logically converted by the first D flip-flop U16 to obtain the second conversion signal U16-Q and the third conversion signal U16- , the third conversion signal U18-3 and the second conversion signal U16-Q are input to the third XOR gate element U19 for XOR gate processing to obtain the third logic conversion signal U19-3 input to the third logic submodule 33; the third conversion signal U18-3 and the third conversion signal U16- The fourth XOR gate element U20 is input to perform XOR gate processing to obtain the fourth logic conversion signal U20-3 which is input to the fourth third logic submodule 33. The second conversion signal U16-Q is used as the first logic conversion signal of the first third logic submodule 33, and the third conversion signal U16- As the second logic conversion signal of the second third logic sub-module 33.

[0058] Figure 9 For this application Figure 2 The enlarged view of point D in the middle, Figure 10 This is a signal diagram of the third logic submodule in a closed-loop control device for multi-channel analog quantities provided by one embodiment of the present application. Figure 10 In the figure, U21-3 serves as the signal at the output end of the Schmitt trigger U21, U22-3 serves as the signal at the output end of the Schmitt trigger U22, U23-3 serves as the signal at the output end of the Schmitt trigger U23, and U24-3 serves as the signal at the output end of the Schmitt trigger U24; DR4D, DR3C, DR1B, and DR2A are the PWM signals output by the corresponding four third logic submodules 33 respectively.

[0059] like Figure 2 、 Figure 9 and Figure 10As shown, in the embodiment of the invention of the application, taking the first third logic submodule as an example, the first third logic submodule 33 includes a Schmitt trigger U21 (model CD4093) and a NOR gate element U25 (model CD4001). The input of the Schmitt trigger U21 is connected to the output of the second logic submodule 32 (e.g., the first terminal of the first D flip-flop U16), the output of the Schmitt trigger U21 is connected to the first input of the NOR gate element U25, the second input of the NOR gate element U25 is grounded via a fifty-third resistor 53, and the output of the NOR gate element U25 serves as the output terminal of the third logic submodule 33 for outputting a PWM signal. A resistor R49 and a capacitor C15 are connected between the output of the Schmitt trigger U21 and the first input of the NOR gate element U25. The first terminal of the resistor R49 is connected to the output of the Schmitt trigger U21, and the second terminal of the resistor R49 is connected to the first terminal of the capacitor C15 and the first input of the NOR gate element U25, respectively. The capacitor C15 is grounded.

[0060] It is further explained that if Figure 2 and Figure 9As shown, the first input terminal of the Schmitt trigger U21 is connected to the first terminal of the first D trigger U16 through the forty-fifth resistor R45, the connection between the forty-fifth resistor R45 and the Schmitt trigger U21 is grounded through the eleventh capacitor C11, and the second input terminal of the Schmitt trigger U21 is directly connected to the first terminal of the first D trigger U16. In the second-path third logic submodule 33, the second end of the first D trigger U16 is directly connected to the first end of the Schmitt trigger U22, the second end of the first D trigger U16 is connected to the second end of the Schmitt trigger U22 through the forty-sixth resistor R46, the forty-sixth resistor R46 and the Schmitt trigger U22 are connected to ground through the twelfth capacitor C12, the third end of the Schmitt trigger U22 is connected to the first end of the NOR gate element U26 through the fiftieth resistor R50, the second end of the NOR gate element U26 is grounded through the fifty-third resistor R53, the NOR gate element U26 and the fiftieth resistor R50 are also grounded through the sixteenth capacitor C16, and the third end of the NOR gate element U26 serves as the output end of the second-path third logic submodule 33. In the third-path third logic submodule 33, the third end (output end) of the third XOR gate element U19 is directly connected to the second end of the Schmitt trigger U23, and the third end (output end) of the third XOR gate element U19 is connected to the first end of the Schmitt trigger U23 through the forty-seventh resistor R47. The forty-seventh resistor R47 and the Schmitt trigger U23 are connected to ground via the thirteenth capacitor C13. The third end of the Schmitt trigger U23 is connected to the first end of the NOR gate element U27 through the fifty-first resistor R51. The second end of the NOR gate element U27 is grounded through the fifty-third resistor R53. The NOR gate element U27 and the fifty-first resistor R51 are also grounded via the seventeenth capacitor C17. The third end of the NOR gate element U27 serves as the output end of the third-path third logic submodule 33. In the fourth path third logic submodule 33, the third terminal (output terminal) of the fourth XOR gate element U20 is directly connected to the first terminal of the Schmitt trigger U24. The third terminal (output terminal) of the fourth XOR gate element U20 is connected to the second terminal of the Schmitt trigger U24 via the forty-eighth resistor R48. The forty-eighth resistor R48 and the Schmitt trigger U24 are connected to ground via the fourteenth capacitor C14. The third terminal of the Schmitt trigger U24 is connected to the first terminal of the NOR gate element U28 via the fifty-second resistor R52. The second terminal of the NOR gate element U28 is grounded via the fifty-third resistor R53. The NOR gate element U28 and the fifty-second resistor R52 are also connected to ground via the eighteenth capacitor C18. The third terminal of the NOR gate element U28 serves as the output terminal of the fourth path third logic submodule 33. Figure 10As shown, the first third logic submodule 33 is used to perform logic transformation and NOR gate processing on the input second conversion signal U16-Q through the Schmitt trigger U21 and the NOR gate element U25 to obtain the first PWM signal DR4D; the second third logic submodule 33 is used to perform logic transformation and NOR gate processing on the input third conversion signal U16- The second PWM signal DR3C is obtained by performing logic transformation and NOR gate processing through the Schmitt trigger U22 and the NOR gate element U26; the third third logic submodule 33 is used to perform logic transformation and NOR gate processing on the input third logic transformation signal U19-3 through the Schmitt trigger U23 and the NOR gate element U27 to obtain the third PWM signal DR1B; the fourth third logic submodule 33 is used to perform logic transformation and NOR gate processing on the input fourth logic transformation signal U20-3 through the Schmitt trigger U24 and the NOR gate element U28 to obtain the fourth PWM signal DR2A.

[0061] In the invention embodiment of the application, as Figure 5 、 Figure 6 、 Figure 8 and Figure 10 As shown, the closed-loop control device for multi-channel analog quantities processes the input clock signal SYN through the first OR gate element U1 and the first XOR gate element U2 to obtain a first processed signal corresponding to the negation of the clock signal SYN, as shown in FIG. Figure 6 As shown. The input reference signal and sampled variable level signal are processed by the first operational amplifier U3 / U6 / U9 / U12 (model OP07) and the second operational amplifier U4 / U7 / U10 / U13 (model TL084CDR) for logic processing and input to the comparator U5 / U8 / U11 / U14 (model LM211). The first conversion voltage signal (such as Figure 5 The comparator U5 / U8 / U11 / U14 compares the first converted voltage signal of the wavy line with the constant comparison voltage signal provided by the voltage supply module M1 (as shown in the wavy line of U5-3, U8-3, U11-3 and U14-3). Figure 5 The horizontal lines shown by U5-2, U8-2, U11-2 and U14-2 in the figure) get the level signal (such as Figure 5 The level signal is composed of high level and low level as shown by U5-7, U8-7, U11-7 and U14-7 in FIG. ). The level signal is processed by the second OR gate element U15 (model CD4072) to obtain the following: Figure 8 The second level signal of U15-1 is obtained through the clock CLK port of D-type flip-flop U16 (model: CD4013). Figure 8 U16- The third transformed signal shown and Figure 8The second conversion signal shown in U16-Q in the figure; the second level signal is obtained by the set S port of the D-type flip-flop U17 (model: CD4013) and the first processing signal corresponding to SYN is obtained by the reset R port of the D-type flip-flop U17 (model: CD4013). Figure 8 As shown in U17- The fourth conversion signal; U17- The fourth conversion signal is XORed by the second XOR gate element U18 (model: CD4070) to obtain Figure 8 The fifth conversion signal shown in U18-3; the fifth conversion signal and the second conversion signal of U16-Q are XORed using the third XOR gate element U19 (model: CD4070) to obtain the following Figure 8 The third logic conversion signal shown in U19-3; the fifth conversion signal and U16- The third conversion signal is processed by the fourth XOR gate element U20 (model: CD4070) to obtain the following Figure 8 Finally, the second conversion signal U16-Q is processed by the 2-input AND NOT logic of Schmitt trigger U21 (model: CD4093) to obtain the following: Figure 10 As shown in the figure, the first NAND signal of U21-3 is processed by the 2-input NOR logic of NOR gate element U25 (model: CD4001) to obtain the following: Figure 10 The first PWM signal shown in DR4D; the third conversion signal U16- After the 2-input AND NOT logic processing of Schmitt trigger U22 (model: CD4093), we get Figure 10 As shown in the figure, the second NAND signal of U22-3 is processed by the 2-input NOR logic of NOR gate element U26 (model: CD4001) to obtain the following: Figure 10 The second PWM signal shown in DR3C; the third logic conversion signal U19-3 is processed by the 2-input AND NOT logic of the Schmitt trigger U23 (model: CD4093) to obtain the following Figure 10 As shown in the figure, the third NAND signal of U23-3 is processed by the 2-input NAND logic of NOR gate element U27 (model: CD4001) to obtain the following: Figure 10 The third PWM signal shown in DR1B; the fourth logic conversion signal U20-3 is processed by the 2-input AND-NOT logic of the Schmitt trigger U24 (model: CD4093) to obtain the following Figure 10 As shown in the figure, the fourth NAND signal of U24-3 is processed by the 2-input NAND logic of the NOR gate element U28 (model: CD4001) to obtain the following: Figure 10 The fourth PWM signal is shown in DR2A.

[0062] Example 2:

[0063] The present invention further provides a switching power supply including the above-mentioned closed-loop control device for multi-channel analog quantities.

[0064] The details of the multi-channel analog closed-loop control device have been described in Example 1 and will not be repeated in this example. The switching power supply utilizes a multi-channel analog closed-loop control device. During operation, the switching power supply can synchronously control the stability of multiple variable outputs, ensuring the stability of the switching power supply.

[0065] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0066] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of technical features indicated. Therefore, features specified as "first" or "second" may explicitly or implicitly include one or more features.

[0067] The above is a detailed introduction to the closed-loop control device for multi-channel analog quantities provided by an embodiment of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for technical personnel in this field, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A closed-loop control device for multi-channel analog quantities, characterized in that: include: A signal input module, configured to connect to an input signal, the signal input module comprising a first signal connection terminal for inputting a clock signal and multiple variable input submodules, each of the variable input submodules comprising a second signal connection terminal for inputting a reference signal and a third signal connection terminal for inputting a sampled variable level signal; Voltage conversion modules, the number of which corresponds to the number of the variable input submodules, each voltage conversion module being connected to each variable input submodule, each voltage conversion module being used to perform closed-loop conversion and comparison conversion processing on the reference signal and sampled variable level signal input to each variable input submodule, to obtain a voltage-converted level signal corresponding to each variable input submodule; a logic conversion module, comprising a first logic submodule, a second logic submodule, and four third logic submodules, wherein the input end of the first logic submodule is connected to the first signal connection end, the output end of the first logic submodule is connected to the second logic submodule, the second logic submodule is further connected to the output end of each voltage conversion module, the output end of the second logic submodule is connected to the input end of each third logic submodule, and each third logic submodule is configured to output a PWM signal; Among them, the first logic submodule is used to perform XOR processing on the clock signal to obtain a first processed signal; the second logic submodule is used to perform XOR and logic level conversion processing on each level signal and the first processed signal to obtain four logic conversion signals; each of the third logic submodules is used to perform pulse edge conversion processing on the input logic conversion signal to obtain a PWM signal.

2. The closed-loop control device for multi-channel analog quantities according to claim 1, characterized in that: It also includes a voltage supply module for providing a comparison voltage signal to each voltage conversion module, and the voltage supply module includes a first diode, a second diode, a constant current diode, a first capacitor, and a second capacitor. The first end of the constant current diode is connected to a DC bias power supply, and the second end of the constant current diode is respectively connected to the first end of the first capacitor, the first end of the second capacitor, the first end of the second diode, and each voltage conversion module. The second end of the second diode is connected to the first end of the first diode, the second end of the first diode is connected to the first logic sub-module, and the second end of the first capacitor and the second end of the second capacitor are both grounded.

3. The closed-loop control device for multi-channel analog quantities according to claim 2, characterized in that: Each voltage conversion module includes a first operational amplifier, a second operational amplifier, and a comparator with an open collector. The second end of the first operational amplifier is connected to the third signal connection end of one variable input submodule through a fifth resistor. The third end of the first operational amplifier is connected to the second signal connection end of one variable input submodule through a sixth resistor. The sixth end of the first operational amplifier is connected to the third end of the second operational amplifier through a ninth resistor and an eleventh resistor. The second end of the second operational amplifier is connected to the first end of the second operational amplifier. The first end of the second operational amplifier is further connected to the third end of the comparator through a twelfth resistor. The second end of the comparator is connected to the second end of the constant current diode. The seventh end of the comparator is connected to the input end of the second logic submodule. The first and fourth ends of the comparator are grounded. The fifth end of the comparator, the sixth end of the comparator, the eighth end of the comparator, the eighth end of the second operational amplifier, and the seventh end of the first operational amplifier are all connected to the positive DC bias power supply. The fourth end of the first operational amplifier and the fourth end of the second operational amplifier are both connected to the negative DC bias power supply.

4. The closed-loop control device for multi-channel analog quantities according to claim 3, characterized in that: The positive DC bias power supply is connected to the seventh terminal of the comparator through a thirteenth resistor, an eighth resistor and a third capacitor are connected in parallel between the second terminal of the first operational amplifier and the sixth terminal of the first operational amplifier, the third terminal of the first operational amplifier is also grounded through the seventh resistor, and the third terminal of the first operational amplifier is also grounded through a fourth capacitor.

5. The closed-loop control device for multi-channel analog quantities according to claim 2, characterized in that: The first logic submodule includes a first OR gate element and a first XOR gate element, the first end of the first OR gate element is connected to the first signal connection end through a first resistor, the second end of the first OR gate element is respectively connected to the first end of the first OR gate element and the first end of the second resistor, the second end of the second resistor is grounded, the third end of the first OR gate element is respectively connected to the second end of the first diode and the first end of the third resistor, the second end of the third resistor is connected to the second end of the first XOR gate element, the first end of the first XOR gate element is grounded through a fourth resistor, and the third end of the first XOR gate element is connected to the second logic submodule.

6. The closed-loop control device for multi-channel analog quantities according to claim 1, characterized in that: The second logic submodule includes a second OR gate element, a switch tube, a first D flip-flop, a second D flip-flop, a second XOR gate element, a third XOR gate element, and a fourth XOR gate element. The input end of the second OR gate element is connected to the output ends of the four voltage conversion modules. The output end of the second OR gate element is connected to the second end of the switch tube and the sixth end of the second D flip-flop respectively through a forty-first resistor. The control end of the switch tube is connected to the output end of the first logic submodule through a forty-second resistor. The output end of the first logic submodule is also connected to the fifth end of the first D flip-flop and the fourth end of the second D flip-flop respectively. The third end of the switch tube, the fourth end of the first D flip-flop, the sixth end of the first D flip-flop, the third end of the second D flip-flop, and the fifth end of the second D flip-flop are all grounded. The first end of the D flip-flop is respectively connected to the input end of the third logic sub-module of the first path and the first end of the third XOR gate element; the second end of the first D flip-flop is respectively connected to the third end of the first D flip-flop, the first end of the fourth XOR gate element, and the input end of the third logic sub-module of the second path; the second end of the second D flip-flop is connected to the second end of the second XOR gate element via a forty-third resistor, the first end of the second XOR gate element is connected to a positive DC bias power supply via a forty-fourth resistor, the third end of the second XOR gate element is respectively connected to the second end of the third XOR gate element and the second end of the fourth XOR gate element; the third end of the third XOR gate element is connected to the input end of the third logic sub-module of the third path, and the third end of the fourth XOR gate element is connected to the input end of the third logic sub-module of the fourth path.

7. The closed-loop control device for multi-channel analog quantities according to claim 6, characterized in that: The third logic submodule includes a Schmitt trigger and a NOR gate element. The input end of the Schmitt trigger is connected to the output end of the second logic submodule, the output end of the Schmitt trigger is connected to the first input end of the NOR gate element, the second input end of the NOR gate element is grounded via a fifty-third resistor, and the output end of the NOR gate element serves as the output end of the third logic submodule for outputting a PWM signal.

8. The closed-loop control device for multi-channel analog quantities according to claim 7, characterized in that: A resistor and a capacitor are connected between the output end of the Schmitt trigger and the first input end of the NOR gate element, the first end of the resistor is connected to the output end of the Schmitt trigger, the second end of the resistor is connected to the first end of the capacitor and the first input end of the NOR gate element respectively, and the capacitor is grounded.

9. The closed-loop control device for multi-channel analog quantities according to claim 6, characterized in that: The switch tube is a MOS tube, the gate of the MOS tube serves as the control end of the switch tube, the source of the MOS tube serves as the third end of the switch tube, and the drain of the MOS tube serves as the second end of the switch tube.

10. A switching power supply, characterized in that: A closed-loop control device comprising multiple analog quantities as described in any one of claims 1 to 9.

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