Signal transmission method and device, chip system, storage medium and program product

Abstract

The embodiment of the invention provides a signal transmission method and device, a chip system, a storage medium and a program product, and relates to the technical field of communication. The method comprises the following steps: determining a first message; sending the first message through the first time domain resource; wherein the first time domain resource comprises a first time unit, and the first time unit corresponds to a plurality of data chips and parity check chips; under the condition that the level states of the first data chip and the last data chip in the plurality of data chips are the same, the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit. In this way, the data transmission efficiency can be significantly improved.

Description

Technical Field

[0001] This application relates to the field of communication technologies, and in particular, to a signal transmission method, apparatus, chip system, storage medium, and program product. Background Art

[0002] Currently, the communication between a reader and an ambient internet of things (AIoT) device can modulate signals in a manner that combines orthogonal frequency division multiplexing (OFDM) and on-off keying (OOK). Exemplarily, one OFDM symbol can correspond to multiple OOK chips and one or more parity check chips, and the parity check chips can be used to transmit parity check codes to detect and correct errors during transmission. In addition, a cyclic prefix (CP) is usually set in front of the OFDM symbol to reduce inter symbol interference (ISI).

[0003] However, in some scenarios, the number of payload bits for transmitting actual data through OOK chips is low, resulting in low data transmission efficiency. Summary of the Invention

[0004] Embodiments of this application provide a signal transmission method, apparatus, chip system, storage medium, and program product, which are applied to the field of terminal technologies. The signal transmission method provided by the embodiments of this application is such that in one OFDM symbol, when the level states of the first OOK chip and the last OOK chip are the same, the sum of the chip length of the last OOK chip and the chip length of the parity check chip is greater than or equal to the length of the CP. In this way, the data transmission efficiency can be significantly improved.

[0005] In a first aspect, an embodiment of this application proposes a signal transmission method. The method includes: determining a first message; sending the first message in a first time domain resource, where the first time domain resource includes a first time unit, and the first time unit corresponds to multiple data chips and parity check chips; and when the level states of the first data chip and the last data chip among the multiple data chips are the same, the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

[0006] In a possible implementation, the method is executed by a first communication device. The first communication device can be understood as a reader. And the first communication device can be the reader itself, or a component applied to the reader (for example, a chip, a chip system, a circuit, software, and / or a hardware module, etc.).

[0007] Wherein, the first message can be understood as the information or signal transmitted between the reader and the AIoT device, and can also be referred to as the R2D message or R2D transmission. The first time-domain resource can be understood as the time-domain resource used to transmit the first message, and this time-domain resource can be divided into multiple time units. Each time unit is used to transmit a part of the first message. The time unit can be, for example, an OFDM symbol in the following text. The data chip can also be referred to as an OOK chip or an OOK data chip for example.

[0008] In the signal transmission method of the present application, when the level states of the first OOK chip and the last OOK chip in a time unit (such as an OFDM symbol) are the same, the sum of the chip length of the last OOK chip and the chip length of the parity check chip is greater than or equal to the length of the CP. In this way, the proportion of the parity check chip in an OFDM symbol can be reduced, thereby reducing the transmission overhead of redundant data and effectively improving the data transmission efficiency.

[0009] In a possible implementation, when the level states of the first data chip and the last data chip are different, the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix.

[0010] In this way, since the CP is obtained by copying the sequence carried by the parity check chip, the level state of the CP is the same as that of the parity check chip, and the level state of the parity check chip is the same as that of the first OOK chip, a level state is maintained during the duration of the CP and between the CP and the first OOK chip, thereby simplifying the signal processing process at the receiving end (AIoT device).

[0011] In a possible implementation, when the level states of the first data chip and the last data chip are the same, on the premise that the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix, the chip lengths of multiple data chips are set to the maximum value.

[0012] In this way, within the same bandwidth and time (or OFDM symbol), more valid data can be transmitted through the data chips, thereby improving the efficiency of signal transmission.

[0013] In a possible implementation, the level state of the cyclic prefix is the same as the level state of the parity check chip; the level state of the parity check chip is the same as the level state of the first data chip.

[0014] In this way, the consistent level state between the CP and the first OOK chip can reduce the number of signal switches, thereby reducing the complexity and power consumption of signal processing.

[0015] Moreover, there is no level transition during the duration of the CP and between the CP and the first OOK chip. In this way, since the receiving end does not need to process the complex signal correction problem caused by the level transition, the signal processing process at the receiving end can be simplified.

[0016] In a possible implementation, the first message includes first information, and the first information is used to indicate the chip length of each data chip and / or the chip length of the parity check chip among multiple data chips.

[0017] In this way, through the first information, the receiving end can determine the chip length of each data chip and the chip length of the parity check chip based on the chip length of each data chip and / or the chip length of the parity check chip.

[0018] In a possible implementation, the first message includes a preamble, and the first information is carried in the preamble.

[0019] In this way, by accurately indicating the chip length, the AIoT device can perform signal synchronization and decoding more accurately, reducing the bit error rate and improving the reliability of communication.

[0020] Moreover, usually, the receiving end can receive the information in the preamble earlier, so that the receiving end can determine the chip length of each data chip and / or the chip length of the parity check chip among multiple data chips earlier, thus facilitating the correct reception of the first message by the receiving end.

[0021] In a possible implementation, the number of multiple data chips is even; and / or, the number of parity check chips is one.

[0022] In this way, the even number of data chips helps to more evenly allocate spectrum resources, reduce spectrum waste, and improve spectrum utilization. A single parity check chip can simplify the signal processing flow, reducing the complexity and computational burden of the system.

[0023] Second aspect, an embodiment of the present application provides a signal transmission method. The method includes: receiving a first message in a first time-domain resource; wherein, the first time-domain resource includes a first time unit, and the first time unit corresponds to a plurality of data chips and a parity check chip; when the electrical level states of the first data chip and the last data chip among the plurality of data chips are the same, the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

[0024] In a possible implementation, the method may be executed by a second communication device, and the second communication device may be understood as an AIoT device. And the second communication device may be the AIoT device itself, or a component applied to the AIoT device (for example, a chip, a chip system, a circuit, software, and / or a hardware module, etc.).

[0025] In a possible implementation, when the electrical level states of the first data chip and the last data chip are different, the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix.

[0026] In a possible implementation, when the electrical level states of the first data chip and the last data chip are the same, on the premise that the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix, the chip lengths of the plurality of data chips are set to the maximum value.

[0027] In a possible implementation, the electrical level state of the cyclic prefix is the same as that of the parity check chip; the electrical level state of the parity check chip is the same as that of the first data chip.

[0028] In a possible implementation, the first message includes first information, and the first information is used to indicate the chip length of each data chip and / or the chip length of the parity check chip among the plurality of data chips.

[0029] In a possible implementation, the first message includes a preamble, and the first information is carried in the preamble.

[0030] In a possible implementation, the number of the plurality of data chips is an even number; and / or, the number of the parity check chips is one.

[0031] In a third aspect, a communication device is provided. This communication device can be used as the first communication device in the first aspect, and this communication device can be a reader, or a device in the reader (such as a chip, or a chip system, or a circuit, for example, a circuit or chip in the reader responsible for communication functions (such as a Modem chip, also known as a baseband chip, or a system on chip (SoC) chip or a system in package (SIP) chip containing a modem core), etc.), or a device that can be used in combination with an AIoT device, or a logical module or software that can implement all or part of the reader functions. Alternatively, this communication device can be used as the second communication device in the second aspect, and this communication device can be an AIoT device, or a device in the AIoT device (such as a chip, or a chip system, or a circuit), or a device that can be used in combination with a reader, or a logical module or software that can implement all or part of the AIoT device functions.

[0032] In a possible implementation, the communication device may include modules or units corresponding one by one to the methods / operations / steps / actions described in any aspect of the first aspect, or the methods / operations / steps / actions described in any aspect of the second aspect. These modules or units can be hardware circuits, software, or a combination of hardware circuits and software.

[0033] In a possible implementation, the communication device is used as the first communication device in the first aspect. The communication device may include a processing unit and a transceiver unit. The processing unit is used to determine a first message; the transceiver unit is used to send the first message in a first time-domain resource.

[0034] Alternatively, the communication device is used as the second communication device in the second aspect. The communication device may include a transceiver unit. The transceiver unit is used to receive the first message in a first time-domain resource.

[0035] In a fourth aspect, an embodiment of the present application provides an electronic device, including a processor and a memory. The memory is used to store code instructions, and the processor is used to run the code instructions to execute the methods described in the first aspect or any possible implementation manner of the first aspect, or execute the methods described in the second aspect or any possible implementation manner of the second aspect.

[0036] In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium. A computer program or instruction is stored in the computer-readable storage medium. When the computer program or instruction runs on a computer, the computer is caused to execute the methods described in the first aspect or any possible implementation manner of the first aspect, or execute the methods described in the second aspect or any possible implementation manner of the second aspect.

[0037] In a sixth aspect, an embodiment of the present application provides a computer program product including a computer program. When the computer program runs on a computer, it causes the computer to execute the method described in the first aspect or any possible implementation manner of the first aspect, or execute the method described in the second aspect or any possible implementation manner of the second aspect.

[0038] In a seventh aspect, the present application provides a chip or a chip system. The chip or the chip system includes at least one processor and a communication interface. The communication interface and the at least one processor are interconnected by a line. The at least one processor is configured to run a computer program or instruction to execute the method described in the first aspect or any possible implementation manner of the first aspect, or execute the method described in the second aspect or any possible implementation manner of the second aspect. Among them, the communication interface in the chip can be an input / output interface, a pin, a circuit, etc.

[0039] In a possible implementation, the chip or the chip system described above in the present application further includes at least one memory, and instructions are stored in the at least one memory. The memory can be a storage unit inside the chip, such as a register, a cache, etc., or it can be a storage unit of the chip (such as a read-only memory, a random access memory, etc.).

[0040] It should be understood that the second aspect to the seventh aspect of the present application correspond to the technical solutions of the first aspect of the present application. The beneficial effects obtained by each aspect and the corresponding feasible implementation manners are similar and will not be elaborated here. Description of the Drawings

[0041] Figure 1 Schematic diagram of the first communication system applied to the embodiment of the present application;

[0042] Figure 2 Schematic diagram of the second communication system applied to the embodiment of the present application;

[0043] Figure 3 Schematic diagram of an OFDM symbol provided by the embodiment of the present application;

[0044] Figure 4 Schematic diagram of a signal transmission method;

[0045] Figure 5 Schematic diagram of another signal transmission method;

[0046] Figure 6 Schematic diagram of yet another signal transmission method;

[0047] Figure 7 Schematic diagram of a signal transmission method provided by the embodiment of the present application;

[0048] Figure 8 Schematic diagram of another signal transmission method provided by an embodiment of the present application;

[0049] Figure 9 Interaction schematic diagram between a reader and an AIoT device provided by an embodiment of the present application;

[0050] Figure 10 Schematic block diagram of a signal transmission device provided by an embodiment of the present application;

[0051] Figure 11 Schematic block diagram of another signal transmission device provided by an embodiment of the present application. Detailed implementation manners

[0052] Next, the technical solutions in the present application will be described in conjunction with the accompanying drawings.

[0053] In the embodiments of the present application, terms such as "first" and "second" are used to distinguish identical or similar items with basically the same functions and effects. For example, the first value and the second value are only used to distinguish different values, and do not limit their order. Those skilled in the art can understand that terms such as "first" and "second" do not limit the quantity and execution order, and terms such as "first" and "second" do not necessarily mean different.

[0054] It should be noted that in the embodiments of the present application, words such as "exemplary" or "for example" are used to represent examples, illustrations or explanations. Any embodiment or design solution described as "exemplary" or "for example" in the present application should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Exactly speaking, using words such as "exemplary" or "for example" is intended to present related concepts in a specific manner.

[0055] In the embodiments of the present application, "at least one" means one or more, and "a plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone, where A and B can be singular or plural. The character " / " generally means that the front and rear associated objects are in an "or" relationship. "At least one (item)" or its similar expression refers to any combination of these items, including any combination of single item (item) or plural items (items). For example, at least one (item) of a, b, or c can represent: a, b, c, a - b, a - c, b - c, or a - b - c, where a, b, and c can be single or multiple.

[0056] The technical solution of the embodiment of the present application can be applied to various communication systems, such as: Long Term Evolution (LTE) system, LTE Frequency Division Duplex (FDD) system, LTE Time Division Duplex (TDD), Universal Mobile Telecommunication System (UMTS), Worldwide Interoperability for Microwave Access (WiMAX) communication system, 5th Generation (5G) system or New Radio (NR), and future evolved communication systems.

[0057] The electronic device in the embodiment of the present application can also be referred to as: User Equipment (UE), Mobile Station (MS), Mobile Terminal (MT), access terminal, user unit, user station, mobile station, mobile terminal, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication device, user agent or user device, etc.

[0058] An electronic device can be a device that provides voice / data connectivity to users. For example, it can be a handheld device, a vehicle-mounted device, etc. with wireless connection capabilities. Currently, some examples of electronic devices include: mobile phones, tablet computers, laptop computers, palmtop computers, mobile internet devices (MIDs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grid, wireless terminals in transportation safety, wireless terminals in smart city, wireless terminals in smart home, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices, or other processing devices connected to a wireless modem, vehicle-mounted devices, wearable devices, electronic devices in a 5G network, or electronic devices in a future evolved public land mobile network (PLMN), etc. This application is not limited thereto.

[0059] By way of example and not limitation, in the present application, the electronic device may be an electronic device in an Internet of Things (IoT) system. The Internet of Things is an important part of the future development of information technology. Its main technical feature is to connect objects to the network through communication technology, so as to realize an intelligent network of human-machine interconnection and thing-thing interconnection. Exemplarily, the electronic device in the embodiments of the present application may be a wearable device. A wearable device, also known as a wearable intelligent device, is a general term for devices developed by applying wearable technology to the intelligent design of daily wear, such as glasses, gloves, watches, clothing, and shoes. A wearable device is a portable device that can be directly worn on the body or integrated into the user's clothes or accessories. A wearable device is not only a hardware device, but can also achieve powerful functions through software support, data interaction, and cloud interaction. Broadly speaking, wearable intelligent devices include those with complete functions and large sizes that can achieve complete or partial functions without relying on a smartphone, such as smart watches or smart glasses, etc., and those that only focus on a certain type of application function and need to cooperate with other devices such as smartphones, such as various smart bracelets and smart jewelry for vital sign monitoring.

[0060] By way of example and not limitation, in the embodiments of the present application, the electronic device may also be an electronic device in machine type communication (MTC). In addition, the electronic device may also be an in-vehicle module, in-vehicle module group, in-vehicle component, in-vehicle chip, or in-vehicle unit, etc. that is built into a vehicle as one or more components or units. The vehicle can implement the method provided in the present application through the built-in in-vehicle module, in-vehicle module group, in-vehicle component, in-vehicle chip, or in-vehicle unit, etc. Therefore, the embodiments of the present application can also be applied to vehicle networking, such as vehicle-to-everything (V2X), long term evolution-vehicle (LTE-V), vehicle-to-vehicle (V2V) technology, etc.

[0061] The network device involved in this application can be a device that communicates with an electronic device. This network device can also be referred to as an access network device or a radio access network device. It can be a transmission reception point (TRP), or an evolved NodeB (eNB or eNodeB) in an LTE system, or a home evolved NodeB (e.g., home evolved NodeB, or home Node B, HNB), a base band unit (BBU), or a radio controller in a cloud radio access network (CRAN) scenario. Or this network device can be a relay station, an access point, a vehicle-mounted device, a wearable device, and a network device in a 5G network or a network device in a future evolved PLMN network, etc. It can also be an access point (AP) in a WLAN, or a gNB in an NR system. The above network devices can also be urban base stations, micro base stations, pico base stations, femto base stations, etc. This application does not make any limitations in this regard.

[0062] For ease of understanding, some technical terms involved in this application are introduced first.

[0063] 1. Ambient Internet of Things (AIoT)

[0064] It is a type of Internet of Things (IoT) technology. It can integrate various IoT devices into our daily environment.

[0065] 2. AIoT device

[0066] An AIoT device is a device composed of coupling elements and chips. Each AIoT device has a unique identifier, such as an electronic code, etc. This identifier enables each AIoT device to be independently identified and managed in the network.

[0067] It should be understood that an AIoT device can also be referred to as an A-IoT device, a tag, an electronic AIoT device, an AIoT tag, a smart AIoT device, a transponder, a data carrier, or a device, etc. This application does not make specific limitations in this regard. For ease of understanding, the following description uses an AIoT device as an example.

[0068] According to different functions and applications, AIoT devices can be divided into two types: type 1 AIoT devices and type 2 AIoT devices.

[0069] 3. AIoT Devices of Type 1

[0070] The AIoT device of Type 1 is a device with extremely low power consumption, and its output power consumption is about 1 microwatt (μW). This type of device transmits information to other devices by reflecting an externally provided carrier wave (CW), and this way of transmitting information to other devices can also be called backscatter.

[0071] It should be understood that the AIoT device of Type 1 can also be called AIoT device 1 or device 1, etc., and this application does not make specific limitations on this.

[0072] 4. AIoT Devices of Type 2

[0073] The output power consumption of the AIoT device of Type 2 generally does not exceed several hundred μW. This type of device can achieve downlink and / or uplink power amplification and has a wide frequency modulation range, making signal transmission more flexible and efficient.

[0074] The AIoT device of Type 2 can generate and transmit signals in two ways. The AIoT device that transmits signals by reflecting an externally provided carrier wave is called device 2a. This type of device uses backscatter technology to send information and is suitable for scenarios with low power consumption and efficient energy utilization. The AIoT device that can generate signals internally is called device 2b. This type of device has the ability to actively generate signals and is suitable for application scenarios that require higher signal strength and a larger transmission range.

[0075] It should be understood that device 2a can also be called AIoT device 2a or the AIoT device of type 2a, etc., and device 2b can also be called AIoT device 2b or the AIoT device of type 2b, etc. This application does not make specific limitations on the names of this type of AIoT device.

[0076] 5. Reader

[0077] It is usually used to read (and sometimes write) the information of AIoT devices. It exchanges data with AIoT devices through wireless communication to obtain the information on the AIoT devices, or in another possible case, writes new data to the AIoT devices. Common readers are of two types: handheld and fixed.

[0078] It should be understood that the reader can also be called a reading device, a scanner, a read head, a communicator, or a reader / writer, etc., and the specific name depends on its function and application scenario. For example, if the device supports wireless data rewriting, it can be called a reader / writer. This application does not make specific limitations on this.

[0079] 6. R2D

[0080] It is a communication method for a reader to send information to an AIoT device, which can also be understood as downlink communication.

[0081] 7. D2R

[0082] It is a communication method for an AIoT device to send information to a reader, which can also be understood as uplink communication.

[0083] 8. Orthogonal Frequency Division Multiplexing (OFDM)

[0084] OFDM is a digital multi-carrier modulation technology widely used in communication systems. OFDM divides the available spectrum into multiple narrow sub-carriers, and each sub-carrier is orthogonal to each other in the frequency domain.

[0085] 9. Cyclic Prefix (CP)

[0086] CP is a replicated part of the front section of the time domain in each OFDM symbol, and CP is obtained by replicating the tail of the symbol.

[0087] 10. On-Off Keying (OOK)

[0088] OOK is a digital modulation technology, which is a form of Amplitude Shift Keying (ASK). OOK represents binary data through the on-off state of the signal.

[0089] In OOK, binary "1" indicates the presence of the carrier signal, while binary "0" indicates the absence of the carrier signal. That is, when sending "1", the carrier signal is modulated and transmitted; when sending "0", the signal channel is closed and no carrier signal is transmitted. Therefore, OOK is suitable for low-power and low-cost wireless communication systems.

[0090] 11. Preamble

[0091] It is a specific bit sequence located at the beginning of a data frame or data packet, and its main function is to provide synchronization information for the receiving end so that the receiving end can correctly identify and decode the subsequent data.

[0092] 12. Clock-Acquisition Part (CAP)

[0093] It refers to a stage or component for clock acquisition and synchronization, and its main function is to enable the receiving device to accurately synchronize the clock signal of the sending device.

[0094] To facilitate the understanding of the embodiments of the present application, the following will describe in detail a communication system (AIoT system) including AIoT devices in conjunction with Figure 1 and Figure 2 Figure 2 .

[0095] Figure 1 FIG. 10 is a schematic diagram of a first communication system 100 applied to the embodiments of the present application. The communication system 100 includes at least one reader, such as Figure 1 the network device 110 shown in FIG. 11; the communication system 100 may further include at least one AIoT device, such as Figure 1 the AIoT device 120 shown in FIG. 12. The AIoT device 120 may be device 1 or device 2a, that is, the AIoT device 120 transmits signals in a backscatter manner, and the specific selection depends on the application scenario and requirements; in addition, the communication system 100 may further include at least one CW device (or CW node), such as Figure 1 the electronic device 130 shown in FIG. 13.

[0096] Wherein, data can be transmitted between the network device 110 and the electronic device 130 through a wireless link. The wireless link may adopt various wireless communication technologies, such as Wi-Fi, Bluetooth, or other protocols suitable for specific application scenarios.

[0097] In a possible case, the network device 110 may be used as a transmitter, and the electronic device 130 may be used as a receiver, and the network device 110 transmits a downlink signal to the electronic device 130. In another possible case, the electronic device 130 may be used as a transmitter, and the network device 110 may be used as a receiver, and the electronic device 130 transmits an uplink signal to the network device 110.

[0098] It can be understood that in the communication system 100, the network device 110 can be understood as a device operating in a small range, and this small-range working mode is usually used to provide wireless coverage in a local area to achieve efficient communication services. The electronic device 130 can be understood as an auxiliary electronic device or an auxiliary UE of the network device 110. Therefore, the electronic device 130 can transmit a carrier based on the indication of the network device 110.

[0099] In communication system 100, communication can also occur between network device 110 and AIoT device 120. In one possible scenario, electronic device 130 sends a carrier signal to AIoT device 120. After AIoT device 120 receives the carrier signal, it transmits an uplink signal (or reflected signal) to network device 110 by reflecting the carrier signal. In another possible scenario, network device 110 can act as the transmitter, and AIoT device 120 can act as the receiver, with network device 110 transmitting a downlink signal to AIoT device 120.

[0100] Figure 2 FIG. is a schematic diagram of the second communication system 200 to which the embodiments of the present application are applied. Communication system 200 includes at least one reader, such as Figure 2 the network device 210 shown in ; this communication system 200 may also include at least one AIoT device, such as Figure 2 the AIoT device 220 shown in, and the AIoT device 220 can be device 2b, that is, the AIoT device 220 can generate signals internally.

[0101] Among them, data transmission can occur between network device 210 and AIoT device 220 via a wireless link. In one possible scenario, network device 210 can act as the transmitter, and AIoT device 220 can act as the receiver, with network device 210 transmitting a downlink signal to AIoT device 220. In another possible scenario, AIoT device 220 can act as the transmitter, and network device 210 can act as the receiver, with AIoT device 220 transmitting an uplink signal to network device 210.

[0102] It should be understood that in communication system 100 and communication system 200, the communication method between one reader and one AIoT device is exemplarily shown. Optionally, communication system 100 and communication system 200 may also include multiple readers and / or multiple AIoT devices, and the embodiments of the present application do not make specific limitations in this regard.

[0103] In addition, each communication device in the above communication systems can be configured with multiple antennas. The multiple antennas include at least one transmitting antenna for signal transmission and one receiving antenna for signal reception. Each communication device can also be equipped with a transmitter chain and a receiver chain. Those of ordinary skill in the art can understand that they can both include multiple components related to signal transmission and reception, such as processors, modulators, multiplexers, demodulators, demultiplexers, or antennas, etc. Therefore, communication between communication devices can occur through multi-antenna technology.

[0104] Optionally, other network entities such as a network controller and a mobility management entity may also be included in communication system 100 and communication system 200. The embodiments of the present application do not make specific limitations thereto.

[0105] It should be understood that the methods provided by the embodiments of the present application are applicable to various communication systems, including 5G NR systems, 5.5G systems, etc. Figure 1 and Figure 2 The communication systems shown are only examples. The present application does not limit the specific architecture of the applicable systems, nor the quantity and form of various devices within each communication system.

[0106] The AIoT communication system has the characteristic of low power consumption. In order to balance high spectral efficiency and ultra-low power consumption reception requirements, in the AIoT communication system, a modulation method combining OFDM and OOK can be adopted to modulate signals.

[0107] When modulating by combining OFDM and OOK, multiple subcarriers in one OFDM symbol can be regarded as one OOK chip, that is, one OOK chip can contain multiple carrier signals. For each subcarrier in one OOK chip, OOK modulation can be used. Among them, the OOK chip can also be referred to as a data chip.

[0108] Exemplarily, as Figure 3 shown, taking one OFDM symbol corresponding to 4 OOK chips as an example, since data can be transmitted through multiple subcarriers within the duration of one OFDM symbol, such as 128, 256, etc., which can be determined based on the subcarrier spacing, one OOK chip corresponds to multiple subcarriers. For example, if data can be transmitted through 128 subcarriers within the duration of one OFDM symbol, then one OOK chip corresponds to 32 subcarriers. The subcarrier data corresponding to one OOK chip can also be understood as the length of the OOK chip, such as being called the chip length, data chip length, etc.

[0109] It can be understood that the level state of the OOK chip can determine the actual data bits to be transmitted. For example, in combination with Figure 3 , 4 OOK chips correspond to "0110". When using these four level states of "0110" to represent data bits, assuming no other coding method is used for coding, "0" in "0110" represents bit 0, and "1" in "0110" represents bit 1. However, if other coding methods are used for coding, such as Manchester coding, "01" in "0110" represents bit 0, and "10" in "0110" represents bit 1.

[0110] It should be noted that, in actual application scenarios, whether to adopt encoding and what encoding method to adopt are determined according to specific circumstances. The "0110" here only represents the level state and is not limited to bits. The embodiments of the present application do not make specific limitations on this.

[0111] However, when using the combination of OFDM and OOK for communication, the signal reaches the receiving end through multiple paths, and each path may introduce different time delays. This time delay difference may cause the signals to overlap during reception, thereby causing inter-symbol interference (ISI). By introducing CP in the OFDM symbol, video synchronization can be maintained and the impact of this interference can be significantly reduced.

[0112] In the current communication technology that combines the use of OFDM and OOK, there are two types of methods for processing CP in the OFDM symbol: Method Type1 and Method Type2.

[0113] Method Type1: For R2D transmission, the CP is removed at the AIoT device (receiving end), and there are no specific requirements for the reader (sending end). However, in this method, since the initial sampling frequency offset of the AIoT device (device 1, device 2a, and device 2b) usually needs to be between 10 4 and 10 5 ppm. The AIoT device needs to have precise time-frequency synchronization capabilities and needs to calculate the sampling rate of the received signal for processing before detecting the timing information. Since the AIoT device is usually a low-power and low-complexity device, this method has too high requirements for the computing power and power consumption of the AIoT device.

[0114] Method Type2: It is processed on the reader side. For example, the reader sets the CP in the transmitted signal so that the CP does not cause incorrect level changes between the last OOK chip of the previous OFDM symbol and the first OOK chip of the next OFDM symbol.

[0115] Among them, the incorrect level change can also be understood as an incorrect rising / falling edge, or as an incorrect edge or spurious edge. The incorrect level change can refer to the incorrect determination of the OOK switch state due to the channel multipath effect and the timing problem of the OFDM symbol-to-symbol handover. For example, the last OOK chip of the previous OFDM symbol corresponds to the high level state "1"; the first OOK chip of the next OFDM symbol corresponds to the low level state "0". Due to the channel multipath effect, the energy (or power, etc.) of the last OOK chip of the previous OFDM symbol that arrives at the receiving end with a delay may leak into the time window corresponding to the first OOK chip of the next OFDM symbol, resulting in the AIoT device (receiving end) incorrectly determining the first OOK chip of the next OFDM symbol corresponding to the low level state "0" as the high level state "1". By inserting CP between two OFDM symbols, the incorrect level change can be reduced.

[0116] This method reduces the requirement for the time-frequency synchronization ability of the AIoT device and is more suitable for the AIoT communication system.

[0117] It can be understood that the OOK chip can also be called a data chip, a chip, a spreading chip, or a pseudo-random chip, etc. In a wireless communication system, the spreading technology transmits data by spreading the signal over a spectrum wider than the original bandwidth, and the data chip is the basic unit for realizing this expansion.

[0118] Method Type2 includes two methods: Method 1 (Alt1) and Method 2 (Alt2).

[0119] Among them, in Alt1, it is required to maintain the orthogonality of the subcarriers, that is, by replicating a part of the end of the OFDM symbol to form the CP, so that each subcarrier in the frequency domain will not interfere with each other even if they are closely adjacent in the spectrum. In Alt2, the orthogonality of the subcarriers is not maintained, which destroys the hybrid modulation process of the discrete Fourier transform (DFT) and OFDM, and there may be interference between subcarriers in the frequency domain.

[0120] For Alt1, it can be implemented in two ways, namely Alt1-1 and Alt1-2.

[0121] Among them, in Alt1-1, at least one parity-check chip is added after the OOK chip corresponding to the OFDM symbol, so that an OFDM symbol can correspond to multiple OOK chips and at least one parity-check chip located at the end position. In Alt1-2, no check chip is added. The method of Alt1-2 may introduce a level jump, while no level jump may occur in Alt1-1. The reasons are as follows.

[0122] For ease of understanding, it should be noted first that the CP is obtained by copying the sample sequence at the tail of the symbol. That is, the CP has the same level state as the last chip in the OFDM symbol. In Alt1-1, the last chip in the OFDM symbol is a parity check chip. By making the level state of this parity check chip the same as that of the first OOK chip in the OFDM symbol, the level state of the CP obtained by copying this parity check chip is the same as that of the first OOK chip in the OFDM symbol.

[0123] For example, an OFDM symbol includes 4 OOK chips and 1 parity check chip. The level state of the first OOK chip is the high level state "1"; then the parity check chip has the same level state as the first OOK chip, which is also the high level state "1". Then the level state of the CP obtained by copying the parity check chip is the high level state "1", so that there is no level transition between the CP and the first OOK chip, which can reduce spectral leakage, improve orthogonality, enable the CP to effectively reduce inter-symbol interference, and improve data transmission efficiency.

[0124] It can be understood that the parity check chip can also be referred to as a parity check bit, a check bit, or a redundant bit, etc., and can be used to carry or transmit parity check codes. Parity check is a basic error detection method, which can keep the data intact and error-free during transmission.

[0125] In Alt1-2, no parity check chip is introduced, and one OFDM symbol corresponds to multiple OOK chips. When the level state of the first OOK chip is different from that of the last OOK chip, since the CP is obtained by copying the sample corresponding to the last OOK chip, the CP has the same level state as the last OOK chip, so the level state of the CP is different from that of the first OOK chip, resulting in a level transition between the CP and the first OOK chip.

[0126] Therefore, in the AIoT system, R2D transmission can be carried out in the manner of Alt1-1. And there are currently the following solutions. The following takes an OFDM symbol corresponding to M OOK chips and N parity check chips as an example for description.

[0127] Wherein, M is a positive integer, and M is usually an even number; N is a positive integer.

[0128] In one case, when M is less than or equal to 8, N can take the value of 1.

[0129] Exemplarily, such as Figure 4As shown, when M is 4 and N is 1, and the length of one OFDM symbol is 128, the length of the CP is usually 9 or 10. In addition, since the CP is obtained by replicating the parity check chips carrying the parity check code, the chip length of the parity check chips is usually greater than or equal to the length of the CP. Therefore, when the length of the CP is 9 (or 10), the chip length of the parity check chips is usually greater than or equal to 9 (or 10).

[0130] Among them, the length of the OFDM symbol being 128 can also be understood as one OFDM symbol consisting of 128 sampling points, that is, including 128 sampling numbers. These 128 sampling numbers can be sampled at a sampling rate of 1.92 MHz. It can be understood that in actual application scenarios, the length of the OFDM symbol can also be replaced by others, and the embodiments of the present application do not make specific limitations on this.

[0131] Generally, the OOK chips correspond to the effective information actually required to be transmitted. Therefore, in order to increase the number of payload bits of the actually transmitted data and improve the data transmission efficiency, on the premise that the chip length of the parity check chips is greater than or equal to the length of the CP, the chip length of the OOK chips can be made as long as possible.

[0132] Since the number of OOK chips is 4, and the chip length of the parity check chips needs to be greater than or equal to the length of the CP, the chip length of one OOK chip needs to be less than (128 - the length of the CP) / 4. Then the chip length of the OOK chips can be 29. In this way, the chip length of the parity check chips is 128 - 29×4 = 12, and the chip length of the parity check chips is greater than the length of the CP (9 or 10).

[0133] In addition, in Figure 4 the OFDM symbol shown in (a) or Figure 4 the (b) of, the level state of the first OOK chip is 0. Therefore, the level state of the parity check chips is also 0. Since the CP is obtained by replicating the sequence corresponding to the parity check chips, the level state of the CP is consistent with the level state of the parity check chips. In this way, there will be no level jump between the duration of the CP and the first OOK chip of the OFDM symbol, which can simplify the synchronization and signal processing processes at the receiving end and reduce interference.

[0134] In this way, regardless of whether the level states corresponding to the first OOK chip and the last OOK chip among the 4 OOK chips are the same, since the level state of the CP is the same as the level state of the parity check chips, the level state of the CP is the same as that of the first OOK chip, and there is no level jump. For example, Figure 4In (a), the level states corresponding to the 4 OOK chips are "0101", and the level states corresponding to the first OOK chip and the last OOK chip are different; Figure 4 In (b), the level states corresponding to the 4 OOK chips are "0110", and the level states corresponding to the first OOK chip and the last OOK chip; In both implementations, the level state of the CP is the same as the level state of the parity check chip.

[0135] In another case, when M is greater than 8, the value of N can be greater than 1, for example, 2.

[0136] Exemplarily, as Figure 5 shown, when M is equal to 14 and N is equal to 2, the chip lengths of the two parity check chips are twice the chip length of one OOK chip, and the chip length of the last parity check chip is greater than or equal to the length of the CP.

[0137] As Figure 5 shown in (a), when the length of an OFDM symbol is 128, the length of the CP is usually 9 or 10. Since the number of OOK chips is 14, and since the total length of the two parity check chips is twice the chip length of one OOK chip, the length of the entire OFDM symbol needs to be greater than or equal to 16 times the chip length of the OOK chip. The chip length (x) of the OOK chip satisfies: 128 - 16×x≥0. Therefore, the chip length of the OOK chip can be 8.

[0138] Since the CP is a copy of the sample sequence at the end of the OFDM symbol, and no level transition should be introduced between the CP and the first OOK chip, the level states of the CP and the last parity check chip are the high level state "1". And since the chip length of the second parity check chip is greater than or equal to 10, the chip length of the last parity check chip can be 10 for example, and the chip length of the first parity check chip is 16 - 10 = 6.

[0139] It should be understood that the chip lengths of the two parity check chips are only examples. The chip length of the last parity check chip can also be 11 for example, and the chip length of the first parity check chip is 5. The embodiments of the present application do not make specific limitations on this.

[0140] It can be understood that the level states of the CP and the last parity check chip are the same as the level state of the first OOK chip, both being the high level state "1". For the first parity check chip, it can be different from the level state of the last OOK chip to distinguish the OOK chip from the parity check chip.

[0141] As Figure 5As shown in (b) therein, the length of the OFDM symbol is 128, and the chip lengths of its CP, OOK chips, and parity check chips are the same as those in Figure 5 in (a). The method for setting the levels of the parity check chips and the CP can refer to the level setting method shown in (a) in Figure 5 , and will not be elaborated here.

[0142] Figure 5 Figures (a) and (b) in

[0143] show the frame structure of an OFDM symbol containing two parity check chips. Compared with an OFDM symbol containing one parity check chip, the communication system requires more complex algorithms and more computing resources to process two parity check chips, thus increasing the implementation complexity and power consumption of the system.

[0144] To reduce the decoding difficulty, reduce the system complexity, and reduce the power consumption at the receiving end, when M is equal to 14, N can also be set to 1, and the chip length of the parity check chip is greater than or equal to the length of the CP.

[0144] As Figure 6 shows, when the length of an OFDM symbol is 128, the length of the CP is usually 9 or 10. Since the number of OOK chips is 14, and the chip length of the parity check chip needs to be greater than or equal to the length of the CP, the chip length of one OOK chip needs to be less than (128 - the length of the CP) / 14. Then the chip length of the OOK chip can be 8, and the chip length of the parity check chip is 128 - 8×14 = 16.

[0145] In the OFDM symbol shown in Figure 6 , the level state of the first OOK chip is 0. Therefore, the level state of the parity check chip is also 0. Since the CP is obtained by copying the sequence corresponding to the parity check chip, the level state of the CP is the same as that of the parity check chip.

[0146] Compared with the OFDM symbols shown in (a) and (b) in Figure 5 , the OFDM symbol shown in Figure 6 only contains one parity check chip, which enables the communication system to simplify the encoding and decoding processes during processing, thus reducing the implementation complexity and power consumption of the system.

[0147] It can be understood that in the OFDM symbols shown in (a) and (b) in Figure 4 , the chip length of the parity check chip is 12, accounting for 9.4% of the length of one OFDM symbol. In contrast, in the OFDM symbols shown in (a) and (b) in Figure 5 and Figure 6 , the chip length of the parity check chip increases to 16, accounting for 12.5% of the length of one OFDM symbol.

[0148] Since the actual effective data to be transmitted is transmitted through OOK chips, however, in the frame structures of several OFDM symbols shown above Figures 5 to 6 Among the frame structures of the several OFDM symbols shown, the parity check chips occupy a relatively large proportion of the OFDM symbol length, which means that during the OFDM symbol duration, more time-domain resources are used to transmit this redundant information. And within the same bandwidth and time, the amount of data that can be transmitted is reduced, resulting in a decrease in the transmission efficiency of the actual data (or effective data). This situation is not conducive to data transmission in application scenarios that require high data rates, such as high-definition video streams or high-speed data downloads, etc.

[0149] Secondly, processing these parity check chips with a relatively large proportion may require longer encoding and decoding times. Because the parity check chips not only need to be generated at the sending end but also need to be verified and corrected at the receiving end. The complexity of this process will lead to an increase in the delay of the communication system, affecting the performance of real-time applications (such as online games and video conferencing, etc.).

[0150] In addition, in Figure 5 the OFDM symbols shown in (a) and (b) of, the number of parity check chips is 2. This configuration requires the communication system to use more complex algorithms and more computing resources to process multiple parity check chips, which not only increases the implementation complexity of the system but may also result in higher power consumption. For battery-powered electronic devices (such as smartphones and Internet of Things devices, etc.), the number of parity check chips can directly affect the battery life of the electronic device.

[0151] In view of this, an embodiment of the present application provides a signal transmission method. In an OFDM symbol, when the level states of the first OOK chip and the last OOK chip are the same, the sum of the chip length of the last OOK chip and the chip length of the parity check chip is greater than or equal to the length of the CP. In this way, compared with making the chip length of the parity check chip greater than the length of the CP, the proportion of the parity check chips in an OFDM symbol in the OFDM symbol can be reduced, thereby reducing the transmission overhead of redundant data. By reducing unnecessary parity check bits, more time-domain resources can be used for the transmission of effective data, and the data transmission efficiency can be improved.

[0152] In addition, by making an OFDM symbol contain one parity check chip, there will be no level transition during the duration of the parity check chip, and there will be no level transition during the duration of the CP and between the CP and the first OOK chip. In this way, since the receiving end does not need to process the complex signal correction problems brought about by the level transition, the signal processing process at the receiving end is simplified. The simplified signal processing not only improves the processing speed and efficiency of the receiving end but also reduces the complexity and power consumption of the system.

[0153] This signal transmission method enables the communication system to reduce the consumption of hardware resources and extend the service life of the device while maintaining efficient data transmission. Through such a design, the system achieves a good balance between performance and resource utilization.

[0154] Exemplarily, Figure 7 and Figure 8 are schematic diagrams of the signal transmission method provided by the embodiments of the present application. Figure 7 and Figure 8 In the method shown, an OFDM symbol contains a parity check chip, and when the level state of the first OOK chip in the OFDM symbol is the same as that of the last OOK chip, the proportion of the parity check chip is small.

[0155] Specifically, in the OFDM symbol, when the level states of the first OOK chip and the last OOK chip are the same, the sum of the chip lengths of the last OOK chip and the parity check chip is greater than or equal to the length of the CP; when the level states of the first OOK chip and the last OOK chip are different, the chip length of the parity check chip is greater than or equal to the length of the CP.

[0156] Exemplarily, taking M equal to 4 as an example, when the level of the first OOK chip in the OFDM symbol is the same as that of the last OOK chip, the sum of the chip lengths of the last OOK chip and the parity check chip is greater than or equal to the length of the CP.

[0157] As Figure 7 shown in (a) of, when the length of an OFDM symbol is 128, the length of the CP is usually 9 or 10. Since an OFDM symbol corresponds to 4 OOK chips and 1 parity check chip, in order to make the length greater than 0, the chip length of an OOK chip satisfies: (128 - 4 × chip length of the OOK chip) > 0, then the chip length of the OOK chip is less than 32.

[0158] Since the level state of the first OOK chip in this OFDM symbol is the same as that of the last OOK chip, it is necessary to satisfy that the sum of the chip lengths of the last OOK chip and the parity check chip is greater than or equal to the length of the CP. Then, in order to make the chip length of the OOK chip longer and thus improve the transmission efficiency of effective data, the chip length of the OOK chip can be the largest integer below 32, so the chip length of the OOK chip can be 31, and the chip length of the parity check chip is 128 - 31×4 = 4.

[0159] In Figure 7In the OFDM symbol shown in (a) thereof, since the CP is obtained by copying the parity check chips and the last OOK chip carrying sequence, in order to avoid level jumps during the duration of the CP, the level state of the parity check chips is the same as that of the last OOK chip. Then, since the CP is obtained by copying the parity check chips and the last OOK chip carrying sequence, the level states of the CP, the parity check chips, and the last OOK chip are the same. And the level state of the last OOK chip is the same as that of the first OOK chip, so the level state of the CP is the same as that of the first OOK chip, such that there is no level jump between the CP and the first OOK chip.

[0160] It can be understood that, in theory, Figure 7 in the OFDM symbol shown in (a) thereof, the length of the OOK chips can also be less than 31, but the length of the corresponding parity check chips is greater than 4. In this way, compared with the parity check chips with a length of 4, its overhead is greater, thereby reducing the number of payload bits for transmitting actual data and reducing the spectral efficiency.

[0161] The above describes the process of determining the chip lengths and level states of the CP, the OOK chips, and the parity check chips when the level state of the first OOK chip in the OFDM symbol is the same as that of the last OOK chip. The following describes the process of determining the chip lengths and level states of the CP, the OOK chips, and the parity check chips when the level state of the first OOK chip in the OFDM symbol is different from that of the last OOK chip.

[0162] Exemplarily, as Figure 7 shown in (b) thereof, the length of this OFDM symbol is 128, and the chip lengths of its CP, the OOK chips, and the parity check chips are the same as those of the OFDM symbols shown in (a) and (b) of Figure 4 . The method for setting the levels of the parity check chips and the CP can refer to the level setting method shown in (a) of Figure 5 , and will not be elaborated here.

[0163] The above describes the process of determining the chip lengths and level states of the CP, the OOK chips, and the parity check chips when M is equal to 4. The following describes the process of determining the chip lengths and levels of the CP, the OOK chips, and the parity check chips when M is equal to 14.

[0164] Exemplarily, as Figure 8 shown in (a) thereof, when the length of an OFDM symbol is 128, the length of the CP is usually 9 or 10.

[0165] Since one OFDM symbol corresponds to 14 OOK chips and one parity check chip, in order for the length to be greater than 0, the chip length of one OOK chip satisfies: (128 - 14 × chip length of OOK chip) > 0, so the chip length of the OOK chip is less than 9.14, that is, the chip length of the OOK chip is less than or equal to 9.

[0166] Since the number of OOK chips is 14 and the level state of the first OOK chip in this OFDM symbol is the same as that of the last OOK chip, it is necessary to make the sum of the chip length of one OOK chip and the chip length of the parity check chip greater than or equal to the length of the CP. In order to make the chip length of the OOK chip longer, thereby improving the transmission efficiency of the effective data, the chip length of the OOK chip can be 9, and the chip length of the parity check chip is 128 - 9 × 14 = 2.

[0167] In Figure 8 In the OFDM symbol shown in (a) of , since the CP is obtained by copying the parity check chip and the sequence carried by the last OOK chip, in order to prevent level jumps during the CP duration, the level state of the parity check chip is the same as that of the last OOK chip. Since the CP is obtained by copying the parity check chip and the sequence carried by the last OOK chip, the level states of the CP, the parity check chip, and the last OOK chip are the same. And the level state of the last OOK chip is the same as that of the first OOK chip, so the level state of the CP is the same as that of the first OOK chip, making there no level jump between the CP and the first OOK chip.

[0168] It can be understood that, theoretically, Figure 8 the chip length of the OOK chip in the OFDM symbol shown in (a) of can also be less than 9, but the chip length of the corresponding parity check chip is greater than 2. In this way, compared with the parity check chip with a length of 2, its overhead is greater, thereby reducing the number of payload bits for transmitting actual data and reducing the spectral efficiency.

[0169] When M is equal to 14 and the level state of the first OOK chip in the OFDM symbol is different from that of the last OOK chip, the chip length of the parity check chip is greater than or equal to the length of the CP.

[0170] As Figure 8 shown in (b) of , the length of this OFDM symbol is 128, and the chip lengths of its CP, OOK chips, and parity check chips are the same as those of the OFDM symbol shown in Figure 6 The method for setting the levels of the parity check chip and the CP can refer to the level setting method shown in (a) of Figure 5 and will not be elaborated here.

[0171] In a communication system, the reader side can indicate the chip length of the OOK chip and / or the chip length of the parity check chip to the AIoT device through the clock-acquisition part (CAP) in the preamble. Correspondingly, the device side can obtain the chip length of the OOK chip and / or the chip length of the parity check chip through the CAP.

[0172] In this way, since the AIoT device can receive the CAP in the preamble at an earlier time when receiving the signal from the reader, the AIoT device can determine the chip length of the OOK chip and / or the chip length of the parity check chip earlier, and thus can receive the information carried in the OOK chip and the parity check chip based on the chip length of the OOK chip and / or the chip length of the parity check chip.

[0173] Example 1: The CAP includes a synchronization sequence with a specific repetition pattern (such as a pseudo-random code or a specific bit combination, etc.).

[0174] The chip length of the OOK chip and / or the chip length of the parity check chip is determined based on the repetition times of the synchronization sequence or the length of the synchronization sequence.

[0175] For example, the chip length of the OOK chip and / or the chip length of the parity check chip can be: the repetition times of the synchronization sequence or the length of the synchronization sequence itself.

[0176] Or, the chip length of the OOK chip and / or the chip length of the parity check chip satisfies a conversion relationship 1 with the repetition times of the synchronization sequence or the length of the synchronization sequence. For example, the chip length of the OOK chip is N times the repetition times of the synchronization sequence, etc. The conversion relationship 1 can be predefined by the protocol or indicated by the reader to the AIoT device through signaling.

[0177] Example 2: Specific fields can be reserved in the CAP to indicate the chip length of the OOK chip and / or the chip length of the parity check chip to the AIoT device. For example, several bits are inserted at a fixed position in the CAP to indicate the chip length of the OOK chip and / or the chip length of the parity check chip in binary form. At the receiving end, the chip length of the OOK chip and / or the chip length of the parity check chip can be obtained by parsing this field.

[0178] It should be noted that the method of indicating the OOK chip length by using the clock acquisition part (CAP) in the preamble at the reader side as described above is only an example. In actual application scenarios, other methods can also be adopted to indicate the chip length of the OOK chip. The embodiments of the present application do not make specific limitations on this.

[0179] It can be understood that in the OFDM symbol shown in (a) in Figure 7 , when M is equal to 4 and the level state of the first OOK chip in the OFDM symbol is the same as that of the last OOK chip, the chip length of the parity check chip is 4, accounting for 3.1% of the OFDM symbol length. In contrast, Figure 4 in the OFDM symbol shown in (b) in

[0180] in Figure 8 , when M is equal to 14 and the level state of the first OOK chip in the OFDM symbol is the same as that of the last OOK chip, the chip length of the parity check chip is 2, accounting for 1.6% of the OFDM symbol length. In contrast, Figure 6 in the OFDM symbol shown in

[0181] , the chip length of the parity check chip accounts for 12.5% of the OFDM symbol length.

[0182] Furthermore, in the OFDM symbols shown in (a) and (b) in Figure 8 , there is one parity check chip. However, in the OFDM symbols shown in (a) and (b) in Figure 5 , there are two parity check chips. Reducing the number of parity check chips helps to reduce the implementation complexity of the communication system. This simplification not only makes the synchronization and signal processing processes at the receiving end more efficient, but also can reduce the power consumption of the system and extend the service life of the device.

[0183] Next, the information transmission method provided by the embodiments of the present application will be described in detail in conjunction with Figure 9 . As shown in Figure 9 , the method includes the following steps:

[0184] S901. The reader determines the first message.

[0185] The first message can be understood as the information transmitted between the reader and the AIoT device, or the message or signal sent by the reader to the AIoT device, and can also be referred to as R2D transmission, downlink transmission, downlink signal, or downlink message.

[0186] S902. The reader sends the first message to the AIoT device in the first time-domain resource. Correspondingly, the AIoT device receives the first message from the reader. The first time-domain resource includes a first time unit, and the first time unit corresponds to multiple data chips and a parity check chip; when the electrical level states of the first data chip and the last data chip among the multiple data chips are the same, the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

[0187] The first time-domain resource can be understood as the time-domain resource for transmitting the first message, and this time-domain resource can include one or more time units. A time unit can be, for example, one OFDM symbol as described above. The first time unit can be understood as any time unit in the first time-domain resource, such as any OFDM symbol. The data chip can be the OOK chip as described above. The cyclic prefix corresponding to the first time unit can be understood as the CP before the first time unit.

[0188] One OFDM symbol contains (or corresponds to) multiple OOK chips and one parity check chip, and when the electrical level states of the first OOK chip and the last OOK chip among the multiple OOK chips are the same, the sum of the chip length of the last OOK chip and the chip length of the parity check chip is greater than or equal to the length of the CP. For example, it is the OFDM symbol shown in (a) in Figure 7 and (a) in Figure 8 .

[0189] In Figure 7 the OFDM symbol shown in (a), the chip length of the OOK chip is 31, the sum of the chip length of the last OOK chip and the chip length of the parity check chip is 35, and the length of the CP is 9 or 10.

[0190] In Figure 8 the OFDM symbol shown in (a), the chip length of the OOK chip is 9, the sum of the chip length of the last OOK chip and the chip length of the parity check chip is 11, and the length of the CP is 9 or 10.

[0191] Based on multiple OFDM symbols, that is, through the first time-domain resource, the reader can send the first message to the AIoT device.

[0192] In the signal transmission method of the present application, when the level states of the first OOK chip and the last OOK chip in an OFDM symbol are the same, the sum of the chip length of the last OOK chip and the chip length of the parity check chip is greater than or equal to the length of the CP. In this way, compared with making the chip length of the parity check chip greater than or equal to the length of the CP, the proportion of the parity check chip in an OFDM symbol can be reduced, thereby reducing the transmission overhead of redundant data and effectively improving the data transmission efficiency.

[0193] In addition, in this method, an OFDM symbol includes a parity check chip. There is no level jump during the duration of the parity check chip, and there is no level jump during the duration of the CP and between the CP and the first OOK chip. In this way, since the receiving end does not need to process the complex signal correction problem caused by the level jump, the signal processing process of the receiving end is simplified.

[0194] The above describes the signal transmission process between the reader and the AIoT device. Next, an OFDM symbol is analyzed from the reader side.

[0195] In an OFDM symbol, the following two situations are included: The first is that the level states of the first OOK chip and the last OOK chip are the same. The second is that their level states are different (that is, the level states of the first OOK chip and the last OOK chip are different). In the second case, the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix. For example, as shown in (b) of Figure 7 and (b) of Figure 8 for the OFDM symbol.

[0196] Exemplarily, in the OFDM symbol shown in (b) of Figure 7 , the chip length of the parity check chip is 12, and the length of the CP is 9 or 10. In the OFDM symbol shown in (b) of Figure 8 , the chip length of the parity check chip is 16, and the length of the CP is 9 or 10.

[0197] When the level states of the first OOK chip and the last OOK chip are different, the proportion of the parity check chip in the OFDM symbol is slightly higher than the case when the level states are the same.

[0198] In this way, a level state is maintained during the duration of the CP and between the CP and the first OOK chip, thereby simplifying the signal processing process of the receiving end (AIoT device).

[0199] In addition, when the level states of the first data chip and the last data chip are the same, on the premise that the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix, the chip lengths of multiple data chips are set to the maximum value.

[0200] For example, in the OFDM symbol shown in (a) in Figure 7 , the chip length of the OOK chip needs to be less than 32. To reduce the overhead of the parity check chip, the chip length of the OOK chip can be set to the maximum value, which is 31. In the OFDM symbol shown in (a) in Figure 8 , the chip length of the OOK chip is less than 9.14, that is, the chip length of the OOK chip is less than or equal to 9. To reduce the overhead of the parity check chip, the chip length of the OOK chip can be set to the maximum value, which is 9.

[0201] In this way, within the same bandwidth and time (or OFDM symbol), more valid data can be transmitted, and the resource overhead for transmitting the parity check code can be reduced.

[0202] Based on the above embodiments, to ensure that there is no level transition during the CP duration and between the CP and the first OOK chip, the level state of the CP is the same as that of the parity check chip; the level state of the parity check chip is the same as that of the first data chip.

[0203] For example, in the OFDM symbol shown in (a) in Figure 7 , the level states of the parity check chip and the first data chip are the same, both being the low level state "0", and the level state of the CP is the same as that of the parity check chip, both being the low level state "0".

[0204] In Figure 8 , the level states of the parity check chip and the first data chip are the same, both being the high level state "1", and the level state of the CP is the same as that of the parity check chip, both being the high level state "1".

[0205] In this way, by maintaining a consistent level state between the CP and the first OOK chip, the number of signal switches can be reduced, thereby reducing the complexity and power consumption of signal processing.

[0206] It should be noted that the above first message includes first information, which is used to indicate the chip length of each data chip among multiple data chips and / or the chip length of the parity check chip. Exemplarily, the first information includes a preamble, and the first information is carried in the preamble.

[0207] The first piece of information is, for example, the CAP in the preamble. The reader can indicate the chip length of the OOK chips and / or the chip length of the parity check chips to the AIoT device through the CAP. Correspondingly, the device can obtain the chip length of the OOK chips and / or the chip length of the parity check chips through the CAP.

[0208] In this way, by accurately indicating the chip length, the AIoT device can perform signal synchronization and decoding more accurately, reducing the bit error rate and improving the reliability of communication.

[0209] In addition, in one OFDM symbol, the number of multiple data chips is even; and / or, the number of parity check chips is one.

[0210] For example, in Figure 7 the OFDM symbol shown in (a) of Figure 8 the number of OOK chips is 4 and the number of parity check chips is 1. In

[0211] the OFDM symbol shown in (a) of

[0212] the number of OOK chips is 14 and the number of parity check chips is 1. Figures 7 to 9 In this way, the even number of data chips helps to more evenly distribute the spectrum resources, reduce spectrum waste, and improve the spectrum utilization rate. A single parity check chip can simplify the signal processing flow, reducing the complexity and computational burden of the system. Figure 10 and Figure 11 The above has described in detail the signal transmission method of the embodiments of the present application in combination with

[0213] It should be noted that the module names involved in the embodiments of the present application can all be defined as other names, as long as the functions of each module can be realized, and no specific restrictions are imposed on the module names.

[0214] Figure 10 is a schematic structural diagram of a signal transmission device 1000 provided by an embodiment of the present application. As Figure 10 shown, the device 1000 includes: a processing module 1001 and a transceiver module 1002.

[0215] In a possible implementation manner, the device 1000 is used to implement the steps performed by the reader in the above method embodiments.

[0216] Exemplarily, in Figure 7 and / or Figure 8In the method shown, the processing module 1001 can be used to indicate the chip length of the OOK chips and / or the chip length of the parity check chips to the AIoT device through CAP at the reader side, or in Figure 9 In the method shown, the processing module 1001 can be used to determine the first message.

[0217] In Figure 7 and / or Figure 8 In the method shown, the transceiver module 1002 can be used to receive the information that CAP indicates the chip length of the OOK chips and / or the chip length of the parity check chips to the AIoT device, or in Figure 9 In the method shown, the transceiver module 1002 can be used for the reader to send the first message to the AIoT device.

[0218] The processing module 1001 is used to determine the first message; the transceiver module 1002 is used to send the first message in the first time domain resource; wherein, the first time domain resource includes a first time unit, and the first time unit corresponds to a plurality of data chips and parity check chips; when the electrical level states of the first data chip and the last data chip among the plurality of data chips are the same, the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

[0219] In another possible implementation, the apparatus 1000 is used to implement the steps performed by the AIoT device in the above method embodiments.

[0220] The transceiver module 1002 is used to receive the first message in the first time domain resource; wherein, the first time domain resource includes a first time unit, and the first time unit corresponds to a plurality of data chips and parity check chips; when the electrical level states of the first data chip and the last data chip among the plurality of data chips are the same, the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

[0221] In the above two possible implementation manners, the apparatus 1000 can further implement the following solutions.

[0222] Optionally, when the electrical level states of the first data chip and the last data chip are different, the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix.

[0223] Optionally, when the electrical level states of the first data chip and the last data chip are the same, on the premise that the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix, the chip lengths of the plurality of data chips are set to the maximum value.

[0224] Optionally, the level state of the cyclic prefix is the same as that of the parity check chip; the level state of the parity check chip is the same as that of the first data chip.

[0225] Optionally, the first message includes first information for indicating the chip length of each data chip among a plurality of data chips and / or the chip length of the parity check chip.

[0226] Optionally, the first message includes a preamble, and the first information is carried in the preamble.

[0227] Optionally, the number of the plurality of data chips is even; and / or the number of the parity check chips is one.

[0228] It should be understood that the apparatus 1000 herein is embodied in the form of functional modules. The term "module" herein may refer to an application specific integrated circuit (ASIC), an electronic circuit, a processor (such as a shared processor, a dedicated processor or a group of processors, etc.) for executing one or more software or firmware programs, a memory, a combined logic circuit, and / or other suitable components that support the described functions. In an alternative example, those skilled in the art can understand that the apparatus 1000 may specifically be the reader or the AIoT device in the above embodiments, and the apparatus 1000 may be used to execute each process and / or step corresponding to the reader or the AIoT device in the above method embodiments. To avoid repetition, it will not be elaborated herein.

[0229] The above apparatus 1000 has the function of implementing the corresponding steps executed by the reader or the AIoT device in the above method; the above function may be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.

[0230] In the embodiments of the present application, Figure 10 the apparatus 1000 may also be a chip, such as: SOC. Correspondingly, the transceiver module 1002 may be the transceiver circuit of the chip, which is not limited herein.

[0231] Figure 11 FIG. shows a schematic structural diagram of an apparatus 1100 provided in an embodiment of the present application. The apparatus 1100 includes a processor 1101, a transceiver 1102, and a memory 1103. Among them, the processor 1101, the transceiver 1102, and the memory 1103 communicate with each other through an internal connection path. The memory 1103 is used to store instructions, and the processor 1101 is used to execute the instructions stored in the memory 1103 to control the transceiver 1102 to send signals and / or receive signals.

[0232] It should be understood that the device 1100 may specifically be the reader or the AIoT device in the above embodiments, and may be used to execute each step and / or process corresponding to the reader or the AIoT device in the above method embodiments. Optionally, the memory 1103 may include a read-only memory and a random access memory, and provide instructions and data to the processor. A part of the memory may further include a non-volatile random access memory. For example, the memory may also store information about the device type. The processor 1101 may be used to execute the instructions stored in the memory, and when the processor 1101 executes the instructions stored in the memory, the processor 1101 is used to execute each step and / or process of the above method embodiments. The transceiver 1102 may include a transmitter and a receiver. The transmitter may be used to implement each step and / or process corresponding to the above transceiver for performing a sending action, and the receiver may be used to implement each step and / or process corresponding to the above transceiver for performing a receiving action.

[0233] It should be understood that in the embodiments of the present application, the processor may be a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0234] In the implementation process, each step of the above method may be completed by the integrated logic circuit of the hardware in the processor or the instructions in the form of software. The steps of the method disclosed in combination with the embodiments of the present application may be directly embodied as being executed and completed by the hardware processor, or executed and completed by a combination of the hardware and software modules in the processor. The software module may be located in a mature storage medium in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory, and the processor executes the instructions in the memory and combines its hardware to complete the steps of the above method. To avoid repetition, it will not be described in detail here.

[0235] The signal transmission method provided by the embodiments of the present application may be applied to a reader or an AIoT device with communication functions. The specific device form of the reader or the AIoT device and the like may refer to the above relevant descriptions, and will not be elaborated here.

[0236] The embodiments of the present application provide an electronic device, which includes: a processor and a memory; the memory stores computer-executable instructions; the processor executes the computer-executable instructions stored in the memory, so that the electronic device executes the above method.

[0237] An embodiment of the present application provides a chip. The chip includes a processor, and the processor is configured to call a computer program in a memory to execute the technical solutions in the above embodiments. Its implementation principle and technical effects are similar to those of the above related embodiments, and will not be elaborated here.

[0238] An embodiment of the present application also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the above method is implemented. The methods described in the above embodiments can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. If implemented in software, the functions can be stored on or transmitted over a computer-readable medium as one or more instructions or code. The computer-readable medium can include a computer storage medium and a communication medium, and can also include any medium that can transfer a computer program from one place to another. The storage medium can be any target medium accessible by a computer.

[0239] In a possible implementation, the computer-readable medium may include RAM, ROM, a compact disc read-only memory (CD-ROM), or other optical disc memories, magnetic disk memories, or other magnetic storage devices, or any other medium targeted to carry or store the required program code in the form of instructions or data structures and accessible by a computer. Moreover, any connection is properly referred to as a computer-readable medium. For example, if software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of the medium. As used herein, disk and optical disc include optical discs, laser discs, optical discs, Digital Versatile Discs (DVDs), floppy disks, and Blu-ray discs, where disks typically reproduce data magnetically, while optical discs use lasers to optically reproduce data. The above combinations should also be included within the scope of the computer-readable medium.

[0240] An embodiment of the present application provides a computer program product. The computer program product includes a computer program, and when the computer program is run, it causes the computer to execute the above method.

[0241] Embodiments of the present application are described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to embodiments of the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processing unit of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable devices to generate a machine, such that the instructions executed by the processing unit of the computer or other programmable data processing device generate means for implementing the functions specified in one process Figure 1 one process or multiple processes and / or blocks Figure 1 or means for implementing the functions specified in multiple blocks.

[0242] In the above specific embodiments, the objectives, technical solutions, and beneficial effects of the present invention have been further described in detail. It should be understood that the above are only specific embodiments of the present invention and are not used to limit the protection scope of the present invention. Any modifications, equivalent replacements, improvements, etc. made on the basis of the technical solutions of the present invention shall be included in the protection scope of the present invention.

Claims

1. A signal transmission method, characterized in that, Including: Determine a first message; Transmit the first message in a first time-domain resource; Wherein, the first time-domain resource includes a first time unit, and the first time unit corresponds to a plurality of data chips and a parity check chip; when the electrical level states of the first data chip and the last data chip among the plurality of data chips are the same, the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

2. The method according to claim 1, wherein When the electrical level states of the first data chip and the last data chip are different, the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix.

3. The method according to claim 1, wherein When the electrical level states of the first data chip and the last data chip are the same, on the premise that the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix, make the chip lengths of the plurality of data chips take the maximum value.

4. The method according to claim 1, characterized in that, The electrical level state of the cyclic prefix is the same as the electrical level state of the parity check chip; the electrical level state of the parity check chip is the same as the electrical level state of the first data chip.

5. The method according to any one of claims 1 to 4, characterized in that The first message includes first information, and the first information is used to indicate the chip length of each data chip among the plurality of data chips and / or the chip length of the parity check chip.

6. The method according to claim 5, characterized in that, The first message includes a preamble, and the first information is carried in the preamble.

7. The method according to any one of claims 1 to 4, characterized in that The number of the plurality of data chips is even; and / or, the number of the parity check chips is one.

8. A signal transmission method, characterized in that Including: Receive a first message in a first time-domain resource; Wherein, the first time-domain resource includes a first time unit, and the first time unit corresponds to a plurality of data chips and a parity check chip; when the electrical level states of the first data chip and the last data chip among the plurality of data chips are the same, the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix corresponding to the first time unit.

9. The method according to claim 8, characterized in that When the electrical level states of the first data chip and the last data chip are different, the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix.

10. The method according to claim 8, characterized in that, When the electrical level states of the first data chip and the last data chip are the same, on the premise that the sum of the chip length of the last data chip and the chip length of the parity check chip is greater than or equal to the length of the cyclic prefix, make the chip lengths of the plurality of data chips take the maximum value.

11. The method according to claim 8, wherein The electrical level state of the cyclic prefix is the same as the electrical level state of the parity check chip; the electrical level state of the parity check chip is the same as the electrical level state of the first data chip.

12. The method according to any one of claims 8 to 11, characterized in that, The first message includes first information, and the first information is used to indicate the chip length of each data chip among the plurality of data chips and / or the chip length of the parity check chip.

13. The method according to claim 12, wherein The first message includes a preamble, and the first information is carried in the preamble.

14. The method according to any one of claims 8 to 11, characterized in that, The number of the multiple data chips is an even number; and / or, the number of the parity check chips is one.

15. An electronic device, characterized in that, Comprising: a processor and a memory; the memory stores computer-executable instructions; the processor executes the computer-executable instructions stored in the memory, so that the electronic device executes the method according to any one of claims 1-14.

16. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, the method according to any one of claims 1-14 is implemented.

17. A chip system, characterized in that, Comprising at least one processor and a communication interface, the communication interface and the at least one processor are interconnected by a line, and the at least one processor is configured to run a computer program or instructions to execute the method according to any one of claims 1-14.

18. A computer program product, characterized in that, Comprising a computer program, when the computer program is run, the computer is caused to execute the method according to any one of claims 1-14.

Images