Memory management method and memory controller

Abstract

The invention provides a memory management method and a memory controller, and the method comprises the steps: recording a corresponding reading frequency for each preset storage unit of a memory module, and enabling the preset storage unit to comprise a plurality of word lines; when each preset storage unit is read, calculating a first statistical value and a second statistical value corresponding to the preset storage unit according to the read word line; when the reading frequency of the preset storage unit reaches a preset reading frequency threshold value, obtaining a corresponding first statistical value and a corresponding second statistical value; if the second statistical value is smaller than a preset dispersity threshold value, determining a plurality of target word lines in the plurality of word lines according to the first statistical value and the second statistical value; and only moving the target data stored in the plurality of target word lines. According to the method, by judging the concentration degree of the reading operation, only the data in the concentration area is moved, the data moving amount is effectively reduced, and write amplification and IO jamming are reduced.

Description

Technical Field

[0001] The present invention relates to the field of storage technologies, and particularly to a memory management method and a memory controller. Background Art

[0002] Read disturb is a characteristic of flash memory, which can cause the threshold voltage of other unread flash memory cells in the same block to shift. As the number of P / E (Program / Erase) and read operations increases, the offset voltage value becomes larger and the number of read error bits increases, resulting in uncorrectable read disturb errors.

[0003] Traditional read disturb management is to record the number of read operations within a specific unit of the flash chip. Each time a read operation is performed on the data in the specific unit, the read disturb count value corresponding to the unit is incremented by one. When it reaches the theoretical / experimental threshold, the firmware believes that there may be more error bits in the data at this position, and then scans. If there are more error bits or uncorrectable errors, all the data is immediately moved to other positions, thereby eliminating the impact of read disturb on the data.

[0004] The above read disturb management scheme is designed according to the working scenario of evenly reading the data of the entire physical block and each word line receiving the same read disturb. However, for the same unit, such as in a plane, the actual number of read operations of different wordlines (WL) may vary greatly. Conventionally, statistics are performed in units of physical blocks / planes / chips, which will lead to insufficient accuracy and cause a large write amplification. If the unit is too small, the cache space required to record the number of read operations will be too large. Summary of the Invention

[0005] In view of this, the present disclosure provides an efficient memory management method and a memory controller, which can avoid the occurrence of read disturb by judging the data area to be moved, thereby reducing the write amplification (Write Amplification Factor, WAF) and IO latency. IO latency refers to the delay or pause phenomenon that occurs during the input / output operation process. In a storage system, especially when a large number of data migration operations are performed, it may cause the system response speed to slow down, and what the user perceives is that the system operation is not smooth or temporarily stuck. When the storage device needs to process a large number of read and write requests simultaneously, especially during the data migration operation in read disturb management, it will occupy a large amount of IO bandwidth and computing resources, resulting in the delay of other normal read and write requests, thereby generating IO latency. The memory management method and the memory controller provided by the present disclosure can reduce the unnecessary data migration amount, thereby effectively reducing this kind of stuck phenomenon and improving the system response speed and user experience.

[0006] One or more embodiments of the present disclosure provide a memory management method, which is applied to a storage device configured with a memory module. The method includes: recording the corresponding read count for each preset storage unit of the memory module, where the preset storage unit includes a plurality of word lines; when each preset storage unit is read, calculating a first statistical value and a second statistical value corresponding to the preset storage unit according to the read word lines; when the read count of the preset storage unit reaches a preset read count threshold, obtaining the corresponding first statistical value and second statistical value; if the second statistical value is less than a preset dispersion threshold, determining a plurality of target word lines among the plurality of word lines according to the first statistical value and the second statistical value; and only moving the target data stored in the plurality of target word lines.

[0007] In one or more embodiments of the present disclosure, after obtaining the first statistical value and the second statistical value of the preset storage unit, the method further includes: if the second statistical value is not less than the preset dispersion threshold, moving all the data stored in the preset storage unit.

[0008] In one or more embodiments of the present disclosure, the first statistical value is the average of the respective index numbers of all the read word lines that have been read; and the second statistical value is a statistic representing the degree of dispersion of the respective index numbers of all the read word lines that have been read.

[0009] In one or more embodiments of the present disclosure, the method includes: calculating an average value according to the current read word line index number, the historical first statistical value, and the read count, and updating the first statistical value.

[0010] In one or more embodiments of the present disclosure, the method includes: calculating a dispersion degree according to the current read word line index number, the historical second statistical value, and the read count, and updating the second statistical value.

[0011] In one or more embodiments of the present disclosure, determining a plurality of target word lines among the plurality of word lines according to the first statistical value and the second statistical value includes: determining the position of a target range according to the first statistical value, and determining the width of the target range according to the second statistical value; and determining the word lines within the target range among the plurality of word lines as the target word lines.

[0012] In one or more embodiments of the present disclosure, determining the word lines within the target range among the plurality of word lines as the target word lines includes: determining the central position of the target range according to the first statistical value, and setting a specific word line closest to the first statistical value as the central target word line; and determining the range width of the target range according to the second statistical value, and using the central target word line and one or more other specific word lines corresponding to the range width before and after as the target word lines, where the range width changes in a positive correlation with the second statistical value.

[0013] In one or more embodiments of the present disclosure, the preset storage unit is a physical block, a plane, or a chip.

[0014] In one or more embodiments of the present disclosure, the method further includes: dividing the multiple word lines of each preset storage unit into multiple word line segments; respectively calculating a corresponding first segment statistical value and a second segment statistical value for each word line segment; when the read count of the preset storage unit reaches the preset read count threshold, respectively obtaining the first segment statistical value and the second segment statistical value of each word line segment; if the second segment statistical value of the word line segment is less than the preset dispersion threshold, determining a segment target word line according to the corresponding first segment statistical value and second segment statistical value of the word line segment; and only moving the segment target data stored in multiple groups of the segment target word lines.

[0015] One or more embodiments of the present disclosure provide a memory controller for controlling a storage device configured with a memory module. The memory controller includes: a memory interface control circuit for electrically connecting to the memory module; and a processor electrically connected to the memory interface control circuit, wherein the processor is further electrically connected to a connection interface circuit of the storage device to electrically connect to a host system. Wherein, the processor is configured to: record a corresponding read count for each preset storage unit of the memory module, where the preset storage unit includes multiple word lines; when each preset storage unit is read, calculate a first statistical value and a second statistical value corresponding to the preset storage unit according to the read word lines; when the read count of the preset storage unit reaches the preset read count threshold, obtain the corresponding first statistical value and second statistical value; if the second statistical value is less than the preset dispersion threshold, determine multiple target word lines among the multiple word lines according to the first statistical value and the second statistical value; and only move the target data stored in the multiple target word lines.

[0016] Based on the above, the memory management method and the memory controller provided by the present invention can judge the concentration degree of read operations in the current preset storage unit by recording the read count in preset storage units and simultaneously recording the first statistical value (e.g., the average read index) and the second statistical value (e.g., the dispersion degree of the read index) of the read word lines. When the read count reaches the preset threshold and the second statistical value is less than the preset dispersion threshold, it indicates that the read operations are concentrated in a specific area. At this time, only the word line data in this concentrated area needs to be moved, rather than moving all the data of the entire preset storage unit. This method significantly reduces the amount of read interference data movement while maintaining a small memory footprint, thereby effectively reducing the write amplification and IO stuttering problems and improving the performance and lifespan of the storage system. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a block diagram of a host system and a storage device shown according to an embodiment of the present disclosure;

[0018] Figure 2 is a flowchart of a memory management method shown according to an embodiment of the present disclosure;

[0019] Figure 3 is a detailed flowchart of a memory management method according to an embodiment of the present invention;

[0020] Figure 4 is a schematic diagram of a word line target range according to an embodiment of the present invention;

[0021] Figure 5 is a table of statistical value calculation examples according to an embodiment of the present invention;

[0022] Figure 6 is a schematic diagram of a word line section and a section target range according to another embodiment of the present invention. Detailed Embodiments

[0023] Reference will now be made in detail to exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0024] Figure 1 is a block diagram of a host system and a storage device shown according to an embodiment of the present disclosure. Please refer to Figure 1 , the host system 10 is, for example, a personal computer, a notebook computer, or a server. The host system 10 includes a processor 110 (also referred to as a second processor), a host memory 120 (also referred to as a host main memory), and a data transfer interface circuit 130. In this embodiment, the processor 110 is coupled (also referred to as electrically connected) to the host memory 120 and the data transfer interface circuit 130. In another embodiment, the processor 110, the host memory 120, and the data transfer interface circuit 130 are electrically connected to each other using a system bus. In this embodiment, the processor 110, the host memory 120, and the data transfer interface circuit 130 may be disposed on a motherboard of the host system 10.

[0025] The storage device 20 includes a Memory Controller 210, a Memory Module 220 (also referred to as a Rewritable Non-Volatile Memory Module), and a Connection Interface Circuit 230. Among them, the Memory Controller 210 includes a Processor 211 (also referred to as the first processor), a Data Management Circuit 212, a Memory Interface Control Circuit 213, and a Buffer Memory 214.

[0026] In this embodiment, the host system 10 is electrically connected to the storage device 20 through the connection interface circuit 230 of the data transfer interface circuit 130 to perform data access operations. For example, the host system 10 can store data in the storage device 20 or read data from the storage device 20 via the data transfer interface circuit 130.

[0027] In this embodiment, the number of data transfer interface circuits 130 can be one or more. Through the data transfer interface circuit 130, the motherboard can be electrically connected to the storage device 20 in a wired or wireless manner. The storage device 20 can be, for example, a USB flash drive, a memory card, a Solid State Drive (SSD), or a wireless memory storage device. The wireless memory storage device can be, for example, a Near Field Communication (NFC) memory storage device, a WiFi memory storage device, a Bluetooth memory storage device, or a Low Energy Bluetooth memory storage device (e.g., iBeacon), etc., which are memory storage devices based on various wireless communication technologies. In addition, the motherboard can also be electrically connected to various I / O devices such as a Global Positioning System (GPS) module, a network interface card, a wireless transmission device, a keyboard, a screen, a speaker, etc. through a system bus.

[0028] In this embodiment, the data transmission interface circuit 130 and the connection interface circuit 230 are interface circuits that are compatible with the Peripheral Component Interconnect Express (PCI Express) standard. Moreover, data is transmitted between the data transmission interface circuit 130 and the connection interface circuit 230 using the Non-Volatile Memory express (NVMe) communication protocol.

[0029] In addition, in another embodiment, the connection interface circuit 230 can be encapsulated in a chip with the memory controller 210, or the connection interface circuit 230 is disposed outside a chip that includes the memory controller 210.

[0030] In this embodiment, the host memory 120 is used to temporarily store instructions or data executed by the processor 110. In this embodiment, the host memory 120 can be a Dynamic Random Access Memory (DRAM), a Static Random Access Memory (SRAM), etc. However, it must be understood that the present disclosure is not limited thereto, and the host memory 120 can also be other suitable memories.

[0031] The memory controller 210 is used to execute a plurality of logic gates or control instructions implemented in hardware form or firmware form and perform operations such as writing, reading, and erasing data in the memory module 220 according to the instructions of the host system 10.

[0032] More specifically, the processor 211 in the memory controller 210 is hardware with computing capabilities, which is used to control the overall operation of the memory controller 210. Specifically, the processor 211 is programmed by a plurality of control instructions / program codes, and when the storage device 20 operates, these control instructions / program codes will be executed to perform operations such as writing, reading, and erasing data. In addition, in this embodiment, the control instructions / program codes can be further executed to perform specific information management operations to implement the memory management method provided by the present disclosure. The control instructions / program codes corresponding to the data reading method can be further implemented as a circuit unit in hardware form to implement the memory management method provided by the present disclosure.

[0033] It is worth mentioning that, in this embodiment, the processor 110 and the processor 211 are, for example, a Central Processing Unit (CPU), a micro-processor, or other programmable processing units (Microprocessor), a Digital Signal Processor (DSP), a programmable controller, an Application Specific Integrated Circuits (ASIC), a Programmable Logic Device (PLD), or other similar circuit components. The present disclosure is not limited thereto.

[0034] In this embodiment, as described above, the memory controller 210 further includes a data management circuit 212 and a memory interface control circuit 213. It should be noted that the operations performed by each component of the memory controller 210 can also be regarded as the operations performed by the memory controller 210.

[0035] Among them, the data management circuit 212 is electrically connected to the processor 211, the memory interface control circuit 213, and the connection interface circuit 230. The data management circuit 212 is used to receive instructions from the processor 211 to perform data transmission. For example, reading data from the host system 10 (such as the host memory 120) via the connection interface circuit 230, and writing the read data into the memory module 220 via the memory interface control circuit 213 (such as performing corresponding writing operations according to various writing instructions from the host system 10). Another example is to perform a read operation according to a read instruction from the host system 10, reading data from one or more physical units of the memory module 220 (the data can be read from one or more storage units in one or more physical units), and writing the read data into the host system 10 (such as the host memory 120) via the connection interface circuit 230. In another embodiment, the data management circuit 212 can also be integrated into the processor 211.

[0036] The memory interface control circuit 213 is used to receive instructions from the processor 211 and cooperate with the data management circuit 212 to perform write (also known as programming, Programming) operations, read operations, or erase operations on the memory module 220.

[0037] In addition, data to be written to the memory module 220 is converted into a format acceptable to the memory module 220 via the memory interface control circuit 213. Specifically, if the processor 211 wants to access the memory module 220, the processor 211 will transmit a corresponding instruction sequence to the memory interface control circuit 213 to instruct the memory interface control circuit 213 to perform corresponding operations. For example, these instruction sequences may include a write instruction sequence for instructing data writing, a read instruction sequence for instructing data reading, an erase instruction sequence for instructing data erasure, and corresponding instruction sequences for instructing various memory operations. These instruction sequences may include one or more signals, or data on the bus. These signals or data may include instruction codes or program codes. For example, in the read instruction sequence, information such as a read identification code, a memory address, and a physical address will be included.

[0038] In addition, the memory controller 210 establishes a logical-to-physical address mapping table and a physical-to-logical address mapping table to record the mapping relationship between the logical addresses of logical units (such as logical blocks, logical pages) allocated to the memory module 220 and the physical addresses (physical addresses) of physical units (such as physical erase units / physical blocks, physical pages). In other words, the memory controller 210 can look up the physical unit mapped by a logical unit (such as looking up the physical page mapped by a logical page; looking up the physical address mapped by a logical address) through the logical-to-physical address mapping table (also called the logical-to-physical mapping table), and the memory controller 210 can look up the logical unit mapped by a physical unit (such as looking up the logical page mapped by a physical page; looking up the logical address mapped by a physical address) through the physical-to-logical address mapping table (also called the physical-to-logical mapping table).

[0039] The buffer memory 214 is electrically connected to the processor 211 and is used for temporarily storing data and instructions from the host system 10, data from the memory module 220, and various system data for managing the storage device 20. Specifically, the buffer memory 214 can also be used for storing various management information related to the present invention, such as statistical data on the number of reads for a preset storage unit, a first statistical value (index average value), a second statistical value (dispersion degree), etc., to support the processor 211 in executing the memory management method provided by the present invention. In addition, auxiliary information such as word line partition information and various thresholds used in this method may also be included.

[0040] The memory module 220 is electrically connected to the memory controller 210 (memory interface control circuit 213) and is used to store user data sent by the host system 10. The memory module 220 supports a multi-plane writing mechanism through its multi-plane structure. Specifically, each chip of the memory module 220 has multiple planes, each plane has multiple physical blocks, and each physical block includes multiple physical pages. In this embodiment, each physical page has multiple memory cells (also referred to as physical bytes or bytes), and each memory cell corresponds to a physical address. The physical address is used to record the physical location of the data stored in the memory cell. It should be noted that the present disclosure is not limited to the size of each physical page and logical page.

[0041] Figure 2 It is a flowchart of a memory management method shown according to an embodiment of the present disclosure.

[0042] In one embodiment, referring to Figure 2 , the memory management method provided by the present disclosure includes the following steps:

[0043] Step S210: The processor 211 records the corresponding read count for each preset storage unit of the memory module 220, where the preset storage unit includes multiple word lines (or other smaller storage units). For example, the preset storage unit is a physical block, a plane, or a chip (or a logical unit number, LUN).

[0044] Specifically, the processor 211 maintains a read count counter for each preset storage unit in the memory module 220 to record the cumulative number of read operations for the corresponding preset storage unit. The processor 211 can store these read count counters in the buffer memory 214 for quick access and update. In this embodiment, each preset storage unit contains multiple word lines. For example, each plane may contain hundreds of word lines. Whenever a specific preset storage unit is read due to a read instruction from the host system 10 or a read instruction sequence of the storage device 20 itself, the read count corresponding to the preset storage unit is incremented by 1.

[0045] Step S220: When each preset storage unit is read, the processor 211 calculates a first statistical value and a second statistical value corresponding to the preset storage unit according to the read word lines.

[0046] More specifically, when a read request is received and a specific word line is accessed, in addition to incrementing the read count of the corresponding preset storage unit by one, the processor 211 also needs to update two key statistical values according to the index number of the word line being read. The first statistical value is the average of the word line indexes, which is used to determine the concentration position of the read operation; the second statistical value is the dispersion (e.g., variance) of the word line indexes, which is used to determine the concentration degree of the read operation. It should be noted that the information used to calculate the first and second statistical values is not limited to the index number, but can also be any information that can represent the arrangement order or position of the word lines, such as the physical address of the word line, the logical number, or other information that can uniquely identify the position of the word line. The present disclosure is not limited to using the "index number" as the calculation basis; nor is it limited to the "read word line" as the monitoring object, and it can also be other constituent units smaller than the preset storage unit.

[0047] For each read operation, the processor 211 calculates the mean value and updates the first statistical value based on the current read word line index number, the historical first statistical value, and the read count. The dispersion is calculated and the second statistical value is updated based on the current read word line index number, the historical second statistical value, and the read count.

[0048] Specifically, the processor 211 updates these two statistical values using the following formulas:

[0049] First statistical value (average) = (last first statistical value * last read count + current read word line index number) / current read count

[0050] Second statistical value (dispersion) = (last second statistical value * last read count + (current read word line index number - first statistical value)^2) / current read count

[0051] For example, if the word line 10 is read for the first time and the read count is 1, the first statistical value is 10 and the second statistical value is 0; if the word line 1 is read for the second time and the read count is 2, the first statistical value is updated to (10 * 1 + 1) / 2 = 5.5, and the second statistical value is updated to (0 * 1 + (1 - 5.5)^2) / 2 = 10.13.

[0052] It should be noted that the calculation method of the dispersion is not limited to the above variance calculation formula, and other algorithms can be adopted in the present disclosure to estimate the dispersion degree of the read operation. For example, the Mean Absolute Deviation (MAD) can be used, that is, to calculate the average of the absolute differences between each read word line index and the average value; or the Interquartile Range (IQR) can be used to calculate the difference between the 75th percentile and the 25th percentile of the read word line index; or the Entropy can be used to measure the uncertainty of the word line access distribution; or the Gini Coefficient can be used to measure the unevenness of the word line access. These alternative methods can all effectively estimate the concentration degree of the word line access, and the processor 211 can select a suitable calculation method according to the actual application requirements and system resources.

[0053] Step S230: When the read count of the preset storage unit reaches the preset read count threshold, obtain the corresponding first statistical value and second statistical value.

[0054] The processor 211 continuously monitors the read count of each preset storage unit. When the read count of a certain preset storage unit reaches the preset threshold (such as 10,000 times), the processor 211 retrieves its corresponding first statistical value and second statistical value to prepare for read disturbance management. This preset read count threshold can be set according to the characteristics of the flash memory, the working scenario or the manufacturer's specifications. Appropriate threshold setting can achieve a balance between data reliability and system performance.

[0055] It is worth mentioning that the dual judgment mechanism (read count threshold combined with dispersion threshold) of the present disclosure provides greater operation flexibility for memory manufacturers and system designers. Since not only the total read count is considered, but also the concentration degree of the read distribution is evaluated, the manufacturer can adopt a more aggressive read count threshold setting, significantly extending the migration cycle. For example, in the traditional scheme based only on the read count, the manufacturer may set the threshold to 10,000 times to ensure safety; while adopting the method of the present disclosure, the threshold may be increased to 20,000 times or even higher, and at the same time, data safety is ensured through dispersion control. That is to say, the mechanism of the present disclosure not only reduces the write amplification ratio and migration frequency, but also allows the manufacturer to more freely adjust (such as, increase) the read count threshold parameter according to different application scenarios, flash memory quality levels or workload characteristics, further optimizing the balance between the performance and reliability of the storage system.

[0056] Step S240: If the second statistical value is less than the preset dispersion threshold, determine multiple target word lines among the multiple word lines according to the first statistical value and the second statistical value.

[0057] In this step, the processor 211 first determines whether the second statistical value (dispersion) is less than a preset dispersion threshold. If the dispersion is less than the threshold, it indicates that the read operation is concentrated in a specific area. The processor 211 then determines the central position of the target range according to the first statistical value (average value), and finds the word line closest to the average value as the central target word line.

[0058] Then, the processor 211 determines the width of the target range according to the second statistical value (dispersion). The smaller the dispersion, the more concentrated the read operation is, and the smaller the range to be moved; the larger the dispersion, the more dispersed the read is, and the larger the range to be moved. The processor 211 can select a certain number of word lines before and after the central target word line as the target word lines according to the size of the dispersion. For example, if the dispersion value is 4.24, it may select 1-2 word lines before and after the central word line; if the dispersion is smaller (indicating a more concentrated read position), it may only select 1 word line before and after the central word line.

[0059] In one embodiment, the specific method for the processor 211 to determine multiple target word lines according to the first statistical value and the second statistical value is as follows:

[0060] The processor 211 first determines the central position of the target range based on the first statistical value. Since the first statistical value represents the average value of the read word line indices, the processor 211 will convert this value into an integer or search for the actual word line index closest to this average value. For example, referring to Figure 4 and Figure 5 , if the first statistical value is 8.60, the processor 211 will identify the word line WL9 with the index number 9 as the word line closest to this statistical value and set it as the central target word line. In some cases, if the average value is exactly between two word line indices (such as the index average value is 8.50, between WL8 and WL9), the processor 211 can select one of the word lines as the central target word line according to a preset rule, or regard both word lines as the central area.

[0061] After determining the central target word line, the processor 211 determines the width of the target range according to the second statistical value. The processor 211 implements an adaptive mapping relationship with a positive correlation between the second statistical value and the range width. Specifically, the processor 211 can adopt the following mapping mechanism: when the second statistical value is small (such as less than 40% of the preset dispersion threshold), the range width is set to a small value, such as 1 word line before and after the central target word line; when the second statistical value is at a medium level (such as between 40% and 70% of the preset dispersion threshold), the range width is set to a medium value, such as 2-3 word lines before and after the central target word line; when the second statistical value is close to but still less than the preset dispersion threshold (such as greater than 70% of the preset dispersion threshold), the range width is set to a large value, such as 4-5 word lines before and after the central target word line.

[0062] Step S250: The processor 211 only moves the target data stored in the multiple target word lines.

[0063] After determining the target word lines that need to be moved, the processor 211 only performs a move operation on the data on these target word lines, rather than moving all the data of the entire preset storage unit. Specifically, the processor 211 reads the data on these target word lines, temporarily stores it in the buffer memory 214, and then rewrites this data at other positions in the memory module 220. After the move is completed, the processor 211 resets the read count counter, the first statistical value, and the second statistical value of the preset storage unit to prepare for the next round of monitoring.

[0064] Compared with the traditional method of moving all the data of the entire preset storage unit, the method of the present disclosure only needs to move the data within a specific range, significantly reducing the amount of data moved, thereby reducing the write amplification and IO stuttering problems. For example, if a plane contains 200 word lines, the traditional method needs to move the data of all 200 word lines, while the method of the present disclosure may only need to move the data of 5 - 10 word lines among them, and the amount of data moved is reduced by about 95%. In addition, the method of the present disclosure can specifically address the read interference problem by accurately identifying and centrally moving the data in the high-frequency read area. The main advantage of this centralized move strategy is to directly move the data in the dense read area to a new location, effectively preventing the cumulative problem of threshold voltage shift caused by frequent reads of the same area, fundamentally eliminating the read interference risk, and minimizing the system resource consumption at the same time.

[0065] On the other hand, the processor 211 can also take more proactive actions. For example, in another embodiment, the processor 211 can further optimize the storage strategy after data movement. Since the data that is frequently read exhibits obvious hot data characteristics, the processor 211 can, during the data movement process, redistribute this hot data to a specific optimized area. The specific implementation methods include: (1) storing the hot data in a storage unit with higher read performance, such as a storage unit using the SLC (Single-Level Cell) mode, to improve the subsequent read speed; (2) dispersing the identified hot data and storing it in different physical blocks or planes to avoid forming a read hot spot again; (3) dividing a dedicated hot data area in the memory module 220, which has a higher read count threshold or lower interference sensitivity; or (4) establishing a hot data access pattern database to predict possible future read behaviors and optimize the data layout accordingly. Through these advanced optimization strategies, the present disclosure not only reduces the current amount of data moved, but also can further improve the long-term performance and reliability of the system, achieving more efficient memory management.

[0066] It should be noted that in another embodiment, if the processor 211 determines that the second statistical value is not less than the preset dispersion threshold, it indicates that the read operations are relatively dispersed, and the processor 211 may need to move all the data of the entire preset storage unit to ensure data security.

[0067] Figure 3 is a detailed flowchart of a memory management method according to an embodiment of the present invention.

[0068] Referring to Figure 3 , the detailed process of the memory management method provided by the present disclosure includes the following steps:

[0069] Step S310: The processor 211 obtains a read instruction sequence.

[0070] Specifically, the memory controller 210 receives a read instruction sequence from the host system 10. These read instruction sequences may contain multiple read requests for different addresses. The processor 211 needs to extract the target read address from them, and then determine the preset storage unit to be accessed and the specific word line. In the NAND flash memory architecture, a read instruction sequence usually specifies the chip, plane, block, and page addresses, and the processor 211 identifies the target word line by parsing this information.

[0071] Step S320: Based on the read instruction sequence, the processor 211 reads the storage units on the read word line of the preset storage unit to obtain read data.

[0072] In this step, the processor 211 sends a read command to the memory module 220 through the memory interface control circuit 213 to access the storage units on the specified word line, so as to obtain the requested data. Compared with the traditional method, this method not only performs the read operation, but also records the word line information of each read access for subsequent analysis.

[0073] Step S330: The processor 211 updates the read count corresponding to the preset storage unit, and calculates the first statistical value and the second statistical value corresponding to the preset storage unit according to the index number of the read word line.

[0074] For each read operation corresponding to the preset storage unit completed, the processor 211 increments the read count counter corresponding to the preset storage unit by one, and at the same time updates the first statistical value (average value) and the second statistical value (dispersion) of the preset storage unit according to the index number of the currently read word line. These statistical data are stored in the buffer memory 214 for subsequent analysis. The details of the specific statistical value update are as described above.

[0075] Step S340: The processor 211 determines whether the read count of the preset storage unit has reached a preset read count threshold.

[0076] The processor 211 compares the number of read times of the current preset storage unit with a preset read times threshold. If the number of read times reaches the threshold, the processor 211 determines that the preset storage unit may face the risk of read interference and needs further analysis; if it does not reach the threshold, the processor 211 returns to step S310 to continue processing the new read instruction sequence.

[0077] Step S350: If the number of read times reaches the threshold, the processor 211 further determines whether the second statistical value is less than a preset dispersion threshold.

[0078] This is the key judgment point of the method of the present disclosure. The processor 211 determines the concentration degree of the read operation by comparing the second statistical value (dispersion) with the preset dispersion threshold. If the dispersion is less than the threshold, it indicates that the reads are highly concentrated in a specific area, and step S360 is entered; if the dispersion is not less than the threshold, it indicates that the reads are relatively dispersed, and step S380 is entered.

[0079] Step S360: The processor 211 determines a plurality of target word lines in the target range within the preset storage unit according to the first statistical value and the second statistical value.

[0080] For example, the processor 211 first determines the central position of the target range based on the first statistical value, and sets the word line closest to this value as the central target word line; then determines the range width based on the second statistical value, and selects the word lines corresponding to the range width before and after the central target word line as other target word lines. The smaller the dispersion, the smaller the determined range width.

[0081] Step S370: The processor 211 only moves the target data stored in the plurality of target word lines.

[0082] For example, the processor 211 reads all the data on the target word lines, temporarily stores it in the buffer memory 214, and then allocates a new physical location in the memory module 220 to rewrite these data. This process only involves the word line data within the target range, rather than all the data of the entire preset storage unit, significantly reducing the data movement amount and the resource consumption for data movement.

[0083] Step S380: If the second statistical value is not less than the preset dispersion threshold, the processor 211 moves all the data stored in the preset storage unit.

[0084] In the case where the read operations are relatively dispersed, to ensure data security, the processor 211 uses a traditional method to move all the data of the entire preset storage unit. In this case, although the data movement amount is large, due to the existence of the dispersion judgment mechanism, the frequency of such complete moves will be significantly reduced.

[0085] Step S390: After the data migration is completed, the processor 211 resets the read count, the first statistical value, and the second statistical value corresponding to the preset storage unit.

[0086] After the data migration is completed, since the relevant data has been migrated to a new location, the risk of read interference has been reduced. The processor 211 resets the read count, the first statistical value, and the second statistical value of the current preset storage unit to their initial values to prepare for the next round of monitoring and analysis. Then it returns to step S310 to continue processing the new read instruction sequence.

[0087] Through this mechanism of cyclic monitoring, analysis, and selective migration, the method provided by the present disclosure can minimize unnecessary data migration, reduce write amplification, alleviate IO jitter, and thus improve the overall system performance and the lifespan of the storage medium while ensuring data security. Compared with the traditional migration strategy simply based on the read count, this method realizes a more intelligent and efficient read interference prevention management by introducing the dispersion analysis.

[0088] Figure 4 It is a schematic diagram of the target range of word lines according to an embodiment of the present invention. Figure 5 It is a table of statistical value calculation examples according to an embodiment of the present invention.

[0089] In one embodiment, referring to Figure 4 and Figure 5 , the present disclosure provides a practical simulation example to specifically illustrate the implementation process of the memory management method.

[0090] Suppose a preset storage unit (such as a certain plane) contains multiple word lines WL1 to WL12 (there may be more word lines in practical applications). The preset read count threshold for this plane is set to 10, and the preset dispersion threshold is set to 5. These parameters can be adjusted according to the actual flash characteristics.

[0091] The processor 211 starts to monitor the read operations of this plane. As Figure 5 shown in the table TB50, it shows the detailed information of 10 consecutive read operations that have been recorded, including the word line index number of each read, the cumulative read count, and the updated statistical values. It should be noted that only the latest statistical information will be retained.

[0092] The 1st read: The processor 211 receives a read request to access the word line WL10 (index number 10). After the read is completed, the read count of this plane is set to 1, the first statistical value (average value) is initialized to 10.00, and the second statistical value (dispersion) is initialized to 0.00.

[0093] Second Read: The processor 211 receives a read request to access the word line WL1 (index number 1). After the read is completed, the read count is increased to 2, the first statistical value is updated to 5.50 [(10×1 + 1) / 2], and the second statistical value is updated to 10.13 [(0×1+(1 - 5.50)^2) / 2].

[0094] Third to Tenth Reads: The processor 211 continues to process subsequent read requests, accessing word lines with index numbers 10, 10, 10, 10, 9, 8, 8, and 10 respectively, and the cumulative read count increases to 10. As shown in the table TB50, as the read operation progresses, the first statistical value gradually stabilizes near 8.60, while the second statistical value gradually decreases from its initial high value to 4.24, indicating that the read operation gradually focuses on a specific area.

[0095] When the tenth read is completed, the read count of this plane reaches the preset read count threshold of 10 (assumed to be 10, but the present disclosure is not limited thereto), triggering the processor 211 to perform read disturbance analysis. The processor 211 obtains the two statistical values corresponding to this plane at present: the first statistical value is 8.60, and the second statistical value is 4.24.

[0096] The processor 211 first determines whether the second statistical value (4.24) is less than the preset dispersion threshold (5). Since 4.24 < 5, it is confirmed that the read operation focuses on a specific area and local data migration is required.

[0097] Next, the processor 211 determines the central position of the target range according to the first statistical value of 8.60. The index number 9 is closest to this value, so WL9 is set as the central target word line. Then, the processor 211 determines the width of the target range according to the second statistical value of 4.24. In this embodiment, the processor 211 implements an adaptive range determination mechanism: when the dispersion is between 0 and 3, the target range includes the central target word line and one word line before and after it (a total of 3); when the dispersion is between 3 and 5, the target range includes the central target word line and two word lines before and after it (a total of 5).

[0098] Since the dispersion value in this example is 4.24, which is in the range of 3 to 5, the processor 211 determines that the target range R0 should include the central target word line WL9 and two word lines before and after it, that is, WL7, WL8, WL9, WL10, and WL11, which together make up 5 target word lines.

[0099] Next, the processor 211 then only reads the data on these five target word lines WL7 - WL11, temporarily stores it in the buffer memory 214, and then writes this data to other locations in the memory module 220 to complete the local data migration. After the migration is completed, the processor 211 resets the read count, the first statistical value, and the second statistical value of this plane to prepare for the next round of monitoring.

[0100] Compared with the traditional method that needs to migrate the data of all more than 12 word lines, in this example, only the data of 5 word lines is migrated, and the data migration volume is reduced by at least 58.3%. In practical applications, a plane may contain hundreds of word lines. Adopting the method of the present disclosure can save more system resources and significantly reduce write amplification and IO jitter.

[0101] In one embodiment, the present disclosure further provides a word line section division mechanism to solve the situation where multiple read hotspots coexist. In practical application scenarios, the user access pattern often shows multiple concentrated areas. For example, Figure 6 As shown, there may be two or more read hotspot areas existing simultaneously. If only a single average value and dispersion are used for statistics, due to the existence of multiple hotspots, the calculated dispersion value may be large, resulting in the system misjudging it as a situation of dispersed reads and performing global data migration, thus failing to fully utilize the advantages of the present invention.

[0102] To solve the above problems, the present disclosure proposes a more refined word line section management method. This method divides multiple word lines within a preset storage unit into multiple sections, and calculates the statistical values of each section respectively, so as to accurately identify multiple hotspot areas and further optimize the data migration operation.

[0103] More specifically, in one embodiment, the present disclosure provides an optimized memory management method based on word line section division. Specifically, in this method, the processor 211 not only calculates the statistical values for the entire preset storage unit, but also accurately identifies and processes multiple read hotspot areas through the word line section division mechanism, further optimizing the data migration operation and reducing write amplification.

[0104] First, the processor 211 divides multiple word lines of the preset storage unit into multiple word line sections. In this embodiment, assuming that a preset storage unit contains 200 word lines (WL0 - WL199), the processor 211 can divide every 50 word lines into a section, forming four word line sections: section A (WL0 - WL49), section B (WL50 - WL99), section C (WL100 - WL149), and section D (WL150 - WL199). The division granularity can be adjusted according to actual application requirements and system resources. A smaller division granularity provides more accurate hotspot identification, can more precisely migrate the hot data that is more likely to cause read interference, but requires more computing and storage resources.

[0105] Secondly, for each word line section, the processor 211 calculates the corresponding first section statistical value (section index average value) and the second section statistical value (section dispersion). For example, when a read request accesses the word line WL75 in section B, the processor 211 not only updates the statistical values of the entire preset storage unit, but also updates the section statistical values of section B. The statistical calculation for each section is similar to that of the entire preset storage unit, but the statistical range is limited to the word lines within that section.

[0106] When the number of read operations of the preset storage unit reaches the preset read count threshold (e.g., 10,000 times), the processor 211 obtains the first section statistical value and the second section statistical value of each word line section respectively. After obtaining these statistical values, the processor 211 determines whether one or more target second section statistical values among the multiple second section statistical values are less than the preset dispersion threshold.

[0107] Suppose in this embodiment, the section dispersion of section A is 3.8, the section dispersion of section B is 2.3, the section dispersion of section C is 7.2, the section dispersion of section D is 5.5, and the preset dispersion threshold is 4. The processor 211 determines that the dispersions of section A and section B are less than the preset dispersion threshold, and identifies these two sections as the target word line sections. The dispersions of section C and section D are not less than the preset dispersion threshold, indicating that the read operations within these two sections are relatively dispersed and do not require special processing.

[0108] For each identified target word line section, the processor 211 determines a plurality of section target word lines within the corresponding section target range according to the corresponding first section statistical value and the second section statistical value. Specifically, for section A, assuming its section index average value is 25.7, the processor 211 sets the word line with index 26 as the central section target word line, and determines that the section target range includes 9 word lines from WL22 to WL30 according to the dispersion of 3.8; for section B, assuming its section index average value is 72.3, the processor 211 sets the word line with index 72 as the central section target word line, and determines that the section target range includes 5 word lines from WL70 to WL74 according to the dispersion of 2.3. That is to say, the target first section statistical value is used to determine the central position of the section target range, and the target second section statistical value is used to determine the range width of the section target range.

[0109] Finally, the processor 211 only moves the section target data stored in these section target word lines, that is, the data of 9 word lines in section A and 5 word lines in section B, a total of 14 word lines of data. Compared with the traditional method that needs to move the data of all 200 word lines, this method reduces the data movement amount by 93%, significantly reducing the write amplification and system resource consumption.

[0110] Through the word line section division mechanism, the processor 211 can simultaneously identify and process multiple read hot regions within a preset storage unit, achieving more accurate and efficient read interference management. This method is particularly suitable for complex data access patterns, such as storage access when multiple applications are running simultaneously, or the situation of accessing multiple hot data tables simultaneously in a database system.

[0111] In addition, the processor 211 can also dynamically adjust the division method and granularity of the word line sections according to the actual application load characteristics, further optimizing the system performance. For example, a finer-grained section division can be adopted during high load periods to improve accuracy, while a coarser-grained division can be used during low load periods to reduce computational overhead.

[0112] Figure 6 It is a schematic diagram of a word line section and a section target range according to another embodiment of the present invention.

[0113] Referring to Figure 6 , the present disclosure provides an embodiment of a memory management method based on word line section division. This method further optimizes the data migration strategy by subdividing a preset storage unit into multiple word line sections and accurately identifying multiple read hot regions.

[0114] The processor 211 first divides multiple word lines of the preset storage unit into multiple word line sections. As Figure 6 shown, adopting a division method of "dividing every five word lines into one section", the word lines WL1 to WL5 form the word line section WLS1, the word lines WL6 to WL10 form the word line section WLS2, and so on. The division granularity of the word line sections can be flexibly adjusted according to system resources and application requirements.

[0115] After the division is completed, the processor 211 establishes independent statistical variables for each word line section. When a read request is received, the processor 211 calculates and updates the statistical value of the corresponding section according to the section to which the read word line belongs. Specifically, the processor 211 records the average section index (the first section statistical value) and the section dispersion (the second section statistical value) for each word line section. For example, when reading the word line WL2, in addition to updating the statistical value of the entire preset storage unit, the processor 211 will particularly update the statistical value of the word line section WLS1.

[0116] The calculation method of the section statistical value follows the same principle as that of the entire preset storage unit, but the calculation range and statistical information are limited to correspond to that specific section. When a certain word line is read, the processor 211 uses the following formula to update the statistical value of the corresponding section:

[0117] Sector index average value = (Previous sector index average value × Previous sector read count + Current read word line quotation mark) / Current sector read count

[0118] Sector dispersion = (Previous sector dispersion × Previous sector read count + (Current read word line quotation mark - Sector index average value)²) / Current sector read count

[0119] After a series of read operations, as Figure 6 shown, the sector index average value of the word line sector WLS1 is 4 and the sector dispersion is 3; the sector index average value of the word line sector WLS2 is 9 and the sector dispersion is 3. It should be noted that the sector dispersion threshold is usually set to be less than the dispersion threshold of the entire preset storage unit to adapt to the characteristic of a smaller sector range.

[0120] When the read count of the entire preset storage unit reaches the preset read count threshold, the processor 211 obtains the statistical values of each word line sector and determines whether the dispersion of each sector is less than the preset sector dispersion threshold (for example, set to 4). In this example, the dispersions of the word line sectors WLS1 and WLS2 are both 3, which is less than the preset sector dispersion threshold, so both of these sectors are identified as target word line sectors.

[0121] Subsequently, the processor 211 determines the corresponding sector target range according to the statistical values of each target word line sector:

[0122] For the word line sector WLS1, the processor 211 determines that the central position should be located at WL4 according to the sector index average value of 4, and determines that the sector target range SR1 should include three word lines, namely WL3, WL4, and WL5, based on the sector dispersion of 3;

[0123] For the word line sector WLS2, the processor 211 determines that the central position should be located at WL9 according to the sector index average value of 9, and determines that the sector target range SR2 should include three word lines, namely WL8, WL9, and WL10, based on the sector dispersion of 3.

[0124] It should be noted that the actual read pattern may show different degrees of distribution within the sector, rather than being completely concentrated on a specific word line. For example, in the word line sector WLS1, although the statistical result shows an average value of 4, the actual reads may be distributed throughout the sector, but the read frequency near WL4 is relatively high. The statistical values are used to capture this overall distribution trend and identify the most critical word line range.

[0125] During the data migration phase, the processor 211 only reads the data on six word lines within the section target ranges SR1 and SR2, temporarily stores it in the buffer memory 214, and then rewrites this data at other locations in the memory module 220. After the migration is completed, the processor 211 resets the entire preset storage unit and the read counts and statistical values of each section to prepare for the next round of monitoring.

[0126] Through the section division mechanism, the method of the present disclosure can simultaneously identify and process multiple read hotspots within a preset storage unit, avoid misjudgment of hotspots caused by a single average value, and achieve more accurate read interference management. In actual application scenarios, such as when a database system accesses multiple data tables simultaneously or an operating system runs multiple applications simultaneously, read requests are often distributed in multiple non-adjacent regions. Traditional methods may misjudge the read dispersion as a result of a large overall dispersion and perform global data migration; while the method of the present disclosure can accurately identify each hotspot region through section division, significantly reducing the amount of unnecessary data migration.

[0127] For example, in Figure 6 the example shown, if there are 100 word lines in the preset storage unit, the traditional method may need to migrate the data of all 100 word lines, while the method of the present disclosure only needs to migrate the data of 6 word lines, reducing the migration amount by 94%. This optimization not only reduces write amplification, but also reduces system resource consumption and IO jitter, significantly improving the performance and reliability of the storage system.

[0128] In addition, the word line section division also has the characteristic of being flexibly adjustable. The processor 211 can dynamically adjust the section division granularity and the preset section dispersion threshold according to the actual workload and application scenario to further optimize the system performance. For example, in an application scenario with a highly concentrated data access pattern, a larger section division granularity can be adopted; while in a scenario with a more complex data access, a smaller section division granularity can be adopted to more accurately identify multiple hotspot regions.

[0129] This embodiment also provides a computer program product, including computer-readable code, or a non-volatile computer-readable storage medium carrying the computer-readable code. When the computer-readable code runs in a processor, the processor executes the steps of the above data reading method. This computer program product can be specifically implemented in a manner of hardware, firmware, software, or a combination thereof. In an optional embodiment, the computer program product is specifically embodied as a computer storage medium. In another optional embodiment, the computer program product is specifically embodied as a software product, such as a Software Development Kit (SDK), etc.

[0130] Based on the above, the memory management method and memory controller provided by the present disclosure have significant technical effects. By combining the dual judgment mechanism of read count and dispersion, the read hot spot area is accurately identified, and a targeted data migration strategy is realized, significantly reducing the amount of data migration in the read interference management process. In addition, the word line section division mechanism of the present disclosure further optimizes the read interference management in the multi-hot spot scenario, and can simultaneously identify and process multiple read concentrated areas. Compared with the traditional method, the method of the present disclosure can reduce the amount of data migration by up to more than 90%, effectively reducing the write amplification and system resource consumption. At the same time, due to the reduction of unnecessary data migration operations, the IO jamming phenomenon is significantly reduced, and the system response speed and user experience are improved. On the other hand, the method of the present disclosure has high flexibility and adaptability, and can optimize parameters according to different application scenarios and data access patterns (for example, adjust various related thresholds), and is applicable to various complex storage system environments. Generally speaking, the present disclosure provides an efficient read interference management solution that takes into account both data reliability and system performance, improving the data stability and working efficiency of the storage device.

[0131] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A memory management method, applied to a storage device configured with a memory module, characterized in that The method includes: For each preset storage unit of the memory module, record the corresponding read count, where the preset storage unit includes multiple word lines; When each preset storage unit is read, calculate a first statistical value and a second statistical value corresponding to the preset storage unit according to the read word lines; When the read count of the preset storage unit reaches a preset read count threshold, obtain the corresponding first statistical value and second statistical value; If the second statistical value is less than a preset dispersion threshold, determine multiple target word lines among the multiple word lines according to the first statistical value and the second statistical value; and Only move the target data stored in the multiple target word lines.

2. The memory management method according to claim 1, wherein After obtaining the first statistical value and the second statistical value of the preset storage unit, the method further includes: If the second statistical value is not less than the preset dispersion threshold, move all the data stored in the preset storage unit.

3. The memory management method according to claim 1, wherein The first statistical value is the average value of the respective index numbers of all the read word lines that have been read; and The second statistical value is a statistic representing the degree of dispersion of the respective index numbers of all the read word lines that have been read.

4. The memory management method according to claim 3, wherein The method further includes: Calculate the mean value according to the current read word line index number, the historical first statistical value and the read count, and update the first statistical value.

5. The memory management method according to claim 3, wherein, The method further includes: Calculate the dispersion degree according to the current read word line index number, the historical second statistical value and the read count, and update the second statistical value.

6. The memory management method according to claim 1, wherein Determining multiple target word lines among the multiple word lines according to the first statistical value and the second statistical value includes: Determine the position of a target range according to the first statistical value, and determine the width of the target range according to the second statistical value; Determine the word lines within the target range among the multiple word lines as the target word lines.

7. The memory management method according to claim 6, wherein Determining the word lines within the target range among the multiple word lines as the target word lines includes: Determine the central position of the target range according to the first statistical value, and set the specific word line closest to the first statistical value as the central target word line; and Determine the range width of the target range according to the second statistical value, and use the central target word line and one or more other specific word lines corresponding to the range width before and after as the target word lines, where the range width and the second statistical value have a positive correlation adaptive mapping relationship.

8. The memory management method according to claim 1, wherein The method further includes: Divide the multiple word lines of each preset storage unit into multiple word line sections; Calculate a corresponding first section statistical value and a second section statistical value for each word line section respectively; When the read count of the preset storage unit reaches the preset read count threshold, obtain the first section statistical value and the second section statistical value of each word line section respectively; If the second section statistical value of the word line section is less than the preset dispersion threshold, determine the section target word lines according to the first section statistical value and the second section statistical value corresponding to the word line section; Only move the section target data stored in multiple groups of the section target word lines.

9. The memory management method according to claim 8, wherein, Determining the sector target word lines based on the first sector statistic value and the second sector statistic value corresponding to the word line sector includes: The first sector statistic value is used to determine the central position of the sector target range, and the second sector statistic value is used to determine the range width of the sector target range; Determine the word lines within the sector target range in the word line sector as the sector target word lines.

10. The memory management method according to claim 1, wherein Wherein the preset storage unit is a physical block, a plane or a chip.

11. A memory controller for controlling a storage device configured with a memory module, characterized in that, The memory controller includes: A memory interface control circuit for electrically connecting to the memory module; and A processor electrically connected to the memory interface control circuit, wherein the processor is also electrically connected to the connection interface circuit of the storage device to electrically connect to the host system, Wherein the processor is configured to: For each preset storage unit of the memory module, record the corresponding number of read times, wherein the preset storage unit includes a plurality of word lines; When each preset storage unit is read, calculate a first statistic value and a second statistic value corresponding to the preset storage unit according to the read word lines; When the number of read times of the preset storage unit reaches a preset read times threshold, obtain the corresponding first statistic value and second statistic value; If the second statistic value is less than a preset dispersion threshold, determine a plurality of target word lines among the plurality of word lines according to the first statistic value and the second statistic value; and Only move the target data stored in the plurality of target word lines.

12. The memory controller according to claim 11, wherein After obtaining the first statistic value and the second statistic value of the preset storage unit, the processor is further configured to: If the second statistic value is not less than a preset dispersion threshold, move all the data stored in the preset storage unit.

13. The memory controller according to claim 11, wherein The first statistic value is the average value of the respective index numbers of all the read word lines that have been read; and The second statistic value is a statistic representing the degree of dispersion of the respective index numbers of all the read word lines that have been read.

14. The memory controller according to claim 13, wherein The processor is further configured to: Calculate the mean value according to the current read word line index number, the historical first statistic value and the number of read times and update the first statistic value.

15. The memory controller according to claim 13, wherein The processor is further configured to: Calculate the dispersion degree according to the current read word line index number, the historical second statistic value and the number of read times and update the second statistic value.

16. The memory controller according to claim 11, wherein, Determining the plurality of target word lines among the plurality of word lines according to the first statistic value and the second statistic value includes: Determine the position of a target range according to the first statistic value, and determine the width of the target range according to the second statistic value; Determine the word lines within the target range among the plurality of word lines as target word lines.

17. The memory controller according to claim 16, wherein Determining the word lines within the target range among the plurality of word lines as the target word lines includes: Determine the central position of the target range according to the first statistic value, and set the specific word line closest to the first statistic value as the central target word line; and Determine the range width of the target range according to the second statistical value, and use the central target word line and one or more other specific word lines corresponding to the range width before and after as the target word lines, where the range width and the second statistical value have a positive correlation adaptive mapping relationship.

18. The memory controller according to claim 11, wherein The processor is further configured to: Divide the multiple word lines of each preset storage unit into multiple word line segments; Calculate the corresponding first segment statistical value and second segment statistical value for each word line segment respectively; When the read count of the preset storage unit reaches the preset read count threshold, obtain the first segment statistical value and the second segment statistical value of each word line segment respectively; If the second segment statistical value of the word line segment is less than the preset dispersion threshold, determine the segment target word line according to the first segment statistical value and the second segment statistical value corresponding to the word line segment; Only move the segment target data stored in multiple groups of the segment target word lines.

19. The memory controller according to claim 18, wherein, Determining the segment target word line according to the first segment statistical value and the second segment statistical value corresponding to the word line segment includes: The first segment statistical value is used to determine the central position of the segment target range, and the second segment statistical value is used to determine the range width of the segment target range; Determine the word lines within the segment target range in the word line segment as the segment target word lines.

20. The memory controller according to claim 11, wherein Where the preset storage unit is a physical block, a plane or a chip.

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