Computing device and tuning method

Abstract

The invention provides computing equipment and an adjusting and optimizing method, and a temperature detection assembly of the computing equipment is used for monitoring the working temperature of a central processing unit under the condition that the central processing unit is overclocked, and sending a first control signal to a power supply unit under the condition of over-temperature; the power supply unit is further used for sending a frequency reduction signal to the central processing unit under the condition that the first control signal is received, and the frequency reduction signal is used for reducing the working frequency of the central processing unit so that the working temperature of the central processing unit can be smaller than a preset temperature threshold value; in this way, under the condition that the central processing unit overclocks, over-temperature protection can be conducted on the central processing unit, and therefore the protection strength of the central processing unit can be improved.

Description

Technical Field

[0001] The present application belongs to the field of server technology, and in particular relates to a computing device and a tuning method for the computing device. Background Art

[0002] With the rapid development of information technology, the performance improvement of the central processing unit, as the core component of computing devices, is directly related to the computing speed and efficiency of the entire system.

[0003] In the related art, the CPU has a built-in overclocking protection mechanism to prevent the CPU from overheating due to overclocking. When the CPU needs to enter overclocking, the restriction of the overclocking protection mechanism needs to be unlocked. However, after the overclocking protection mechanism is unlocked, the CPU is prone to overheating due to overclocking.

[0004] Therefore, how to protect the central processing unit when the central processing unit is in an overclocked working state is a problem that technical personnel in this field need to solve at present. Summary of the invention

[0005] The embodiments of the present application provide a computing device and a tuning method for the computing device, which can monitor the operating temperature of the central processing unit when the central processing unit of the computing device is in an overclocked working state to ensure the normal operation of the central processing unit.

[0006] A first aspect of an embodiment of the present application proposes a computing device, which includes a central processing unit, a power supply unit and a temperature detection component; the power supply unit is connected to the central processing unit; the temperature detection component is connected to the central processing unit and the power supply unit respectively, and the temperature detection component is used to: monitor the operating temperature of the central processing unit when the operating frequency of the central processing unit is greater than a preset frequency threshold, and send a first control signal to the power supply unit when the operating temperature is greater than the preset temperature threshold; the power supply unit is also used to send a frequency reduction signal to the central processing unit when receiving the first control signal, and the frequency reduction signal is used to reduce the operating frequency of the central processing unit so that the operating temperature of the central processing unit is less than the preset temperature threshold.

[0007] It can be seen from the above that the technical solution provided in the embodiment of the present application can monitor the operating temperature of the central processing unit when the operating frequency of the central processing unit is greater than the preset frequency threshold (referred to as overclocking), and send a first control signal to the power supply unit when the operating temperature is greater than the preset temperature threshold (referred to as overtemperature). The power supply unit is used to send a frequency reduction signal to the central processing unit according to the first control signal, and the central processing unit then performs frequency reduction processing according to the frequency reduction signal. Therefore, it is beneficial to perform over-temperature protection on the central processing unit when the central processing unit is overclocked, which is beneficial to improve the protection of the central processing unit.

[0008] That is to say, under normal circumstances, the operating frequency of the central processing unit will not exceed the preset frequency threshold; however, under specific circumstances, the operating frequency of the central processing unit will exceed the preset frequency threshold, and in this overclocking situation, the central processing unit is prone to overheating. However, in this application, by setting overheat protection, the temperature of the central processing unit can be detected when the central processing unit operates overclocked, and the central processing unit can be triggered to downshift when it overheats, improving the protection of the central processing unit.

[0009] In some embodiments of the present application, the temperature detection component is further configured to send a second control signal to the power supply unit; the power supply unit is configured to allow the operating frequency of the central processing unit to be greater than the preset frequency threshold when receiving the second control signal.

[0010] It can be understood that under normal circumstances, the power supply unit can limit the energy provided to the central processing unit to limit the operating frequency of the central processing unit within a range less than the preset frequency threshold. Under specific circumstances, the temperature detection component sends a second control signal to the power supply unit, and the power supply unit releases the restriction on the operating frequency of the central processing unit according to the second control signal, and at this time, the operating frequency of the central processing unit is allowed to be greater than the preset frequency threshold.

[0011] In some embodiments of the present application, the temperature detection component includes a management unit and a logic unit;

[0012] The management unit is configured to monitor the operating temperature of the central processing unit when the operating frequency of the central processing unit is greater than the preset frequency threshold, and send a third control signal to the logic unit when the operating temperature is greater than the preset temperature threshold;

[0013] The logic unit is configured to send a first control signal to the power supply unit when receiving the third control signal.

[0014] In this way, when the operating frequency of the central processing unit is greater than the preset frequency threshold, the management unit detects the operating temperature of the central processing unit; the logic unit sends a first control signal to the power supply unit according to the operating temperature.

[0015] In some embodiments of the present application, the computing device further includes a switch; a first end of the switch is connected to an end of the power supply unit for sending a downshift signal; a second end of the switch is connected to an end of the logic unit for sending a first control signal; a third end of the switch is grounded; the second end is a control end.

[0016] It can be understood that, under normal circumstances, the power supply unit outputs a high-level signal to the central processing unit; in the case where the central processing unit overclocks, the switch connects the first terminal to the third terminal and grounds it according to the first control signal. At this time, the high-level signal output by the power supply unit is pulled low, and thus a downclock signal (low-level signal) can be output to the central processing unit to trigger the central processing unit to downclock.

[0017] In some embodiments of the present application, the computing device further includes a low-voltage power supply, and the low-voltage power supply is connected to the first terminal of the switch. In this way, after the switch is turned on, the low-voltage power supply continuously outputs a low-level signal.

[0018] In some embodiments of the present application, the management unit is used to output a second control signal.

[0019] In some embodiments of the present application, the central processing unit is further used to determine the increasing space of its own current according to the current reporting signal, and the increasing space is negatively correlated with the signal value of the current reporting signal; the bias signal is used to reduce the current of the central processing unit currently indicated by the current reporting signal.

[0020] The larger the current of the central processing unit currently indicated by the current reporting signal, the smaller the increasing space of the central processing unit's own current; the smaller the current of the central processing unit currently indicated by the current reporting signal, the larger the increasing space of the central processing unit's own current. After the bias signal reduces the reporting signal, the increasing space of the central processing unit's own current can be effectively increased. For example, the original value of the current reporting signal represents a current of 9A, the bias signal is -1A, and the signal value of the reduced current reporting signal represents a current of 8A. The maximum limit current of the central processing unit itself is 10A. Based on the current 8A, the central processing unit can increase its own current by 2A to the maximum limit current. After being adjusted by the bias signal, the actual current of the central processing unit can be adjusted to 11A to exceed the maximum limit current of the central processing unit.

[0021] In a second aspect, the present application further provides a tuning method for a computing device. The computing device includes: a central processing unit; a power supply unit connected to the central processing unit; a temperature detection component respectively connected to the central processing unit and the power supply unit;

[0022] The tuning method includes:

[0023] When the operating frequency of the central processing unit is greater than a preset frequency threshold, the temperature detection component monitors the operating temperature of the central processing unit, and when the operating temperature is greater than a preset temperature threshold, it sends a first control signal to the power supply unit;

[0024] The power supply unit outputs a frequency reduction signal to the central processing unit in response to the first control signal; the frequency reduction signal is used to reduce the operating frequency of the central processing unit so that the operating temperature of the central processing unit is less than a preset temperature threshold.

[0025] The above tuning method can increase the over-temperature protection of the central processing unit after overclocking the central processing unit, so as to protect the central processing unit when it operates at an overclocked frequency.

[0026] In some embodiments of the present application, the tuning method further includes:

[0027] The temperature detection component sends a second control signal to the power supply unit;

[0028] The power supply unit allows the operating frequency of the central processing unit to be greater than a preset frequency value in response to the second control signal.

[0029] The above tuning method can allow the operating frequency of the central processing unit to be greater than a preset frequency value through the temperature detection component, so that the central processing unit operates at an overclocked frequency.

[0030] In some embodiments of the present application, the tuning method further includes:

[0031] Obtain the first control signal output by the temperature detection component;

[0032] The power supply unit outputs a frequency reduction signal to the central processing unit according to the first control signal.

[0033] In some embodiments of the present application, the temperature detection component includes a management unit and a logic unit; before obtaining the first control signal output by the temperature detection component, it further includes:

[0034] The management unit monitors the operating temperature of the central processing unit when the operating frequency of the central processing unit is greater than a preset frequency threshold, and sends a third control signal to the logic unit when the operating temperature is greater than the preset temperature threshold;

[0035] When the logic unit receives the third control signal, it sends a first control signal to the power supply unit.

[0036] In some embodiments of the present application, the power supply unit is further configured to send a current reporting signal to the central processing unit, the current reporting signal is used to indicate the current operating current of the central processing unit, and the tuning method further includes:

[0037] The tuning method further includes: the temperature detection component sends a bias signal to the power supply unit, and the bias signal is used to indicate the adjustment of the magnitude of the current reporting signal. Description of the Drawings

[0038] Figure 1 Schematic diagram of the frame structure of a computing device provided by an embodiment of the present application;

[0039] Figure 2 Schematic diagram of the frame structure of a computing device provided by another embodiment of the present application;

[0040] Figure 3 Schematic diagram of the frame structure of a computing device provided by yet another embodiment of the present application;

[0041] Figure 4 Schematic diagram of the circuit structure of a computing device provided by an embodiment of the present application;

[0042] Figure 5 Schematic diagram of the steps of a tuning method provided by an embodiment of the present application;

[0043] Figure 6 Schematic diagram of the steps of a tuning method provided by another embodiment of the present application.

[0044] Specific element symbol description: 100 - power supply unit, 200 - central processing unit, 300 - temperature detection component, 310 - management unit, 320 - logic unit, 400 - power supply unit, 1000 - main board, Q1 - switch, R1 - pull-up resistor. Detailed implementation manners

[0045] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0046] It should be noted that when an element is referred to as being "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0047] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present application, "a plurality of" means two or more unless otherwise specifically defined.

[0048] It is important to know that with the rapid development of contemporary information technology, the performance improvement of the CPU, as the core component of various computing devices, has become a key factor in promoting the leap in the computing speed and efficiency of the entire system. The performance of the CPU not only determines the speed of data processing, but also directly affects the overall response time of the device and the user experience.

[0049] In existing CPUs, in order to ensure system reliability and security, most CPU manufacturers have set up overclocking protection mechanisms in advance. For example, CPUs based on the AMD platform will have an overclocking protection mechanism pre-installed. The core of the overclocking protection mechanism is that when the CPU's operating frequency reaches the frequency threshold set by the CPU manufacturer, it can automatically trigger protection measures to limit the CPU's operating frequency, thereby effectively preventing the risk of overheating caused by the CPU operating at a higher frequency and ensuring that the CPU operates within a safe operating temperature range.

[0050] However, in actual application scenarios, especially in situations that require high-intensity computing or fast response, such as Al computing, users often hope that the CPU can temporarily break through conventional limitations and enter overclocking mode to obtain higher performance output. At this time, it is necessary to remove the preset overclocking protection mechanism restrictions through specific means. However, once the overclocking protection mechanism is released, when the CPU runs in an overclocked state, its power consumption and heat generation will increase significantly. If there is a lack of effective heat dissipation measures or temperature monitoring, it is very easy to cause the CPU to overheat, which may cause system crashes, hardware damage, and even safety risks.

[0051] Therefore, the present application improves the relevant computing equipment and tuning methods based on this.

[0052] In specific implementations, the computing devices mentioned in this application include, but are not limited to, terminals or servers. In other words, the computing device can be a server or a terminal, or a system composed of a server and a terminal. Among them, the above-mentioned terminal can be an electronic device, including but not limited to mobile phones, tablet computers, desktop computers, laptop computers, handheld computers, in-vehicle devices, intelligent voice interaction devices, augmented reality / virtual reality (AR / VR) devices, and other mobile internet devices (MID) with network access capabilities, etc. Among them, the above-mentioned server can be an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, vehicle-road collaboration, content delivery network (CDN), and big data and artificial intelligence platforms.

[0053] In some embodiments, the server can be at least one of a rack server, an AI server, a high-density server, and an all-in-one cabinet server.

[0054] Please refer to Figure 1 , Figure 1 which shows a schematic diagram of the framework structure of the computing device provided in this embodiment. The computing device of this embodiment includes a central processing unit 200 (CPU), a power supply unit 100, a management unit 310, and a logic unit 320 provided on the main board.

[0055] The central processing unit 200, the power supply unit 100, the management unit 310, and the logic unit 320 involved in the embodiments of this application will be described below. The central processing unit 200 is the core component of the computing device, responsible for executing instructions in the program, processing data, and performing various computing tasks. The performance of the central processing unit 200 will directly affect the overall computing power and response speed of the computing device. The central processing unit 200 can be a central processing unit 200 based on the x86 architecture or the ARM (advanced RISC machines) architecture. For example, the central processing unit 200 can be a CPU. The central processing unit 200 can run an operating system (such as the Linux operating system or the Windows operating system) and run various application software based on the operating system.

[0056] The power supply unit 100 is responsible for providing stable and accurate voltages for the CPU and other components. The power supply unit 100 generates various voltage levels required by the CPU by regulating the input voltage, ensuring that the CPU and other components can operate properly. The power supply unit 100 can be a VRM (Voltage Regulator Module), or a VRD (Voltage Regulator Down), or other devices with corresponding functions. Among them, the VRD can monitor the power supply voltage of the central processing unit 200 and adjust the voltage level in real time as needed to ensure that the central processing unit 200 operates in a stable voltage environment. The VRD is mainly applied to computer systems and servers that require precise voltage control. The VRM can adjust the magnitude of the output voltage. Therefore, multiple VRMs can usually be set on the motherboard so that their different output voltage magnitudes can meet the power supply requirements of different components on the motherboard. For example, the output voltage of the VRM can be 3.3V and 12V, which can supply power to the BMC and the CPU respectively. The VRM has the characteristics of high performance, high reliability and high stability. It can provide accurate voltage output and has safety functions such as overvoltage protection and overcurrent protection.

[0057] The management unit 310 can be used to monitor the hardware status of the computing device. The management unit 310 can be used to monitor the operating conditions of the server, such as temperature, fan speed, power supply status, operating system status, etc. The management unit 310 operates independently of the server and is not affected by the server. It can perform some operations such as firmware upgrade, viewing machine equipment, and remotely controlling the machine to power on when the server is not powered on, and can record key logs when the server crashes.

[0058] The logic unit 320 can implement specific logic functions according to needs, such as interface control, signal conversion, timing control, etc., which is beneficial to improving the flexibility of the system.

[0059] In some embodiments, please continue to refer to Figure 1 , the computing device further includes a power supply unit (PSU). The function of the power supply unit is to convert the externally input alternating current into direct current required inside the computing device. For example, 220V alternating current can be converted into direct current of 12V or other voltages. After being converted into direct current, it is supplied to the power supply unit 100 for voltage regulation and then powers different components on the motherboard of the computing device.

[0060] Please refer to Figure 2 , Figure 2The schematic diagram of the frame structure of the computing device provided in this embodiment is shown. The computing device in this embodiment includes a central processing unit 200, a power supply unit 100 connected to the central processing unit 200, and a temperature detection component 300. The temperature detection component 300 is respectively connected to the central processing unit 200 and the power supply unit 100.

[0061] It should be noted that the temperature detection component 300 may include the management unit 310 and the logic unit 320 in the above embodiment. In this application, the management unit 310 is provided to detect the temperature of the central processing unit 200.

[0062] In one implementation, the management unit 310 may be a Baseboard Management Controller (BMC); the logic unit may be a Complex Programmable Logic Device (CPLD).

[0063] Please continue to refer to Figure 2 , the temperature detection component 300 in this embodiment is used for: when the operating frequency of the central processing unit 200 is greater than a preset frequency threshold, monitoring the operating temperature of the central processing unit 200, and when the operating temperature is greater than a preset temperature threshold, sending a first control signal to the power supply unit 100; the power supply unit 100 is further used for, when receiving the first control signal, sending a frequency reduction signal to the central processing unit 200, and the frequency reduction signal is used to reduce the operating frequency of the central processing unit 200 so that the operating temperature of the central processing unit 200 is less than the preset temperature threshold.

[0064] It can be understood that the power supply unit 100 can provide the required electrical energy for the central processing unit 200; the power supply unit 100 can also perform overclocking protection on the central processing unit 200 to avoid the operating frequency of the central processing unit 200 being greater than the preset frequency threshold, resulting in overload of the central processing unit 200. Among them, the overclocking protection can be achieved through overcurrent protection or overvoltage protection. The power supply unit 100 transmits a frequency reduction signal or other signals (normal signals) to the central processing unit 200. For example, the normal signal is a high-level signal and the frequency reduction signal is a low-level signal. The low-level signal output can be achieved by setting the high-level signal to low. When the power supply unit 100 receives the first control signal, if the power supply unit 100 is transmitting a frequency reduction signal to the central processing unit 200 at this time, the signal remains unchanged; if the power supply unit 100 is transmitting other signals to the central processing unit 200 at this time, the other signals are switched to a frequency reduction signal.

[0065] It should be noted that the working frequency of the central processing unit 200 being greater than the preset frequency threshold may be due to active overclocking or passive overclocking. Active overclocking refers to the overclocking phenomenon caused by the computing device actively releasing the overclocking limit of the central processing unit 200 according to actual requirements (such as supercomputing, fast response, benchmark scoring, etc.). Passive overclocking refers to the overclocking phenomenon caused by the overclocking limit of the central processing unit 200 being released under the influence of special circumstances (such as computing device failure, etc.).

[0066] As can be seen from the above, when the working frequency of the central processing unit 200 is greater than the preset frequency threshold, monitor the working temperature of the central processing unit 200, and when the working temperature is greater than the preset temperature threshold (referred to as overheating), send a first control signal to the power supply unit 100. The power supply unit 100 is used to send a frequency reduction signal to the central processing unit 200 according to the first control signal, and the central processing unit 200 then performs frequency reduction processing according to the frequency reduction signal; therefore, it is beneficial to perform overheating protection on the central processing unit 200 when the central processing unit 200 is overclocked, and further beneficial to improve the protection strength for the central processing unit 200.

[0067] That is to say, usually, the power supply unit 100 can limit the working frequency of the central processing unit 200, that is, the working voltage or working current of the central processing unit 200 will not exceed the preset voltage threshold or current threshold. At the same time, the working frequency of the central processing unit 200 will not exceed the preset frequency threshold. The implementation principle of this mechanism is that once the working voltage or working current of the central processing unit 200 reaches the preset voltage threshold or current threshold, the power supply unit 100 sends a frequency reduction signal to the central processing unit 200, triggering the central processing unit 200 to reduce its frequency, thereby reducing the working power of the central processing unit 200. However, in some scenarios with relatively high requirements for the computing power of the computing device, the central processing unit 200 needs to work at a higher frequency, and a higher frequency means that the working current or working voltage of the central processing unit 200 will also exceed the preset threshold. If the power supply unit 100 still limits the working power of the central processing unit 200 at this time, it will not be able to meet the requirement for the central processing unit 200 to work at a higher frequency and cannot meet the demand for greater computing power.

[0068] Based on the above factors, if we want the central processing unit 200 to operate at a higher operating frequency, that is, the operating frequency of the central processing unit 200 can be made greater than the preset frequency to meet the scenario of greater computing power requirements, it is necessary to turn off the power unit 100's limit on the operating power of the central processing unit 200. And in order to further ensure the safety and reliability of the operation of the central processing unit 200 in this case, to avoid damage or even burnout of the central processing unit 200 due to overheating when the central processing unit 200 operates at a higher frequency, resulting in business interruption and greater losses. In this application, by setting over-temperature protection, when the central processing unit 200 operates at a working frequency exceeding the preset frequency (for the convenience of description, hereinafter referred to as overclocking), the temperature of the central processing unit 200 can still be detected, and the central processing unit 200 is triggered to downclock when it is over-temperature.

[0069] In some embodiments of this application, please refer to Figure 3 and refer to Figure 4 , Figure 3 which shows a schematic diagram of the framework structure of the computing device provided in this embodiment. Figure 4 which shows a schematic diagram of the circuit structure of the computing device provided in this embodiment; the temperature detection component 300 of this embodiment is further configured to send a second control signal to the power unit 100; the power unit 100 is configured to allow the operating frequency of the central processing unit 200 to be greater than a preset frequency threshold when receiving the second control signal.

[0070] It can be understood that under normal circumstances, the power unit 100 can limit the energy provided to the central processing unit 200 to achieve limiting the operating frequency of the central processing unit 200 within a range less than the preset frequency threshold. In a specific case, the temperature detection component 300 sends a second control signal to the power unit 100, and the power unit 100 releases the limit on the operating frequency of the central processing unit 200 according to the second control signal. At this time, the operating frequency of the central processing unit 200 is allowed to be greater than the preset frequency threshold.

[0071] In some embodiments of this application, please continue to refer to Figure 4 , the management unit 310 of this embodiment is configured to monitor the operating temperature of the central processing unit 200 when the operating frequency of the central processing unit 200 is greater than the preset frequency threshold, and send a third control signal to the logic unit 320 when the operating temperature is greater than the preset temperature threshold; the logic unit 320 is configured to send a first control signal to the power unit 100 when receiving the third control signal.

[0072] It can be understood that when the operating frequency of the central processing unit 200 is greater than the preset frequency threshold, the management unit 310 detects the operating temperature of the central processing unit 200; the logic unit 320 sends a first control signal to the power supply unit 100 according to the operating temperature.

[0073] In some embodiments of the present application, please continue to refer to Figure 4 , the computing device of this embodiment further includes a switch Q1; the first end of the switch Q1 is connected to the end of the power supply unit 100 for sending a frequency reduction signal; the second end of the switch Q1 is connected to the end of the logic unit 320 for sending a first control signal; the third end of the switch Q1 is grounded; the second end is the control end.

[0074] It can be understood that under normal circumstances, the power supply unit 100 outputs a high-level signal to the central processing unit 200; when the central processing unit 200 overclocks, the switch Q1 connects the first end to the third end and grounds it according to the first control signal. At this time, the high-level signal output by the power supply unit 100 is pulled low, and thus a frequency reduction signal (low-level signal) can be output to the central processing unit 200 to trigger the central processing unit 200 to reduce its frequency.

[0075] The switch Q1 controlled by the logic unit 320 in the above embodiment may include switches Q1 such as N-type metal-oxide-semiconductor field-effect transistors (N-metal-oxide-semiconductor field-effect transistor, abbreviated as NMOS), P-type metal-oxide-semiconductor field-effect transistors (P-metal-oxide-semiconductor field-effect transistor, abbreviated as PMOS), or triodes. Further, it may also include other circuits capable of collecting level signals. The embodiments of the present application do not limit this.

[0076] In some embodiments of the present application, please continue to refer to Figure 4 , the computing device further includes a low-voltage power supply, and the low-voltage power supply is connected to the first end of the switch Q1. In this way, after the switch Q1 is turned on, the low-voltage power supply continuously outputs a low-level signal.

[0077] In some embodiments, the low-voltage power supply is further connected with a pull-up resistor R1.

[0078] In some embodiments, a second control signal is output through the management unit 310.

[0079] In some embodiments, the management unit 310 takes the BMC (Baseboard Management Controller) as an example, and the logic unit 320 takes the CPLD (Complex Programmable Logic Device) as an example. In other implementation manners, the management unit 310 and the logic unit 320 may also be other types of controllers. For example, the logic unit 320 may also be an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), etc.

[0080] In one implementation manner, the temperature detection component 300 includes a BMC and a CPLD. The BMC is configured to send a second control signal to the VRM in a scenario where the server requires a large computing power and the operating frequency of the central processing unit 200 is greater than a preset frequency threshold. The second control signal is used to turn off the limitation of the VRM on the CPU operating power. That is to say, after the VRM receives the second control signal, it will not limit the operating power of the CPU, and the CPU can operate in an overclocking mode (operating frequency greater than the preset frequency). The BMC is further configured to detect the temperature of the central processing unit 200 and send a third control signal to the CPLD when the temperature exceeds the temperature threshold when the central processing unit is operating in the overclocking mode. The CPLD is configured to send a first control signal to the switch Q1 when receiving the third control signal. The first control signal is used to control the switch Q1 to conduct. When the switch Q1 conducts, the VRM can send a down-frequency signal to the CPU to reduce the operating frequency of the CPU, thereby reducing the operating temperature of the CPU.

[0081] In some embodiments of the present application, please continue to refer to Figure 4 , the management unit 310 takes the BMC as an example, and the logic unit 320 takes the CPLD as an example. The down-frequency signal in this embodiment is a low-level signal. The BMC is configured to output a third control signal to the logic unit 320 when the temperature exceeds the temperature threshold. The logic unit 320 outputs a first control signal to the switch Q1 when receiving the third control signal. The switch Q1 sets the signal output from the power supply unit 100 to the central processing unit 200 to low level to form a down-frequency signal.

[0082] When the overclocking protection mechanism is turned off, if the central processing unit 200 overclocks and overheats, the switch Q1 sets the high-level signal to low level to form a low-level signal. At this time, the signal transmitted to the central processing unit 200 is a low-level signal to trigger the central processing unit 200 to perform a down-frequency operation.

[0083] Specifically, the signal process is as follows: The BMC obtains the temperature signal obtained by temperature monitoring from the central processor 200. The BMC compares the temperature value of the temperature signal with the temperature threshold. If the temperature value exceeds the temperature threshold, the BMC outputs a third control signal to the CPLD. The CPLD outputs a first control signal to the gate of the switch Q1 according to the third control signal to turn on the switch Q1. At this time, the high-level signal output by the power supply unit 100 to the central processor 200 is set low, and the power supply unit 100 transmits a frequency-down signal of low level to the central processor 200. The central processor 200 performs frequency-down processing on itself according to the frequency-down signal.

[0084] In another embodiment, the frequency-down signal can also be a high-level signal (not shown in the figure), and the switch Q1 is in a normally closed state, so that the power supply unit 100 continuously outputs a low-level signal to the central processor 200. When the central processor 200 needs to be frequency-down, the switch Q1 is disconnected so that the power supply unit 100 outputs a high-level signal.

[0085] In some embodiments, the switch Q1 controlled by the logic unit 320 is an N-channel MOS transistor, and the S pole of the switch Q1 is connected to the low-voltage power supply, and the D pole of the switch Q1 is grounded.

[0086] In some embodiments of the present application, please continue to refer to Figure 4 , the current signal corresponds to the reported signal in this embodiment. The power supply unit 100 of this embodiment is further configured to send a current reporting signal to the central processor 200, and the current reporting signal is used to indicate the current working current of the central processor 200;

[0087] It can be understood that the power supply unit 100 sends a current reporting signal to the central processor 200. The central processor 200 obtains its own current according to the current reporting signal and can adjust its own current based on its own current. For example, according to the current reporting signal, it is known that the current of the central processor 200 is 9A, and the maximum limit current of the central processor 200 itself is 10A. The central processor 200 can increase its own current by 1A to the maximum limit current based on the current 9A.

[0088] The management unit 310 of this embodiment is configured to send a bias signal to the power supply unit 100, and the bias signal is used to indicate the adjustment of the magnitude of the current reporting signal.

[0089] It can be understood that since the central processing unit 200 obtains its current current based on the current reporting signal and needs to adjust its current according to the current current. If the current reporting signal remains unchanged at the true value, the central processing unit 200 cannot break through its maximum current limit. However, in this embodiment, the current reporting signal is modified by the bias signal, and the central processing unit 200 can obtain its false current based on the modified current reporting signal. For example, the maximum limit current of the central processing unit 200 is 10A, and the current true current is 10A. The current reporting signal can be modified to form a false current of 9A for itself. At this time, the central processing unit 200 can increase its current to break through the maximum limit current to achieve overclocking of the central processing unit 200.

[0090] In some embodiments of the present application, the central processing unit 200 is further configured to determine the increasing space of its own current according to the current reporting signal, and the increasing space is negatively correlated with the signal value of the current reporting signal; the bias signal is used to reduce the current working current of the indicated CPU.

[0091] It should be explained that the larger the current working current of the CPU indicated by the current reporting signal, the smaller the increasing space of the central processing unit 200's own current, and the smaller the current working current of the CPU indicated by the current reporting signal, the larger the increasing space of the central processing unit 200's own current. After the bias signal reduces the working current indicated by the reporting signal, the increasing space of the central processing unit 200's own current can be effectively increased. For example, the original value of the reporting signal represents a current of 9A, and the bias signal indicates a reduction in the reported current value, for example, it is indicated as -1A. The signal value of the reduced reporting signal represents a current of 8A. The maximum limit current of the central processing unit 200 is 10A. Based on the current 8A, the central processing unit 200 can increase its current by 2A to the maximum limit current. After being adjusted by the bias signal, the actual current of the central processing unit 200 can be adjusted to 11A to exceed the maximum limit current of the central processing unit 200.

[0092] In some embodiments, the bias signal is used to reduce the signal value of the current reporting signal to reduce the current working current of the indicated CPU.

[0093] Further, in order to better implement the computing device in any of the above embodiments, on the basis of the above computing device, please refer to Figure 5 , Figure 5 shows a schematic diagram of the steps of the tuning method provided in this embodiment; this embodiment also provides a tuning method for a computing device, and the tuning method includes:

[0094] S100: When the operating frequency of the central processing unit 200 is greater than a preset frequency threshold, the temperature detection component 300 monitors the operating temperature of the central processing unit 200, and when the operating temperature is greater than the preset temperature threshold, sends a first control signal to the power supply unit 100;

[0095] Specifically, when the management unit 310 detects that the central processing unit 200 is overheated, the management unit 310 outputs a third control signal to the logic unit 320, and the logic unit 320 outputs a first control signal according to the third control signal.

[0096] S200: The power supply unit 100 responds to the first control signal and outputs a frequency reduction signal to the central processing unit 200; the frequency reduction signal is used to reduce the operating frequency of the central processing unit 200 so that the operating temperature of the central processing unit 200 is less than the preset temperature threshold.

[0097] Specifically, the temperature of the central processing unit 200 can be monitored by the management unit 310, and the switch Q1 can be triggered to conduct by the logic unit 320, so that the power supply unit 100 outputs a frequency reduction signal to the central processing unit 200. More specifically, the third control signal conducts the switch Q1 so that the high-level signal output by the power supply unit 100 to the central processing unit 200 is set low to form a low-level frequency reduction signal.

[0098] It can be understood that the above tuning method can increase the over-temperature protection of the central processing unit 200 after allowing the central processing unit 200 to overclock, so as to protect the central processing unit 200 when it overclocks.

[0099] In some embodiments of the present application, the tuning method further includes:

[0100] The temperature detection component 300 sends a second control signal to the power supply unit 100; specifically, the management unit 310 can actively output the second control signal to the power supply unit 100.

[0101] The power supply unit 100 responds to the second control signal and allows the operating frequency of the central processing unit 200 to be greater than the preset frequency value; specifically, after the power supply unit 100 obtains the second control signal, the operating frequency of the central processing unit 200 can be greater than the preset frequency threshold, and at this time the central processing unit 200 can overclock.

[0102] In some embodiments of the present application, the tuning method includes:

[0103] Obtain the first control signal output by the temperature detection component 300;

[0104] The power supply unit 100 outputs a frequency reduction signal to the central processing unit 200 according to the first control signal. In some embodiments, please refer toFigure 6 , Figure 6 shows a schematic diagram of the steps of the tuning method provided in this embodiment; the tuning method includes:

[0105] After starting, first set the temperature threshold (over-temperature threshold T0) of the central processing unit 200, and the over-temperature threshold T0 is the safe temperature point of the central processing unit 200;

[0106] The management unit 310 outputs a second control signal and a bias signal to release the overclocking limit of the power supply unit 100 on the central processing unit 200;

[0107] The management unit 310 monitors the operating temperature T1 of the central processing unit 200;

[0108] Judge whether the operating temperature ≥ temperature threshold is satisfied, that is, judge whether T1≥T0 is satisfied. If so, the management unit 310 outputs a third control signal to the logic unit 320;

[0109] The logic device outputs a first control signal to the switch Q1 according to the third control signal and makes the switch Q1 conduct, so that the power supply unit 100 outputs a frequency reduction signal;

[0110] The central processing unit 200 performs a frequency reduction operation on itself according to the frequency reduction signal, so that the central processing unit 200 can perform high-performance (overclocking) work within the safe temperature.

[0111] In the above embodiments, the descriptions of each embodiment have their own emphases. For parts not detailed or recorded in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0112] The basic concepts have been described above. Obviously, for those skilled in the art, the above detailed disclosure is only an example and does not constitute a limitation to this application. Although not explicitly stated here, those skilled in the art may make various modifications, improvements, and corrections to this application. Such modifications, improvements, and corrections are proposed in this application, so such modifications, improvements, and corrections still fall within the spirit and scope of the exemplary embodiments of this application.

[0113] At the same time, this application uses specific terms to describe the embodiments of this application. Such as "one embodiment", "an embodiment", and / or "some embodiments" mean a certain feature, structure, or characteristic related to at least one embodiment of this application. Therefore, it should be emphasized and noted that the "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more at different positions in this specification does not necessarily refer to the same embodiment. In addition, certain features, structures, or characteristics in one or more embodiments of this application can be appropriately combined.

[0114] Similarly, it should be noted that, in order to simplify the description of the disclosure of the present application and thus help the understanding of one or more embodiments of the invention, in the foregoing description of the embodiments of the present application, sometimes multiple features are merged into one embodiment, drawing or description thereof. However, this method of disclosure does not mean that the features required by the subject matter of the present application are more than those mentioned in the claims. In fact, the features of the embodiments are less than all the features of the individual embodiments disclosed above.

[0115] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A computing device, characterized in that, Comprising: A central processing unit; A power supply unit, the power supply unit being connected to the central processing unit; A temperature detection component, the temperature detection component being respectively connected to the central processing unit and the power supply unit, the temperature detection component being configured to: when the operating frequency of the central processing unit is greater than a preset frequency threshold, monitor the operating temperature of the central processing unit, and when the operating temperature is greater than a preset temperature threshold, send a first control signal to the power supply unit; The power supply unit is further configured to, when receiving the first control signal, send a frequency reduction signal to the central processing unit, the frequency reduction signal being used to reduce the operating frequency of the central processing unit so that the operating temperature of the central processing unit is less than the preset temperature threshold.

2. The computing device according to claim 1, wherein The temperature detection component is further configured to send a second control signal to the power supply unit; the power supply unit is configured to, when receiving the second control signal, allow the operating frequency of the central processing unit to be greater than the preset frequency threshold.

3. The computing device according to claim 2, wherein The temperature detection component includes a management unit and a logic unit; The management unit is configured to: when the operating frequency of the central processing unit is greater than a preset frequency threshold, monitor the operating temperature of the central processing unit, and when the operating temperature is greater than a preset temperature threshold, send a third control signal to the logic unit; The logic unit is configured to, when receiving the third control signal, send the first control signal to the power supply unit.

4. The computing device according to claim 3, wherein The computing device further includes a switch; A first end of the switch is connected to an end of the power supply unit for sending the frequency reduction signal; a second end of the switch is connected to an end of the logic unit for sending the first control signal; a third end of the switch is grounded; The second end is a control end.

5. The computing device according to claim 4, wherein The computing device further includes a low-voltage power supply, the low-voltage power supply being connected to the first end of the switch.

6. The computing device according to claim 3, wherein The management unit is configured to output a second control signal.

7. The computing device according to any one of claims 1 to 6, characterized in that, The power supply unit is further configured to send a current reporting signal to the central processing unit, the current reporting signal being used to indicate the current operating current of the central processing unit; The temperature detection component is further configured to send a bias signal to the power supply unit, the bias signal being used to indicate an adjustment to the magnitude of the current reporting signal.

8. The computing device according to claim 7, wherein The central processing unit is further configured to determine the increasing space of its own current according to the current reporting signal, the increasing space being negatively correlated with the signal value of the reporting signal; the bias signal is used to reduce the current operating current of the central processing unit indicated by the current reporting signal.

9. A tuning method for a computing device, characterized in that, The computing device includes: a central processing unit; a power supply unit connected to the central processing unit; a temperature detection component respectively connected to the central processing unit and the power supply unit; The optimization method includes: When the operating frequency of the central processing unit is greater than a preset frequency threshold, the temperature detection component monitors the operating temperature of the central processing unit, and when the operating temperature is greater than a preset temperature threshold, sends a first control signal to the power supply unit; The power supply unit outputs a frequency reduction signal to the central processing unit in response to the first control signal; the frequency reduction signal is used to reduce the operating frequency of the central processing unit so that the operating temperature of the central processing unit is less than a preset temperature threshold.

10. The optimization method of the computing device according to claim 9, characterized in that: The method further includes: The temperature detection component sends a second control signal to the power supply unit; The power supply unit allows the operating frequency of the central processing unit to be greater than a preset frequency value in response to the second control signal.

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