Hard disk pre-reading method and device, electronic equipment and storage medium

Abstract

The invention discloses a hard disk pre-reading method and device, electronic equipment and a storage medium, and relates to the technical field of storage, and the method comprises the steps: under the condition that a data reading request is captured, analyzing the data reading request to obtain a logic block address corresponding to the data reading request, and according to the logic block address corresponding to the data reading request, obtaining a pre-reading result of the hard disk; according to the method, the access mode corresponding to the data reading request is determined, so that the pre-reading amount is adjusted, the pre-reading amount is dynamically adjusted through the access mode of the data reading request, and the data pre-reading operation is executed by using the adjusted pre-reading amount; according to the method and the device, the problem of low reading efficiency caused by cache pollution due to fixed pre-reading quantity in the related art is solved, and the technical effect of improving the cache efficiency and hit rate is achieved.

Description

Technical Field

[0001] This application relates to the field of storage technology, and in particular, to a prefetching method, apparatus, electronic device, and storage medium for a hard disk. Background Art

[0002] With the popularization of data-intensive applications, such as large-scale database queries, cloud computing storage, video stream services, etc., optimizing the hard disk read performance has become the key to improving the overall system performance. Solid State Drives (SSDs) dominate modern data storage systems due to their advantages in read and write speeds and low power consumption characteristics.

[0003] In related technologies, the prefetching strategy often uses a fixed prefetch amount. However, this method is prone to cache pollution. Cache pollution refers to the situation where many data blocks that are no longer accessed or have a low access frequency are stored in the cache, thus occupying valuable cache space and causing the data that is truly needed to not be loaded in time, reducing the cache efficiency. Therefore, related technologies have the problem of low read efficiency caused by cache pollution when using a fixed prefetch amount. Summary of the Invention

[0004] This application provides a prefetching method, apparatus, electronic device, and storage medium for a hard disk to at least solve the problem of low read performance caused by cache pollution in related technologies.

[0005] This application provides a prefetching method for a hard disk, including:

[0006] When a data read request is captured, parsing and processing the data read request to obtain the logical block address corresponding to the data read request;

[0007] Based on the logical block address corresponding to the data read request, determining the access mode corresponding to the data read request, and adjusting the prefetch amount according to the access mode corresponding to the data read request;

[0008] Based on the adjusted prefetch amount and the logical block address corresponding to the data read request, determining the prefetch address information corresponding to the data read request;

[0009] Based on the prefetch address information, performing a data prefetch operation on the hard disk and writing the obtained prefetch data into the cache.

[0010] This application also provides a prefetching apparatus for a hard disk, including:

[0011] A parsing module, configured to parse and process the data read request to obtain the logical block address corresponding to the data read request when a data read request is captured;

[0012] An adjustment module, configured to determine an access mode corresponding to the data read request based on a logical block address corresponding to the data read request, and adjust a prefetch quantity according to the access mode corresponding to the data read request;

[0013] A determination module, configured to determine prefetch address information corresponding to the data read request based on the adjusted prefetch quantity and the logical block address corresponding to the data read request;

[0014] An execution module, configured to perform a data prefetch operation on the hard disk based on the prefetch address information, and write the obtained prefetch data into a cache.

[0015] This application also provides an electronic device, including: a memory, configured to store a computer program; a processor, configured to implement the steps of any one of the above hard disk prefetch methods when executing the computer program.

[0016] This application also provides a computer-readable storage medium, in which a computer program is stored, and wherein the computer program implements the steps of any one of the above hard disk prefetch methods when executed by a processor.

[0017] This application also provides a computer program product, including a computer program, and the computer program implements the steps of any one of the above hard disk prefetch methods when executed by a processor.

[0018] Through this application, in the case of capturing a data read request, by parsing the data read request, the logical block address corresponding to the obtained data read request is obtained, so as to determine the access mode corresponding to the data read request according to the logical block address corresponding to the data read request, thereby adjusting the prefetch quantity, realizing dynamic adjustment of the prefetch quantity through the access mode of the data read request, and using the adjusted prefetch quantity to perform a data prefetch operation, making the prefetch operation more accurate, and to a certain extent solving the problem of low read efficiency caused by cache pollution easily occurring in the related art with a fixed prefetch quantity. By adaptively adjusting the prefetch quantity according to the access mode to adjust the cache content, the efficiency and hit rate of the cache are improved. To a certain extent, the number of direct accesses to the backend storage medium (such as NAND flash) can be reduced, the wear of the storage device can be reduced, and its service life can be extended. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of this application, the following will briefly introduce the drawings required for the embodiments. Obviously, the drawings in the following description are only some embodiments of this application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0020] Figure 1 Schematic diagram of an application scenario of a read-ahead method for a hard disk provided by an embodiment of the present application;

[0021] Figure 2 Schematic flow chart of an optional read-ahead method for a hard disk according to an embodiment of the present application;

[0022] Figure 3 Schematic flow chart of another optional read-ahead method for a hard disk according to an embodiment of the present application;

[0023] Figure 4 Block diagram of the structure of an optional read-ahead device for a hard disk according to an embodiment of the present application. Detailed implementation manners

[0024] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0025] It should be noted that in the description of the present application, the terms "include", "comprise" or any other variation thereof are intended to cover a non-exclusive inclusion, such that a process, method, article or device including a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. The terms "first", "second", etc. in the present application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0026] In order to enable those skilled in the art of the present technology to better understand the solution of the present application, the present application will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners.

[0027] Currently, prefetching strategies often adopt a fixed prefetching amount. However, this approach is prone to cache pollution, which refers to the situation where many data blocks that are no longer accessed or have a low access frequency are stored in the cache, thus occupying valuable cache space and reducing the cache hit rate and system performance. Therefore, in the related art, there is a problem of low read performance caused by cache pollution when using a fixed prefetching amount. To solve the above problems, an embodiment of the present application provides a prefetching method for a hard disk. When a data read request is captured, by parsing the data read request, the logical block address corresponding to the data read request is obtained, and based on the logical block address corresponding to the data read request, the access mode corresponding to the data read request is determined, so as to adjust the prefetching amount, realizing dynamic adjustment of the prefetching amount through the access mode of the data read request. Using the adjusted prefetching amount to perform data prefetching operations makes the prefetching operations more accurate, and to a certain extent solves the problem of low read efficiency caused by cache pollution in the related art due to a fixed prefetching amount. By adaptively adjusting the prefetching amount according to the access mode to adjust the cache content, the efficiency and hit rate of the cache are improved.

[0028] According to one aspect of the embodiments of the present application, a prefetching method for a hard disk is provided. Optionally, in this embodiment, the above prefetching method for a hard disk may but is not limited to be applied to a hardware environment including a terminal device 102 and a server 104 as shown in Figure 1 Figure. The server 104 can be connected to the terminal device 102 through a network and can be used to provide services (such as application services, etc.) for the terminal device 102 or a client installed on the terminal device 102. A database can be set up on the server 104 or independently of the server 104 to provide data storage services for the server 104.

[0029] The above network can include but is not limited to at least one of the following: wired network, wireless network. The above wired network can include but is not limited to at least one of the following: wide area network, metropolitan area network, local area network. The above wireless network can include but is not limited to at least one of the following: WIFI (Wireless Fidelity), Bluetooth. The terminal device 102 can be but is not limited to a PC (Personal Computer), mobile phone, tablet computer, etc. The server 104 can be but is not limited to a cloud server, server cluster or other server types.

[0030] The prefetching method for a hard disk in the embodiments of the present application can be executed by the server 104, or can be executed by the terminal device 102, or can also be jointly executed by the server 104 and the terminal device 102. Among them, when the terminal device 102 executes the prefetching method for a hard disk in the embodiments of the present application, it can also be executed by a client installed on it.

[0031] Taking the prefetch method of the hard disk in this embodiment executed by the terminal device 102 as an example, Figure 2 FIG. is a schematic flowchart of an optional prefetch method of a hard disk according to an embodiment of the present application. As Figure 2 shown, the process of this method may include the following steps:

[0032] Step S202, when a data read request is captured, parse and process the data read request to obtain the logical block address corresponding to the data read request.

[0033] It should be noted that the hard disk may be an SSD, and the hard disk may include a controller and an I / O request analysis module. Among them, the I / O request analysis module may be used to capture and analyze data read requests sent by the application program.

[0034] The data read request may refer to a request sent by an application program or an operating system to the hard disk to request the hard disk to provide the content of a specific data block. The logical block address (LBA, Logical Block Address) is an addressing method for data blocks on the hard disk, used for the logical address of data blocks on the hard disk, and is used to uniquely identify the storage location of data on the hard disk.

[0035] The logical block address in the data read request may be one or more. In practical applications, the logical block address may be a single address, or a series of consecutive or non-consecutive addresses. Specifically, when an application program or an operating system needs to read data at a specific location on the hard disk, the read request may include a logical block address; in the case of needing to read a large amount of continuous data, the read request may include a series of consecutive logical block addresses. Such requests usually occur when processing large files, database queries, or video playback. For example, when a part of a large file needs to be read, the read request may include the logical block address from the start of the file to the end, and the SSD will continuously read data according to this series of logical block addresses. In addition, the data read request may also include multiple non-consecutive logical block addresses. This request mode usually appears in the case of needing to randomly access multiple data blocks, such as random queries of databases, metadata reading of file systems, etc.

[0036] Specifically, when the SSD receives a data read request sent by the host, parse the data read request to extract the logical block address in the data read request. The logical block address corresponding to the data read request can be used to evaluate the access mode.

[0037] Optionally, the logical block address of the data read request can be mapped to a preset mapping table to obtain the physical address indicated by the data read request, and then read the corresponding data from the flash memory (such as NAND).

[0038] Step S204: Based on the logical block address corresponding to the data read request, determine the access mode corresponding to the data read request, and adjust the prefetch amount according to the access mode corresponding to the data read request.

[0039] Among them, the I / O request analysis module can also identify the access mode corresponding to the data read request, so as to adjust the prefetch amount.

[0040] The access mode can refer to the regularity of the data read request. Optionally, the access mode corresponding to the currently read data read request can be determined according to the logical block addresses corresponding to a series of recently read data read requests. The identification of the access mode can directly affect the prefetch amount adjustment strategy.

[0041] In an SSD, the prefetch amount can refer to the amount of additional data read when responding to a data read request. The size of the prefetch amount can be dynamically adjusted according to the access mode to optimize the read performance.

[0042] Optionally, the SSD can also record the timestamps of continuously captured data read requests, calculate the time intervals between the data read requests, and judge the stability of the access mode according to the statistical characteristics of these time intervals. For example, when the fluctuation of the request time interval is small, it indicates that the access mode is relatively stable and a larger prefetch amount is suitable; otherwise, the prefetch amount should be reduced.

[0043] Step S206: Based on the adjusted prefetch amount and the logical block address corresponding to the data read request, determine the prefetch address information corresponding to the data read request.

[0044] It should be noted that in the prefetch strategy of a solid-state drive (SSD) or a hard disk, the prefetch address information can refer to the additional data block addresses calculated according to the logical block address and the prefetch amount of the current data read request. These data block addresses can indicate which data blocks the SSD should prefetch in addition to the data blocks specified in the read request when responding to the current read request. For example, when the LBA of the current data read request is 1000 and the adjusted prefetch amount is 64KB (assuming each LBA stores 4KB of data), the prefetch address information may correspondingly include the data from LBA 1001 to 1015.

[0045] Optionally, the hard disk can also include a prefetch engine responsible for calculating the prefetch address information, that is, extL2P, and reading data from the NAND flash according to the prefetch address information.

[0046] In specific practice, a time interval threshold can also be set to adjust the prefetch quantity and prefetch address information in real time. When it is detected that the access pattern is stable and time is pressing, the prefetch quantity can be increased, so that the prefetch address range is correspondingly expanded; when it is detected that the pattern is unstable or the access is infrequent, the prefetch quantity can be reduced, and the prefetch quantity can be directly set to the minimum value, or even the prefetch function can be temporarily turned off.

[0047] For example, in a video stream playback application, if the SSD detects a request to read the data of the first few seconds of a video, it will calculate the prefetch address information of the video data in the next few seconds based on the prefetch policy, and load this data into the cache in advance. When the user watches the video, the SSD can quickly respond to subsequent read requests, avoiding playback buffering or latency, and providing the user with a smooth video playback experience.

[0048] Step S208: Based on the prefetch address information, perform a data prefetch operation on the hard disk, and write the obtained prefetch data into the cache.

[0049] It should be noted that the hard disk can include a storage medium using NAND flash memory as the hard disk and a cache. Among them, the NAND flash memory can be used for persistent data storage. The cache can be used to store prefetch data and hot data to improve the read performance. In this embodiment, the prefetch data can be stored in the buffer space maintained by the FCC (Flash Cache Controller), and this space is part of the cache. By analyzing the access pattern corresponding to the data read request, the prefetch quantity can be adjusted in real time, realizing the optimization of the prefetch policy, reducing unnecessary NAND flash memory access, extending the hard disk life, and at the same time improving the data throughput, that is, the number of input / output operations that can be performed per second, thereby improving the overall performance of the system.

[0050] For example, when the SSD determines that the prefetch address information is from LBA 1001 to LBA 1015, it will read the data corresponding to these LBAs from the NAND flash memory and store it in the cache, even if these data are not requested currently.

[0051] Through the embodiments of the present application, when a data read request is captured, by parsing the data read request, the logical block address corresponding to the data read request is obtained, and according to the logical block address corresponding to the data read request, the access mode corresponding to the data read request is determined, so as to adjust the prefetch amount, realizing dynamically adjusting the prefetch amount through the access mode of the data read request, and using the adjusted prefetch amount to perform the data prefetch operation, making the prefetch operation more accurate, and to a certain extent solving the problem of low read efficiency caused by cache pollution easily occurring in the related art with a fixed prefetch amount. By adaptively adjusting the prefetch amount according to the access mode to adjust the cache content, the efficiency and hit rate of the cache are improved. To a certain extent, the number of direct accesses to the backend storage medium (such as NAND flash) can be reduced, the wear of the storage device can be reduced, and its service life can be extended.

[0052] In an exemplary embodiment, the access mode corresponding to the data read request is determined from a preset set of access modes, and the set of access modes includes a random access mode and a sequential access mode. Step S204 includes: determining the address difference between the logical block address corresponding to the data read request and the logical block address corresponding to the prior read request, where the prior read request is one or more read requests captured before the data read request; in the case where the address difference is less than a first preset difference, determining that the access mode corresponding to the data read request is a sequential access mode; in the case where the address difference is greater than or equal to a second preset difference, determining that the access mode corresponding to the data read request is a random access mode, where the first preset difference is less than or equal to the second preset difference.

[0053] It should be noted that in order to better determine how to adjust the prefetch amount to optimize the data read performance, it is necessary to accurately identify the access mode corresponding to the data read request. Specifically, a set of access modes can be preset, and the set of access modes includes a random access mode and a sequential access mode. Among them, the sequential access mode can be when the LBAs accessed by a series of read requests are continuous or nearly continuous, indicating that the data access presents a continuous access mode, such as reading a large file. The random access mode can be when there is a large difference between the LBAs accessed by the read requests, indicating that the data access has no obvious pattern, such as randomly accessing small files.

[0054] Determining the access mode corresponding to a data read request can be determined based on the address difference between a prior read request and the current data read request. The prior read request can be one or more read requests captured before the data read request. To better determine the access mode of the data read request, two preset differences can be set, namely the first preset difference and the second preset difference. If the address difference is less than the first preset difference, it is considered a sequential access; if the address difference is greater than or equal to the second preset difference, it is considered a random access.

[0055] Optionally, the process of determining the first preset difference and the second preset difference can be as follows:

[0056] Step 1, collect the read request data of the SSD in different application environments, including the LBA value of each read request. Based on this data, perform statistical analysis, such as calculating the distribution of LBA differences, and identify the most common sequential access patterns and random access patterns.

[0057] Step 2, preliminarily determine the first preset difference and the second preset difference;

[0058] Step 3, set an interval between the first preset difference and the second preset difference, there is a gray area, that is, the access mode where the LBA difference is between the first preset difference and the second preset difference. The access in this gray area may contain both the tail of sequential access and the start of random access. Therefore, further logical judgment is needed to determine whether it is sequential access or random access, or a more complex algorithm (such as machine learning) is used to identify the access mode.

[0059] Step 4, use the preliminarily determined first preset difference and second preset difference to conduct tests under various workloads, and evaluate the effectiveness of the preset differences by monitoring key performance indicators such as the cache hit rate, read latency, and IOPS of the SSD.

[0060] Step 5, according to the experimental results, fine-tune the preliminarily determined first preset difference and second preset difference. For example, if it is found that the cache hit rate is low under certain workloads, the first preset difference may need to be reduced to more accurately capture the sequential access pattern; if it is found that the cache pollution problem is serious, the second preset difference may need to be increased to reduce the prefetch amount when identifying random access.

[0061] In specific practice, a dynamic update mechanism can be set for the first preset difference and the second preset difference. For example, every once in a while (such as every hour or every day), recalculate the preset differences according to the recent access pattern statistical data to ensure that they adapt to the current access pattern.

[0062] In some embodiments, the process of determining the first preset difference and the second preset difference may further include:

[0063] Collect the read and write request history of the SSD, including the timestamp, logical block address (LBA), request type (read or write), request size, etc. of each request. Features will be extracted from the collected historical data, such as the LBA difference distribution in the continuous access mode, the LBA jump amplitude during random access, the access frequency, the access time interval, etc. Based on the collected features, the access mode of each read request can be labeled. The mode can be automatically identified using a clustering algorithm or manually labeled based on known workloads.

[0064] Multiple different types of machine learning models can be trained simultaneously, such as decision trees, random forests, support vector machines (SVMs), or neural networks. Use the feature data and the corresponding access mode labels to train the machine learning models, and select a training model with the highest accuracy from multiple different types of machine learning models as the prediction model. Based on the prediction results of the model, the first preset difference and the second preset difference are dynamically generated. For example, the prediction model can output a probability value of the continuous access mode, and according to the level of the probability value, the size of the first preset difference is dynamically adjusted to improve the adaptability of the prefetching strategy.

[0065] Through this embodiment, the machine learning model can automatically adjust the preset difference according to the changes in the actual workload and access mode, improving the intelligent adaptability and performance optimization effect, so as to achieve a more accurate preset difference setting, which can improve the cache hit rate and thus enhance the overall read performance of the SSD.

[0066] Moreover, it can be considered to adjust the first preset difference and the second preset difference based on the cache performance feedback of the previous preset time period through a preset time period, so as to accurately distinguish between the continuous access mode and the random access mode, reduce the incorrect adjustment of the prefetching strategy caused by misjudging the access mode, and avoid unnecessary cache pollution and performance overhead.

[0067] In an example, assume that the SSD is receiving a data read request sent by the host. First, 3 read requests are captured, and their LBAs are 1000, 1001, and 1002 respectively. The LBA of the currently captured data read request is 1003. Assuming that the first preset difference is 5, since the difference between the LBAs is less than 5, the SSD will identify that these requests belong to the continuous access mode, and thus increase the prefetch amount, for example, from 4KB to 64KB, to preload more consecutive data blocks into the cache in advance.

[0068] When the second preset difference is 10 and the LBA read next suddenly jumps to 10000, which is much larger than 10, the SSD will determine that this is a request in the random access mode. In this case, the prefetch amount will be reduced, for example, from 64 KB to 4 KB, to avoid excessive occupation of the cache space and reduce cache pollution.

[0069] Through this embodiment, for the sequential access mode, by setting a smaller first preset difference, sequential access requests can be identified in a timely manner, so that subsequent data blocks that may be read can be pre-loaded into the cache, improving the cache hit rate, reducing the number of direct accesses to the NAND flash memory, and significantly reducing the read latency. For the random access mode, setting a larger second preset difference can prevent data blocks irrelevant to the current request from being wrongly pre-loaded into the cache, reducing the situation where the cache space is occupied by invalid data. Moreover, by distinguishing between sequential access and random access, cache resources can be allocated more intelligently, avoiding excessive prefetching in the random access mode, resulting in resource waste, and at the same time making full use of the cache to improve performance in the sequential access mode, achieving efficient utilization of resources.

[0070] In an exemplary embodiment, to solve the problem of performance optimization of the solid-state drive in different access modes, a strategy of dynamically adjusting the prefetch amount can be implemented, which can effectively improve the read efficiency of the SSD in the sequential access mode while reducing resource waste in the random access mode. Specifically, in step S204, the prefetch amount is adjusted, including: when the access mode corresponding to the data read request is the sequential access mode, obtaining the sequential access depth, where the sequential access depth is the number of logical block addresses that are consecutive to the logical block address corresponding to the data read request and are read earlier; determining the adjustment value of the prefetch amount according to the sequential access depth, and increasing the prefetch amount according to the adjustment value of the prefetch amount; when the access mode corresponding to the data read request is the random access mode, reducing the prefetch amount according to the preset adjustment value.

[0071] It should be noted that the sequential access depth may refer to the number of logical block addresses that are consecutive to the logical block address corresponding to the data read request and are read earlier, that is, the number of consecutive logical block addresses (LBAs) between data read requests in the sequential access mode. For example, if the LBA addresses accessed by a series of read requests are consecutive and continue for multiple logical blocks, then the sequential access depth is equal to the number of consecutive logical blocks.

[0072] When a sequential access pattern is detected, increase the amount of data pre-loaded from the NAND flash into the cache according to the sequential access depth. This helps to pre-load data that may be accessed by subsequent requests in advance, reduce read latency, and improve the cache hit rate. When a random access pattern is detected, reduce the prefetch amount to avoid loading irrelevant data blocks into the cache, reduce the unnecessary occupation of cache space, and thus improve the overall efficiency of the cache.

[0073] In one example, for instance, the initial prefetch amount is 4KB. For the sequential access pattern, assuming the sequential access depth is 8, which means that the last 8 consecutive read requests have accessed consecutive LBA addresses. In this case, the adjusted value of the prefetch amount may be set to the sequential access depth multiplied by the basic prefetch unit (such as increasing the prefetch by 4KB for each consecutive block), so the prefetch amount increases from 4KB to 36KB (4KB + 8 * 4KB). For the random access pattern, the adjusted value of the prefetch amount is set to decrease by 4KB; if the current read request is detected as a random access, the prefetch amount immediately decreases from the current 36KB to 32KB, and further decreases to 28KB until it drops to the initial value or lower to avoid cache pollution.

[0074] A preset adjustment table can be set in advance. The preset adjustment table includes the corresponding relationships between multiple preset sequential access depths and preset adjusted values. Thus, according to the sequential access depth, determine the size of the adjusted value from the preset adjustment table to adjust the prefetch value.

[0075] Through this embodiment, in the sequential access pattern, by increasing the prefetch amount, it is possible to pre-load data blocks that may be accessed subsequently in advance, significantly reduce read latency, improve data throughput, and thus improve the efficiency of sequential access. In the random access pattern, reducing the prefetch amount can avoid loading irrelevant data blocks into the cache, reduce cache pollution, and ensure that the cache space is used to store data blocks with a high hit rate.

[0076] In an exemplary embodiment, the cache includes a set of cache tables. Among them, the set of cache tables includes a first cache table, a second cache table, a first auxiliary table, and a second auxiliary table. The second cache table is used to store prefetch data that was previously stored in the first cache table and was read within the first preset duration. The first auxiliary table is used to store prefetch data that was previously stored in the first cache table and was not read within the first preset duration. The second auxiliary table is used to store prefetch data that was previously stored in the second cache table and was not read for more than the second preset duration; the above method further includes:

[0077] According to the logical block address corresponding to the data read request, search for the cache table in a group of cache tables that contains the target data requested by the data read request; in the case where the target cache table is found and the target cache table is the first auxiliary table or the second auxiliary table, update the value of the counter corresponding to the target cache table, where the counter corresponding to the target cache table is used to record the number of times the data in the target cache table is read.

[0078] It should be noted that the cache can be a cache structure in the SSD for storing pre-read data, which is divided into a first cache table, a second cache table, a first auxiliary table, and a second auxiliary table, and each table has specific functions and storage rules. Among them, the first cache table can be used to initially store pre-read data, that is, the data block read for the first time or the pre-read data in the continuous access mode. The second cache table is used to store the pre-read data that was previously stored in the first cache table and was read within the first preset time period. The data in the second cache table is migrated from the first cache table and has a high access frequency and hit rate. The first auxiliary table can be used to store the pre-read data that was previously stored in the first cache table and was not read within the first preset time period, as an alternative storage area to reduce cache pollution. The second auxiliary table can be used to store the pre-read data that was previously stored in the second cache table and was not read for more than the second preset time period, for further analysis or as potential cache space.

[0079] Searching for the cache table in a group of cache tables that contains the target data requested by the data read request according to the logical block address corresponding to the data read request can occur before or after determining the access mode corresponding to the data read request based on the logical block address corresponding to the data read request. Of course, it can also be executed in parallel with determining the access mode corresponding to the data read request. This application does not make a limitation here.

[0080] Optionally, in the case where the target cache table is found and the target cache table is the first cache table, read and delete the target data requested by the data read request from the first cache table, and write the target data requested by the data read request into the second cache table. Specifically, it can be written to the header of the second cache table. The first cache table, the second cache table, the first auxiliary table, and the second auxiliary table can adopt the first-in, first-out method to delete the data to be processed or write it into other tables in a group of cache tables after reaching the preset time.

[0081] Optionally, the second cache table can include the logical address block of the recorded data, the recording time of the recorded data (i.e., the timestamp), and the number of times the recorded data is hit. In the case where the target cache table is found and the target cache table is the second cache table, the timestamp and the number of hits of the target data in the second cache table can be updated. Of course, the target data can also be rewritten to the header.

[0082] When the target cache table is found and the target cache table is the first auxiliary table or the second auxiliary table, update the value of the counter corresponding to the target cache table, where the counter corresponding to the target cache table is used to record the number of times the data in the target cache table is read.

[0083] Optionally, the first preset duration and the second preset duration can be used to distinguish the recent access frequency and long-term access pattern of data, so as to realize the intelligent migration and management of data between different cache tables. The generation of these two preset durations is not fixed, but can be dynamically generated and adjusted according to various factors to optimize the read performance of the SSD and adapt to different workloads. Specifically, the sizes of the first preset duration and the second preset duration can be determined based on the historical access records of the SSD, the performance goals of the SSD, the hardware characteristics of the SSD, experimental tests, or the application environment, etc. Specifically, a pre-trained duration prediction model can also be set up to predict the most suitable preset duration. By training the model to identify the characteristics of the access pattern, the duration prediction model can predict the possible duration of future accesses and dynamically update the first preset duration and the second preset duration to achieve more intelligent cache management.

[0084] Through this embodiment, by migrating recently hot data to the second cache table, the cache hit rate can be improved, the direct access to the NAND flash can be reduced, and the read latency can be lowered. By dynamically adjusting the migration of data between different cache tables, the intelligent management of cache resources can be realized, ensuring the effective utilization of the cache space and avoiding resource waste.

[0085] In an exemplary embodiment, the above method further includes: when the target cache table is not found, converting the logical block address corresponding to the data read request into the physical address corresponding to the data read request; reading the target data requested by the data read request according to the physical address corresponding to the data read request.

[0086] It should be noted that in a storage device, the LBA is the address form used when the host issues read and write requests. It is a logical address and is different from the actual physical storage location inside the device. The LBA can be used for abstract storage. The physical address is the actual location where data is stored inside the storage device. In an SSD, data is stored on the physical units of the NAND flash, and the physical address corresponds to the specific locations of these units. The target data can refer to the data block that needs to be read as specified by the data read request.

[0087] Optionally, the LBA can be first converted to the corresponding physical address by the firmware of the SSD. Specifically, by looking up a preset mapping table (such as FTL, Flash Translation Layer), the physical address corresponding to the LBA can be obtained. According to the converted physical address, the firmware of the SSD will directly read the target data from the NAND flash. Usually, a read command is sent to the NAND controller, and then the data is read from the flash.

[0088] After the data is read, the SSD can start the read-ahead strategy, read additional data blocks according to the access pattern, and store these data blocks in the cache table so that subsequent requests can be accessed more quickly.

[0089] Through this embodiment, when the target data indicated by the data read request is not in the cache, directly reading the data from the physical address can quickly respond to the read request.

[0090] In an exemplary embodiment, step S206 includes: determining whether the data indicated by the read-ahead address information exists in a set of cache tables; in the case where the data indicated by the read-ahead address information does not exist in a set of cache tables, according to the read-ahead address information, reading the target data requested by the data read request from the hard disk, and writing the target data into the first cache table.

[0091] Optionally, the read-ahead address information can be the predicted physical addresses to be accessed. These predicted physical addresses to be accessed are usually inferred based on the logical block address of the current read request and the access pattern (such as sequential or random access).

[0092] In an example, the SSD is processing a data read request that contains an LBA. According to the LBA and the access pattern, a series of read-ahead address information is predicted. First, it is checked whether the data indicated by this read-ahead address information exists in the cache table. If the data indicated by the read-ahead address information is not found in a set of cache tables, based on the read-ahead address information, the SSD will directly read the target data and the data blocks related to the read-ahead address information from the NAND flash. Usually, the read-ahead address information needs to be converted to a physical address, and then a read command is sent to the NAND controller. The read-ahead data is written into the first cache table for subsequent access. In the case where the first cache table is full, the system will evict some data blocks from the cache according to the replacement rule to make room for new data.

[0093] Through this embodiment, by writing pre-read data into the first cache table, it is possible to prepare in advance the data that may be accessed, reduce the number of times future read requests directly access the NAND flash memory, thereby improving the cache hit rate and reducing the read latency. The fast access of pre-read data in the cache can significantly improve the read performance, which is particularly effective for data access in the sequential read mode, and helps to maintain the stability and high efficiency of the SSD in high-load scenarios.

[0094] In an exemplary embodiment, the counter corresponding to the first auxiliary table is the first counter, and the counter corresponding to the second auxiliary table is the second counter.

[0095] The above method further includes: reading the values of the first counter and the second counter at a preset time interval; when the value of the first counter is greater than the value of the second counter, determining a first adjustment value according to the difference between the value of the first counter and the value of the second counter, and adjusting the pre-read amount upward according to the first adjustment value; when the value of the first counter is less than the value of the second counter, determining a second adjustment value according to the difference between the value of the first counter and the value of the second counter, and adjusting the pre-read amount downward according to the second adjustment value.

[0096] It should be noted that the first counter can be the counter of the first auxiliary table, and the first counter can be used to record the number of times the data in the first auxiliary table is read, reflecting the access pattern of non-hot data in the near future. The second counter can be the counter of the second auxiliary table, and can be used to record the number of times the data in the second auxiliary table is read, helping to identify the access frequency of long-term non-hot data.

[0097] The preset time interval can be a preset time period for periodically checking and adjusting the pre-read amount, such as every minute, every 5 minutes, etc., and can be set based on the actual situation. This application does not make any limitations here.

[0098] Compare the values of the first counter and the second counter to obtain the difference between the first counter and the second counter. If the value of the first counter is greater than the value of the second counter, this usually means that the recent access pattern is more frequent. On the contrary, if the value of the first counter is less than the value of the second counter, this indicates that the long-term access pattern is more significant.

[0099] When the value of the first counter is greater than the value of the second counter, calculate the adjustment value using a first adjustment coefficient according to the magnitude of the difference between the first counter and the second counter. If the difference is large, the pre-read amount should be adjusted correspondingly larger, which can be achieved through simple proportional calculation. Similarly, when the value of the first counter is less than the value of the second counter, a second adjustment coefficient can also be set to determine the second adjustment value according to the second adjustment coefficient.

[0100] Of course, two adjustment tables can also be preset, namely the first adjustment table and the second adjustment table. In the first adjustment table and the second adjustment table, adjustment values under different preset difference ranges (i.e., the difference between two counters) can be set. According to the difference between the value of the first counter and the value of the second counter, a table lookup is performed to obtain the first adjustment value or the second adjustment value.

[0101] Through this embodiment, by monitoring the values of the first counter and the second counter and dynamically adjusting the prefetch amount, the prefetch strategy can be adaptively optimized to adapt to changing workloads and access patterns. The adaptive adjustment of prefetch data helps reduce read latency and improve the number of input / output operations per second (IOPS). Especially when dealing with sequential reads or recently hot data, the system's response speed and throughput are significantly improved.

[0102] To better understand the prefetch process of the hard disk in the embodiments of the present application, an example is used for illustration. The hard disk may include an SSD Controller (Solid State Drive Controller), a Flash Translation Layer (FTL) module, a Cache Policy Module (CachePolicyModule), a Flash Cache Controller (FCC), a flash interface, and a performance evaluation and adjustment module.

[0103] Among them, the solid state drive controller is the core and coordinates the management of other modules.

[0104] The flash translation layer module can be used to capture data read requests, process the mapping of the logical block address corresponding to the data read request to the physical address, and detect the access pattern corresponding to the data read request.

[0105] The cache policy module can be used to dynamically adjust the prefetch amount according to the access pattern.

[0106] The flash cache controller can manage the cache buffer space and perform the ARC algorithm to intelligently manage the cached data.

[0107] The flash interface can be used to read data from the NAND flash according to the prefetch strategy and the host request.

[0108] The performance evaluation and adjustment module can be used to periodically evaluate the cache performance and dynamically adjust the prefetch strategy to ensure efficient use of the cache.

[0109] It should be noted that the NAND Flash (flash chip) is located outside the solid state drive controller and is directly connected to it for storing data. In an actual SSD, the flash chip may be directly soldered on the circuit board and exchange data with the solid state drive controller through an internal bus.

[0110] The prefetch method of the hard disk in the embodiments of the present application will be explained below with reference to optional examples.

[0111] Figure 3 is a schematic flow diagram of the read-ahead method for a hard disk in this optional example. As Figure 3 shown, the flow of the read-ahead method for the hard disk may include the following steps:

[0112] Step S301, initialize settings;

[0113] It should be noted that a group of cache tables is initialized, and an initial read-ahead amount (e.g., 4KB) is set. Initialize the first counter P and the second timer Q.

[0114] Step S302, capture a data read request;

[0115] Specifically, the FTL module captures the data read request of the application program and records the logical block address (i.e., the first address). Analyze the access pattern corresponding to the data read request to determine whether it is a sequential access pattern or a random access pattern.

[0116] Step S303, determine the first address and the second address of the data read request;

[0117] Specifically, after determining whether it is a sequential access pattern or a random access pattern, it is also necessary to determine how to adjust the read-ahead amount, then adjust the read-ahead amount according to the access pattern, and determine the read-ahead address information (i.e., the second address) according to the adjusted read-ahead amount.

[0118] Step S304, is the read-ahead function enabled?

[0119] Specifically, it can be set in the SSD whether to enable the read-ahead function. When it is determined that the read-ahead function is enabled, jump to step S305. When the read-ahead function is not enabled, jump to step S310.

[0120] Step S305, whether the first cache table or the second cache table is hit;

[0121] Specifically, when the first cache table or the second cache table is not hit, jump to step S307; when the first cache table or the second cache table is hit, jump to step S306.

[0122] If it is hit in the first cache table, directly return the data and update it to the head of the second cache table. If it is hit in the second cache table, place it back at the head of the second cache table.

[0123] Step S306, update the data corresponding to the first address to the second cache table;

[0124] Step S307, whether the first auxiliary table or the second auxiliary table is hit;

[0125] Specifically, in the case of a miss in the first auxiliary table or the second auxiliary table, jump to step S309; in the case of a hit in the first auxiliary table or the second auxiliary table, jump to step S308.

[0126] Step S308, update the counter;

[0127] Specifically, in the case of a hit in the first auxiliary table, update the first counter; in the case of a hit in the second auxiliary table, update the second counter.

[0128] Step S309, read the data corresponding to the first address from the flash memory;

[0129] Step S310, read the target data corresponding to the first address from the flash memory and record the prefetch miss count;

[0130] Step S311, check if the data corresponding to the second address is in the cache;

[0131] Specifically, in the case where the data corresponding to the second address is not in the cache, jump to step S312.

[0132] Step S312, read the data corresponding to the second address from the flash memory and update it to the first cache table.

[0133] It should be noted that when the amount of data recorded in the first cache table or the second cache table is greater than the preset value, in a first-in, first-out manner, some data is eliminated and the data block is moved to the first auxiliary table or the second auxiliary table. The values of the first count table and the second count table can be evaluated at a preset time interval (such as 1 minute) to adjust the prefetch amount. Record the prefetch miss count. When the miss count exceeds the preset threshold, turn off the prefetch function. And determine whether to turn on the prefetch function according to monitoring the hit situation of the second address. Specifically, in the case where the hit situation of the second address exceeds the preset threshold, turn on the prefetch function.

[0134] Through this optional example, by dynamically adjusting the prefetch amount and using the ARC algorithm, the SSD can more accurately predict and capture hot data, significantly improving the cache hit rate. When the prefetch function is turned on, data can be pre-loaded into the cache in advance, reducing the direct access to the NAND flash memory and lowering the read latency. Dynamically adjust the prefetch policy according to the evaluation results of the first counter and the second counter, enabling the SSD to adaptively optimize the read performance when facing different workloads and access patterns.

[0135] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0136] An embodiment of the present application further provides a prefetching device for a hard disk, as Figure 4 shown. The device includes:

[0137] A parsing module 402, configured to, when a data reading request is captured, perform parsing processing on the data reading request to obtain a logical block address corresponding to the data reading request.

[0138] An adjustment module 404, configured to determine an access mode corresponding to the data reading request based on the logical block address corresponding to the data reading request, and adjust the prefetching amount according to the access mode corresponding to the data reading request.

[0139] A determination module 406, configured to determine prefetching address information corresponding to the data reading request based on the adjusted prefetching amount and the logical block address corresponding to the data reading request.

[0140] An execution module 408, configured to perform a data prefetching operation on the hard disk based on the prefetching address information, and write the obtained prefetching data into a cache.

[0141] It should be noted that the parsing module 402 in this embodiment can be used to execute the above step S202, the adjustment module 404 in this embodiment can be used to execute the above step S204, the determination module 406 in this embodiment can be used to execute the above step S206, and the execution module 408 in this embodiment can be used to execute the above step S208.

[0142] Through the embodiment provided by the present application, when a data reading request is captured, by parsing the data reading request, the logical block address corresponding to the obtained data reading request is obtained, and based on the logical block address corresponding to the data reading request, the access mode corresponding to the data reading request is determined, so as to adjust the prefetching amount, realizing dynamic adjustment of the prefetching amount through the access mode of the data reading request, and using the adjusted prefetching amount to perform a data prefetching operation, making the prefetching operation more accurate. To a certain extent, it solves the problem of low reading efficiency caused by cache pollution in the related art due to a fixed prefetching amount. By adaptively adjusting the prefetching amount according to the access mode to adjust the cache content, the efficiency and hit rate of the cache are significantly improved. To a certain extent, the number of direct accesses to the backend storage medium (such as NAND flash) can be reduced, the wear of the storage device can be reduced, and its service life can be extended.

[0143] In an exemplary embodiment, the access mode corresponding to the data read request is determined from a preset set of access modes, and the set of access modes includes a random access mode and a sequential access mode. The adjustment module 404 is further configured to: determine the address difference between the logical block address corresponding to the data read request and the logical block address corresponding to the previous read request, where the previous read request is one or more read requests captured before the data read request; in the case where the address difference is less than a first preset difference, determine that the access mode corresponding to the data read request is the sequential access mode; in the case where the address difference is greater than or equal to a second preset difference, determine that the access mode corresponding to the data read request is the random access mode, where the first preset difference is less than or equal to the second preset threshold.

[0144] In an exemplary embodiment, the adjustment module 404 is further configured to: in the case where the access mode corresponding to the data read request is the sequential access mode, obtain the sequential access depth, where the sequential access depth is the number of logical block addresses that are sequentially read and are consecutive with the logical block address corresponding to the data read request; determine an adjustment value of the prefetch amount according to the sequential access depth, and increase the prefetch amount according to the adjustment value of the prefetch amount; in the case where the access mode corresponding to the data read request is the random access mode, decrease the prefetch amount according to a preset adjustment value.

[0145] In an exemplary embodiment, the cache includes a set of cache tables, where the set of cache tables includes a first cache table, a second cache table, a first auxiliary table, and a second auxiliary table. The second cache table is used to store prefetch data that was previously stored in the first cache table and was read within a first preset time period. The first auxiliary table is used to store prefetch data that was previously stored in the first cache table and was not read within the first preset time period. The second auxiliary table is used to store prefetch data that was previously stored in the second cache table and has not been read for more than a second preset time period.

[0146] The above device further includes: a lookup module, configured to look up, according to the logical block address corresponding to the data read request, the cache table in the set of cache tables that contains the target data requested by the data read request; an update module, configured to, in the case where the target cache table is found and the target cache table is the first auxiliary table or the second auxiliary table, update the value of the counter corresponding to the target cache table, where the counter corresponding to the target cache table is used to record the number of times the data in the target cache table is read.

[0147] In an exemplary embodiment, the above device further includes: a read module, configured to, in the case where the target cache table is not found, convert the logical block address corresponding to the data read request into the physical address corresponding to the data read request; and read the target data requested by the data read request according to the physical address corresponding to the data read request.

[0148] In an exemplary embodiment, the execution module 408 is further configured to determine whether the data indicated by the prefetch address information exists in a set of cache tables; in the case where the data indicated by the prefetch address information does not exist in the set of cache tables, read the target data requested by the data read request from the hard disk according to the prefetch address information, and write the target data into the first cache table.

[0149] In an exemplary embodiment, the counter corresponding to the first auxiliary table is the first counter, and the counter corresponding to the second auxiliary table is the second counter;

[0150] The above device further includes: a counting adjustment module, configured to read the value of the first counter and the value of the second counter at a preset time interval; in the case where the value of the first counter is greater than the value of the second counter, determine a first adjustment value according to the difference between the value of the first counter and the value of the second counter, and adjust the prefetch amount upward according to the first adjustment value; in the case where the value of the first counter is less than the value of the second counter, determine a second adjustment value according to the difference between the value of the first counter and the value of the second counter, and adjust the prefetch amount downward according to the second adjustment value.

[0151] For the description of the features in the corresponding embodiment of the prefetch device of the hard disk, reference may be made to the relevant description in the corresponding embodiment of the prefetch method of the hard disk, which will not be elaborated here one by one.

[0152] An embodiment of the present application further provides an electronic device, including a memory and a processor. A computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above embodiments of the prefetch method of the hard disk.

[0153] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, and the computer program is configured to execute the steps in any one of the above embodiments of the prefetch method of the hard disk when running.

[0154] In an exemplary embodiment, the above computer-readable storage medium may include, but is not limited to: USB flash drives, read-only memories (ROM for short), random access memories (RAM for short), external hard drives, magnetic disks, or optical discs, etc., various media that can store computer programs.

[0155] An embodiment of the present application further provides a computer program product, the above computer program product includes a computer program, and when the computer program is executed by a processor, the steps in any one of the above embodiments of the prefetch method of the hard disk are implemented.

[0156] Embodiments of the present application further provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, the steps in any of the above-described embodiments of the prefetch method for a hard disk are implemented.

[0157] Those skilled in the art can further realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Skilled professionals can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present application.

[0158] The above has introduced in detail a prefetch method, device, electronic device, and storage medium for a hard disk provided by the present application. Specific examples have been used herein to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application. It should be noted that for those of ordinary skill in the art in the technical field, without departing from the principle of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the protection scope of the claims of the present application.

Claims

1. A prefetching method for a hard disk, characterized in that, Including: When a data read request is captured, parsing and processing the data read request to obtain a logical block address corresponding to the data read request; Based on the logical block address corresponding to the data read request, determining an access mode corresponding to the data read request, and adjusting a prefetch amount according to the access mode corresponding to the data read request; Based on the adjusted prefetch amount and the logical block address corresponding to the data read request, determining prefetch address information corresponding to the data read request; Based on the prefetch address information, performing a data prefetch operation on the hard disk and writing the obtained prefetch data into a cache.

2. The method according to claim 1, characterized in that, The access mode corresponding to the data read request is determined from a preset set of access modes, and the set of access modes includes a random access mode and a sequential access mode; The determining, based on the logical block address corresponding to the data read request, the access mode corresponding to the data read request includes: Determining an address difference between the logical block address corresponding to the data read request and the logical block address corresponding to a prior read request, where the prior read request is one or more read requests captured before the data read request; When the address difference is less than a first preset difference, determining that the access mode corresponding to the data read request is the sequential access mode; When the address difference is greater than or equal to a second preset difference, determining that the access mode corresponding to the data read request is the random access mode, where the first preset difference is less than or equal to the second preset difference.

3. The method according to claim 1, characterized in that The adjusting the prefetch amount according to the access mode corresponding to the data read request includes: When the access mode corresponding to the data read request is the sequential access mode, obtaining a sequential access depth, where the sequential access depth is the number of logically consecutive block addresses that were read prior and are logically consecutive to the logical block address corresponding to the data read request; Determining an adjustment value of the prefetch amount according to the sequential access depth, and increasing the prefetch amount according to the adjustment value of the prefetch amount; When the access mode corresponding to the data read request is the random access mode, reducing the prefetch amount according to a preset adjustment value.

4. The method according to claim 1, wherein The cache includes a set of cache tables, where the set of cache tables includes a first cache table, a second cache table, a first auxiliary table, and a second auxiliary table. The second cache table is used to store prefetch data that was previously stored in the first cache table and was read within a first preset time period. The first auxiliary table is used to store prefetch data that was previously stored in the first cache table and was not read within the first preset time period. The second auxiliary table is used to store prefetch data that was previously stored in the second cache table and was not read for more than a second preset time period; The method further includes: According to the logical block address corresponding to the data read request, searching the set of cache tables for a cache table that contains the target data requested by the data read request. When the target cache table is found and the target cache table is the first auxiliary table or the second auxiliary table, update the value of the counter corresponding to the target cache table, where the counter corresponding to the target cache table is used to record the number of times the data in the target cache table is read.

5. The method according to claim 4, characterized in that The method further includes: When the target cache table is not found, convert the logical block address corresponding to the data read request into the physical address corresponding to the data read request; Read the target data requested by the data read request according to the physical address corresponding to the data read request.

6. The method according to claim 4, wherein The performing a data prefetch operation on the hard disk based on the prefetch address information and writing the obtained prefetch data into the cache includes: Determine whether the data indicated by the prefetch address information exists in the group of cache tables; When the data indicated by the prefetch address information does not exist in the group of cache tables, read the target data requested by the data read request from the hard disk according to the prefetch address information, and write the target data into the first cache table.

7. The method according to claim 4, characterized in that, The counter corresponding to the first auxiliary table is the first counter, and the counter corresponding to the second auxiliary table is the second counter; the method further includes: Read the value of the first counter and the value of the second counter at a preset time interval; When the value of the first counter is greater than the value of the second counter, determine a first adjustment value according to the difference between the value of the first counter and the value of the second counter, and increase the prefetch amount according to the first adjustment value; When the value of the first counter is less than the value of the second counter, determine a second adjustment value according to the difference between the value of the first counter and the value of the second counter, and decrease the prefetch amount according to the second adjustment value.

8. A prefetching device for a hard disk, characterized in that, including: A parsing module, configured to parse the data read request to obtain the logical block address corresponding to the data read request when a data read request is captured; An adjustment module, configured to determine the access mode corresponding to the data read request based on the logical block address corresponding to the data read request, and adjust the prefetch amount according to the access mode corresponding to the data read request; A determination module, configured to determine the prefetch address information corresponding to the data read request based on the adjusted prefetch amount and the logical block address corresponding to the data read request; An execution module, configured to perform a data prefetch operation on the hard disk based on the prefetch address information and write the obtained prefetch data into the cache.

9. An electronic device, characterized in that, including: A memory for storing a computer program; A processor, configured to implement the steps of the prefetch method of the hard disk according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that, A computer program is stored in the computer-readable storage medium, where the computer program implements the steps of the prefetch method of the hard disk according to any one of claims 1 to 7 when executed by a processor.

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