Stacked packaging structure and electronic equipment

Abstract

The invention provides a stacked packaging structure and electronic equipment, relates to the technical field of packaging, and can improve the heat dissipation performance of the packaging structure. The package-on-package structure comprises a first package, a second package and at least one heat conduction member. The first package includes a first carrier, a second carrier, and a first chip disposed between the first carrier and the second carrier. The second package is stacked on the second carrier plate, and the second package includes a second chip. The heat-conducting member is located on a side of the second package away from the second carrier plate. Wherein a metal layer is arranged in the second support plate, the second support plate is provided with an opening on the side surface of the second package and exposes the metal layer, and two ends of the heat conduction member are connected with the metal layer through the opening along the side surface of the second package. The second chip in the second package can be bypassed through the heat conduction piece, and heat flow generated by the first chip is diffused.

Description

Technical Field

[0001] This application relates to the field of packaging technologies, and particularly to a stacked packaging structure and an electronic device. Background Art

[0002] Stacked packaging (package on package, PoP) is a three-dimensional stacking technology developed for chip packaging of mobile devices. PoP is made by stacking two or more packages, and different chips such as logic chips and memory chips are stacked and packaged to achieve the purpose of ultra-thin, low power consumption, and low signal loss.

[0003] Reference Figure 1 As shown, the existing PoP includes a bottom package 1 and an upper package 2. When the heat flow generated by the bottom package 1 diffuses upward to the upper package 2, it is blocked, which will cause a significant reduction in the heat dissipation capacity of the entire device. That is to say, in PoP, the upper package is the heat dissipation bottleneck encountered during the diffusion of the bottom heat flow. Summary of the Invention

[0004] This application provides a stacked packaging structure and an electronic device, which bypass the upper package by setting a heat conducting member to diffuse the heat flow generated by the bottom package.

[0005] This application provides a stacked packaging structure, which includes a first package (which can also be called the bottom package), a second package (which can also be called the upper package), and at least one heat conducting member. The first package includes a first carrier plate, a second carrier plate, and a first chip disposed between the first carrier plate and the second carrier plate. The second package is stacked on the first carrier plate, and the second package includes a second chip. The heat conducting member is located on the side of the second package (or the second chip) away from the second package. Among them, a metal layer is provided in the second carrier plate, and the second carrier plate is provided with an opening on the side where the second package is located to expose the metal layer. Both ends of the heat conducting member are connected to the metal layer through the opening along the side of the second package. In this way, when the heat flow generated by the first chip passes upward through the second carrier plate, it is laterally conducted along the second carrier plate to the edge area (that is, the side area of the second package), and the heat conducting member leads out this part of the heat flow through the metal layer located in the edge area of the second carrier plate and quickly spreads evenly on the top of the second package. That is to say, part of the heat flow generated by the first chip can be diffused by the heat conducting member bypassing the second chip in the second package, thereby improving the heat dissipation capacity of the packaging structure.

[0006] In some possible implementations, the heat conducting member includes a first heat conducting portion, a second heat conducting portion, and an intermediate heat conducting portion. The first heat conducting portion and the second heat conducting portion are respectively disposed on opposite sides of the second package, and the bottom ends of the first heat conducting portion and the second heat conducting portion are both connected to the second carrier. The intermediate heat conducting portion is located on the side of the second package away from the second carrier, and one end of the intermediate heat conducting portion is connected to the top end of the first heat conducting portion, and the other end of the intermediate heat conducting portion is connected to the top end of the second heat conducting portion. In this case, the heat flow is led out from both sides of the second package through the first heat conducting portion and the second heat conducting portion, and the heat dissipation area can be increased through the intermediate heat conducting portion, improving the heat dissipation performance.

[0007] In some possible implementations, the above heat conducting member includes a plurality of first heat conducting portions and a plurality of second heat conducting portions. Among them, the plurality of first heat conducting portions are arranged in parallel, and there is a gap between two adjacent first heat conducting portions. The plurality of second heat conducting portions are arranged in parallel, and there is a gap between two adjacent second heat conducting portions. In this way, relevant operations on the second package can be realized through the gaps between the heat conducting portions.

[0008] In some possible implementations, the second carrier includes a wiring layer, and the metal layer and the wiring layer are on the same layer; that is, the metal layer and the metal wiring layer are made of the same metal film layer, but there may be no electrical connection between them.

[0009] In some possible implementations, the second carrier includes a wiring layer, and the metal layer is on the side of the wiring layer away from the first chip, that is, the metal layer is on the top of the wiring layer and is another metal layer independently arranged from the wiring layer.

[0010] In some possible implementations, the heat conducting member is welded to the metal layer.

[0011] In some possible implementations, the heat conducting member and the metal layer are bonded by a heat conducting adhesive.

[0012] In some possible implementations, the heat conducting member includes one or more of metal, diamond, or graphene.

[0013] In some possible implementations, the heat conducting member and the second chip are bonded by a heat conducting adhesive to further improve the heat dissipation efficiency.

[0014] In some possible implementations, the stacked package structure includes a plurality of heat conducting members arranged in parallel.

[0015] In some possible implementations, the first chip is a processor chip. In this case, the first chip is the main heat generating component, and it generates a large amount of heat during operation. By setting the heat conducting member, the heat dissipation ability of the package structure can be greatly improved, which is more beneficial to improving the performance of the product.

[0016] In some possible implementations, the second chip is a memory chip.

[0017] The present application further provides another stacked package structure, which includes: a first package, a second package, and at least one heat conducting member. The first package includes a first carrier and a first chip disposed on the first carrier. The second package is stacked on the first package, and the second carrier includes a second carrier and a second chip disposed on the second carrier. The heat conducting member is located on the side of the second chip away from the second carrier. Wherein, a metal layer is provided in the second carrier, and an opening is provided on the surface of the second carrier to expose the metal layer, and both ends of the heat conducting member are connected to the metal layer through the opening along the side surface of the second chip. In this way, when the heat flow generated by the first chip passes upward through the second carrier, it is laterally conducted along the second carrier to the edge region (i.e., the side region of the second chip), and the heat conducting member leads out this part of the heat flow through the metal layer located in the edge region of the second carrier and quickly spreads evenly on the top of the second chip, that is, part of the heat flow generated by the first chip can bypass the second chip through the heat conducting member for diffusion, thereby improving the heat dissipation capacity of the package structure.

[0018] In some possible implementations, the heat conducting member includes a first heat conducting portion, a second heat conducting portion, and an intermediate heat conducting portion. Wherein, the first heat conducting portion and the second heat conducting portion are respectively disposed on opposite sides of the second chip, and the bottom ends of the first heat conducting portion and the second heat conducting portion are both connected to the second carrier. The intermediate heat conducting portion is located on the side of the second chip away from the second carrier, and one end of the intermediate heat conducting portion is connected to the top end of the first heat conducting portion, and the other end of the intermediate heat conducting portion is connected to the top end of the second heat conducting portion. In this case, the heat flow is led out from both sides of the second package through the first heat conducting portion and the second heat conducting portion, and the heat dissipation area can be increased through the intermediate heat conducting portion, improving the heat dissipation performance.

[0019] In some possible implementations, the heat conducting member includes a plurality of first heat conducting portions and a plurality of second heat conducting portions. Wherein, the plurality of first heat conducting portions are arranged in parallel, and there is a gap between two adjacent first heat conducting portions. The plurality of second heat conducting portions are arranged in parallel, and there is a gap between two adjacent second heat conducting portions. In this way, relevant operations on the second package can be realized through the gaps between the heat conducting portions.

[0020] In some possible implementations, the second carrier includes a wiring layer, and the metal layer and the wiring layer are located on the same layer; that is, the metal layer and the metal wiring layer are made of the same metal film layer, but there may be no electrical connection between them.

[0021] In some possible implementations, the second carrier includes a wiring layer, and the metal layer is located on the side of the wiring layer away from the first chip, that is, the metal layer is another metal layer located on the top of the wiring layer and is independently provided from the wiring layer.

[0022] In some possible implementations, the heat conducting member is welded to the metal layer.

[0023] In some possible implementations, the heat conducting member is bonded to the metal layer with a thermal conductive adhesive.

[0024] In some possible implementations, the heat conducting member includes one or more of metal, diamond, or graphene.

[0025] In some possible implementations, the heat conducting member is bonded to the second chip with a thermal conductive adhesive to further improve the heat dissipation efficiency.

[0026] In some possible implementations, the stacked package structure includes a plurality of heat conducting members arranged side by side.

[0027] In some possible implementations, the first chip described above is a processor chip. In this case, the first chip is the main heat generating component, and it generates a large amount of heat during operation. By providing the heat conducting member, the heat dissipation capacity of the package structure can be greatly improved, which is more beneficial to improving the performance of the product.

[0028] In some possible implementations, the second chip is a memory chip.

[0029] This application also provides a stacked package structure, which includes a circuit board and the stacked package structure provided in any of the foregoing possible implementations, wherein the stacked package structure is electrically connected to the circuit board. Description of the Drawings

[0030] Figure 1 It is a schematic diagram of a stacked package structure provided in the prior art;

[0031] Figure 2 It is a schematic diagram of a stacked package structure provided in an embodiment of this application;

[0032] Figure 3 It is a schematic diagram of the connection between the heat conducting member and the second carrier plate in a stacked package structure provided in an embodiment of this application;

[0033] Figure 4 It is a schematic diagram of the connection between the heat conducting member and the second carrier plate in a stacked package structure provided in an embodiment of this application;

[0034] Figure 5 It is a schematic diagram of the structure of a heat conducting member provided in an embodiment of this application;

[0035] Figure 6 It is a schematic diagram of the structure of a plurality of heat conducting members in a stacked package structure provided in an embodiment of this application;

[0036] Figure 7Schematic diagram of multiple heat conducting components in a stacked package structure provided by an embodiment of the present application;

[0037] Figure 8 Top view of multiple heat conducting components in a stacked package structure provided by an embodiment of the present application;

[0038] Figure 9 Schematic diagram of a stacked package structure provided by an embodiment of the present application;

[0039] Figure 10 Schematic diagram of a stacked package structure provided by an embodiment of the present application. Detailed implementation manners

[0040] To make the objectives, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be clearly and completely described below with reference to the accompanying drawings in the present application. Apparently, the described embodiments are some but not all of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art without creative efforts based on the embodiments in the present application fall within the scope of protection of the present application.

[0041] Terms such as "first" and "second" in the description of embodiments, claims and drawings of the present application are only used for the purpose of distinguishing descriptions, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" may mean: only A exists, only B exists, and both A and B exist at the same time. Here, A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one (item)" means one or more, and "multiple" means two or more. "Installation", "connection", "coupling" and the like should be understood in a broad sense. For example, it can be an electrical connection or a mechanical connection; it can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection, or an indirect connection through an intermediate medium, or the internal communication of two components. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, product or device comprising a series of steps or units does not necessarily have to be limited to those clearly listed steps or units, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices. "Up", "down", "left", "right", "top", "bottom", etc. are only relative to the orientation of the components in the drawings. These directional terms are relative concepts, and they are used for relative description and clarification, and they can change accordingly with the change of the orientation of the components placed in the drawings.

[0042] An embodiment of the present application provides an electronic device. A new stacked packaging structure is adopted in the electronic device. In this packaging structure, by additionally providing a heat conducting member, the heat flow generated by the bottom layer packaging can bypass the upper layer packaging through the heat conducting member for diffusion, thereby improving the heat dissipation capacity of the packaging structure.

[0043] The present application does not limit the setting form of the above electronic device. The electronic device can be any electronic product provided with a chip packaging structure, such as consumer electronic products, home electronic products, vehicle-mounted electronic products, financial terminal products, communication electronic products, etc.

[0044] Illustratively, the above consumer electronic products can be mobile phones, tablet computers, laptop computers, personal computers (PCs), personal digital assistants (PDAs), smart wearable products (such as smart watches, smart bracelets, etc.), virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, drones, etc. Home electronic products can be smart door locks, TVs, smart speakers, refrigerators, floor sweeping robots, etc. Vehicle-mounted electronic products can be vehicle-mounted navigators, vehicle-mounted displays, etc. Financial terminal products can be automated teller machines (ATMs), electronic devices for self-service business handling, etc. Communication electronic products can be communication devices such as servers, memories, radars, base stations, etc.

[0045] According to actual requirements, other devices electrically connected to the stacked packaging structure, such as printed circuit boards (PCBs; also known as printed wiring boards) and input / output devices, can also be provided in the above electronic device. The present application does not limit this.

[0046] The following uses specific embodiments to specifically illustrate the setting of the heat conducting member in the new stacked packaging structure provided by the present application.

[0047] Embodiment 1

[0048] Figure 2 It is a schematic diagram of a stacked packaging structure provided for Embodiment 1.

[0049] Illustratively, Embodiment 1 provides a stacked packaging structure, such as Figure 2As shown, the packaging structure includes a bottom layer packaging 10 (which can also be referred to as the first packaging) and an upper layer packaging 20 (which can also be referred to as the second packaging), and the upper layer packaging 20 is stacked on the bottom layer packaging 10. Among them, between the bottom layer packaging 10 and the upper layer packaging 20, and between the bottom layer packaging 10 and the circuit board ( Figure 2 not shown in the figure), interconnection can be achieved through a solder ball array, but it is not limited thereto. Of course, the packaging structure may also include other stacked packaging structures. The embodiments of the present application are only illustrated by taking two-layer packaging (10 and 20) as an example.

[0050] The present application does not limit the packaging types of the bottom layer packaging 10 and the upper layer packaging 20. For example, the bottom layer packaging 10 and the upper layer packaging 20 can be FOP (fan out packaging), FCCSP (flip chip chip scale package), etc.; among them, the packaging types of the bottom layer packaging 10 and the upper layer packaging 20 can be the same or different, and can be set according to actual needs in practice.

[0051] Continue to refer to Figure 2 As shown, the bottom layer packaging 10 includes a first carrier S1, a second carrier S2, and a first chip D1 disposed between the first carrier S1 and the second carrier S2. Schematically, the first chip D1 is disposed on the first carrier S1 and is electrically connected to the first carrier S1, and the second carrier S2 can be electrically connected to the first carrier S1 through a connection structure (such as solder balls). The upper layer packaging 20 is disposed on the second carrier S2, and the upper layer packaging 20 includes a third carrier S3 and a second chip D2 disposed on the third carrier S3. Among them, the first chip D1 and the second chip D2 can be encapsulated with molding compound.

[0052] The above-mentioned first carrier S1, second carrier S2, and third carrier S3 can be substrates or redistribution layers (RDL). The present application does not limit this, and can be set according to actual needs in practice.

[0053] Continue to refer to Figure 2 As shown, during the upward diffusion process of the heat flow generated by the first chip D1, it will be blocked by the upper layer packaging 20 (especially the second chip D2) ( Figure 2 the heat dissipation path indicated by the dashed arrow in the figure), thereby affecting the heat dissipation performance of the packaging structure.

[0054] To solve the above technical problems, in the packaging structure provided in this embodiment, a heat conducting member 30 is disposed above the upper layer packaging 20 (that is, on the side away from the second carrier S2), and both ends of the heat conducting member 30 are connected to the second carrier S2 along the side surface of the upper layer packaging 20.

[0055] Reference Figure 3 and Figure 4 As shown, a metal layer 51 is provided in the second carrier board S2. To ensure efficient heat conduction between the heat conducting member 30 and the second carrier board S2, an opening b can be provided at a position corresponding to the connection with the heat conducting member 30 in the edge area of the second carrier board S2 (i.e., the side area of the second package), exposing the metal layer 51 inside the second carrier board S2. The heat conducting member 30 is connected to the metal layer 51 through the opening b. Figure 3 and Figure 4 Only some structures in the package structure are schematically shown.

[0056] In this way, in combination with Figure 2 , Figure 3 , Figure 4 As shown, when the heat flow generated by the first chip D1 passes upward through the second carrier board S2, the heat flow is laterally conducted along the second carrier board S2 to the edge area. The heat conducting member 30 leads out this part of the heat flow through the metal layer 51 located in the edge area of the second carrier board S2, and openings are provided at the top of the upper package 20. That is, part of the heat flow generated by the first chip D1 can be diffused around the upper package 20 through the heat conducting member 30 ( Figure 2 The heat dissipation path indicated by the solid arrow in

[0057] For the above-mentioned metal layer 51 located inside the second carrier board S2:

[0058] In some possible implementation manners, referring to Figure 3 As shown, the above-mentioned metal layer 51 can be on the same layer as the trace layer 52 inside the second carrier board S2, that is, the metal layer 51 and the trace layer 52 are in the same metal film layer, and both are obtained through the same process. When manufacturing the trace layer 51, an electrically isolated metal pattern (51) can be reserved at the position where the heat conducting member 30 needs to be connected in the edge area of the second carrier board S2, that is, there is no electrical connection between the metal layer 51 and the trace layer 52.

[0059] In some other possible implementation manners, referring to Figure 4 As shown, the above-mentioned metal layer 51 can be a temperature equalizing layer provided inside the second carrier board S2, that is, the metal layer 51 is independently provided from the trace layer 51. Schematically, the metal layer 51 can be the top metal layer in the second carrier board S2.

[0060] It should be understood that in some package structures, in order to improve the heat dissipation capacity of the package structure, a temperature equalizing layer is provided inside the second carrier board S2. In this way, when the heat flow generated by the first chip D1 passes upward through the second carrier board S2, it can be equalized by the temperature equalizing layer. In this case, an opening can be directly made on the surface of the second carrier board S2 to expose the temperature equalizing layer, without making too many modifications to the second carrier board S2.

[0061] In some packaging structures, the first chip D1 is the main heat-generating component. For example, if the first chip D1 is a processor chip, it will generate a large amount of heat flow. The second chip D2 has a relatively large thermal resistance by itself and is the main bottleneck during the upward diffusion of the heat flow generated by the first chip D1. By setting the heat-conducting member 30 to bypass part of the heat flow generated by the first chip D1 through the upper-layer package 20 for diffusion, the heat dissipation capacity of the packaging structure can be significantly improved, which is more beneficial to improving the performance of the product.

[0062] For example, in some possible implementation manners, the first chip D1 can be a processor chip, and the second chip D2 can be a storage chip, such as a DRAM (dynamic random access memory).

[0063] In the existing packaging structure, due to the large thermal resistance of the DRAM (D2), which can account for more than 50% of the total thermal resistance of the upward link in the upper-layer package 20, the heat dissipation capacity of the packaging structure is severely hindered. However, in the packaging structure of the present application, by setting the heat-conducting member 30, part of the upward heat flow can bypass the DRAM, resulting in good heat dissipation benefits and significantly improving the heat dissipation capacity of the packaging structure.

[0064] In addition, in the packaging structure provided by the embodiments of the present application, the heat-conducting member 30 can be pre-prepared without the need for processes such as electroplating or sputtering of heat-conducting materials, which has the advantages of simple manufacturing process and low cost.

[0065] The following further describes other related settings of the heat-conducting member 30.

[0066] First, the present application does not specifically limit the material used for the heat-conducting member 30, and it can be set according to actual needs in practice.

[0067] Illustratively, in some possible implementation manners, the heat-conducting member 30 can be made of a material with a relatively large thermal conductivity, such as a material with a thermal conductivity of more than 50 W / (m·k). This heat-conducting material can be a metal material, a non-metal material, or a mixture of metal materials and non-metal materials, and the present application does not limit this.

[0068] For example, in some possible implementation manners, the heat-conducting member 30 can be made of one or more of metal materials such as copper and gold, as well as metal doping materials.

[0069] Again, for example, in some possible implementation manners, the heat-conducting member 30 can be made of one or more of non-metal materials such as diamond and graphene.

[0070] In addition, the specific structure of the heat conducting member 30 in this application may not be limited, as long as it is ensured that the heat conducting member 30 can be connected to the metal layer in the second carrier plate S2 from the side of the upper encapsulation 20, bypassing a part of the heat flow in the second carrier plate S2 and leading it out above the upper encapsulation 20.

[0071] Illustratively, in combination with Figure 2 and Figure 5 as shown, in some possible implementation manners, the above heat conducting member 30 may include: a first heat conducting portion a1, a second heat conducting portion a2, and an intermediate heat conducting portion a3.

[0072] The above first heat conducting portion a1 and second heat conducting portion a2 are respectively arranged on opposite sides of the upper encapsulation 20, and the bottom ends of both the first heat conducting portion a1 and the second heat conducting portion a2 are connected to the second carrier plate S2. As Figure 2 illustrated, the first heat conducting portion a1 is located on the left side of the upper encapsulation 20, and the bottom end of the first heat conducting portion a1 is connected to the second carrier plate S2 exposed in the left region of the upper encapsulation 20. The second heat conducting portion a2 is located on the right side of the upper encapsulation 20, and the bottom end of the second heat conducting portion a2 is connected to the second carrier plate S2 exposed in the right region of the upper encapsulation 20. In this way, the heat flow is led out from both sides of the upper encapsulation 20 through the first heat conducting portion a1 and the second heat conducting portion a2.

[0073] The above intermediate heat conducting portion a3 is located above the upper encapsulation 20 (or the second chip D2), that is, on the side far from the second carrier plate S2, and one end of the intermediate heat conducting portion a3 is connected to the top end of the first heat conducting portion a1, and the other end of the intermediate heat conducting portion a3 is connected to the top end of the second heat conducting portion a2. By providing the intermediate heat conducting portion a3, the heat dissipation area can be increased and the heat dissipation performance can be improved.

[0074] In addition, the setting of the intermediate heat conducting portion a3 can also ensure the flatness of the top of the packaging structure, and the heat conducting member 30 can be picked up, fixed, etc. through the intermediate heat conducting portion a3; for example, a device with a suction nozzle can directly pick up the intermediate heat conducting portion a3 through the suction nozzle and place it at a preset position for fixation.

[0075] In the chip packaging structure provided in the embodiments of this application, one heat conducting member 30 can be provided, or multiple heat conducting members 30 can be provided. In practice, it can be set according to needs, and this application does not limit this.

[0076] For example, as Figure 6 shown, in some packaging structures, multiple heat conducting members 30 can be arranged side by side on the second carrier plate S2. Figure 6 Only a part of the structure in the packaging structure is shown in

[0077] Again, for example, as Figure 7As shown, in some encapsulation structures, a heat conducting member 30 can be provided on the second carrier board S2. In this case, the width w of the heat conducting member 30 can be increased. For example, the width of the heat conducting member 30 can be set to be substantially the same as the width of the upper layer encapsulation 20. Figure 7 Only some structures in the encapsulation structure are shown.

[0078] It should be understood that the setting of the intermediate heat conducting portion a3 can better achieve heat dissipation. In practice, when meeting the product encapsulation requirements, the area of the intermediate heat conducting portion a3 can be increased as much as possible. For example, the intermediate heat conducting portion a3 can be set as a planar structure covering the entire upper layer encapsulation 20 (such as Figure 6 , Figure 7 ).

[0079] Regarding the setting of the first heat conducting portion a1 and the second heat conducting portion a2, according to actual requirements, the intermediate heat conducting portion a3 can be set to connect to one first heat conducting portion a1 or multiple first heat conducting portions a1. Similarly, the intermediate heat conducting portion a3 can connect to one second heat conducting portion a2 or multiple second heat conducting portions a2. This application does not limit this, and in practice, it can be set according to needs.

[0080] Schematically, in some encapsulation structures, such as Figure 8 shown, the intermediate heat conducting portion a3 can be connected to multiple first heat conducting portions a1 arranged in parallel, and a gap c is left between two adjacent first heat conducting portions a1; similarly, the intermediate heat conducting portion a3 can be connected to multiple second heat conducting portions a2 arranged in parallel, and a gap c is left between two adjacent second heat conducting portions a2. In this case, relevant operations such as dispensing can be performed from the side of the upper layer encapsulation 20 through the gap c between the heat conducting portions.

[0081] In addition, this application does not limit the connection method between the heat conducting member 30 and the metal layer 51.

[0082] For example, in some possible implementation manners, the heat conducting member 30 and the metal layer 51 can be bonded through a thermal interface material (TIM; also known as a thermal interface material).

[0083] It should be noted here that the thermal interface material involved in this application can be thermal grease, thermal gel, thermal paste, heat sink gasket, phase change material, etc. This application does not limit this, and in practice, it can be set according to needs.

[0084] Again, for example, in some possible implementation manners, the heat conducting member 30 and the metal layer 51 can be welded. For example, the heat conducting member 30 and the metal layer 51 can be welded with solder.

[0085] It can be understood that in the packaging structure provided by the embodiments of the present application, the connection method (such as welding, thermal conductive adhesive, etc.) between the heat conducting member 30 and the second carrier S2 has the advantage of a simple process implementation path.

[0086] In addition, in the packaging structure provided by the embodiments of the present application, there may be a certain gap between the heat conducting member 30 and the upper layer packaging 20, or they can be bonded with a thermal conductive adhesive. The present application does not limit this.

[0087] Illustratively, in some possible implementation manners, referring to Figure 9 as shown, the heat conducting member 30 and the second chip D2 can be bonded with a thermal conductive adhesive 60, so as to further improve the heat dissipation efficiency.

[0088] Embodiment 2

[0089] Figure 10 FIG. is a schematic diagram of a stacked packaging structure provided by this Embodiment 2.

[0090] Illustratively, this Embodiment 2 provides a stacked packaging structure, as Figure 10 shown, this packaging structure includes a bottom layer packaging 10 (which can also be called the first packaging) and an upper layer packaging 20 (which can also be called the second packaging). The upper layer packaging 20 is stacked on the bottom layer packaging 10. Among them, the bottom layer packaging 10 includes a first carrier S1 and a first chip D1 disposed on the first carrier S1. The upper layer packaging 20 includes a second carrier S2 and a second chip D2 disposed on the second carrier S2.

[0091] Continuing to refer to Figure 10 as shown, in this Embodiment 2, by disposing a heat conducting member 30 above the upper layer packaging 20 (that is, on the side far from the second carrier S2), and setting both ends of the heat conducting member 30 to be connected along the side surface of the second chip D2 to the metal layer of the second carrier S2 ( Figure 10 not shown in the figure). In this way, when the heat flow generated by the first chip D1 flows upward through the second carrier S2, it is laterally conducted along the second carrier S2 to the edge region (that is, the side region of the second chip D2), and the heat conducting member 30 leads out this part of the heat flow from the metal layer located in the edge region of the second carrier S2, and is evenly opened on the top of the second chip D2, that is, part of the heat flow generated by the first chip D1 can bypass the second chip D2 through the heat conducting member 30 for diffusion ( Figure 10 the heat dissipation path indicated by the solid arrow in the figure), so as to improve the heat dissipation ability of the packaging structure.

[0092] Compared with the case in the first embodiment where the heat conducting member 30 is fixedly connected to the second carrier S2 at the top of the bottom package 10, in the second embodiment, for some packaging structures where no carrier is provided at the top of the bottom package 10, the heat conducting member 30 is directly fixedly connected to the second carrier S2 at the bottom of the second chip D2 in the upper package 20. Similarly, part of the heat flow generated by the first chip D1 in the bottom package 10 can be diffused through the heat conducting member 30 bypassing the second chip D2, so as to improve the heat dissipation capacity of the packaging structure.

[0093] In the second embodiment, the relevant settings of the heat conducting member and the metal layer are basically the same as those in the foregoing first embodiment. Specifically, reference can be made to the corresponding descriptions in the first embodiment, and details are not repeated here.

[0094] In addition, for other relevant settings in the second embodiment, such as the relevant settings of the first carrier, the second carrier, the first chip, the second chip, etc., reference can also be made to the corresponding descriptions in the foregoing first embodiment, and details are not repeated here.

[0095] As described above, the above are only specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A stacked package structure, characterized in that, Comprising: A first package, including a first carrier board, a second carrier board, and a first chip disposed between the first carrier board and the second carrier board; A second package, stacked on the second carrier board, and the second package includes a second chip; At least one heat conducting member, located on a side of the second package away from the second carrier board; Wherein, a metal layer is disposed in the second carrier board, and the second carrier board has an opening on a side where the second package is located to expose the metal layer, and two ends of the heat conducting member are connected to the metal layer through the opening along the side of the second package.

2. The stacked package structure according to claim 1, wherein The heat conducting member includes a first heat conducting portion, a second heat conducting portion, and an intermediate heat conducting portion; The first heat conducting portion and the second heat conducting portion are respectively disposed on opposite sides of the second package, and bottoms of the first heat conducting portion and the second heat conducting portion are both connected to the second carrier board; The intermediate heat conducting portion is located on a side of the second package away from the second carrier board, and one end of the intermediate heat conducting portion is connected to a top end of the first heat conducting portion, and the other end of the intermediate heat conducting portion is connected to a top end of the second heat conducting portion.

3. The stacked package structure according to claim 2, wherein The heat conducting member includes a plurality of the first heat conducting portions and a plurality of the second heat conducting portions; The plurality of the first heat conducting portions are arranged in parallel, and there is a gap between two adjacent ones of the first heat conducting portions; The plurality of the second heat conducting portions are arranged in parallel, and there is a gap between two adjacent ones of the second heat conducting portions.

4. The stacked package structure according to any one of claims 1-3, wherein The second carrier board includes a wiring layer, and the metal layer and the wiring layer are in the same layer.

5. The stacked package structure according to any one of claims 1-3, wherein The second carrier board includes a wiring layer, and the metal layer is located on a side of the wiring layer away from the first chip.

6. The stacked package structure according to any one of claims 1-5, wherein The heat conducting member is welded to the metal layer; Or, the heat conducting member and the metal layer are bonded by a heat conducting adhesive.

7. The stacked package structure according to any one of claims 1-6, wherein The heat conducting member includes one or more of metal, diamond, or graphene.

8. The stacked package structure according to any one of claims 1-7, wherein The heat conducting member and the second chip are bonded by a heat conducting adhesive.

9. The stacked package structure according to any one of claims 1-8, wherein The first chip is a processor chip.

10. A stacked package structure, characterized in that, Comprising: A first package, including a first carrier board and a first chip disposed on the first carrier board; A second package, stacked on the first package, and the second carrier board includes a second carrier board and a second chip disposed on the second carrier board; At least one heat conducting member, located on a side of the second chip away from the second carrier board; Wherein, a metal layer is provided in the second carrier board, and an opening is provided on the surface of the second carrier board to expose the metal layer, and both ends of the heat conducting member are connected to the metal layer through the opening along the side surface of the second chip.

11. The stacked package structure according to claim 10, wherein the heat conducting member includes a first heat conducting portion, a second heat conducting portion and an intermediate heat conducting portion; the first heat conducting portion and the second heat conducting portion are respectively arranged on opposite sides of the second chip, and the bottoms of the first heat conducting portion and the second heat conducting portion are both connected to the second carrier board; the intermediate heat conducting portion is located on a side of the second chip away from the second carrier board, and one end of the intermediate heat conducting portion is connected to the top end of the first heat conducting portion, and the other end of the intermediate heat conducting portion is connected to the top end of the second heat conducting portion.

12. The stacked package structure according to claim 11, wherein the heat conducting member includes a plurality of the first heat conducting portions and a plurality of the second heat conducting portions; the plurality of the first heat conducting portions are arranged in parallel, and there is a gap between two adjacent ones of the first heat conducting portions; the plurality of the second heat conducting portions are arranged in parallel, and there is a gap between two adjacent ones of the second heat conducting portions.

13. The stacked package structure according to any one of claims 10-12, wherein the second carrier board includes a wiring layer, and the metal layer and the wiring layer are located in the same layer.

14. The stacked package structure according to any one of claims 10-12, wherein the second carrier board includes a wiring layer, and the metal layer is located on a side of the wiring layer close to the second chip.

15. The stacked package structure according to any one of claims 10-14, wherein the heat conducting member is welded to the metal layer; alternatively, the heat conducting member and the metal layer are bonded through a heat conductive adhesive.

16. The stacked package structure according to any one of claims 10-15, wherein the heat conducting member includes one or more of metal, diamond or graphene.

17. The stacked package structure according to any one of claims 10-16, wherein the heat conducting member and the second chip are bonded through a heat conductive adhesive.

18. The stacked package structure according to any one of claims 10-17, wherein the first chip is a processor chip.

19. A stacked package structure, characterized in that, It includes a circuit board and the stacked package structure according to any one of claims 1-18, and the stacked package structure is electrically connected to the circuit board.

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