Data processing apparatus and method, electronic device, computer readable storage medium

Abstract

The present disclosure provides a data processing device and method, an electronic device and a computer readable storage medium, the device comprising: a plurality of requesters and a read control module; the requesters are configured to send data read instructions to the read control module, and the data return mode of the return data of the data read instructions of each requester is the same or different; the read control module is configured to arbitrate the plurality of requesters, receive a first instruction of a first requester who obtains arbitration right; allocate a layer of instruction entries for the first instruction in an instruction entry container and store instruction basic information; send the first instruction to a storage module; set a data ready flag of the first instruction as valid according to data ready information of the first instruction sent by the storage module; and obtain return data of the first instruction from the storage module according to the data return mode of the first requester and send the return data to the first requester. According to the embodiments of the present disclosure, the system flexibility and adaptability can be improved.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of computer, and in particular, to a data processing apparatus and method, an electronic device, and a computer readable storage medium. BACKGROUND

[0002] In the design of current hardware systems (e.g., chip systems), a front-end module (e.g., a requestor) in the hardware system sends data read instructions and data write instructions to a back-end module (e.g., a memory or a cache) to request reading data from the back-end module or writing data to the back-end module.

[0003] In which, the task being executed by the hardware system can have multiple requestors issuing requests, each requestor can issue K instruction groups, each instruction group includes N instructions, and each instruction includes M sub-requests, each sub-request is used to read a group of data. The requestor can ensure that multiple instructions in the same instruction group are sent to the back-end module continuously without interleaving. For data read instructions that need to return data, when the back-end module returns data, the data corresponding to the M sub-requests in one instruction must be returned together after being collected.

[0004] However, the order requirements of the requestor for data return can be different between instructions and between instruction groups, that is, there are different data return modes (data return types). For example, the instructions can be completely out-of-order returned, the instructions must be completely in-order returned, and the instruction groups can be completely out-of-order returned, but the N instructions in the instruction group must be completely in-order returned.

[0005] In related technologies, for the case that multiple requestors correspond to different data return modes, a set of hardware logic needs to be independently designed for each data return mode, or even for each requestor, which greatly increases the design complexity and chip area. SUMMARY

[0006] The present disclosure provides a data processing apparatus and method, an electronic device, and a computer readable storage medium.

[0007] In a first aspect, the present disclosure provides a data processing apparatus, comprising: a plurality of requestors and a read control module, the read control module being connected to the plurality of requestors and a storage module,

[0008] The requestors are configured to send data read instructions to the read control module, and the data return mode of the returned data of the data read instructions of each requestor is the same or different.

[0009] The read control module is configured to arbitrate the plurality of requesters, receive a first instruction of a first requester that obtains arbitration right among the plurality of requesters, allocate a layer of instruction entries for the first instruction in an instruction entry container of the read control module, and store instruction basic information of the first instruction in the instruction entry, the instruction entry container comprising a plurality of layers of instruction entries, each layer of instruction entries having instruction identification, and the instruction basic information comprising requester identification and data ready flag; send the first instruction to the storage module; set the data ready flag of the first instruction as valid according to data ready information of the first instruction sent by the storage module; and obtain return data of the first instruction from the storage module according to a data return mode of the first requester and send the return data to the first requester.

[0010] In a second aspect, the present disclosure provides a data processing method applied to a read control module of a data processing device, the data processing device further comprising a plurality of requesters, the read control module being connected to the plurality of requesters and a storage module respectively, the requesters being configured to send data read instructions to the read control module, and each of the requesters having a same or different data return mode for return data of a data read instruction.

[0011] The method comprises arbitrating the plurality of requesters, receiving a first instruction of a first requester that obtains arbitration right among the plurality of requesters, allocating a layer of instruction entries for the first instruction in an instruction entry container of the read control module, and storing instruction basic information of the first instruction in the instruction entry, the instruction entry container comprising a plurality of layers of instruction entries, each layer of instruction entries having instruction identification, and the instruction basic information comprising requester identification and data ready flag; sending the first instruction to the storage module; setting the data ready flag of the first instruction as valid according to data ready information of the first instruction sent by the storage module; and obtaining return data of the first instruction from the storage module according to a data return mode of the first requester and sending the return data to the first requester.

[0012] In a third aspect, the present disclosure provides an electronic device, comprising at least one processor, and a memory connected to the at least one processor in communication, wherein the memory stores one or more computer programs executable by the at least one processor, and the one or more computer programs are executed by the at least one processor to enable the at least one processor to execute the above-mentioned data processing method.

[0013] In a fourth aspect, the present disclosure provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the above-mentioned data processing method.

[0014] The embodiments provided by the present disclosure set a read control module between the requesters and the storage module, and the read control module can obtain the related information of the data read instruction sent by the requesters, obtain the return data of the instruction from the storage module according to the data return mode of the requester corresponding to the instruction, and send the return data to the corresponding first requester, so that the same set of hardware logic supports the arbitrary configuration of the data return mode of all the front-end requesters, improves the flexibility and adaptability of the system, reduces the complexity of chip design, and saves the chip area.

[0015] It should be understood that the content described in this part is not intended to identify key or important features of the embodiments of the present disclosure, nor to limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0016] The accompanying drawings are included to provide a further understanding of the present disclosure and constitute a part of the specification, which together with the embodiments of the present disclosure serve to explain the present disclosure, and do not constitute a limitation of the present disclosure. The above and other features and advantages will become more apparent to those skilled in the art from the detailed description of the specific example embodiments, with reference to the accompanying drawings, in which:

[0017] Figure 1 A block diagram of a data processing device provided for an embodiment of the present disclosure;

[0018] Figure 2 A schematic diagram of the configuration of a read control module provided for an embodiment of the present disclosure;

[0019] Figure 3 A block diagram of a data processing device provided for an embodiment of the present disclosure;

[0020] Figure 4 A schematic diagram of information storage in a read control module provided for an embodiment of the present disclosure;

[0021] Figure 5 A schematic diagram of an instruction chain table in a read control module provided for an embodiment of the present disclosure;

[0022] Figure 6 A schematic diagram of an instruction chain table in a read control module provided for an embodiment of the present disclosure;

[0023] Figure 7 A block diagram of an electronic device provided for an embodiment of the present disclosure. DETAILED DESCRIPTION

[0024] For those skilled in the art to better understand the technical solutions of the present disclosure, the exemplary embodiments of the present disclosure are described below in conjunction with the drawings, which include various details of the embodiments of the present disclosure to help understanding, and should be considered only as exemplary. Therefore, those skilled in the art should realize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Also, for the sake of clarity and conciseness, the description below omits the description of well-known functions and structures.

[0025] In the case of no conflict, each embodiment of the present disclosure and each feature in the embodiments can be combined with each other.

[0026] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0027] The terms used herein are only used to describe specific embodiments, and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the terms "comprise" and / or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. The terms "connected" or "coupled" and / or similar terms are not limited to a physical or mechanical connection or linkage to either another part or device and can also include an electrical connection, whether direct or indirect.

[0028] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an overly literal or overly formal sense unless expressly so defined herein.

[0029] As mentioned before, the task that the hardware system is performing can have multiple requesters issuing requests, each requester can issue K instruction groups, each instruction group includes N instructions, each instruction includes M sub-requests, each sub-request is used to read a set of data. The requesters can guarantee that multiple instructions within the same instruction group are sent to the backend module consecutively without interleaving. When the backend module returns data, the data corresponding to the M sub-requests in one instruction must be returned together after being collected.

[0030] Wherein, the number M of sub-requests of one instruction is generally a fixed value, for example, 32; the number N of instructions of one instruction group and the number K of instruction groups are uncertain and vary according to the task, for example, N takes values of 2, 4, 8, 16, etc., and K takes values of integers from 2 to 10, and the disclosure does not limit the specific values of the number M of sub-requests, the number N of instructions and the number K of instruction groups.

[0031] The order requirements of the data return of the requesters may be different between the instructions and between the instruction groups, that is, different data return types are included. For example, the instructions can be completely returned out of order, which is referred to as a first mode below; the instructions must be completely returned in order, which is referred to as a second mode below; and the instruction groups can be completely returned out of order, but the N instructions in the instruction group must be completely returned in order, which is referred to as a third mode.

[0032] In the related art, for the case that different data return modes correspond to multiple requesters, a set of hardware logic needs to be independently designed for each data return mode, or even for each requester, which greatly increases the design complexity and chip area. Meanwhile, with the diversified development of the upper task, the same requester may need to set different data return modes under different tasks, and the related art cannot support the case that the data return modes of the requesters in the hardware system are arbitrarily configured.

[0033] According to the data processing apparatus of the embodiments of the disclosure, the read control module is arranged between the requesters and the storage module (that is, the cache), the related information of the data read instruction sent by the requesters can be obtained through the read control module, the return data of the instruction is obtained from the storage module according to the data return mode of the instruction corresponding to the requesters and is sent to the corresponding first requester, so that the same set of hardware logic supports the arbitrary configuration of the data return modes of all the requesters in the front end, improves the flexibility and adaptability of the system, and at the same time, reduces the complexity of chip design and saves chip area.

[0034] The data processing apparatus according to the embodiments of the disclosure can be for any chip system itself or for the devices or components in the chip system, and the chip system can be, for example, a central processing unit (CPU), a graphics processing unit (GPU), a data processing unit (DPU), etc., and the disclosure does not limit the specific type of the chip system to which the data processing apparatus corresponds.

[0035] The data processing apparatus according to the embodiments of the present disclosure can execute a target task, which can be any type of task such as a data computing task or a graphics rendering task. After receiving the target task, the data processing apparatus can determine a plurality of instruction groups of the target task in a front-end module (a plurality of requesters) of the apparatus, each instruction group including a plurality of data read instructions, each data read instruction including a plurality of sub-requests for reading data from a storage module in a back-end for subsequent processing.

[0036] The present disclosure does not limit the specific type of the target task. The target task can also include an instruction group of data write instructions, which is not processed by the scheme of the present disclosure.

[0037] Figure 1 A block diagram of a data processing apparatus according to an embodiment of the present disclosure is provided. As shown in the figure, the data processing apparatus according to the embodiments of the present disclosure includes a plurality of requesters (requester 1, requester 2, …, requester P, P being an integer greater than 1) and a read control module, which is connected to the plurality of requesters and a storage module (cache) in a back-end. Figure 1 Figure 1

[0038] In some possible implementations, each requester has a globally unique requestor identifier (requestor_id), and the data return mode of each requester can be configured in advance and cannot be changed during the execution of the target task. The configuration needs to be performed after the chip system is reset after the target task is completed.

[0039] In some possible implementations, the read control module of the embodiments of the present disclosure needs to frequently interact with the storage module (cache), and therefore can be an independent module in the chip system or a submodule of the storage module, which is not limited by the present disclosure.

[0040] In some possible implementations, each requester is configured to send a data read instruction to the read control module, the data read instruction belonging to an instruction group of the target task, the data read instruction including a plurality of sub-requests, and the data return mode of the returned data of the data read instruction of each requester being the same or different.

[0041] ​​Wherein, the requestor can ensure that multiple data read instructions in the same instruction group are sent to the read control module continuously without being interleaved, and a group end flag (group_end) can be carried on the interface between the requestor and the read control module to indicate whether the current instruction group is sent completely, and the group end flag is valid (valid) to indicate that the current instruction group is sent completely, and the group end flag is invalid (invalid) to indicate that the current instruction group is not sent completely. Wherein, 1 can represent valid (valid) and 0 can represent invalid (invalid); or 0 can represent valid (valid) and 1 can represent invalid (invalid), which is not limited in the present disclosure.

[0042] In some possible implementation manners, the requestor can ensure that the same data read instruction is sent to the read control module continuously without being interleaved. Wherein, if 1 instruction needs only one clock cycle on the interface, the end of instruction flag (end_of_instruction) is not needed; if 1 instruction needs multiple clock cycles on the interface, the end of instruction flag needs to be carried on the interface, and the end of instruction flag is valid (valid) to indicate that the current instruction is sent completely, and the end of instruction flag is invalid (invalid) to indicate that the current instruction is not sent completely. The present disclosure does not limit this.

[0043] Figure 2 The schematic diagram of the read control module configured by the embodiment of the present disclosure is provided. As shown in Figure 2 The read control module is configured to perform the following steps:

[0044] Step S21, arbitrating the multiple requestors, and receiving a first instruction of a first requestor that obtains arbitration right in the multiple requestors;

[0045] Step S22, allocating a layer of instruction entries for the first instruction in an instruction entry container of the read control module, and storing instruction basic information of the first instruction in the instruction entry, the instruction entry container includes multiple layers of instruction entries, each layer of instruction entry has instruction identification, and the instruction basic information includes requestor identification and data ready flag;

[0046] Step S23, sending the first instruction to the storage module;

[0047] Step S24, setting the data ready flag of the first instruction as valid according to the data ready information of the first instruction sent by the storage module;

[0048] Step S25, obtaining return data of the first instruction from the storage module according to the data return mode of the first requestor and sending the return data to the first requestor.

[0049] For example, the read control module may be equipped with an arbitrator to arbitrate multiple requesters in step S21, switching arbitration rights (grants) at the granularity of a single instruction, allowing multiple requesters to obtain arbitration rights in turn. After arbitration, the read control module may receive a first instruction from the first requester among the multiple requesters to obtain arbitration rights. This can reduce or avoid situations where arbitration rights are constantly occupied by a single requester. This disclosure does not limit the specific arbitration strategy of the arbitrator.

[0050] In some possible implementations, the instructions received by the read control module are a sequence of instructions from multiple requesters interspersed. In this example, the multiple requesters include requester A and requester B, and the instruction sequence can be:

[0051] requestor A, group_id (group ID) 0, instruction (instruction) 0;

[0052] requestor B, group_id 1, instruction 0;

[0053] requestor A, group_id 0, instruction 1;

[0054] requestor B, group_id 1, instruction 1.

[0055] In some possible implementations, the read control module is provided with an instruction entry container (instruction_buffer) shared by multiple requesters. The instruction entry container includes Q layers of instruction entries. Each layer of instruction entries can store all relevant information for an instruction. Each layer of instruction entry has an instruction identifier (instruction_id), also known as an entry ID for the instruction entry, which uniquely identifies the instruction. Instruction entries in the instruction entry container can be allocated and released out of order, using methods known in the relevant art to achieve this. Furthermore, Q can take values ​​such as 128 and 256, which are not limited in this disclosure.

[0056] In step S22, the instruction identification allocation logic in the read control module can allocate a layer of instruction entries for the received first instruction in the instruction entry container, that is, select an instruction entry from the released instruction entries (entry valid information is invalid), set the entry valid information of the instruction entry as valid, and store the instruction basic information of the first instruction in the instruction entry. The instruction basic information includes the requester identification (ID of the requester corresponding to the first instruction) and the data ready flag (instruction_data_all_ready_flag), and can also include the group identification (ID of the instruction group corresponding to the first instruction), the entry valid information (entry valid, used to represent whether the entry is valid), etc. Among them, the data ready flag is used to represent whether the return data of the multiple sub-requests of the instruction is all ready, and the data ready flag is valid, indicating that the return data of the multiple sub-requests of the corresponding instruction is all ready; the data ready flag is invalid, indicating that the return data of the multiple sub-requests of the corresponding instruction is not all ready. The initial value of the data ready flag is invalid.

[0057] In step S23, the read control module also sends the received first instruction to the storage module, so that the storage module obtains the return data requested by the first instruction.

[0058] Among them, the storage module is configured to: obtain the return data of the multiple sub-requests of the first instruction; and send the data ready information of the first instruction to the read control module in the case that the return data of the multiple sub-requests of the first instruction is all ready.

[0059] That is, after receiving the first instruction, the storage module can obtain the return data of the multiple sub-requests according to the request addresses of the multiple sub-requests of the first instruction; if the return data of the multiple sub-requests of the first instruction is all ready, the storage module sends the data ready information of the first instruction to the read control module, so that the read control module updates the data ready flag of the first instruction.

[0060] In step S24, when the read control module receives the data ready information of the first instruction, the read control module can set the data ready flag in the instruction entry of the first instruction as valid, thereby representing that the return data of the multiple sub-requests of the first instruction is all ready.

[0061] In step S25, the read control module can determine the data return mode of the first requester corresponding to the first instruction according to the requester identification of the first instruction, and then obtain the return data of the first instruction from the storage module based on the instruction pick logic of the read control module according to the data return mode and send the return data to the first requester.

[0062] In some possible implementations, if the data return mode is the first mode, that is, the return data of different instructions are returned out of order, then the return data of the first instruction can be sent after the data ready flag of the first instruction is valid; if the data return mode is the second mode, that is, the return data of different instructions are returned in order, then when the data ready flag of the first instruction is valid, it is also necessary to send the return data of the first instruction after sending the return data of the previous instruction of the first instruction.

[0063] In some possible implementations, if the data return mode is the third mode, that is, the return data of different instruction groups are returned out of order, and the return data of different instructions in the same instruction group are returned in order, then when the data ready flag of the first instruction is valid, it is necessary to wait until the return data of the instruction group to which the first instruction belongs are all ready, and then the return data of the entire instruction group are sent in order.

[0064] In some possible implementations, depending on the data return mode, the read control module may read the return data of the selected instruction or instruction group from the storage module, and after certain processing, such as collecting the return data of multiple sub-requests of the instruction, and placing them in sequence on the interface signal; then the return data is sent to the corresponding requester through the selector in the read control module.

[0065] According to the data processing device of the embodiment of the present disclosure, a read control module is provided between the requester and the storage module. The relevant information of the data read instruction sent by the requester can be obtained through the read control module. According to the data return mode of the requester corresponding to the instruction, the return data of the instruction is obtained from the storage module and sent to the corresponding first requester. Thus, through the same set of hardware logic, any configuration of the data return mode of all front-end requesters is supported, thereby improving the flexibility and adaptability of the system; at the same time, it can reduce the complexity of chip design and save chip area.

[0066] The data processing device according to the embodiment of the present disclosure is described below.

[0067] Figure 3 A block diagram of a data processing device provided in an embodiment of the present disclosure. Figure 3 As shown, the data processing device includes multiple requesters (requester 1, requester 2, ..., requester P, where P is an integer greater than 1) and a read control module, which is connected to the multiple requesters and the storage module respectively.

[0068] In some possible implementations, the read control module includes an arbiter 31, a request path processor 32, a central controller 33, a return path processor 34 and a selector 35. The central controller 33 is provided with an instruction entry container (instruction_buffer) 331, a group entry container (group_buffer) 332 and an instruction pick table (instruction pick table) 333, and is also provided with instruction pick logic 334.

[0069] The arbitrator 31 is connected to a plurality of requesters and is used to arbitrate the plurality of requesters and receive a first instruction from a first requester among the plurality of requesters that obtains arbitration rights. The arbitrator 31 switches arbitration rights at a granularity of one instruction.

[0070] The request path processor 32 is connected to the central controller 33 and the storage module, and is used to send the received first instruction to the central controller 33 and the storage module respectively;

[0071] The central controller 33 is connected to the storage module and the return path processor 34, and is configured to allocate an instruction entry to the first instruction and store basic instruction information of the first instruction according to the data return mode of the first requester corresponding to the received first instruction; update the data ready flag of the instruction according to the data ready information of the storage module; determine the instruction or instruction group of the returned data according to the data return mode of the requester, and control the storage module and the return path processor to return the return data of the instruction or instruction group;

[0072] The return path processor 34 is connected to the storage module and the selector 35, and is used to obtain the information of the instruction or instruction group of the current return data sent by the central controller and receive the return data of the instruction or instruction group sent by the storage module; and send the return data to the selector;

[0073] The selector 35 is connected to the plurality of requesters and is used to send the return data to the corresponding requesters.

[0074] In some possible implementations, in step S21, the read control module arbitrates multiple requesters through the arbitrator 31, switching arbitration rights (grants) at the granularity of a single instruction, allowing multiple requesters to obtain arbitration rights in turn. After arbitration, the request path processor 32 of the read control module may receive a first instruction from the first requester among the multiple requesters to obtain arbitration rights, and send the first instruction to the central controller 33 and the downstream storage module.

[0075] In some possible implementation manners, the central controller 33 is provided with a Q-layer instruction entry container 331. Each layer of instruction entry can store all relevant information of one instruction, and each layer of instruction entry has an instruction identifier (instruction_id), i.e., an entry identifier (entry id) of the instruction entry, for uniquely identifying one instruction.

[0076] After receiving the first instruction, instruction identifier allocation logic (not shown) in the central controller 33 can allocate a layer of instruction entry for the received first instruction in the instruction entry container, i.e., select one instruction entry from the released instruction entries (entry valid information is invalid), set the entry valid information of the instruction entry to valid, and store the instruction basic information of the first instruction in the instruction entry. The instruction basic information includes a requester identifier (ID of the requester corresponding to the first instruction), a group identifier (ID of the instruction group corresponding to the first instruction), and data ready flag (instruction_data_all_ready_flag), and can further include entry valid information and other information required by the first instruction when data is returned, which varies according to different data return modes.

[0077] In some possible implementation manners, after receiving the first instruction, the storage module can acquire return data of the plurality of sub-requests according to the request addresses of the plurality of sub-requests of the first instruction respectively; and if the return data of the plurality of sub-requests of the first instruction are all ready, the storage module sends data ready information of the first instruction to the central controller 33.

[0078] In some possible implementation manners, when the central controller 33 receives the data ready information of the first instruction, the central controller 33 sets the data ready flag of the first instruction in the instruction entry to valid, to indicate that the return data of the plurality of sub-requests of the first instruction are all ready. The central controller 33 can determine the data return mode of the first requester corresponding to the first instruction according to the requester identifier of the first instruction, and then implement sending of the return data based on the instruction pick logic 334 of the read control module, in combination with the return path processor 34 and the selector 35, according to the data return mode.

[0079] In some possible implementation manners, the data return mode includes a first mode, and the first mode is used to represent return data of different instructions returned in disorder.

[0080] The read control module is provided with an instruction pick table, and the instruction pick table is provided with a valid entry mask for each layer of instruction entry, for representing whether the return data of the instruction of the requester in the first mode is ready.

[0081] For example, an instruction pick table can be provided in the central controller 33 of the read control module, and the instruction pick table is provided with a plurality of masks corresponding to different data return modes, representing instructions and instruction groups that can return data in each data return mode, for the instruction pick logic 334 of the central controller 33 to pick instructions or instruction groups to return data each time.

[0082] Figure 4 A schematic diagram of information storage in a read control module provided by an embodiment of the present disclosure.

[0083] As shown in Figure 4 Each layer of instruction entries in the instruction buffer is used to store information of one instruction, and the instruction identifier (instruction_id) is the identifier of the instruction entry. The instruction entry stores instruction basic information (instruction basic info) and other information of the instruction, including a next instruction identifier (next_instruction_id, used in the second mode and the third mode), a global group identifier (global_group_id, used in the third mode), and the like.

[0084] As shown in Figure 4 The instruction pick table is provided with a plurality of masks, including a valid entry mask (valid_entry_mask, used in the first mode), a valid requestor mask (valid_requestor_mask, used in the second mode), and a valid group mask (valid_group_mask, used in the third mode), corresponding to different data return modes.

[0085] In some possible implementation manners, for the first mode in the data return mode, i.e., the mode in which return data of different instructions is returned out of order, a valid entry mask (valid_entry_mask) is provided for each layer of instruction entries in the instruction pick table, for representing whether return data of an instruction of a requestor in the first mode is ready. The instruction entry container 331 includes Q layers of instruction entries, and the instruction pick table includes Q valid entry masks, i.e., the valid entry mask has Q bits. The initial value of the valid entry mask is invalid, for example, 0.

[0086] In some possible implementation manners, the read control module is further configured to:

[0087] In a case where the data ready flag of the instruction of the requestor in the first mode is valid, the valid entry mask corresponding to the instruction is set as valid;

[0088] In the case that the requestor of the first mode returns data, a second instruction is selected from the instructions whose valid entry mask is valid in the instruction selection table;

[0089] The return data of the second instruction is obtained from the storage module and sent to the requestor corresponding to the second instruction.

[0090] For example, for the instruction of the requestor of the first mode, if the data ready flag of the instruction is valid, indicating that the return data of the instruction is all ready, the valid entry mask corresponding to the instruction entry of the instruction can be set as valid, for example, set as 1. At the same time, there can be multiple bits of the valid entry mask as valid. It should be noted that for the instructions of the requestors of the second mode and the third mode, when the data ready flag is valid, the value of the corresponding valid entry mask will not be updated, that is, the valid entry mask of the instructions of the requestors of the second mode and the third mode is always invalid.

[0091] In some possible implementations, at each time of returning data, if there is prepared data in multiple data return modes, that is, there is a valid mask in the multiple masks of the corresponding mode, the central controller 33 will first select the data return mode of this time (which will be described below); if the requestor of the first mode returns data, a second instruction is selected from the instructions whose valid entry mask is valid in the instruction selection table. If the instruction whose valid entry mask is valid is one, it is directly taken as the second instruction; if the instruction whose valid entry mask is valid is multiple, one can be randomly selected as the second instruction, or it can be selected by other means.

[0092] In some possible implementations, the central controller 33 can request the data of the second instruction from the storage module, and send the related information of the second instruction to the return path processor 34; the storage module sends the return data of all sub-requests of the second instruction to the return path processor 34 in response to the request of the central controller 33; the return path processor 34 places the return data in order on the interface signal, and sends the return data to the corresponding requestor via the selector 35.

[0093] After the return data of the second instruction is sent, the entry valid information of the instruction entry corresponding to the second instruction is set as invalid, and the instruction entry is released for subsequent instructions; and the valid entry mask corresponding to the second instruction is set as invalid, thereby completing the data return process of this time.

[0094] In this way, a valid entry mask is set, and the corresponding valid entry mask is set to valid when the data ready flag of the requester instruction of the first mode is valid, so that the data return of the requester instruction of the first mode can be realized without affecting the processing of other modes, thereby improving the flexibility and adaptability of data return.

[0095] In some possible implementations, the data return mode includes a second mode, which is used to indicate that the return data of different instructions is returned in order. To support all requesters being configured in the second mode, a global previous instruction identifier can be set for each requester in the instruction entry container, and the initial value of the previous instruction identifier is a null value or an invalid value. Each layer of instruction entry is also provided with a next instruction identifier of the instruction, and the initial value of the next instruction identifier is the instruction identifier of the instruction at the current layer.

[0096] like Figure 4 As shown, P global previous instruction identifiers are set in the instruction entry container, corresponding to P requesters. The second mode preserves the order of return data for different instructions. Therefore, a previous instruction identifier can be set to assist in establishing a one-way instruction linked list between instructions to determine the order of the instructions. The previous instruction identifier is used to indicate the ID of the previous instruction in the instruction linked list. The initial value of the previous instruction identifier is null or invalid, such as 0 or the ID of an instruction entry whose entry validity information (entry valid) is invalid.

[0097] like Figure 4 As shown, each instruction entry in the instruction entry container also includes a subsequent instruction identifier, which indicates the ID of the instruction that follows the instruction, thereby establishing an instruction linked list structure. The initial value of the subsequent instruction identifier is the instruction identifier of the instruction entry itself, and it is reassigned for use after the data processing device is restarted or the instruction entry is released.

[0098] For a valid instruction entry (entry validity information is valid), if the subsequent instruction identifier in the instruction entry is equal to the instruction identifier itself, it indicates that this instruction is the tail of the current instruction list. In addition, for instructions with the data return mode set to mode 1, the return data of different instructions is returned out of order, and there is no need to determine the order between instructions. The subsequent instruction identifier in the instruction entry is always equal to the instruction identifier itself.

[0099] In some possible implementations, after allocating a layer of instruction entries for the first instruction in the instruction entry container, the read control module is further configured to:

[0100] When the data return mode of the first requester corresponding to the first instruction is the second mode, determining a previous instruction identifier of the first requester;

[0101] In a case that the previous instruction identifier is null or invalid, the previous instruction identifier is modified as the first instruction identifier of the first instruction;

[0102] In a case that the previous instruction identifier is valid, a next instruction identifier in an instruction entry of a third instruction corresponding to the previous instruction identifier is set as the first instruction identifier, and the previous instruction identifier is modified as the first instruction identifier.

[0103] For example, in step S22, instruction identifier allocation logic in the read control module allocates a layer of instruction entry for the newly received first instruction in the instruction entry container, and stores instruction basic information of the first instruction in the instruction entry, and the first instruction identifier of the first instruction is the entry identifier of the instruction entry.

[0104] After step S22, if the data return mode of the first requester corresponding to the first instruction is the second mode, it can be read from the instruction entry container whether the current previous instruction identifier of the first requester is valid; if the current previous instruction identifier is null or invalid, it indicates that the first requester currently has no instruction with unreturned data, and the previous instruction identifier can be modified as the first instruction identifier, that is, the first instruction is taken as the previous instruction of the next received instruction. The next instruction identifier in the instruction entry of the first instruction remains the initial value, that is, the first instruction identifier of itself.

[0105] In some possible implementation manners, if the current previous instruction identifier is valid, it indicates that the first requester currently has an instruction with unreturned data. In this case, the next instruction identifier in the instruction entry of a third instruction corresponding to the previous instruction identifier is set as the first instruction identifier, to indicate that the first instruction is the next instruction of the third instruction. And the previous instruction identifier is modified as the first instruction identifier, that is, the first instruction is taken as the previous instruction of the next received instruction, so as to realize the establishing process of the instruction chain table.

[0106] In this way, the instruction chain table of the requester in the second mode can be established, so as to determine the order between the instructions, and realize the in-order return of the returned data of different instructions in the second mode in subsequent processing, to meet the data return requirement of the second mode. The processing manner is realized by a small amount of storage space in cooperation with the instruction identifier allocation logic, and the complexity of processing is reduced.

[0107] In some possible implementation manners, the instruction entry container further has a global head instruction identifier for each requester, to represent the instruction with the longest waiting time in each requester;

[0108] The read control module is provided with an instruction selection table, and the instruction selection table is provided with a valid requestor mask for each requestor, which is used to represent whether the instruction with the longest latency in the requestor in the second mode is ready.

[0109] That is, for the second mode, the read control module is also provided with a global head instruction identifier for each requestor in the instruction entry container, which is used to represent the ID of the instruction with the longest latency in each requestor that has not yet returned the return data of the instruction to the upstream requestor. As shown in Figure 4 P global head instruction identifiers are provided, which correspond to P requestors respectively.

[0110] In addition, for the second mode, the read control module is provided with a valid requestor mask for each requestor in the instruction selection table, as shown in Figure 4 P valid requestor masks are provided, that is, the valid requestor mask has P bit positions, which correspond to P requestors respectively. The initial value of the valid requestor mask is invalid.

[0111] In some possible implementation manners, the read control module is further configured to:

[0112] In the case that the head instruction identifier of any requestor in the second mode corresponds to a valid data ready flag of the corresponding instruction, the valid requestor mask corresponding to the requestor is set to be valid;

[0113] In the case that the return data of the requestor in the second mode is selected this time, the second requestor is selected from the requestors with valid valid requestor masks in the instruction selection table;

[0114] The return data of the fourth instruction corresponding to the head instruction identifier of the second requestor is obtained from the storage module and sent to the second requestor;

[0115] The head instruction identifier of the second requestor is modified to the instruction identifier of the next instruction of the fourth instruction.

[0116] For example, for any requestor in the second mode, if the data ready flag of the instruction corresponding to the head instruction identifier of the requestor in the instruction entry container is valid, indicating that the return data of the multiple sub-requests of the instruction with the longest latency is all ready, the valid requestor mask corresponding to the requestor is set to be valid, indicating that the return data of the instruction corresponding to the instruction identifier can be sent. It should be noted that only the valid requestor mask of the requestor in the second mode can be valid, and the valid requestor masks of the requestors in the first mode and the third mode are always invalid.

[0117] Similarly, when returning data each time, if there is prepared data in multiple data return modes, that is, there is a valid mask in the multiple masks corresponding to the mode, the central controller 33 will first select the data return mode of this time; if the data of the requestor in the second mode is selected this time, the second requester is selected from the instruction selection table and the requesters with valid masks. If the valid mask is valid, it is directly used as the second requester; if the valid mask is valid, a random one can be selected as the second requester, or it can be selected by other means.

[0118] In some possible implementations, the central controller 33 can request the storage module to return data of the fourth instruction corresponding to the head instruction identifier of the second requester, and send the related information of the fourth instruction to the return path processor 34; the storage module sends the return data of all sub-requests of the fourth instruction to the return path processor 34 in response to the request of the central controller 33; the return path processor 34 places the return data in order on the interface signal, and sends the return data to the corresponding requestor through the selector 35.

[0119] In some possible implementations, after the return data of the fourth instruction is sent, the head instruction identifier of the second requester is modified to the identifier of the next instruction in the instruction entry of the fourth instruction, that is, the next instruction of the fourth instruction is used as the instruction with the longest waiting time in the second requester.

[0120] In some possible implementations, the entry valid information of the instruction entry corresponding to the fourth instruction is set to be invalid, and the instruction entry is released for subsequent instructions; and the valid mask of the second requester is set to be invalid, thereby completing the data return process this time.

[0121] In this way, the valid request mask is set for each requestor, and when the data ready flag of the instruction with the longest waiting time in the second mode requestor is valid, the corresponding valid request mask is set to be valid, which can quickly identify whether the return data of the instruction of the second mode requestor can be returned, thereby realizing the return of the return data of the different instructions of the requestor in the second mode in sequence without affecting the processing of other modes, improving the flexibility of data return and the adaptability to various data return modes.

[0122] In some possible implementations, the data return mode includes a third mode, the third mode is used to represent that the return data of different instruction groups is returned out of order, and the return data of different instructions in the same instruction group is returned in sequence;

[0123] The read control module further comprises a group entry container, which comprises multiple layers of group entries, each layer of group entries being used to store group basic information, the group basic information comprising a head instruction identifier and an instruction number, and each layer of group entries having a global group identifier;

[0124] The global group identifier of the instruction is further arranged in each layer of instruction entries;

[0125] The group entry container further has a global previous group end bit and a previous global group identifier for each requester, the previous group end bit being used to represent whether the group end flag of the previous instruction of the requester is valid, and the initial value being valid; and the previous global group identifier being used to represent the global group identifier corresponding to the previous instruction of the requester.

[0126] For example, in the third mode, the return data of different instruction groups is returned in disorder, and the return data of different instructions in the same instruction group is returned in order. For the third mode, a group entry container can be arranged in the read control module, which comprises G layers of group entries, each layer of group entries being used to store group basic information, and the entry identifier of each layer of group entries being a global group identifier. G can take values such as 32 and 64, and the disclosure does not limit the specific number of layers G of group entries.

[0127] As shown in Figure 4 The group basic information of each layer of group entries comprises a head instruction identifier (head_instruction_id) and an instruction number (instruction_cnt), and can further comprise entry validity information, etc. The head instruction identifier is used to represent the ID of the first instruction of the instruction group; and the instruction number is used to represent the number of instructions in the instruction group that have not yet returned data to the upstream requester, and the initial value is 0. The value range of the instruction number needs to consider the maximum number of instructions in an instruction group (for example, 64) and the number of instructions that can be stored in the instruction entry container. Those skilled in the art can set the value range of the instruction number according to the actual situation, and the disclosure does not limit this.

[0128] As shown in Figure 4 For the third mode, the global group identifier of the instruction is further arranged in each layer of instruction entries of the instruction entry container, corresponding to the global group identifier in the group entry.

[0129] As shown in Figure 4As shown, for the third mode, the global last group end bit (last_instruction_is_group_end) and the global last group ID (last_global_group_id) are also set for each requestor in the group entry container, the last group end bit is used to represent whether the end group flag (end_group) of the last instruction of the requestor is valid, and the initial value is valid; the global last group ID is used to represent the global group ID corresponding to the last instruction of the requestor, and the initial value is null or invalid.

[0130] In actual processing, each instruction has an end group flag (end_group), if the end group flag of an instruction is invalid, it means that the instruction is not the last instruction of the instruction group; otherwise, if the end group flag of an instruction is valid, it means that the instruction is the last instruction of the instruction group. If the end group flag of the newly received instruction is valid, the last group end bit of the corresponding requestor in the group entry container is set to valid.

[0131] In some possible implementation manners, after the read control module allocates a layer of instruction entries for the first instruction in the instruction entry container, the read control module is further configured to:

[0132] In a case where the data return mode of the first requestor corresponding to the first instruction is the third mode, determine the last group end bit of the first requestor;

[0133] In a case where the last group end bit of the first requestor is valid, allocate a layer of group entries for the first instruction group corresponding to the first instruction in the group entry container, store group basic information of the first instruction group in the group entry, and set the global group ID of the first instruction in the instruction entry to the first global group ID of the group entry; wherein the head instruction ID of the group basic information is the instruction ID of the first instruction, and the value of the instruction quantity is 1.

[0134] Modify the last group end bit of the first requestor in the group entry container to invalid, and modify the global last group ID to the first global group ID.

[0135] For example, in step S22, the instruction ID allocation logic in the read control module allocates a layer of instruction entries for the newly received first instruction in the instruction entry container, and stores the instruction basic information of the first instruction in the instruction entry.

[0136] After step S22, if the data return mode of the first requestor corresponding to the first instruction is the third mode, it is determined from the group entry container by group identification allocation logic in the read control module whether the previous group end bit of the first requestor is valid; if the previous group end bit is valid, it indicates that the instructions of the instruction group before the first instruction have all been received. In this case, a group entry is allocated for the first instruction group corresponding to the first instruction in the group entry container, that is, a group entry is selected from the released group entries (entry valid information is invalid), the entry valid information of the group entry is set to valid, and the group basic information of the first instruction group is stored in the group entry. Moreover, the global group identification in the instruction entry of the first instruction is set to the first global group identification of the group entry.

[0137] In some possible implementation manners, the group basic information includes a head instruction identification and an instruction number. Since the first instruction is the first instruction of the instruction group, the head instruction identification is set to the instruction identification of the first instruction; the initial value of the instruction number is 0, one instruction has been received at present, and the instruction number is increased by 1, so that the value of the instruction number is 1.

[0138] In some possible implementation manners, after the group entry is allocated for the first instruction group, the previous group end bit of the first requestor in the group entry container can be modified to invalid, indicating that the instructions of the first instruction group have not been received completely and need to be received continuously; and the previous global group identification of the first requestor in the group entry container is modified to the first global group identification, indicating that the first global group identification is the global group identification corresponding to the previous instruction of the next received new instruction of the requestor.

[0139] In this way, the recording of the new instruction group in the third mode can be implemented, so as to realize the in-order return of the instruction return data in the instruction group subsequently, thereby improving the compatibility and adaptability of the system.

[0140] In some possible implementation manners, the read control module is further configured to:

[0141] in a case where the previous group end bit of the first requestor is invalid, set the global group identification of the first instruction to the second global group identification corresponding to the previous global group identification in the group entry container;

[0142] increase the value of the instruction number in the group entry corresponding to the second global group identification by 1;

[0143] in a case where the group end flag of the first instruction is valid, modify the previous group end bit of the first requestor to valid.

[0144] For example, after step S22, if the data return mode of the first requester corresponding to the first instruction is the third mode, it is determined from the group entry container whether the previous group of end bits of the first requester is valid; if the previous group of end bits is invalid, it indicates that the instructions of the instruction group before the first instruction have not been received, and the second global group identifier corresponding to the previous global group identifier in the group entry container is the global group identifier of the instruction group to which the first instruction belongs.

[0145] In this case, there is no need to allocate a new group entry, and the global group identifier of the first instruction can be directly set to the second global group identifier; and the value of the number of instructions in the group entry corresponding to the second global group identifier is increased by 1, indicating that the number of instructions of the instruction group that has not yet returned data to the upstream requester is increased by 1.

[0146] In some possible implementations, if the group end flag of the first instruction is invalid, it indicates that the first instruction is not the last instruction in the instruction group to which it belongs, and no operation is performed or the previous group end bits of the first requester are updated to invalid. If the group end flag of the first instruction is invalid, it indicates that the first instruction is the last instruction in the instruction group to which it belongs, and the previous group end bits of the first requester need to be updated to valid, indicating that all instructions in the instruction group have been received. In this way, new instructions received subsequently are instructions of a new instruction group and can be assigned a new group entry.

[0147] In this way, the recording of new instructions in the received instruction group in the third mode can be achieved, so as to subsequently achieve the order-preserving return of instruction return data in the instruction group, thereby improving the compatibility and adaptability of the system.

[0148] In some possible implementations, a global previous instruction identifier is set for each requester in the instruction entry container, and the initial value of the previous instruction identifier is a null value or an invalid value.

[0149] Each layer of instruction entry is also provided with a subsequent instruction identifier of the instruction, and the initial value of the subsequent instruction identifier is the instruction identifier of the instruction at this layer.

[0150] like Figure 4 As shown, P global previous instruction identifiers are set in the instruction entry container, corresponding to P requesters respectively. The third mode is to return the return data of different instructions in the same instruction group in order. Therefore, similar to the second mode, a previous instruction identifier can be set to assist in establishing a one-way instruction linked list between instructions to determine the order between instructions. The previous instruction identifier is used to indicate the ID of the previous instruction of the same instruction group (must be the same requester) in the instruction linked list. The initial value of the previous instruction identifier is a null value or an invalid value, for example, 0 or the ID of an instruction entry whose entry valid information (entry valid) is invalid.

[0151] likeFigure 4 As shown, a next instruction identifier of an instruction is also arranged in each layer of instruction entries of the instruction entry container, which is used to indicate the ID of the next corresponding instruction of the same instruction group (certainly the same requester) of the current instruction, so as to establish the instruction chain table structure. The initial value of the next instruction identifier is the instruction identifier of the instruction entry itself, which is included in the data processing device restart or the instruction entry is released and then re-allocated for use. For a valid instruction entry (the entry valid information is valid), if the next instruction identifier in the instruction entry is equal to the instruction identifier of itself, it indicates that this instruction is the tail of the current instruction chain table.

[0152] In some possible implementation manners, the reading control module is further configured to:

[0153] In a case where the global group identifier of the first instruction is an existing second global group identifier, set the next instruction identifier in the instruction entry of the fifth instruction corresponding to the previous instruction identifier of the first requester to the first instruction identifier of the first instruction;

[0154] modify the previous instruction identifier to the first instruction identifier.

[0155] For example, the data return mode of the first requester corresponding to the first instruction is the third mode, and the global group identifier of the first instruction is an existing second global group identifier, which indicates that the first instruction is the next instruction of the fifth instruction corresponding to the previous instruction identifier of the first requester, and belongs to the same instruction group as the fifth instruction. The next instruction identifier in the instruction entry of the fifth instruction can be set to the first instruction identifier of the first instruction, so as to indicate that the first instruction is the next instruction of the fifth instruction.

[0156] In addition, the previous instruction identifier of the first requester is modified to the first instruction identifier, that is, the first instruction is taken as the previous instruction of the next received instruction, so that the instruction chain table establishment process is realized.

[0157] In some possible implementation manners, if the global group identifier of the first instruction is a new first global group identifier, it indicates that the first instruction is the first instruction of the new first instruction group, and the next instruction identifier in the instruction entry of the fifth instruction does not need to be updated, and only the previous instruction identifier of the first requester needs to be modified to the first instruction identifier of the first instruction, so that the instruction chain table is established when the new instruction of the first instruction group is received subsequently.

[0158] In this way, the instruction chain table of the requestor in the third mode can be established to determine the sequence of the instructions, so that the in-order return of the return data of different instructions in the same instruction group in the third mode is realized in subsequent processing, and the data return requirement of the third mode is met. The processing manner is realized by a small amount of storage space and an instruction identification allocation logic, and the complexity of processing is reduced.

[0159] In some possible implementation ways, the instruction selection table is arranged in the read control module, and an effective group mask is arranged for each instruction group in the instruction selection table, which is used to represent whether the return data of all instructions in the instruction group in the third mode is ready.

[0160] That is, for the third mode, an effective group mask is arranged for each instruction group in the instruction selection table, as shown in FIG. 6, G effective group masks are arranged, that is, the effective group mask has G bit positions, which correspond to G layer group entries in the group entry container respectively. The initial value of the effective group mask is invalid. Figure 5

[0161] In some possible implementation ways, after the read control module sets the data ready flag of the first instruction as valid, the read control module is further configured to:

[0162] decrease the value of the instruction number in the group entry corresponding to the global group identifier of the first instruction by 1;

[0163] when the value of the instruction number in the group entry corresponding to the global group identifier of the first instruction is 0, set the effective group mask corresponding to the global group identifier of the first instruction as valid;

[0164] in the case of returning the data of the requestor in the third mode this time, select a second instruction group from the instruction group with the valid effective group mask in the instruction selection table;

[0165] obtain the return data of the second instruction group from the storage module and send the return data to the requestor corresponding to the second instruction group.

[0166] For example, if the data ready flag of the first instruction is valid, it indicates that the return data of the first instruction is all ready; in the case of the first instruction being the instruction of the requestor in the third mode, the value of the instruction number in the group entry corresponding to the global group identifier of the first instruction can be decreased by 1.

[0167] In some possible implementation ways, when the value of the instruction number in the group entry corresponding to the global group identifier of the first instruction is 0, it indicates that the return data of all instructions in the first instruction group to which the first instruction belongs is all ready; in this case, the effective group mask corresponding to the global group identifier of the first instruction can be set as valid, indicating that the return data of this instruction group can be sent.​

[0168] Similarly, when returning data each time, if there is prepared data in multiple data return modes, that is, there is a valid mask in the multiple masks corresponding to the mode, the central controller 33 will first select the data return mode this time; if the requestor in the third mode returns data this time, the second instruction group is selected from the instruction selection table and the instruction group with the valid mask; if the instruction group with the valid mask is one, it is directly used as the second instruction group; if the instruction group with the valid mask is multiple, one can be randomly selected as the second instruction group, or it can be selected by other means.

[0169] In some possible implementations, the central controller 33 can request the storage module to return data of the sixth instruction corresponding to the head instruction identification of the second instruction group, and send the related information of the sixth instruction to the return path processor 34; the storage module sends the return data of all sub-requests of the sixth instruction to the return path processor 34 in response to the request of the central controller 33; the return path processor 34 places the return data in order on the interface signal, and sends the return data to the corresponding requestor through the selector 35.

[0170] In some possible implementations, after the return data of the sixth instruction is sent, the return data of the seventh instruction corresponding to the next instruction identification in the instruction entry of the sixth instruction is requested from the storage module according to the next instruction identification, and is sent to the corresponding requestor by the above-mentioned manner; and so on, until the return data of the instruction with the same instruction identification as itself, that is, the last instruction of the second instruction group, is sent, so as to realize the in-order return of the return data of all instructions in the second instruction group.

[0171] In some possible implementations, the entry valid information of the group entry of the second instruction group is set to be invalid, and the entry valid information of the instruction entry of all instructions of the second instruction group is set to be invalid, so as to realize the release of the group entry and the instruction entry; and the valid group mask corresponding to the group entry of the second instruction group is set to be invalid, so as to complete the whole-group data return process this time.

[0172] In this way, the valid group mask is set for each instruction group, and when the return data of all instructions in the instruction group in the third mode is all ready, the corresponding valid group mask is set to be valid, which can quickly identify whether the return data of all instructions in the instruction group in the third mode can be returned, so as to realize the in-order return of the return data of all instructions in the same instruction group in the third mode, without affecting the processing of other modes, and improve the flexibility of data return and the adaptability to various data return modes.

[0173] The above respectively illustrates the processing manner of the requestor under the first mode, the second mode and the third mode of the data return mode of the instruction.

[0174] And, the instruction selection table of the read control module is provided with multiple masks, including an effective entry mask provided for each layer of instruction entries, an effective requestor mask provided for each requestor, and an effective group mask provided for each instruction group; the effective entry mask is used to represent whether the instruction of the requestor in the first mode is ready, the effective requestor mask is used to represent whether the instruction with the longest latency in the requestor in the second mode is ready, and the effective group mask is used to represent whether the returned data of all instructions in the instruction group in the third mode is ready.

[0175] The first mode, the second mode, and the third mode are represented by the masks to represent whether the instruction or the instruction group of the to-be-returned data is ready.

[0176] Each time the data is returned, the central controller of the read control module needs to determine which instruction or instruction group of which requestor is returned this time. In this case, the read control module is further configured to:

[0177] In the effective entry mask, the effective requestor mask, and the effective group mask of the instruction selection table, at least two masks have a value of an effective mask, and the target mode of the returned data this time is selected from the first mode, the second mode, and the third mode.

[0178] According to the value of the mask corresponding to the target mode, the instruction or the instruction group of the returned data this time is selected.

[0179] For example, after the previous returned data is sent, the read control module needs to determine the instruction or instruction group of the current sending through the instruction selection table; in the effective entry mask, the effective requestor mask, and the effective group mask of the instruction selection table, if only one mask has a value of an effective mask, the data returned mode corresponding to this mask can be directly determined as the target mode

[0180] In some possible implementation manners, in the effective entry mask, the effective requestor mask, and the effective group mask of the instruction selection table, if at least two masks have a value of an effective mask, the target mode of the returned data this time can be selected from the first mode, the second mode, and the third mode, and the selection manner can be random selection or round-robin selection of different modes, which is not limited in the present disclosure.

[0181] In some possible implementation manners, after the target mode is determined, if the effective mask corresponding to the target mode is one, the instruction or instruction group of the returned data this time is directly selected; if the effective mask corresponding to the target mode is multiple, the instruction or instruction group of the returned data this time can be randomly selected or selected through other manners.

[0182] In this way, the data return mode can be selected first, and then the instruction or instruction group for returning data this time is determined, so that the reading control module can return data of the requesters of different data return modes in turn, and the data of the requester of a certain data return mode is avoided to be returned all the time, thereby improving the efficiency of instruction data return.

[0183] The following shows an example of establishing an instruction chain table in a reading control module provided by an embodiment of the present disclosure.

[0184] Suppose that there are two requesters in the processing system, namely, a requester A and a requester B; an arbiter of the reading control module arbitrates the requester A and the requester B, receives instructions of the requesters that obtain arbitration rights, and allocates a layer of instruction entries for each instruction, and the instruction of the third mode can also allocate a group entry, so as to obtain the following instruction sequence (instruction pattern):

[0185] Instruction 0: instruction_id (instruction identifier) = 0, requestor_id (requester identifier) = A, group_end (group end flag) = 1; ----> global_group_id (global group identifier) = 0;

[0186] Instruction 1: instruction_id = 1, requestor_id = B, group_end = 0; ---->global_group_id = 1;

[0187] Instruction 2: instruction_id = 2, requestor_id = B, group_end = 1; ---->global_group_id = 1;

[0188] Instruction 3: instruction_id = 3, requestor_id = A, group_end = 0; ---->global_group_id = 2;

[0189] Instruction 4: instruction_id = 4, requestor_id = B, group_end = 1; ---->global_group_id = 3;

[0190] Instruction 5: instruction_id = 5, requestor_id = A, group_end = 0; ---->global_group_id = 2;

[0191] Instruction 6: instruction id = 6, requestor id = B, group end = 1; ----> global group id = 4;

[0192] Instruction 7: instruction id = 7, requestor id = A, group end = 1; ----> global group id = 2.

[0193] In the example, if the data return modes of the requestor A and the requestor B are both configured as the first mode, the next instruction id of the instruction in each layer of the instruction entry in the instruction entry container is equal to the instruction id of the instruction.

[0194] Figure 6 And Figure 5 A schematic diagram of the instruction chain table in the read control module provided by the embodiment of the present disclosure.

[0195] In the example, if the data return modes of the requestor A and the requestor B are both configured as the second mode, the instruction chain table established by the next instruction id (next instruction id) of the instruction in each layer of the instruction entry in the instruction entry container is as shown in Figure 6 It can be seen that the instruction chain table of the requestor A and the instruction chain table of the requestor B are obtained respectively.

[0196] In the example, in the instruction chain table of the requestor A, when the instruction 0 is received, the initial value of the next instruction id of the instruction 0 is the instruction id of the instruction 0, and the global previous instruction id (not shown) is a null value or an invalid value, which needs to be updated to instruction id = 0; when the instruction 3 of the requestor A is received, the instruction 0 is found according to the current previous instruction id (instruction id = 0), the next instruction id of the instruction 0 is modified to instruction id = 3, and the previous instruction id is updated to instruction id = 3; and the like, the instruction chain table of instruction 0--instruction 3--instruction 5--instruction 7 is obtained.

[0197] In the example, the establishment process of the instruction chain table of the requestor B is similar, and the instruction chain table of instruction 1--instruction 2--instruction 4--instruction 6 is obtained.

[0198] In the example, if the data return modes of the requester A and the requester B are both configured as the third mode, a global group identifier is assigned to each instruction group in the group entry of the group entry container according to whether the sub-end flag group_end is valid, and the global group identifier of the instruction is also recorded in the instruction entry. Instructions with the same global group identifier can establish an instruction chain table through the next instruction identifier (next_instruction_id) of the instruction, as shown in Figure 7 It can be seen that the instruction chain tables of instruction group 0 (global_group_id = 0) to instruction group 4 (global_group_id = 4) are obtained respectively.

[0199] In the example, for instruction group 0, only instruction 0 is present, and the next instruction identifier of instruction 0 is the instruction identifier of itself; for instruction group 1, when instruction 1 of instruction group 1 is received, the initial value of the next instruction identifier of instruction 1 is the instruction identifier of itself, and the global previous instruction identifier (not shown) is a null value or an invalid value, which needs to be updated to instruction_id = 1; when instruction 2 of instruction group 1 is received, instruction 1 is found according to the current previous instruction identifier (instruction_id = 1), the next instruction identifier of instruction 1 is modified to instruction_id = 2, and the previous instruction identifier is updated to instruction_id = 2, so that the instruction chain table of instruction 1--instruction 2 is obtained.

[0200] In the example, the instruction chain table of instruction group 2 can also be obtained in the same way: instruction 3--instruction 5--instruction 7; the instruction chain table of instruction group 3: instruction 4; and the instruction chain table of instruction group 4: instruction 6.

[0201] Through the above processing mode, the instruction chain table of the requester for the second mode and the instruction chain table of the instruction group for the third mode can be established respectively, so as to determine the order of the instructions, thereby realizing the in-order return of the return data of different instructions in the second mode and the in-order return of the return data of different instructions in the same instruction group in the third mode in subsequent processing, and meeting the data return requirements of the second mode and the third mode. The processing mode is realized by a small amount of storage space in cooperation with the instruction identifier allocation logic, which reduces the complexity of processing.

[0202] The data processing apparatus according to the embodiment of the present disclosure is provided with a read control module between the requesters and the storage module, the read control module can obtain the related information of the data read instruction sent by the requesters, obtain the return data of the instruction from the storage module according to the data return mode of the requester corresponding to the instruction and send the return data to the corresponding first requester, so that the same set of hardware logic supports the arbitrary configuration of the data return mode of all the requesters in the front end, and the flexibility and adaptability of the system are improved; meanwhile, the complexity of chip design can be reduced, and the chip area can be saved.

[0203] It can be understood that the configuration steps of each of the above-mentioned embodiments of the apparatus of the present disclosure can be combined with each other to form a combined embodiment without deviating from the principle logic. Due to the limited length, the present disclosure will not be described again. Those skilled in the art can understand that the specific execution order of each configuration step in the above-mentioned apparatus should be determined according to its function and possible internal logic.

[0204] According to the embodiment of the present disclosure, a data processing method is also provided, which is applied to a read control module of a data processing apparatus, the data processing apparatus further comprises a plurality of requesters, the read control module is connected to the plurality of requesters and a storage module respectively,

[0205] The requesters are configured to send data read instructions to the read control module, the data read instructions belong to an instruction group of a target task, the data read instructions comprise a plurality of sub-requests, and the data return mode of the return data of the data read instruction by each requester is the same or different;

[0206] The method comprises: arbitrating the plurality of requesters, receiving a first instruction of a first requester which obtains arbitration right among the plurality of requesters; allocating a layer of instruction entries for the first instruction in an instruction entry container of the read control module, and storing instruction basic information of the first instruction in the instruction entry, the instruction entry container comprises a plurality of layers of instruction entries, each layer of instruction entries has an instruction identifier, and the instruction basic information comprises a requester identifier, a group identifier and a data ready flag; sending the first instruction to the storage module; setting the data ready flag of the first instruction as valid according to data ready information of the first instruction sent by the storage module; and obtaining return data of the first instruction from the storage module according to the data return mode of the first requester and sending the return data to the first requester.

[0207] In addition, the present disclosure also provides electronic devices and computer readable storage media, which can be used to implement the apparatus and method provided by the present disclosure. The corresponding technical solutions and descriptions can be referred to the corresponding description in the apparatus part, and will not be described again.

[0208] Figure 7A block diagram of an electronic device according to an embodiment of the present disclosure is provided.

[0209] With reference to ​ According to an embodiment of the present disclosure, an electronic device is provided, and the electronic device includes at least one processor 501, at least one memory 502, and one or more I / O interfaces 503 connected between the processor 501 and the memory 502, wherein the memory 502 stores one or more computer programs executable by the at least one processor 501, and the one or more computer programs are executed by the at least one processor 501 to enable the at least one processor 501 to perform the data processing method described above.

[0210] According to an embodiment of the present disclosure, a computer readable storage medium is provided, and the computer readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the data processing method described above. The computer readable storage medium can be a volatile or non-volatile computer readable storage medium.

[0211] According to an embodiment of the present disclosure, a computer program product is provided, and the computer program product includes computer readable code or a non-volatile computer readable storage medium carrying computer readable code, and when the computer readable code is run in a processor of an electronic device, the processor in the electronic device performs the data processing method described above.

[0212] Those skilled in the art can understand that all or some of the steps in the method disclosed above, the functions of the modules / units in the system and the device can be implemented as software, firmware, hardware and their appropriate combinations. In the hardware implementation, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component can have multiple functions, or one function or step can be performed by several physical components in cooperation. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor or a microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software can be distributed on a computer readable storage medium, which can include computer storage media (or non-transitory media) and communication media (or transitory media).

[0213] As those skilled in the art will appreciate, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable program instructions, data structures, program modules or other data. Computer storage media include, but are not limited to, random access memory (RAM), read only memory (ROM), erasable programmable read only memory (EPROM), electrically erasable programmable read only memory (EEPROM), static random access memory (SRAM), flash memory or other memory technology, portable compact disc read only memory (CD-ROM), digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Further, as those skilled in the art will appreciate, communication media typically embodies computer readable program instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media. The term "modulated data signal" means a signal that has one or more of its characteristics changed or set in a manner so as to encode information in the signal. By way of example, and not limitation, communication media includes wired media such as a wired network or direct-wired connection, and wireless media such as wireless networks, cellular telephone networks, code division multiple access (CDMA) networks, and other terrestrial and satellite radio frequency communication networks. Thus the computer readable program instructions and / or other program modules can be embodied in a computer readable storage medium, which can be any device or article that is enab!ed to store and / or carry computer readable program instructions and / or data structures. The computer readable storage medium can also be distributed over networked computer systems so that the computer readable program instructions and / or other program modules are stored and executed in a distributed fashion.

[0214] Computer readable program instructions described herein can be downloaded to respective computing / processing devices from a computer readable storage medium or to an external computer or external storage device via a network, for example, the Internet, a local area network, a wide area network and / or a wireless network. The network can comprise copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers and / or edge servers. A network adapter card or network interface in each computing / processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium within the respective computing / processing device.

[0215] Computer readable program instructions for carrying out operations of the present disclosure can be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state setting data, or any combination of one or more of the above in any combination, written in any combination of one or more programming languages, including object oriented programming languages such as Smalltalk, C++ or the like, and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer readable program instructions can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate array (FPGA), or programmable logic array (PLA) can execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present disclosure.

[0216] The computer program product described herein can be embodied in a specific manner by hardware, software, or a combination thereof. In an optional embodiment, the computer program product is embodied as a computer storage medium. In another optional embodiment, the computer program product is embodied as a software product, such as a software development kit (SDK), and the like.

[0217] The various aspects of the present disclosure are described herein with reference to flow diagrams and / or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the present disclosure. It will be understood that each block of the flow diagrams and / or block diagrams, and combinations of blocks in the flow diagrams and / or block diagrams, can be implemented by computer readable program instructions.

[0218] These computer readable program instructions can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks. These computer readable program instructions can also be stored in a computer readable storage medium that can include a non-transitory computer readable storage medium that can be a computer- readable storage medium having no data storage cycles that change state. The instructions can be executed by one or more processors of a computer, other programmable data processing apparatus, or other devices to produce a computer-implemented process such that the instructions which execute via the one or more processors of the computer or other programmable data processing devices create means for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks. The computer program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0219] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0220] The flow and block diagrams in the drawings show architectural, functional, and operational representations of possible implementations of systems, methods, and computer program products according to the present disclosure. In this regard, each block in the flow and block diagrams can represent a module, a segment, or a portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may

[0221] Example embodiments have been disclosed and, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described with respect to a particular embodiment can be used, combined, and / or modified in alternative embodiments. Thus, it will be understood by those skilled in the art that various changes can be made and equivalents can be substituted for elements without departing from the scope of the present disclosure as set forth in the appended claims.

Claims

1. A data processing device, characterized in that: It includes multiple requesters and a read control module, wherein the read control module is connected to the multiple requesters and the storage module respectively. The requester is configured to: send a data read instruction to the read control module, and each requester has the same or different data return modes for the return data of the data read instruction; the data return mode includes any one of a first mode, a second mode, and a third mode, the first mode is used to represent that the return data of different instructions are returned out of order, the second mode is used to represent that the return data of different instructions are returned in order, and the third mode is used to represent that the return data of different instruction groups are returned out of order, and the return data of different instructions in the same instruction group are returned in order; The read control module is configured to: arbitrating the plurality of requesters, and receiving a first instruction from a first requester among the plurality of requesters that obtains arbitration rights; Allocating a layer of instruction entries for the first instruction in an instruction entry container of the read control module, and storing basic instruction information of the first instruction in the instruction entry, wherein the instruction entry container includes multiple layers of instruction entries, each layer of the instruction entry has an instruction identifier, and the basic instruction information includes a requester identifier and a data ready flag; sending the first instruction to the storage module; Setting a data ready flag of the first instruction to be valid according to the data ready information of the first instruction sent by the storage module; According to the data return mode of the first requester, the return data of the first instruction is obtained from the storage module and sent to the first requester.

2. The device according to claim 1, characterized in that The data return mode includes a first mode, wherein the first mode is used to represent that return data of different instructions are returned out of order; The read control module is provided with an instruction selection table, wherein a valid entry mask is set for each layer of instruction entry in the instruction selection table, which is used to indicate whether the return data of the instruction of the requester of the first mode is ready; Wherein, the reading control module is further configured to: When the data ready flag of the instruction of the requester of the first mode is valid, setting the valid entry mask corresponding to the instruction to be valid; In the case that the requester of the first mode is selected this time and returns data, a second instruction is selected from the instructions whose valid entry mask is valid in the instruction selection table; The return data of the second instruction is obtained from the storage module, and sent to a requester corresponding to the second instruction.

3. The device according to claim 1, characterized in that The data return mode includes a second mode, wherein the second mode is used to represent the return of return data of different instructions in an order-preserving manner. The instruction entry container is provided with a global previous instruction identifier for each requester, and the initial value of the previous instruction identifier is a null value or an invalid value. Each layer of instruction entry is also provided with a subsequent instruction identifier of the instruction, and the initial value of the subsequent instruction identifier is the instruction identifier of the instruction at this layer; After allocating a layer of instruction entries for the first instruction in the instruction entry container, the read control module is further configured to: When the data return mode of the first requester corresponding to the first instruction is the second mode, determining a previous instruction identifier of the first requester; In a case where the previous instruction identifier is a null value or an invalid value, modifying the previous instruction identifier to the first instruction identifier of the first instruction; In a case where the previous instruction identifier is a valid value, the next instruction identifier in the instruction entry of the third instruction corresponding to the previous instruction identifier is set to the first instruction identifier; and the previous instruction identifier is modified to the first instruction identifier.

4. The device according to claim 3, characterized in that The instruction entry container is also provided with a global header instruction identifier for each requester, which is used to identify the instruction with the longest waiting time in each requester; The read control module is provided with an instruction selection table, wherein a valid requester mask is set for each requester in the instruction selection table, which is used to indicate whether the instruction with the longest waiting time among the requesters in the second mode is ready; Wherein, the reading control module is further configured to: When the data ready flag of the instruction corresponding to the header instruction identifier of any requester in the second mode is valid, the valid requester mask corresponding to the requester is set to valid; In the case that the requester of the second mode selected this time returns data, a second requester is selected from the requesters whose valid requester masks are valid in the instruction selection table; Acquire, from the storage module, return data of a fourth instruction corresponding to the header instruction identifier of the second requester, and send the return data to the second requester; The header instruction identifier of the second requester is modified to the instruction identifier following the fourth instruction.

5. The device according to claim 1, characterized in that The data return mode includes a third mode, wherein the third mode is used to indicate that return data of different instruction groups are returned out of order, and return data of different instructions in the same instruction group are returned in order; The read control module further includes a group entry container including multiple layers of group entries, each layer of group entries is used to store basic group information, the basic group information including a header instruction identifier and the number of instructions, and each layer of group entries has a global group identifier; Each layer of instruction entry also has a global group identifier for the instruction; The group entry container is further provided with a global previous group end bit and a previous global group identifier for each requester. The previous group end bit is used to indicate whether the group end flag of the previous instruction of the requester is valid, and the initial value is valid; the previous global group identifier is used to indicate the global group identifier corresponding to the previous instruction of the requester; After allocating a layer of instruction entries for the first instruction in the instruction entry container, the read control module is further configured to: When the data return mode of the first requester corresponding to the first instruction is the third mode, determining a previous group of end bits of the first requester; If the previous group end bit of the first requester is valid, allocating a layer of group entry for the first instruction group corresponding to the first instruction in the group entry container, storing basic group information of the first instruction group in the group entry, and setting the global group identifier of the first instruction in the instruction entry to the first global group identifier of the group entry; wherein the header instruction identifier of the group basic information is the instruction identifier of the first instruction, and the value of the instruction quantity is set to 1; The previous group end bits of the first requester in the group entry container are modified to be invalid, and the previous global group identifier is modified to be the first global group identifier.

6. The device according to claim 5, characterized in that The read control module is further configured to: In a case where a previous set of end bits of the first requester is invalid, setting the global group identifier of the first instruction to a second global group identifier corresponding to the previous global group identifier in the group entry container; Increasing the value of the number of instructions in the group entry corresponding to the second global group identifier by 1; When the group end flag of the first instruction is valid, the previous group end bit of the first requester is modified to be valid.

7. The device according to claim 6, characterized in that The instruction entry container is provided with a global previous instruction identifier for each requester, and the initial value of the previous instruction identifier is a null value or an invalid value. Each layer of instruction entry is also provided with a subsequent instruction identifier of the instruction, and the initial value of the subsequent instruction identifier is the instruction identifier of the instruction at this layer; Wherein, the reading control module is further configured to: When the global group identifier of the first instruction is the existing second global group identifier, setting the next instruction identifier in the instruction entry of the fifth instruction corresponding to the previous instruction identifier of the first requester as the first instruction identifier of the first instruction; The previous instruction identifier is modified to the first instruction identifier.

8. The device according to claim 5, characterized in that The read control module is provided with an instruction selection table, wherein a valid group mask is provided for each instruction group in the instruction selection table, for indicating whether the return data of all instructions in the instruction group of the third mode are ready; After the read control module sets the data ready flag of the first instruction to be valid, the module is further configured to: Subtract 1 from the value of the number of instructions in the group entry corresponding to the global group identifier of the first instruction; In the group entry corresponding to the global group identifier of the first instruction, if the value of the instruction quantity is 0, setting the valid group mask corresponding to the global group identifier of the first instruction to valid; In the case that the requester of the third mode is selected this time to return data, a second instruction group is selected from the instruction groups whose valid group mask is valid in the instruction selection table; The return data of the second instruction group is obtained from the storage module, and sent to a requester corresponding to the second instruction group.

9. The device according to claim 2, 4 or 8, characterized in that The read control module is provided with an instruction selection table, wherein the instruction selection table is provided with a plurality of masks, including a valid entry mask set for each layer of instruction entry, a valid requester mask set for each requester, and a valid group mask set for each instruction group; The valid entry mask is used to indicate whether the instruction of the requester of the first mode is ready, the valid requester mask is used to indicate whether the instruction with the longest waiting time in the requester of the second mode is ready, and the valid group mask is used to indicate whether the return data of all instructions in the instruction group of the third mode is ready; Wherein, the reading control module is further configured to: If at least two of the valid entry masks, valid requester masks, and valid group masks in the instruction selection table have valid values, select a target mode for the currently returned data from the first mode, the second mode, and the third mode; According to the value of the mask corresponding to the target mode, the instruction or instruction group for returning data this time is selected.

10. The device according to claim 1, characterized in that The read control module includes an arbitrator, a request path processor, a central controller, a return path processor and a selector. The arbitrator is connected to the plurality of requesters, and is used to arbitrate the plurality of requesters, and receive a first instruction from a first requester that obtains arbitration rights among the plurality of requesters; The arbitrator switches arbitration rights at a granularity of one instruction; The request path processor is connected to the central controller and the storage module, and is configured to send the received first instruction to the central controller and the storage module respectively; The central controller is connected to the storage module and the return path processor, and is configured to allocate an instruction entry for the first instruction and store basic instruction information of the first instruction according to a data return mode of the first requester corresponding to the received first instruction; updating a data ready flag of an instruction according to the data ready information of the storage module; determining an instruction or instruction group of the returned data according to a data return mode of the requester, and controlling the storage module and the return path processor to return the return data of the instruction or instruction group; The return path processor is connected to the storage module and the selector, and is used to obtain information about the instruction or instruction group of the current return data sent by the central controller and receive return data of the instruction or instruction group sent by the storage module; and send the return data to the selector; The selector is connected to the plurality of requesters and is configured to send return data to corresponding requesters.

11. A data processing method, characterized in that: A read control module applied to a data processing device, wherein the data processing device further comprises a plurality of requesters, wherein the read control module is connected to the plurality of requesters and the storage module respectively. The requester is used to send a data read instruction to the read control module, and each requester has the same or different data return modes for the return data of the data read instruction; the data return mode includes any one of a first mode, a second mode and a third mode, the first mode is used to represent that the return data of different instructions are returned out of order, the second mode is used to represent that the return data of different instructions are returned in order, and the third mode is used to represent that the return data of different instruction groups are returned out of order, and the return data of different instructions in the same instruction group are returned in order; The method comprises: arbitrating the plurality of requesters, and receiving a first instruction from a first requester among the plurality of requesters that obtains arbitration rights; Allocating a layer of instruction entries for the first instruction in an instruction entry container of the read control module, and storing basic instruction information of the first instruction in the instruction entry, wherein the instruction entry container includes multiple layers of instruction entries, each layer of the instruction entry has an instruction identifier, and the basic instruction information includes a requester identifier and a data ready flag; sending the first instruction to the storage module; Setting a data ready flag of the first instruction to be valid according to the data ready information of the first instruction sent by the storage module; According to the data return mode of the first requester, the return data of the first instruction is obtained from the storage module and sent to the first requester.

12. An electronic device, characterized in that: include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores one or more computer programs executable by the at least one processor, and the one or more computer programs are executed by the at least one processor to enable the at least one processor to perform the data processing method according to claim 11.

13. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the computer program implements the data processing method according to claim 11.

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