Semiconductor module

By using a conductor pattern on the insulating substrate to contact the external terminal connection under compression force, the bonding wire is reduced, and the miniaturization of the semiconductor module and the increase of the rated current is achieved, which solves the problem of difficulty in miniaturization and large current in the prior art.

CN120388968APending Publication Date: 2025-07-29FUJI ELECTRIC CO LTD
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Patent Information

Application Number
CN202411700928.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-01-29
Filing Date
2024-11-26
Publication Date
2025-07-29

AI Technical Summary

Technical Problem

In the prior art, it is difficult to achieve miniaturization of semiconductor modules and difficult to carry large-size semiconductor chips with large rated currents, mainly because there are a large number of bonding lines connecting the main terminal and the insulating substrate.

Method used

The design of the conductor pattern on the insulating substrate contacting the external terminal connection under compression force is adopted to reduce the number of bonding lines, and extend it directly below the connection portion of the external terminal through the insulating substrate to achieve stable contact of the conductor pattern.

Benefits of technology

The miniaturization of semiconductor modules and the increase of rated current are achieved, the use of bonding wires is reduced, the heat dissipation efficiency of heat is improved, and the current flow capacity is enhanced.

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Abstract

The invention relates to a semiconductor module. The semiconductor module includes: a base plate; an insulating substrate disposed on one surface of the base plate; a frame-shaped case that surrounds the insulating substrate; and a plurality of external terminals disposed across the inside and outside of the housing, the insulating substrate having: an insulating plate; and a conductor pattern disposed on one surface of the insulating plate, the at least one external terminal having: a pin portion extending toward the outside of the housing along the thickness direction of the insulating substrate; a leg portion extending toward the inside of the housing in a direction intersecting a direction in which the pin portion extends; and a connecting portion extending from the pin portion toward the insulating substrate in a thickness direction of the insulating substrate, the connecting portion being in contact with the conductor pattern in a state of receiving a compressive force between the insulating substrate and the housing.
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Description

Technical Field

[0001] The present disclosure relates to a semiconductor module. Background Art

[0002] For example, as disclosed in Patent Documents 1 to 4, a semiconductor module typified by a power semiconductor module includes an insulating substrate provided with semiconductor chips, a housing that houses the insulating substrate, and a plurality of external terminals electrically connected to the semiconductor chips.

[0003] In Patent Document 1, a main terminal (external terminal) fixed to the outer shell (housing) is electrically connected to a semiconductor chip or an insulating substrate in the outer shell by a bonding wire. Further, in Patent Document 1, in addition to disposing an insulating substrate on a bottom plate having excellent thermal conductivity such as copper or aluminum, a highly heat-dissipating insulator for reducing the thermal resistance of the region between the bottom plate (bottom flat plate) and the main terminal is also disposed therebetween. The highly heat-dissipating insulator is fixed to the outer shell together with the main terminal by insert molding.

[0004] Prior Art Documents

[0005] Patent Documents

[0006] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2017-005129

[0007] Patent Document 2: Japanese Unexamined Patent Application Publication No. 2017-92388

[0008] Patent Document 3: Japanese Unexamined Patent Application Publication No. 2000-208686

[0009] Patent Document 4: International Publication No. 2021 / 085216 Summary of the Invention

[0010] Problems to be Solved by the Invention

[0011] However, in the module described in Patent Document 1, the number of bonding wires connecting the main terminal and the insulating substrate is large. Therefore, it is difficult to miniaturize the housing and it is difficult to mount a large-sized semiconductor chip having a large rated current on the insulating substrate.

[0012] In view of the above circumstances, an object of one aspect of the present disclosure is to achieve miniaturization and increase the rated current of the semiconductor module.

[0013] Solutions to the Problems

[0014] In order to solve the above problems, the semiconductor module of the preferred technical solution of the present invention comprises: a base plate; an insulating substrate, which is arranged on one surface of the base plate, and the insulating substrate is provided with a semiconductor chip; a frame-shaped shell, which surrounds the insulating substrate; and a plurality of external terminals, which are arranged across the inside and outside of the shell and are electrically connected to the semiconductor chip, the insulating substrate having: an insulating plate; and a conductor pattern, which is arranged on one surface of the insulating plate, the conductor pattern including a conductor connected to the semiconductor chip, at least one of the plurality of external terminals having: a pin portion, which extends toward the outside of the shell along the thickness direction of the insulating substrate; a leg portion, which extends toward the inside of the shell along a direction intersecting with the direction in which the pin portion extends; and a connecting portion, which extends from the pin portion toward the insulating substrate along the thickness direction of the insulating substrate, the connecting portion being in contact with the conductor pattern while bearing the compressive force between the insulating substrate and the shell. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is an exploded perspective view of a semiconductor module according to an embodiment.

[0016] Figure 2 It is a cross-sectional view of a semiconductor module according to an embodiment.

[0017] Figure 3 It is a cross-sectional view of a semiconductor module according to an embodiment.

[0018] Figure 4 It is a cross-sectional view of a semiconductor module according to an embodiment.

[0019] Figure 5 It is a perspective view of an external terminal in the embodiment.

[0020] Figure 6 It is a diagram for explaining an example of manufacturing an external terminal.

[0021] Figure 7 This is a cross-sectional view of a semiconductor module according to Modification 1.

[0022] Description of Reference Numerals

[0023] 10. Semiconductor module; 20. Insulating substrate; 21. Insulating plate; 22. Conductor plate; 23. Conductor pattern; 23a. Conductor; 23b. Conductor; 23c. Conductor; 23d. Conductor; 30. Semiconductor chip; 40. Bottom plate; 41. Mounting hole; 50. Housing; 51. Terminal hole; 52. Hole; 53. Hole; 60. External terminal; 60-C. External terminal; 60-M. External terminal; 60-M1. External terminal; 60-M2. External terminal; 61. Pin portion; 61a. First part; 61b. Second part; 62. Leg; 63. Connecting portion; 70. Spacer; 80. Cover; 561. Pin portion; B0. Bonding material; B1. Adhesive; B2. Adhesive; BW1. Bonding wire; BW2. Bonding wire; BW3. Bonding wire; LN. Bend line; SH. Shoulder; SL. Slit. Detailed implementation manners

[0024] Hereinafter, preferred implementation manners of the present disclosure will be described with reference to the drawings. In addition, the dimensions and scales of each part in the drawings are appropriately different from the actual situation, and there are also parts schematically shown for easy understanding. In addition, as long as there is no special description of the meaning of the present disclosure in the following description, the scope of the present disclosure is not limited to these manners.

[0025] 1. Implementation manners

[0026] 1-1. Overall structure of the semiconductor module

[0027] Figure 1 is an exploded perspective view of the semiconductor module 10 of the implementation manner. The semiconductor module 10 is a power module such as an IGBT (Insulated Gate Bipolar Transistor) module. The semiconductor module 10 is used, for example, for power control in devices such as inverters or rectifiers mounted on equipment such as railway vehicles, automobiles, or household electrical appliances.

[0028] As Figure 1 shown, the semiconductor module 10 includes a plurality of insulating substrates 20, a plurality of semiconductor chips 30, a bottom plate 40, a housing 50, a plurality of external terminals 60, a spacer 70, and a cover 80. In addition, in Figure 1 it, the insulating substrate 20 and the semiconductor chip 30 are schematically shown.

[0029] Hereinafter, first, based on Figure 1, the parts of the semiconductor module 10 will be described in sequence. In addition, for convenience, the following description is appropriately made using the mutually orthogonal X-axis, Y-axis, and Z-axis. The Z-axis is an axis parallel to the thickness direction of the semiconductor module 10. Hereinafter, one direction along the X-axis is the X1 direction, and the direction opposite to the X1 direction is the X2 direction. One direction along the Y-axis is the Y1 direction, and the direction opposite to the Y1 direction is the Y2 direction. One direction along the Z-axis is the Z1 direction, and the direction opposite to the Z1 direction is the Z2 direction. The relationship between these directions and the vertical direction is not particularly limited and is arbitrary. In addition, hereinafter, the case of observing in the direction along the Z-axis is sometimes referred to as "top view".

[0030] The plurality of insulating substrates 20 are each a substrate such as a DCB (Direct Copper Bonding) substrate or a DBA (Direct Bonded Aluminum) substrate. A plurality of semiconductor chips 30 are mounted on one of the two surfaces of each insulating substrate 20, and a base plate 40 is bonded to the other surface. In Figure 1 the example shown, the thickness direction of each insulating substrate 20 is the direction along the Z-axis. A plurality of semiconductor chips 30 are mounted on the surface of each insulating substrate 20 facing the Z1 direction. On the other hand, the base plate 40 is bonded to the surface of each insulating substrate 20 facing the Z2 direction. Thus, the insulating substrate 20 is disposed on one surface of the base plate 40, and the semiconductor chip 30 is provided on the insulating substrate 20. In addition, the number of semiconductor chips 30 mounted on each insulating substrate 20 is arbitrary. In addition, the number of insulating substrates 20 included in the semiconductor module 10 is not limited to Figure 1 the example shown, and may also be two or less or four or more.

[0031] At least one of the plurality of semiconductor chips 30 mounted on the insulating substrate 20 is a power semiconductor chip such as an IGBT. In the present embodiment, on the insulating substrate 20, in addition to mounting switching elements such as IGBTs as the semiconductor chips 30, control chips for controlling the operation of the power semiconductor chips are also mounted. An input electrode serving as a drain electrode or a collector is provided on the back surface of the switching element. In addition, an output electrode serving as a source electrode or an emitter electrode and a control electrode serving as a gate electrode are provided on the front surface of the switching element. In addition, on the insulating substrate 20, elements such as an FWD (Free Wheeling Diode) for commuting the load current may also be mounted. In addition, the semiconductor chip 30 serving as the control chip is provided as needed and may be omitted. In addition, in Figure 1 , each semiconductor chip 30 is shown by a double-dot chain line, but the arrangement of the semiconductor chips 30 on the insulating substrate 20 is not limited to Figure 1 the example shown and is arbitrary.

[0032] The bottom plate 40 is a plate-like member for heat dissipation, and is made of, for example, copper, a copper alloy, aluminum, or an aluminum alloy. The bottom plate 40 has high thermal conductivity and dissipates heat from the semiconductor chip 30. In addition, the bottom plate 40 also has high electrical conductivity and is electrically connected to a reference potential such as a ground potential, for example. In addition, as long as the bottom plate 40 has high thermal conductivity, it is not limited to a metal plate and may be an insulator such as ceramics.

[0033] In Figure 1 In the example shown, the thickness direction of the bottom plate 40 is the direction along the Z axis. A plurality of insulating substrates 20 are joined to the surface of the bottom plate 40 facing the Z1 direction. On the other hand, a heat dissipation member such as a heat sink (not shown) is joined to the surface of the bottom plate 40 facing the Z2 direction. In addition, when viewed in the direction along the Z axis, the bottom plate 40 has a shape having a pair of long sides extending in the X-axis direction and a pair of short sides extending in the Y-axis direction. In the bottom plate 40, mounting holes 41 are provided near each short side. The mounting holes 41 are, for example, through holes for screw-fixing a heat dissipation member such as a heat sink (not shown) to the bottom plate 40. In addition, the top view shape and the number of the bottom plates 40 are not limited to Figure 1 the example shown, but are arbitrary. In addition, the mounting holes 41 are provided as needed and may be omitted. In addition, a heat dissipation member such as a heat sink may be provided integrally with the bottom plate 40.

[0034] The housing 50 is a frame-like member for housing a plurality of insulating substrates 20 and a plurality of semiconductor chips 30. Here, the housing 50 is in a frame shape surrounding the plurality of insulating substrates 20 and the plurality of semiconductor chips 30. The housing 50 is a substantially insulator and is made of a resin material such as PPS (Polyphenylene Sulfide) or PBT (Polybutylene terephthalate), for example. In addition, from the viewpoints of improving the mechanical strength of the housing 50 or reducing the linear expansion coefficient of the housing 50, etc., the resin material may contain an inorganic filler such as alumina or silica.

[0035] A plurality of terminal holes 51 arranged along the circumferential direction of the housing 50 are provided in the housing 50. Each of the plurality of terminal holes 51 is a hole for inserting an external terminal 60, and the plurality of terminal holes 51 penetrate the housing 50.

[0036] In Figure 1In the example shown, the thickness direction of the housing 50 is the direction along the Z-axis, and each terminal hole 51 extends in the direction along the Z-axis. Further, when viewed in the direction along the Z-axis, the housing 50 has an outer shape with a pair of long sides extending in the direction along the X-axis and a pair of short sides extending in the direction along the Y-axis. Moreover, a plurality of holes 52 and a plurality of holes 53 are provided in the housing 50. The plurality of holes 52 are holes for screwing and fixing a substrate (not shown) on which the semiconductor module 10 is mounted to the housing 50. The plurality of holes 53 are through holes for screwing and fixing a heat dissipation member such as a heat sink (not shown) to the bottom plate 40 together with the above-described mounting holes 41. In addition, the shape of the housing 50 is not limited to Figure 1 the example shown, but is arbitrary. Further, the holes 52 and 53 are provided as needed and may be omitted.

[0037] In the present embodiment, the number of the plurality of terminal holes 51 provided in the housing 50 is larger than the number of the external terminals 60. The external terminals 60 are respectively inserted into a number of the plurality of terminal holes 51 corresponding to the number of the external terminals 60, but the external terminals 60 are not inserted into the remaining terminal holes 51. Thus, the number of the terminal holes 51 in the housing 50 is set to be larger than the number of the external terminals 60 in order to apply the housing 50 to semiconductor modules with different terminal positions. In addition, the arrangement and the number of the plurality of terminal holes 51 are not limited to Figure 1 the example shown, but are arbitrary. Further, the number of the terminal holes 51 may be equal to the number of the external terminals 60.

[0038] Each of the plurality of external terminals 60 is a terminal for electrically connecting a substrate (not shown) on which the semiconductor module 10 is mounted and the semiconductor chip 30 to each other. Here, each external terminal 60 is disposed across the inside and outside of the housing 50 through the terminal hole 51 and is electrically connected to the semiconductor chip 30. The plurality of external terminals 60 are made of a metal such as copper, a copper alloy, aluminum, an aluminum alloy, or an iron alloy, for example. Further, plating such as Sn plating or Sn-Cu plating may be applied to the surface of the external terminal 60, for example.

[0039] Two or more of the plurality of external terminals 60 included in the semiconductor module 10 are main terminals through which a main current flows, and the other two or more external terminals 60 are control terminals for controlling the operation of the semiconductor chip 30. The main terminal is the external terminal 60-M shown in Figure 2 or Figure 3 shown later, and the control terminal is the external terminal 60-C shown in Figure 4 shown later. In addition, for details of the external terminals 60, description will be made later based on Figures 2 to 6 this.

[0040] The spacer 70 is an insulating frame-shaped member interposed between the insulating substrate 20 and the housing 50. The spacer 70 has the function of pressing the plurality of external terminals 60 toward the housing 50 and the function of ensuring electrical insulation between each of the plurality of external terminals 60 and the insulating substrate 20. The spacer 70 is a substantial insulator and is made of a resin material such as PPS (Polyphenylene Sulfide) or PBT (Polybutylene terephthalate), similar to the housing 50. In addition, from the viewpoint of improving the mechanical strength of the spacer 70, etc., the resin material may contain inorganic fillers such as alumina or silica. Further, the material constituting the spacer 70 is not limited to the resin material and may be a ceramic material, for example.

[0041] In Figure 1 the example shown, the thickness direction of the spacer 70 is the direction along the Z-axis. The surface of the spacer 70 facing the Z1 direction is joined to the housing 50 using an adhesive. On the other hand, the surface of the spacer 70 facing the Z2 direction is joined to the insulating substrate 20 using an adhesive. In addition, the shape of the spacer 70 is not limited to Figure 1 the example shown, but is arbitrary.

[0042] The cover 80 is a plate-shaped member joined to the surface of the housing 50 facing the Z1 direction. The cover 80 is made of a resin material such as PPS (Polyphenylene Sulfide) or PBT (Polybutylene terephthalate), similar to the housing 50, for example. The cover 80 is joined to the housing 50 using an adhesive or the like so as to seal the gap between the cover 80 and the housing 50. In addition, the cover 80 is provided as needed and may be omitted.

[0043] Here, although not shown, the space surrounded by the bottom plate 40, the housing 50, and the cover 80 is filled with a potting material that covers the semiconductor chip 30. The potting material is made of an organosilicon resin such as silicone gel or an epoxy resin, for example.

[0044] 1-2. External Terminals and Insulating Substrate

[0045] Figures 2 to 4 are cross-sectional views of the semiconductor module 10 of the embodiment, respectively. In Figure 2 it shows the electrical connection form of the external terminal 60-M1 and the semiconductor chip 30. The external terminal 60-M1 is an external terminal 60 among the plurality of external terminals 60 used as the main terminal on the input side. In Figure 3 it shows the electrical connection form of the external terminal 60-M2 and the semiconductor chip 30. The external terminal 60-M2 is an external terminal 60 among the plurality of external terminals 60 used as the main terminal on the output side. In Figure 4shows the electrical connection form of the external terminal 60-C and the semiconductor chip 30. The external terminal 60-C is an external terminal 60 among the plurality of external terminals 60 that is used as a control terminal. Hereinafter, the individual external terminals 60-M1, 60-M2, and 60-C may sometimes be referred to collectively as the external terminal 60. In addition, in Figures 2 to 4 for convenience of explanation, the shape of the external terminal 60 is schematically shown.

[0046] As Figures 2 to 4 shown, the insulating substrate 20 has an insulating plate 21, a conductor plate 22, and a conductor pattern 23.

[0047] The insulating plate 21 is an insulating plate-like member arranged such that the direction along the Z-axis is the thickness direction. The insulating plate 21 is made of, for example, ceramics such as aluminum nitride, alumina, or silicon nitride. When observed in the direction along the Z-axis, the insulating plate 21 is arranged not only in the inner region of the housing 50 but also in the region overlapping with the housing 50.

[0048] The conductor plate 22 is a plate-like conductor arranged over substantially the entire area on the surface of the insulating plate 21 facing the Z2 direction. The conductor plate 22 is made of, for example, a metal such as copper or aluminum. A bottom plate 40 is joined to the conductor plate 22 using a joining material B0 such as solder.

[0049] The conductor pattern 23 is arranged on one surface of the insulating plate 21 and includes a conductor 23a joined to the semiconductor chip 30. In the present embodiment, the conductor pattern 23 is arranged on the surface of the insulating plate 21 facing the Z1 direction and includes a plurality of conductors 23a, 23b, and 23c separated from each other. Like the conductor plate 22, the conductor pattern 23 is made of, for example, a metal such as copper or aluminum. A plurality of semiconductor chips 30 are joined to the conductor pattern 23 using a joining material such as solder.

[0050] As Figure 2 and Figure 3 shown, the conductor 23a is a conductor joined to the semiconductor chip 30 and is electrically connected to the input electrode of the semiconductor chip 30. The electrical connection between the conductor 23a and the input electrode of the semiconductor chip 30 is made by joining the conductor 23a and the input electrode of the semiconductor chip 30 to each other using a joining material such as solder. In addition, as Figure 2 shown, the conductor 23a has a portion arranged directly below the external terminal 60-M1, and in this portion, it contacts a connection portion 63 of the external terminal 60-M1 described later.

[0051] As Figure 3As shown, conductor 23b is a conductor that is not joined to semiconductor chip 30 and is electrically connected to the output electrode of semiconductor chip 30. The electrical connection between conductor 23b and the output electrode of semiconductor chip 30 is made by connecting conductor 23b and the output electrode of semiconductor chip 30 to each other by means of bonding wire BW1. In addition, conductor 23b has a portion disposed directly below external terminal 60-M2, and in this portion, it contacts a connection portion 63 of external terminal 60-M2 described later.

[0052] As Figure 4 shown, conductor 23c is a conductor that is not joined to semiconductor chip 30. In addition, conductor 23c has a portion disposed directly below external terminal 60-C, and in this portion, it contacts a connection portion 63 of external terminal 60-C described later.

[0053] External terminal 60 used as external terminals 60-M1, 60-M2, and 60-C is formed of a metal plate bent substantially in an L shape. More specifically, as Figures 2 to 4 shown, external terminal 60 has a pin portion 61, a leg portion 62, and a connection portion 63.

[0054] Pin portion 61 is a part of external terminal 60 and is a rod-shaped portion extending toward the outside of housing 50 along the thickness direction of insulating substrate 20. In the Figures 2 to 4 example shown, pin portion 61 extends in the direction along the Z axis. One end of pin portion 61 in the Z1 direction protrudes from the outer wall surface of housing 50. Thus, pin portion 61 has a terminal portion that is the portion protruding from the outer wall surface of housing 50. This terminal portion is connected to a substrate (not shown) on which semiconductor module 10 is mounted. Leg portion 62 and connection portion 63 are connected to such pin portion 61.

[0055] Leg portion 62 is a part of external terminal 60 and is a plate-shaped portion extending toward the inside of housing 50 along a direction crossing the direction in which pin portion 61 extends. In the present embodiment, leg portion 62 is disposed along the surface of spacer 70 facing the Z1 direction. Leg portion 62 extends toward the inside of housing 50 from one end of pin portion 61 in the Z2 direction. Leg portion 62 has a portion sandwiched between housing 50 and spacer 70 and a pad portion that is the portion exposed inside housing 50. In external terminal 60-C, as Figure 4 shown, one end of bonding wire BW2 is joined to this pad portion. The other end of bonding wire BW2 is joined to the control electrode of semiconductor chip 30. Thus, external terminal 60-C and the control electrode of semiconductor chip 30 are electrically connected to each other by means of bonding wire BW2. That is, external terminal 60-C as a control terminal is electrically connected to the control electrode of semiconductor chip 30 by means of bonding wire BW2 joined to leg portion 62.

[0056] In addition, the other end of the bonding wire BW2 can also be bonded to a conductor among the plurality of conductors of the conductor pattern 23 constituting the insulating substrate 20, which is electrically connected to the control electrode of the semiconductor chip 30. Further, for the external terminal 60-M1, one end of the bonding wire can be bonded to the pad portion as needed. In this case, the other end of the bonding wire is bonded to the conductor 23a, or to a conductor among the plurality of conductors of the conductor pattern 23 constituting the insulating substrate 20, which is electrically connected to the conductor 23a. Similarly, for the external terminal 60-M2, one end of the bonding wire can be bonded to the pad portion as needed. In this case, the other end of the bonding wire is bonded to the output electrode of the semiconductor chip 30, or to a conductor among the plurality of conductors of the conductor pattern 23 constituting the insulating substrate 20, which is electrically connected to the output electrode of the semiconductor chip 30.

[0057] Here, the surface of the spacer 70 facing the Z1 direction is bonded to the surface of the leg portion 62 facing the Z2 direction and the housing 50 by an adhesive (not shown). Further, the surface of the spacer 70 facing the Z2 direction is bonded to the surface of the insulating substrate 20 facing the Z1 direction by an insulating adhesive B1. Moreover, the bottom plate 40 and the housing 50 are bonded by an insulating adhesive B2. As the adhesives B1 and B2, for example, epoxy adhesives or silicone adhesives containing inorganic fillers such as silica or alumina can be cited. In addition, the adhesives B1 and B2 can be the same or different. Further, the adhesives B1 and B2 can also be integrated.

[0058] In this way, the insulating spacer 70 is interposed between the leg portion 62 and the insulating substrate 20. Thereby, necessary electrical insulation between the external terminal 60 and the conductor pattern 23 can be ensured, and the external terminal 60 can be stably fixed with respect to the housing 50. In addition, the spacer 70 is provided as needed and can be omitted.

[0059] The connecting portion 63 is a part of the external terminal 60 and is a portion extending from the pin portion 61 toward the insulating substrate 20 along the thickness direction of the insulating substrate 20. In Figures 2 to 4 the example shown, the connecting portion 63 protrudes from the pin portion 61 toward the Z2 direction. The protruding amount of the connecting portion 63 is larger than the thickness of the spacer 70. Thereby, one end of the connecting portion 63 in the Z2 direction is located at a position closer to the Z2 direction than the spacer 70. In addition, one end of the connecting portion 63 in the Z2 direction is in contact with the conductor pattern 23 of the insulating substrate 20. More specifically, in the external terminal 60-M1, as Figure 2 shown, one end of the connecting portion 63 in the Z2 direction is in contact with the conductor 23a described above. In the external terminal 60-M2, as Figure 3 shown, one end of the connecting portion 63 in the Z2 direction is in contact with the conductor 23b described above. In the external terminal 60-C, as Figure 4As shown, one end of the connecting portion 63 in the Z2 direction is in contact with the conductor 23c.

[0060] The connecting portion 63 is in contact with the conductor pattern 23 while bearing the compressive force between the insulating substrate 20 and the housing 50. Thus, the external terminal 60 can be electrically connected to the conductor pattern 23. As a result, the number of bonding wires used to electrically connect the external terminal 60 to the semiconductor chip 30 can be reduced.

[0061] Specifically, through the contact between the connecting portion 63 of the external terminal 60-M1 and the conductor 23a, even without using the bonding wire that bonds the external terminal 60-M1 and the insulating substrate 20, the external terminal 60-M1 can be electrically connected to the input electrode of the semiconductor chip 30. In addition, through the contact between the connecting portion 63 of the external terminal 60-M2 and the conductor 23b, even without using the bonding wire that bonds the external terminal 60-M2 and the insulating substrate 20, the external terminal 60-M2 can be electrically connected to the output electrode of the semiconductor chip 30. Moreover, even without using the bonding wire that bonds the external terminals 60-M1, 60-M2 and the insulating substrate 20, in this case, the main current path can be ensured by the contact between the connecting portion 63 and the conductor pattern 23. Therefore, compared with the form without using the connecting portion 63, the number of such bonding wires can be reduced.

[0062] In this way, the connecting portion 63 of the external terminal 60-M1, which is the main terminal electrically connected to the main current path of the semiconductor chip 30, is in contact with the conductor 23a among the plurality of conductors 23a, 23b, 23c that is electrically connected to the main current path of the semiconductor chip 30. Similarly, the connecting portion 63 of the external terminal 60-M2, which is the main terminal electrically connected to the main current path of the semiconductor chip 30, is in contact with the conductor 23b among the plurality of conductors 23a, 23b, 23c that is electrically connected to the main current path of the semiconductor chip 30. By using the contact between the external terminals 60-M1, 60-M2 and the conductor pattern 23, the number of bonding wires can be reduced, and the external terminals 60-M1, 60-M2 can be electrically connected to the main current path of the semiconductor chip 30.

[0063] Furthermore, the insulating substrate 20 extends directly below the connecting portion 63 of the external terminal 60. Therefore, combined with the above effect of reducing the number of bonding wires, compared with the form without using the connecting portion 63, a larger area for mounting the semiconductor chip 30 can be ensured on the insulating substrate 20. Thus, miniaturization of the housing 50 can be achieved, and enlargement of the semiconductor chip 30 can be achieved. As a result, miniaturization of the semiconductor module 10 can be achieved, and the rated current of the semiconductor module 10 can be increased.

[0064] On this basis, the heat generated when the external terminal 60 is energized can be efficiently discharged from the connection portion 63 to the bottom plate 40 through the insulating substrate 20. As a result, the current that can flow through each of the external terminals 60 can be increased. As a result, even without increasing the number of external terminals 60, the rated current of the semiconductor module 10 can be increased. In addition, using the space obtained by reducing the external terminals 60 in this way, functions can also be added to the semiconductor module 10. For example, an auxiliary emitter terminal and an auxiliary collector terminal can be added, and a terminal for sensing the resistance value of the shunt resistor can be added when a shunt resistor is built in.

[0065] In addition, the connection portion 63 of the external terminal 60-C serving as a control terminal contacts a conductor 23c different from the conductors 23a and 23b among the plurality of conductors 23a, 23b, and 23c that are electrically connected to the main current path of the semiconductor chip 30. As a result, the external terminal 60-C can be electrically connected to the semiconductor chip 30 without complicating the conductor pattern 23. Here, the current capacity of the external terminal 60-C serving as a control terminal is much smaller than the current capacities of the external terminals 60-M1 and 60-M2 serving as main terminals. Therefore, the number of bonding wires BW2 can be small.

[0066] The above connection portion 63 stabilizes the contact state between the connection portion 63 and the conductor pattern 23 by bearing the compressive force between the insulating substrate 20 and the housing 50.

[0067] Figure 5 It is a perspective view of the external terminal 60 in the embodiment. Figure 6 It is a diagram for explaining a manufacturing example of the external terminal 60. In Figure 5 it shows an example of the external terminal 60 manufactured by bending a metal plate. In Figure 6 it shows the state of the external terminal 60 before bending manufactured by bending a metal plate.

[0068] As Figure 5 shown, the pin portion 61 has a first portion 61a and a second portion 61b. The first portion 61a is a part of the pin portion 61 and is the portion received in the terminal hole 51 of the housing 50. The second portion 61b is a part of the pin portion 61 and is the portion extending in the Z1 direction from one end of the first portion 61a in the Z1 direction, including a terminal portion protruding outside the housing 50. The width of the second portion 61b is narrower than the width of the first portion 61a. As a result, a pair of shoulders SH formed by the surfaces facing the Z1 direction are provided on the first portion 61a. Although not shown, the terminal hole 51 has a surface that contacts the pair of shoulders SH. As a result, the connection portion 63 of the external terminal 60 bears the compressive force between the housing 50 and the insulating substrate 20.

[0069] In addition, the shape of the pin portion 61 is not limited to Figure 5 and Figure 6 the example shown. For example, it may also be a shape in which the second portion 61b branches into two portions.

[0070] A leg portion 62 is connected near one end in the Z2 direction of the first portion 61a on the side surface of the first portion 61a. In the present embodiment, the external terminal 60 is manufactured by bending a metal plate. By bending along a bending line LN that intersects the Z-axis, the leg portion 62 extends in a direction intersecting the direction in which the pin portion 61 extends. In addition, the shape of the leg portion 62 is not limited to Figure 5 the example shown. For example, it may also be a shape with a constant width.

[0071] A connecting portion 63 is connected to one end in the Z2 direction of the first portion 61a. As Figure 5 shown, the connecting portion 63 has a spring shape that can be elastically deformed in the direction along the Z-axis, that is, the thickness direction of the insulating substrate 20. Thereby, it is possible to prevent applying a pressure that causes cracking to the insulating substrate 20 and maintain a stable contact state between the conductor pattern 23 and the connecting portion 63.

[0072] A plurality of slits SL extending in a direction intersecting the thickness direction of the insulating substrate 20 are provided in the connecting portion 63. Thereby, the external terminal 60 having the spring-shaped connecting portion 63 can be easily manufactured by processing such as blanking of a metal plate.

[0073] In Figure 5 the example shown, two slits SL are arranged in the direction along the Z-axis, and the two slits SL open in opposite directions to each other. In addition, the number of slits SL is not limited to Figure 5 the example shown, and may also be one or three or more. Further, the extending direction of the slit SL is not limited to the direction orthogonal to the Z-axis. For example, it may also be a direction inclined with respect to the direction orthogonal to the Z-axis. In addition, the shape of the slit SL is not limited to Figure 5 the example shown. For example, it may also be a curved shape or a shape with a non-constant width.

[0074] After manufacturing the external terminal 60 as described above by blanking of a metal plate, it is inserted into the terminal hole 51 of the housing 50. After applying an adhesive to the surface of the leg portion 62 facing the Z2 direction, the spacer 70 is fitted inside the housing 50. Thereby, the external terminal 60 is fixed to the housing 50.

[0075] On the other hand, a laminate is manufactured by laminating a base plate 40, a semiconductor chip 30, and an insulating substrate 20 using welding. The laminate is bonded in a state of being inserted inside a housing 50 in which external terminals 60 and spacers 70 are assembled as described above. This bonding is performed while pressure is applied between the housing 50 and the base plate 40. Thereby, the external terminals 60 can be fixed in a state of being pressed against the insulating substrate 20. Here, as described above, since the connecting portion 63 has a spring shape, the connecting portion 63 is appropriately deformed according to the pressing amount of the base plate 40 relative to the housing 50.

[0076] Then, wire bonding is appropriately performed inside the housing 50. Next, a potting material is filled into the housing 50, and then, a lid 80 is bonded to the housing 50. Thereby, the semiconductor module 10 is obtained.

[0077] As described above, in the semiconductor module 10, the connecting portion 63 of the external terminal 60 contacts the conductor pattern 23, so that the number of bonding wires for electrically connecting the external terminal 60 and the semiconductor chip 30 can be reduced. Moreover, in combination with the insulating substrate 20 extending directly below the connecting portion 63 of the external terminal 60, miniaturization of the semiconductor module 10 can be achieved, and the rated current of the semiconductor module 10 can be increased. Thereby, the heat generated when the external terminal 60 is energized can be efficiently discharged from the connecting portion 63 to the base plate 40 through the insulating substrate 20, so that the rated current of the semiconductor module 10 can be increased without increasing the number of external terminals 60.

[0078] 2. Variation

[0079] The present disclosure is not limited to the above-described embodiments, and various variations described below can be made. In addition, the embodiments and the variations can be appropriately combined.

[0080] 2-1. Variation 1

[0081] Figure 7 is a cross-sectional view of the semiconductor module 10 of Variation 1. In Figure 7 it shows another example of the electrical connection form between the external terminal 60-C used as a control terminal and the semiconductor chip 30.

[0082] When the number of control terminals is plural, the connection forms shown in Figure 4 and the connection form shown in Figure 7 can be appropriately combined and used. In the connection form shown in Figure 7 the conductor pattern 23 includes, in addition to the aforementioned plurality of conductors 23a, 23b, 23c, a conductor 23d. In addition, the connection form shown in Figure 7 can be used instead of the connection form shown in Figure 4 shown.

[0083] As Figure 7 shown, conductor 23d is a conductor not joined to semiconductor chip 30 and is electrically connected to the control electrode of semiconductor chip 30. The electrical connection between conductor 23d and the control electrode of semiconductor chip 30 is made by connecting conductor 23d and the control electrode of semiconductor chip 30 to each other by means of bonding wire BW3. Further, conductor 23d has a portion disposed directly below external terminal 60-C, and at this portion, it contacts connection portion 63 of external terminal 60-C.

[0084] According to the above-described modification example 1, miniaturization can also be achieved and the rated current of semiconductor module 10 can be increased.

[0085] 2-2. Modification Example 2

[0086] In the foregoing embodiment, a form in which all of the plurality of external terminals 60 included in semiconductor module 10 have connection portions 63 is illustrated, but the form is not limited thereto, and semiconductor module 10 may also include an external terminal that does not have connection portion 63. There is no particular limitation on the external terminal that does not have connection portion 63, and for example, various known external terminals can be applied.

[0087] 2-3. Modification Example 3

[0088] In the foregoing embodiment, a form in which external terminal 60 is manufactured by blanking of a metal plate is illustrated, but the form is not limited thereto. For example, one or both of leg portion 62 and connection portion 63 may be manufactured by a process independent of pin portion 61 and then joined to pin portion 61 by welding or the like to manufacture external terminal 60. In this case, the position of the central axis of connection portion 63 in the width direction can be made to coincide with the position of the central axis of pin portion 61 in the width direction.

[0089] 4. Supplementary Note

[0090] According to the above-described embodiment or modification example, for example, the following forms can be grasped.

[0091] (Supplementary Note 1) A first form as a preferred example of the semiconductor module of the present disclosure is a semiconductor module, wherein the semiconductor module includes: a base plate; an insulating substrate disposed on one surface of the base plate, the insulating substrate being provided with a semiconductor chip; a frame-shaped housing surrounding the insulating substrate; and a plurality of external terminals disposed across the inside and outside of the housing and electrically connected to the semiconductor chip. The insulating substrate has: an insulating plate; and a conductor pattern disposed on one surface of the insulating plate, the conductor pattern including a conductor joined to the semiconductor chip. At least one of the plurality of external terminals has: a pin portion extending outward from the housing along the thickness direction of the insulating substrate; a leg portion extending inward from the housing along a direction crossing the direction in which the pin portion extends; and a connection portion extending from the pin portion toward the insulating substrate along the thickness direction of the insulating substrate, the connection portion being in contact with the conductor pattern in a state of receiving a compressive force between the insulating substrate and the housing.

[0092] In the above form, the connection portion of the external terminal is in contact with the conductor pattern in a state of receiving a compressive force between the insulating substrate and the housing, so that the external terminal and the conductor pattern can be electrically connected. Thereby, the number of bonding wires for electrically connecting the external terminal and the semiconductor chip can be reduced.

[0093] Moreover, the insulating substrate extends directly below the connection portion of the external terminal. Therefore, combined with the effect of reducing the number of bonding wires as described above, miniaturization of the housing can be achieved, and at the same time, the semiconductor chip can be enlarged. Thereby, miniaturization of the semiconductor module can be achieved, and the rated current of the semiconductor module can be increased.

[0094] On this basis, the heat generated when the external terminal is energized can be efficiently discharged from the connection portion of the external terminal to the base plate through the insulating substrate. Thereby, the current that can flow through each of the external terminals can be increased. As a result, even without increasing the number of external terminals, the rated current of the semiconductor module can be increased.

[0095] (Supplementary Note 2) In a second form as a preferred example of the first form, the at least one external terminal includes a control terminal electrically connected to the control electrode of the semiconductor chip by a bonding wire joined to the leg portion as an external terminal. The conductor pattern includes a plurality of conductors separated from each other. The connection portion of the control terminal is in contact with a conductor different from the conductor electrically connected to the main current path of the semiconductor chip among the plurality of conductors.

[0096] In the above-described configuration, the control terminal can be electrically connected to the semiconductor chip without complicating the conductor pattern. Here, since the current capacity of the control terminal is significantly smaller than that of the main terminal, the number of bonding wires may be small. In addition, the connection portion of the control terminal contacts a conductor different from the conductor electrically connected to the main current path of the semiconductor chip, thereby preferably ensuring the function of the control terminal and contributing to heat dissipation of the control terminal and other external terminals.

[0097] (Supplementary Note 3) In a third configuration which is a preferred example of the first or second configuration, the at least one external terminal includes a main terminal electrically connected to the main current path of the semiconductor chip as an external terminal, the conductor pattern includes a plurality of conductors separated from each other, and the connection portion of the main terminal contacts the conductor among the plurality of conductors that is electrically connected to the main current path of the semiconductor chip.

[0098] In the above-described configuration, the number of bonding wires can be reduced, and the main terminal can be electrically connected to the main current path of the semiconductor chip.

[0099] (Supplementary Note 4) In a fourth configuration which is a preferred example of any one of the first to third configurations, the connection portion has a spring shape that can be elastically deformed in the thickness direction of the insulating substrate.

[0100] In the above-described configuration, it is possible to prevent applying pressure to the insulating substrate that would cause cracking and maintain a stable contact state between the conductor pattern and the connection portion.

[0101] (Supplementary Note 5) In a fifth configuration which is a preferred example of the fourth configuration, a slit extending in a direction crossing the thickness direction of the insulating substrate is provided in the connection portion.

[0102] In the above-described configuration, an external terminal having a spring-shaped connection portion can be easily manufactured by processing such as blanking of a metal plate.

[0103] (Supplementary Note 6) In a sixth configuration which is a preferred example of any one of the first to fifth configurations, the semiconductor module further includes an insulating spacer interposed between the leg portion and the insulating substrate.

[0104] In the above-described configuration, it is possible to ensure necessary electrical insulation between the external terminal and the conductor pattern and stably fix the external terminal to the housing.

Claims

1. A semiconductor module, wherein, the semiconductor module includes: a base plate; an insulating substrate disposed on one surface of the base plate, the insulating substrate being provided with semiconductor chips; a frame-shaped housing surrounding the insulating substrate; and a plurality of external terminals disposed across the inside and outside of the housing and electrically connected to the semiconductor chips, the insulating substrate having: an insulating board; and a conductor pattern disposed on one surface of the insulating board, the conductor pattern including a conductor joined to the semiconductor chip, at least one of the plurality of external terminals having: a pin portion extending outward from the housing along the thickness direction of the insulating substrate; a leg portion extending inward from the housing along a direction intersecting the direction in which the pin portion extends; and a connection portion extending from the pin portion toward the insulating substrate along the thickness direction of the insulating substrate, the connection portion being in contact with the conductor pattern in a state where a compressive force between the insulating substrate and the housing is applied.

2. The semiconductor module according to claim 1, wherein, the at least one external terminal includes a control terminal electrically connected to a control electrode of the semiconductor chip via a bonding wire joined to the leg portion as an external terminal, the conductor pattern includes a plurality of conductors separated from each other, the connection portion of the control terminal is in contact with a conductor different from the conductor electrically connected to the main current path of the semiconductor chip among the plurality of conductors.

3. The semiconductor module according to claim 1 or 2, wherein, the at least one external terminal includes a main terminal electrically connected to the main current path of the semiconductor chip as an external terminal, the conductor pattern includes a plurality of conductors separated from each other, the connection portion of the main terminal is in contact with the conductor electrically connected to the main current path of the semiconductor chip among the plurality of conductors.

4. The semiconductor module according to claim 1, wherein, the connection portion has a spring shape capable of elastically deforming in the thickness direction of the insulating substrate.

5. The semiconductor module according to claim 4, wherein, a slit extending in a direction intersecting the thickness direction of the insulating substrate is provided in the connection portion.

6. The semiconductor module according to claim 1, wherein, the semiconductor module further includes an insulating spacer interposed between the leg portion and the insulating substrate.

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