Flight control and anti-interference satellite navigation system

Abstract

The invention relates to a flight control and anti-interference satellite navigation system which comprises a first FPGA unit, a first signal processing unit, a second FPGA unit, a second signal processing unit, an electric connector, a level conversion module, a health management module and a radio frequency conversion module. The first signal processing unit is in communication connection with the first FPGA unit and the electric connector, the second signal processing unit is in communication connection with the second FPGA unit and the electric connector, the first FPGA unit is in communication connection with the second FPGA unit, the electric connector and the radio frequency conversion module, the second FPGA unit is in communication connection with the electric connector and the health management module, and the radio frequency conversion module is in communication connection with the electric connector. The health management module is in communication connection with the electric connector, so that the problems that an existing flight control and anti-interference satellite navigation system is large in size, heavy in weight and unreliable in data interaction are solved.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and more particularly, to a flight control and anti-jamming satellite navigation system. Background Art

[0002] With the rapid development of missile models, the requirements for volume, weight, cost, and performance are continuously increasing. It is necessary to minimize the weight and volume of missile equipment as much as possible, and form a general-purpose product spectrum by means of integration to reduce the equipment development cost; conventional satellite navigation systems are difficult to work properly in complex electromagnetic environments, which has a great impact on the high-precision guidance ability of missile equipment, and it is necessary to strengthen and improve the anti-jamming ability of the satellite navigation system; for an integrated system with multiple modules, health monitoring is particularly important. Once an abnormality occurs in one of the modules, the missile system can obtain the module abnormality in time through the health management system so as to achieve the purpose of timely loss prevention, and improve the safety and reliability of the missile. As the heart of the missile, the flight control module is the basis for the reliable operation of the entire missile.

[0003] Common flight control and satellite navigation systems are large in volume and mass, slow in response speed, and do not have the ability to resist complex electromagnetic environments, and usually adopt a split design. The split flight control and satellite navigation systems connect and interact between the two modules of the flight control and satellite navigation systems by installing a working base plate externally, resulting in a large volume and mass, and are easily limited in guided munitions with limited volume and weight; there are disadvantages and deficiencies in the split flight control and satellite navigation systems connected by the base plate. The interaction between the split modules necessarily requires a connector for transfer. Signals are transferred through the connector, which increases the production cost while the signal transfer increases the unstable factors, and at the same time the communication interaction efficiency is limited by the design between the connectors; conventional satellite navigation systems are difficult to complete the functions of navigation, positioning, and timing in complex electromagnetic environments, resulting in the impact on the autonomous integrity during the use of munitions and being unable to work properly.

[0004] Due to large volume, poor integration, lack of anti-jamming ability, lack of health management ability, it is difficult to improve the communication efficiency between modules for flight control and satellite navigation systems. At the same time, the split design increases the volume and occupied space of the product. The lack of anti-jamming ability makes it difficult for the satellite navigation system to exert its effectiveness in complex environments. The lack of health management ability affects the safety performance of the entire missile system. Conventional flight control and satellite navigation systems can no longer meet the requirements, which limits their popularization and application.

[0005] Common split flight control and satellite navigation systems mainly have the following disadvantages: 1) The connection stability of the split flight control and satellite navigation systems is poor, the working efficiency is not high, the volume and weight are large, and the economy is poor.

[0006] 2) Conventional satellite navigation systems have poor anti-jamming capabilities and it is difficult to maintain working performance in complex environments.

[0007] 3) Traditional flight control and satellite navigation systems are difficult to conduct health supervision on each module, and have poor safety. Summary of the Invention

[0008] To solve the problems of large volume, heavy weight, and unreliable data interaction in existing flight control and anti-jamming satellite navigation systems, the present invention provides a flight control and anti-jamming satellite navigation system, which is applied to external devices.

[0009] In a first aspect, the present invention provides a flight control and anti-jamming satellite navigation system, including: A first FPGA unit, a first signal processing unit, a second FPGA unit, a second signal processing unit, an electrical connector, a level conversion module, a health management module, and a radio frequency conversion module; Both the first signal processing unit and the second signal processing unit are electrically connected to an EMIF interface. The first signal processing unit is communicatively connected to the first FPGA unit through the EMIF interface, and the second signal processing unit is communicatively connected to the second FPGA unit through the EMIF interface; There is a first communication connection between the first FPGA unit and the second FPGA unit, and the first communication connection supports the Uart communication protocol. There is a second communication connection between the first FPGA unit and the electrical connector, and there is a third communication connection between the second FPGA unit and the electrical connector. There is a fourth communication connection between the first signal processing unit and the electrical connector, and the fourth communication connection supports the JTAG communication protocol; there is a fifth communication connection between the second signal processing unit and the electrical connector, and the fifth communication connection supports the JTAG communication protocol. There is a sixth communication connection between the first FPGA unit and the radio frequency conversion module, and there is a seventh communication connection between the radio frequency conversion module and the electrical connector; The health management module is electrically connected to an FMC interface. The health management module is communicatively connected to the second FPGA unit through the FMC interface. There is an eighth communication connection between the health management module and the electrical connector, and the eighth communication connection supports the PMBUS communication protocol; There is also a ninth communication connection between the second signal processing unit and the electrical connector, and the ninth communication connection supports the SRIO communication protocol; The level conversion module is electrically connected between the first FPGA unit, the second FPGA unit, the first signal processing unit, the second signal processing unit, the electrical connector, and the health management module respectively.

[0010] In some embodiments, the electrical connector is also electrically connected to a power supply interface, a communication interface, input / output digital signals, and a radio frequency interface, and the electrical connector is communicatively connected to an external system through the power supply interface, the communication interface, the input / output digital signals, and the radio frequency interface respectively.

[0011] In some embodiments, the radio frequency conversion module includes a radio frequency channel board, an AD conversion unit, and an intermediate frequency processing unit. The radio frequency channel board is communicatively connected to the electrical connector through the radio frequency interface. There is a tenth communication connection between the radio frequency channel board and the AD conversion unit. The AD conversion unit is communicatively connected to the first FPGA unit. The intermediate frequency processing unit is communicatively connected to the electrical connector through the radio frequency interface. The intermediate frequency processing unit is communicatively connected to the first FPGA unit.

[0012] In some embodiments, the level conversion module includes a voltage and current acquisition unit and a power conversion unit. The voltage and current acquisition unit is electrically connected to the electrical connector through the power supply interface. The voltage and current acquisition unit is electrically connected to the health management module. The voltage and current acquisition unit is electrically connected to the power conversion unit. The power conversion unit is electrically connected to the first FPGA unit, the second FPGA unit, the first signal processing unit, and the second signal processing unit respectively.

[0013] In some embodiments, a network port voltage conversion module is further included. The network port voltage conversion module is electrically connected to an ETH network port. The network port voltage conversion module is communicatively connected to the communication interface of the electrical connector through the ETH network port. The network port voltage conversion module is electrically connected to the health management module.

[0014] To solve the problems of large volume, heavy weight, and unreliable data interaction in existing flight control and anti-interference satellite navigation systems, the present invention has the following advantages: Through the technical solution of the present invention, anti-interference processing and baseband processing are carried out using the architecture of "first FPGA unit + first signal processing unit". The processed data is transmitted through a serial port to the architecture of "second FPGA unit + second signal processing unit". The architecture of "second FPGA unit + second signal processing unit" is used to receive data from inertial navigation sensors and satellite navigation systems, and at the same time manage the flight state, thereby realizing the miniaturization, light weight, reliability, and safety design of the flight control and anti-interference satellite navigation system, and having rich functional interfaces. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A schematic structural diagram of a flight control and anti-interference satellite navigation system is shown. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0016] The present disclosure will now be described with reference to several exemplary embodiments. It should be understood that the description of these embodiments is only for enabling those of ordinary skill in the art to better understand and thus implement the present disclosure, rather than implying any limitation on the scope of the present disclosure.

[0017] As used herein, the term "comprising" and its variants are to be construed as open-ended terms meaning "including but not limited to". The term "based on" is to be construed as "at least partially based on". The terms "one embodiment" and "an embodiment" are to be construed as "at least one embodiment". The term "another embodiment" is to be construed as "at least one other embodiment". The orientation or positional relationships indicated by the terms "upper", "lower", "left", "right", "front", "rear", "top", "bottom", "inner", "outer", "vertical", "horizontal", "lateral", "longitudinal", etc. are based on the orientation or positional relationships shown in the drawings. These terms are mainly used to better describe the present application and its embodiments, and are not used to limit that the indicated devices, elements or components must have a specific orientation, or be constructed and operated in a specific orientation. Moreover, in addition to being able to represent orientation or positional relationships, some of the above terms may also be used to represent other meanings. For example, the term "upper" may also be used to represent a certain attachment relationship or connection relationship in some cases. For those of ordinary skill in the art, the specific meanings of these terms in the present application can be understood according to specific circumstances. In addition, the terms "mounted", "arranged", "provided with", "connected", "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral structure; it may be a mechanical connection or an electrical connection; it may be directly connected, or indirectly connected through an intermediate medium, or there may be internal communication between two devices, elements or components. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances. In addition, the terms "first", "second", etc. are mainly used to distinguish different devices, elements or components (the specific types and structures may be the same or different), and are not used to indicate or imply the relative importance and quantity of the indicated devices, elements or components. Unless otherwise specified, the meaning of "a plurality of" is two or more.

[0018] This embodiment discloses a flight control and anti-interference satellite navigation system. As Figure 1As shown, the flight control and anti-interference satellite navigation system includes a first FPGA unit, a first signal processing unit, a second FPGA unit, a second signal processing unit, an electrical connector, a level conversion module, a health management module, and a radio frequency conversion module; in this application, the first FPGA unit preferably uses a chip of model XC7K325T, which is mainly a baseband and anti-interference processing FPGA; the second FPGA unit preferably uses a chip of model XC7K325T, which is mainly an interface construction FPGA; the first signal processing unit preferably uses a processor of model TMS32C6672, which is mainly a dual-core DSP, with core 0 for navigation solution and core 1 for integrated navigation; the second signal processing unit preferably uses a processor of model TMS32C6672, which is mainly for guidance control and ground testing.

[0019] Both the first signal processing unit and the second signal processing unit are electrically connected to an EMIF interface. The first signal processing unit is communicatively connected to the first FPGA unit through the EMIF interface, receives the baseband raw observables transmitted by the FPGA and is used for PVT solution, and at the same time configures the baseband working mode of the FPGA and transmits communication data through the FPGA expansion interface. The second signal processing unit is communicatively connected to the second FPGA unit through the EMIF interface, mainly for processing the serial port data information expanded by the FPGA, controlling the working logic of switch quantities, etc. There is a first communication connection between the first FPGA unit and the second FPGA unit. The first communication connection supports the Uart communication protocol and is used for transmitting inertial navigation observables, satellite navigation solution results, and integrated navigation solution results. There is a second communication connection between the first FPGA unit and the electrical connector for ephemeris loading. There is a third communication connection between the second FPGA unit and the electrical connector for outputting various types of inertial measurement data, receiving inertial observable interrupts, and four types of external RS422 communication interfaces. There is a fourth communication connection between the first signal processing unit and the electrical connector. The fourth communication connection supports the JTAG communication protocol and is used for software upgrade of the first signal processing unit. This interface can upgrade the first FPGA unit through software. There is a fifth communication connection between the second signal processing unit and the electrical connector. The fifth communication connection supports the JTAG communication protocol and is used for software upgrade of the second signal processing unit. This interface can upgrade the second FPGA unit through software. There is a sixth communication connection between the first FPGA unit and the radio frequency conversion module for solving one Beidou B1 frequency point. There is a seventh communication connection between the radio frequency conversion module and the electrical connector for receiving one Beidou B1 frequency point analog signal. The health management module is electrically connected to an FMC interface. The health management module is communicatively connected to the second FPGA unit through the FMC interface, and is used for transmitting health management signals into the second FPGA. The expansion interface is monitored in the second signal processing unit. There is an eighth communication connection between the health management module and the electrical connector. The eighth communication connection supports the PMBUS communication protocol and is used for externally reporting health monitoring results in real time; There is also a ninth communication connection between the second signal processing unit and the electrical connector. The ninth communication connection supports the SRIO communication protocol and is used for outputting high-speed control signals in real time for flight control; The level conversion module is electrically connected between the first FPGA unit, the second FPGA unit, the first signal processing unit, the second signal processing unit, the electrical connector, and the health management module. In this application, the health management module preferably uses a processor of model STM32H743.

[0020] Further, the electrical connector is also electrically connected to a power supply interface, a communication interface, input / output digital signals, and a radio frequency interface. The electrical connector is communicatively connected to external devices through the power supply interface, the communication interface, the input / output digital signals, and the radio frequency interface respectively.

[0021] Further, the radio frequency conversion module includes a radio frequency channel board, an AD conversion unit, and an intermediate frequency processing unit. The radio frequency channel board is communicatively connected to the electrical connector through the radio frequency interface. There is a tenth communication connection between the radio frequency channel board and the AD conversion unit. The AD conversion unit is communicatively connected to the first FPGA unit. The first FPGA receives four-way Beidou B3 frequency point digital signals after AD conversion and is used for anti-interference calculation and processing. The intermediate frequency processing unit is communicatively connected to the electrical connector through the radio frequency interface. The intermediate frequency processing unit is communicatively connected to the first FPGA unit. In this application, the AD conversion unit is preferably an AD converter, and the intermediate frequency processing unit preferably uses an intermediate frequency processing chip of model 2769B1.

[0022] Further, the level conversion module includes a voltage and current acquisition unit and a power conversion unit. The voltage and current acquisition unit is electrically connected to the electrical connector through the power supply interface. The voltage and current acquisition unit is electrically connected to the health management module. The voltage and current acquisition unit is electrically connected to the power conversion unit. The power conversion unit is electrically connected between the first FPGA unit, the second FPGA unit, the first signal processing unit, and the second signal processing unit respectively to provide current.

[0023] Further, it further includes an Ethernet voltage conversion module. The Ethernet voltage conversion module is electrically connected to an ETH network port. The Ethernet voltage conversion module is communicatively connected to the communication interface of the electrical connector through the ETH network port. The Ethernet voltage conversion module is electrically connected to the health management module. In this application, the Ethernet voltage conversion module includes a PHY chip and an Ethernet transformer.

[0024] In this embodiment, the present application provides a flight control and anti-interference satellite navigation system, which is mainly composed of a channel board, a digital board, a structural member, etc. Among them, the channel board is assembled on the front of the flight control and anti-interference satellite navigation system, and the digital board is assembled on the back. A radio frequency conversion module is fixed in the channel board. The radio frequency conversion module is mainly composed of a radio frequency channel board, an AD conversion unit and an intermediate frequency processing unit; in the digital board, there is a "first FPGA unit + first signal processing unit" architecture for navigation positioning and timing, and a "second FPGA unit + second signal processing unit" architecture to which the flight management module belongs is fixed in the digital board.

[0025] Specifically, the flight control and anti-interference satellite navigation system receives satellite signals of B1 and B3 frequency points through the channel board, converts the satellite signal of the B3 frequency point into an intermediate frequency signal through the AD conversion unit, converts the satellite signal of the B1 frequency point into an intermediate frequency signal through the intermediate frequency processing unit, performs anti-interference processing and baseband processing in the digital board using the first FPGA unit in cooperation with the first signal processing unit, and the processed data is transmitted through the serial port to the second FPGA unit to which the flight management module belongs in cooperation with the second signal processing unit for data processing. The flight management module is mainly used to receive data from inertial navigation sensors and the satellite navigation system, and at the same time manage the flight state. In this application, the flight control and anti-interference satellite navigation system also has a health management module, and the health management module can be used to monitor the status of other various computing chips and the input power supply.

[0026] The characteristics of the flight control and anti-interference satellite navigation system are: compact structure, small volume, light weight, having anti-interference ability, and at the same time having health management ability, reducing the installation space and weight of the flight control and anti-interference satellite navigation system, improving the integration degree, and being beneficial to realizing the miniaturization, light weight, reliability and safety design of the flight control and anti-interference satellite navigation system. The flight control and anti-interference satellite navigation system has rich functions and reasonable design, and has high practical and economic value.

[0027] Among them, compared with the separate flight control and satellite navigation systems, this flight control and anti-jamming satellite navigation system reduces the number, volume, and weight of external connection connectors, reduces the production and manufacturing costs, and has good economy. The total weight of the conventional separate flight control and satellite navigation systems is about 1035 g (flight management 438 g + navigation and positioning 497 g + connection base plate 100 g). After the integrated design, the weight of the flight control and anti-jamming satellite navigation system is 861 g, the mass is reduced by 16%, and the volume is reduced by nearly 10%. The integrated design greatly reduces the production and manufacturing costs and has good economy. Secondly, this flight control and anti-jamming satellite navigation system has an anti-jamming function and can work in a complex environment compared with the conventional satellite navigation system. With a suitable antenna array, it can achieve an anti-single-jamming performance of 95 dB and a three-jamming performance of 85 dB, which improves the reliability of the operation of this flight control and anti-jamming satellite navigation system. Finally, this flight control and anti-jamming satellite navigation system has a health management function, which can monitor the working status of the main control chip of each system and give an alarm in time, greatly improving the safety and reliability of the operation of this flight control and anti-jamming satellite navigation system.

[0028] For those skilled in the art, it is obvious that the present invention is not limited to the details of the above exemplary embodiments, and the present invention can be implemented in other specific forms without departing from the spirit or basic characteristics of the present invention. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting. The scope of the present invention is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the present invention.

[0029] In addition, it should be understood that although this specification is described according to embodiments, not every embodiment only contains an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other implementation manners that can be understood by those skilled in the art.

Claims

1. A flight control and anti-interference satellite navigation system, characterized in that, Including: A first FPGA unit, a first signal processing unit, a second FPGA unit, a second signal processing unit, an electrical connector, a level conversion module, a health management module, and a radio frequency conversion module; Both the first signal processing unit and the second signal processing unit are electrically connected to an EMIF interface. The first signal processing unit is communicatively connected to the first FPGA unit through the EMIF interface, and the second signal processing unit is communicatively connected to the second FPGA unit through the EMIF interface; There is a first communication connection between the first FPGA unit and the second FPGA unit, and the first communication connection supports the Uart communication protocol. There is a second communication connection between the first FPGA unit and the electrical connector, a third communication connection between the second FPGA unit and the electrical connector, a fourth communication connection between the first signal processing unit and the electrical connector, and the fourth communication connection supports the JTAG communication protocol; There is a fifth communication connection between the second signal processing unit and the electrical connector, and the fifth communication connection supports the JTAG communication protocol. There is a sixth communication connection between the first FPGA unit and the radio frequency conversion module, and a seventh communication connection between the radio frequency conversion module and the electrical connector; The health management module is electrically connected to an FMC interface. The health management module is communicatively connected to the second FPGA unit through the FMC interface. There is an eighth communication connection between the health management module and the electrical connector, and the eighth communication connection supports the PMBUS communication protocol; There is also a ninth communication connection between the second signal processing unit and the electrical connector, and the ninth communication connection supports the SRIO communication protocol; The level conversion module is electrically connected between the first FPGA unit, the second FPGA unit, the first signal processing unit, the second signal processing unit, the electrical connector, and the health management module respectively.

2. The flight control and anti-interference satellite navigation system according to claim 1, characterized in that, The electrical connector is also electrically connected to a power supply interface, a communication interface, input / output switch quantities, and a radio frequency interface. The electrical connector is communicatively connected to an external system through the power supply interface, the communication interface, the input / output switch quantities, and the radio frequency interface respectively.

3. The flight control and anti-interference satellite navigation system according to claim 2, characterized in that, The radio frequency conversion module includes a radio frequency channel board, an AD conversion unit, and an intermediate frequency processing unit. The radio frequency channel board is communicatively connected to the electrical connector through the radio frequency interface. There is a tenth communication connection between the radio frequency channel board and the AD conversion unit. The AD conversion unit is communicatively connected to the first FPGA unit. The intermediate frequency processing unit is communicatively connected to the electrical connector through the radio frequency interface. The intermediate frequency processing unit is communicatively connected to the first FPGA unit.

4. The flight control and anti-interference satellite navigation system according to claim 2, characterized in that, The level conversion module includes a voltage and current acquisition unit and a power conversion unit. The voltage and current acquisition unit is electrically connected to the electrical connector through the power supply interface, electrically connected between the voltage and current acquisition unit and the health management module, electrically connected between the voltage and current acquisition unit and the power conversion unit, and the power conversion unit is electrically connected to the first FPGA unit, the second FPGA unit, the first signal processing unit, and the second signal processing unit respectively.

5. The flight control and anti-interference satellite navigation system according to claim 2, characterized in that, It further includes a network port voltage conversion module. The network port voltage conversion module is electrically connected to an ETH network port. The network port voltage conversion module is communicatively connected to the communication interface of the electrical connector through the ETH network port, and the network port voltage conversion module is electrically connected to the health management module.

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