Boron-coated backside illuminated image sensor with fluoride-based anti-reflective coating

Abstract

A backside illuminated image sensor (150) for detecting short wavelength radiation (e.g., deep ultraviolet (DUV) and vacuum ultraviolet (VUV) light) includes a semiconductor diaphragm (160), a circuit element (171) formed on a front side surface (161) of the semiconductor diaphragm, and a pure boron coating (180) on a back side surface (162) of the semiconductor diaphragm. A two-part anti-reflective coating (181) is formed over the pure boron coating (180) and includes a thin oxide or nitride protective layer (182) disposed between the pure boron coating (180) and a fluoride-based anti-reflective layer (185). A method for fabricating the image sensor may include performing a plasma atomic layer deposition (plasma ALD) process to sequentially produce the pure boron coating (180), the oxide / nitride protective layer (182), and then the fluoride-based anti-reflection layer (185). The image sensors may be configured as a charge coupled device (CCD), a complementary metal oxide semiconductor (CMOS) sensor, or a photodiode, and arranged as a two-dimensional (2D) region sensor or a one-dimensional (1D) array sensor.

Description

[0001] Related Applications

[0002] This application claims priority to U.S. Provisional Patent Application No. 63 / 438,788, filed on January 12, 2023, titled "METHODS OF IMPLEMENTING FLUORIDE BASED ANTI-REFLECTION COATINGS ON BACK-ILLUMINATED SENSOR WITH BORON LAYER". Technical Field

[0003] This application relates to image sensors adapted to sense radiation in deep ultraviolet (DUV) and vacuum ultraviolet (VUV), and to methods for manufacturing / producing such image sensors. Some embodiments of the sensors are adapted to sense electrons and other charged particles. All sensors are suitable for use in photomask, reticle, or wafer inspection systems. Background Art

[0004] The integrated circuit industry requires inspection tools with increasingly high resolution to resolve ever-smaller features of integrated circuits, photomasks, reticles, solar cells, charge-coupled devices, etc., and to detect defects that are about the same size as or smaller than those feature sizes.

[0005] Inspection systems operating at short wavelengths (e.g., wavelengths shorter than about 250 nm) can provide this resolution in many cases. In other cases, electrons or other charged particles, such as helium (He) nuclei (i.e., alpha particles), can be used. Specifically, for photomask or reticle inspection, it may be desirable to perform inspection using a wavelength that is the same as or close to the wavelength that will be used for lithography (i.e., close to 193.4 nm for current-generation lithography and close to 13.5 nm for future EUV lithography), because the phase shift of the inspection light caused by the pattern will be the same as or very similar to the phase shift caused during lithography. For inspecting semiconductor patterned wafers, it may be advantageous for the inspection system to operate over a relatively wide wavelength range (e.g., a wavelength range that includes wavelengths in the near UV, DUV, and / or VUV ranges), because the wide wavelength range can reduce the sensitivity to small variations in layer thickness or pattern size that can cause large variations in reflectivity at individual wavelengths.

[0006] To detect small defects or particles on photomasks, reticles, and semiconductor wafers, a high signal-to-noise ratio is required. At high-speed inspection, a high photon or particle flux density is needed to ensure a high signal-to-noise ratio because the statistical fluctuations (Poisson noise) in the number of photons detected are the fundamental limit of the signal-to-noise ratio. In many cases, approximately 100,000 or more photons are required per pixel. Since inspection systems are typically in use 24 hours a day with only brief stops, the detector is exposed to a large dose of radiation only after operating for several months.

[0007] Photons with a vacuum wavelength of 250 nm have an energy of approximately 5 eV. The bandgap of silicon dioxide is about 10 eV. Although it may seem that photons of such wavelengths may not be absorbed by silicon dioxide, silicon dioxide grown on a silicon surface must have some dangling bonds at the interface with silicon because the silicon dioxide structure cannot perfectly match the structure of the silicon crystal. In addition, because individual dioxides are amorphous, there may also be some dangling bonds within the material. In fact, there will be a non-negligible density of defects and impurities within the oxide and at the interface with the underlying semiconductor that can absorb photons with deep UV wavelengths, especially photons with wavelengths shorter than about 250 nm. In addition, at high radiation flux densities, two high-energy photons can arrive near the same location within a very short time interval (nanoseconds or picoseconds), which can cause electrons to be excited to the conduction band of silicon dioxide through two absorption events in rapid succession or through two-photon absorption.

[0008] A further requirement for sensors used in inspection, metrology, and related applications is high sensitivity. As explained above, a high signal-to-noise ratio is required. If the sensor does not convert most of the incident photons into a signal, then a higher-intensity light source will be required to maintain the same inspection or measurement speed compared to an inspection or metrology system with a more efficient sensor. A higher-intensity light source will expose the optics of the instrument and the sample being inspected or measured to a higher light intensity, which may cause damage or degradation over time. A higher-intensity light source will also be more expensive, or may not be available, especially at DUV and VUV wavelengths. Silicon reflects a high percentage of DUV and VUV light incident on it. For example, at a wavelength close to 193 nm, silicon with a 2 nm oxide layer (e.g., a native oxide layer) on its surface reflects approximately 65% of the light incident on it. Growing an oxide layer of approximately 21 nm on the silicon surface reduces the reflectivity to close to 40% for wavelengths close to 193 nm. A detector with a 40% reflectivity is significantly more efficient than a detector with a 65% reflectivity, but a lower reflectivity and thus higher efficiency are desirable.

[0009] Anti-reflection (AR) coatings (also known as anti-reflection / anti-reflective or anti-glare coatings) are commonly used on optical components (such as lenses and mirrors) to improve efficiency by reducing the reflectivity of the optical component. However, many AR coating materials and processes commonly used for optical components are often incompatible with silicon-based sensors. For example, electron and ion assisted deposition techniques are commonly used to produce AR and other optical coatings. Such coating processes generally cannot be used to coat semiconductor devices because electrons or ions can deposit sufficient charge on the surface of the semiconductor device to cause electrical breakdown, resulting in damage to the circuits fabricated on the semiconductor.

[0010] DUV and VUV wavelengths are strongly absorbed by silicon. Such wavelengths can be mostly absorbed within about 10 nm or tens of nm of the silicon surface. The efficiency of sensors operating at DUV or VUV wavelengths depends on what fraction of the electrons generated by the absorbed photons can be collected before electron recombination. Silicon dioxide can form a high-quality interface with silicon with a low density of defects. Most other materials (including many materials commonly used for anti-reflection coatings) result in a very high density of electrical defects at the silicon surface when deposited directly on silicon. A high density of electrical defects on the silicon surface may not be a problem for sensors intended to operate at visible wavelengths because such wavelengths typically travel about 100 nm or more into the silicon before being absorbed and may thus be little affected by the electrical defects on the silicon surface. However, DUV and VUV wavelengths are absorbed close to the silicon surface, such that the electrical defects on the surface and / or the trapped charge within the (several) layers on the surface can cause a significant fraction of the generated electrons to recombine and be lost at or near the silicon surface, resulting in a low-efficiency sensor.

[0011] U.S. Patent Nos. 9,496,425, 9,818,887, and 10,121,914 describe boron-coated back-illuminated image sensors and methods of manufacturing an image sensor, the image sensor including at least one boron layer deposited at least on an exposed back (light-receiving) surface of the image sensor, the at least one boron layer operative to increase durability and quantum efficiency of the image sensor. Different temperature ranges for depositing boron are disclosed, including a range of about 400 °C to 450 °C and a range of about 700 °C to 800 °C. The inventors have found that an advantage of higher deposition temperatures of boron (e.g., deposition temperatures between about 600 °C and about 900 °C) is that at such temperatures, boron diffuses into the silicon, thereby providing a very thin heavily p-type doped silicon layer on the photosensitive back surface. This p-type doped silicon layer is important for ensuring high quantum efficiency for DUV and VUV radiation because it creates an electrostatic field near the surface that accelerates electrons away from the surface into the silicon layer. The p-type silicon also increases the conductivity of the back surface of the silicon, which is important for high-speed operation of the image sensor because the ground current induced by the switching of the signal on the electrons on the front surface of the sensor requires a return path. U.S. Patent No. 11,114,491 describes an image sensor structure having a very thin low-temperature (below 450 °C) epitaxial silicon grown above a back-thinned surface of a silicon sensor prior to a low-temperature (below 450 °C) boron coating to achieve high quantum efficiency for DUV and VUV radiation because it can create an electrostatic field near the surface that accelerates electrons away from the surface into the silicon layer. In all of these boron-coated back-illuminated image sensors, the boron coating increases the durability of the image sensor by preventing degradation caused by high doses of high-energy radiation (e.g., DUV and / or VUV radiation).

[0012] As described above, silicon-based back-illuminated image sensors for high-energy wafer inspection applications (i.e., using wavelengths below 193 nm) require both a boron layer and an anti-reflection coating. That is, while the boron layer can improve the durability of these image sensors, an anti-reflection coating is required above the boron layer to improve the quantum efficiency of the image sensor by increasing the amount of incident radiation received by the sensor (i.e., by reducing the amount of radiation reflected from the silicon surface before the radiation reaches the detection elements of the sensor). The ideal anti-reflection coating for such boron-coated image sensors would be an anti-reflection coating that can be safely formed above the boron layer and is transparent to wavelengths below 193 nm. Oxide-based anti-reflection coatings are used on boron-coated image sensors for detecting wavelengths above 193 nm, but oxide-based materials increasingly absorb radiation inversely proportional to wavelengths below 193 nm. That is, the absorption of radiation by oxide-based anti-reflection coatings is very high at VUV wavelengths (e.g., 150 nm or lower) because the photon energy at these wavelengths is equal to or exceeds the bandgap of the oxide material. Fluoride-based materials (e.g., magnesium fluoride (MgF2) and calcium fluoride (CaF2)) are used to form anti-reflection coatings on optical elements used at wavelengths below 193 nm due to their higher bandgaps (i.e., compared to oxides). However, using such fluoride-based anti-reflection coatings on boron-coated image sensors is problematic because fluoride-based atoms, ions, and free radicals involved in the deposition process of the fluoride-based material migrate into the boron layer and damage the boron layer, thereby reducing the durability of the image sensor. Other materials (e.g., metals) can be safely deposited on the boron layer without reducing the durability of the image sensor, but are not transparent to wavelengths below 193 nm.

[0013] Accordingly, there is a need for a back-illuminated image sensor that is both durable and capable of sensing UV and / or VUV radiation with high quantum efficiency. Specifically, there is a need for a method for producing a back-illuminated image sensor that overcomes some or all of the above fluoride-on-boron problems, the back-illuminated image sensor combining both the durability provided by a pure boron coating and the low reflectivity to UV / VUV radiation exhibited by a fluoride-based anti-reflection coating. Summary of the Invention

[0014] The present invention relates to a back-illuminated image sensor for deep ultraviolet (DUV) radiation and vacuum ultraviolet (VUV) radiation. The back-illuminated image sensor includes a pure boron coating and a two-part anti-reflection coating disposed on a back side surface of a semiconductor diaphragm (e.g., an epitaxial silicon layer). The two-part anti-reflection coating includes a protective layer disposed on the pure boron coating and a fluoride-based coating disposed on the protective layer. According to one aspect, the protective layer includes at least one of a thin oxide film (e.g., one or more of Al2O3, MgO, La2O3, Li2O, CaO, BeO, and HfO2) and / or a thin nitride film (e.g., one or more of AlN, Li3N, LaN, Mg3N2, HfN, and Ca3N2), wherein a total thickness of the oxide / nitride film is in a range of 0.5 nm to 10 nm. Implementing the protective layer using an oxide / nitride film meeting these specifications provides several advantages over other possible protective layer materials. First, when formed with a thickness of at least 0.5 nm, such an oxide / nitride protective layer can be made thick enough to serve as a diffusion barrier that can impede the migration of fluoride ions / atoms / free radicals from any fluoride-based material (e.g., one of AlF3, MgF2, CaF2, LaF3, LiF, and HfF4) subsequently deposited / formed thereon to the boron coating, thus promoting optimization of the anti-reflection characteristics of the fluoride-based AR coating while avoiding the above-mentioned fluoride-on-boron problem. Second, limiting the total oxide / nitride film thickness to 10 nm minimizes any parasitic absorption of the oxide / nitride protective layer to DUV and / or VUV radiation. Third, such oxide / nitride thin films can be formed on the pure boron coating with high precision, safely and reliably, using several well-established semiconductor manufacturing processes including: physical vapor deposition (PVD) methods such as thermal evaporation or electron beam evaporation; chemical vapor deposition (CVD) methods such as atmospheric pressure chemical vapor deposition (APCVD), plasma-enhanced chemical vapor deposition (PECVD), or low-pressure chemical vapor deposition (LPCVD); atomic layer deposition (ALD), which can also be thermally enhanced or plasma-enhanced; or molecular beam epitaxy (MBE). Fourth, such oxide / nitride thin films provide excellent protection to the underlying pure boron coating, thereby promoting the use of a thinner pure boron coating while increasing production yield and the operational life of the image sensor. Thus, the two-part anti-reflection coating provides both the durability of the pure boron coating and the low reflectivity of the fluoride-based anti-reflection coating to UV / VUV radiation to the back-illuminated image sensor while overcoming some or all of the above-mentioned fluoride-on-boron problems.

[0015] In the presently preferred embodiment, the oxide / nitride protective layer comprises one of an Al2O3 or AlN thin film having a thickness in the range of 0.5 nm and 5 nm (and even more preferably 2 nm or less when process permits) formed on the upper surface of the pure boron coating, and the fluoride-based anti-reflection layer is formed on the Al2O3 or AlN protective layer. The advantage of using Al2O3 and AlN in forming the oxide / nitride protective layer is that both of these materials can be deposited with high precision using well-established ALD processes (i.e., atomic control over thickness). In addition, their scalability and production value on large area wafers (especially Al2O3) are well known. Using ALD to deposit other oxide / nitride materials is less common, but research literature indicates that they can be fabricated with sufficient precision on a smaller (laboratory) scale and may thus be practical in future production. In embodiments utilizing an Al2O3 and / or AlN protective layer, among the various materials listed herein for forming the fluoride-based anti-reflection layer, MgF2 is presently preferred, then CaF2 and then other fluoride-based material options.

[0016] In a generalized embodiment, a method for manufacturing the above-described back-illuminated image sensor comprises: forming a front-side circuit structure on a front (first) surface of a semiconductor diaphragm; then forming a pure boron coating on a back (second) surface of the semiconductor diaphragm; then forming an oxide / nitride protective layer having an initial thickness in the range of 0.5 nm to 50 nm on the pure boron coating; and then forming a fluoride-based anti-reflection coating on the protective layer. By forming an oxide / nitride protective layer between the pure boron coating and the fluoride-based anti-reflection coating, the method facilitates production of a back-illuminated image sensor that exhibits both the durability of the pure boron coating and the low reflectivity to UV / VUV radiation exhibited by the fluoride-based anti-reflection coating while overcoming some or all of the above-mentioned boron fluoride problems.

[0017] In some embodiments, forming the pure boron coating involves depositing amorphous boron on the back surface until a total thickness in the range of 2 nm to 20 nm is achieved. In some embodiments, a high-temperature deposition process is utilized to form a pure boron coating of suitable high quality, which requires completion of front-end circuit elements after the boron formation process (e.g., forming metal interconnects over a previously formed front-side circuit structure). In other embodiments, a high-temperature deposition process can be used to form a pure boron coating of suitable high quality, thereby facilitating completion of front-end circuit elements prior to the boron formation process.

[0018] In some embodiments, forming the protective layer involves directly depositing one or more of Al2O3, MgO, La2O3, Li2O, CaO, BeO, HfO2, AlN, Li3N, LaN, Mg3N2, HfN, and / or Ca3N2 onto the pure boron coating. In alternative embodiments, the oxide / nitride deposition process involves performing one of PVD, CVD, ALD, or MBE deposition processes. The initial thickness of the protective layer (i.e., immediately after deposition and before forming the fluoride-based anti-reflection coating) is determined by the process used to form the fluoride-based anti-reflection coating. In some embodiments, the fluoride-based anti-reflection coating is formed by depositing a fluoride-based material (e.g., AlF3, MgF2, CaF2, LaF3, LiF, and / or HfF4) onto the protective layer using, for example, PVD, CVD, ALD, or MBE deposition processes. In these cases, since the thickness of the protective layer does not change significantly during the formation of the fluoride-based anti-reflection coating, the protective layer is formed with a relatively thin initial thickness (e.g., in the range of 0.5 nm to 10 nm). In other embodiments, the fluoride-based anti-reflection coating is formed using a fluorination process, where the upper region of the protective layer (e.g., the topmost layer) is converted from an oxide / nitride material to a fluoride-based material (i.e., such that the upper portion of the protective layer is used / converted to form the fluoride-based anti-reflection coating) by exposing the protective layer to one or more fluorine-containing gases (e.g., one or more of F2, HF, XeF2, CH3F, SF6, CF4, NbF5, and WF6). In these cases, since the thickness of the protective layer decreases significantly during the formation of the fluoride-based anti-reflection coating, the protective layer is formed with a relatively thick initial thickness (e.g., in the range of 10 nm to 50 nm, depending on the target final thickness of the protective layer and the target final thickness of the fluoride-based anti-reflection coating). In some embodiments, the fluorination process is performed in a plasma chamber to enhance the conversion process.

[0019] The manufacturing methods described herein can be incorporated into the manufacturing processes associated with several types of boron-coated back-illuminated image sensors. For example, the front-side circuit elements can be configured to implement a charge-coupled device (CCD), a complementary metal-oxide semiconductor (CMOS) imager, and / or a photodiode, and include other semiconductor devices (e.g., transistors, diodes, resistors, and capacitors) configured to collectively perform image sensor operations. The manufacturing methods can be used in conjunction with image sensor manufacturing processes where a silicon layer or an SOI structure is partially or fully back-thinned and through-silicon vias are formed before forming the pure boron layer.

[0020] By utilizing any of the fabrication methods mentioned above and / or described in further detail below, the present invention provides a back-illuminated image sensor capable of sensing DUV and VUV radiation (e.g., radiation below 193 nm), exhibiting both a long operational lifetime (i.e., attributed to the pure boron coating) and a high quantum efficiency (i.e., attributed to the fluoride-based AR coating), while overcoming the aforementioned fluoride-on-boron problem (i.e., attributed to the oxide / nitride protective layer). The present invention also relates to a back-illuminated image sensor incorporating at least one fluoride-based anti-reflection coating disposed over at least one pure boron layer, and to an inspection system utilizing such a back-illuminated image sensor.

[0021] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not necessarily restrictive of the invention as claimed. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the general description, serve to explain the principles of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a flow chart showing a simplified back-illuminated image sensor and an associated fabrication method according to an embodiment of the present invention.

[0023] Figure 2 is a flow chart showing a simplified back-illuminated image sensor and an associated high-temperature boron fabrication method according to a specific embodiment of the present invention.

[0024] Figure 3 is a flow chart showing a simplified back-illuminated image sensor and an associated low-temperature boron fabrication method according to a specific embodiment of the present invention.

[0025] Figure 4A , 4B and 4C illustrate exemplary cross-sections of the back surface of a sensor according to another embodiment and describe the formation of a fluoride-based anti-reflection coating over an oxide / nitride protective layer and a pure boron coating.

[0026] Figure 5A , 5B and 5C illustrate another set of exemplary cross-sections of the back surface of a sensor according to another embodiment of the present invention and describe the formation of a fluoride-based anti-reflection coating by partially fluorinating an upper portion of an oxide / nitride protective layer.

[0027] Figure 6A and 6B is a cross-sectional view depicting a simplified exemplary plasma-capable ALD deposition chamber utilized at least during a fluoride-based AR coating deposition process according to another embodiment of the present invention.

[0028] Figure 7A and 7BIs a cross-sectional side view showing a back-thinned diaphragm image sensor on a silicon substrate using partial wafer thinning according to an associated embodiment of the present invention.

[0029] Figure 8 Is a cross-sectional side view showing a back-thinned image sensor on an SOI substrate using full wafer thinning according to another embodiment of the present invention.

[0030] Figure 9 Is a simplified schematic diagram of an inspection system showing the use of any of the back-illuminated image sensors described with reference to Figures 1 to 8 in accordance with another embodiment of the present invention. DETAILED DESCRIPTION

[0031] Although the claimed subject matter will be described in accordance with certain embodiments, other embodiments (including those that do not provide all of the benefits and features set forth herein) are also within the scope of this disclosure. Various structural, logical, process step, and electronic changes may be made without departing from the scope of this disclosure. Accordingly, the scope of this disclosure is defined only by reference to the appended claims.

[0032] The following description is presented to enable one of ordinary skill in the art to make and use the disclosure as provided in the context of a particular application and its requirements. As used herein, directional terms (such as "top," "bottom," "front," "front side," "back side," "above," "below," "on," "up," and "down") are intended to provide relative positions for descriptive purposes and are not intended to specify an absolute reference frame. Those skilled in the art will appreciate various modifications to the preferred embodiments, and the general principles defined herein may be applied to other embodiments. Thus, the disclosure is not intended to be limited to the embodiments shown and described, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0033] Figure 1 Is a flowchart of a method 100 for producing an image sensor 150 configured to sense DUV / VUV radiation according to a generalized embodiment of the present invention. The image sensor 150 is depicted in simplified form at the Figure 1 bottom for reference. Additional details and options related to the method 100 and the image sensor 150 are described below with reference to Figures 2 to 8 C.

[0034] Referring to Figure 1 the block 101 at the top of Figure 1At the bottom of the image sensor 150, front-end circuit elements 171 are formed on the front-side surface 161 of the semiconductor diaphragm 160 using well-known integrated circuit (IC) manufacturing processes (e.g., lithography, deposition, ion implantation, annealing, and etching). As is known in the art, these well-known IC manufacturing processes typically include a front-end process during which non-metal structures are formed in and on a semiconductor material layer (e.g., the surface of a silicon substrate or an epitaxial silicon layer), and a back-end process including forming metal interconnects and other back-end circuit structures. As used herein, the phrase "semiconductor diaphragm" refers to one or more semiconductor material layers (e.g., a monocrystalline silicon substrate and / or one or more stacked epitaxial silicon layers), and the phrase "front-end circuit structure" refers to the generally non-metal structures formed in and on the semiconductor diaphragm during the front-end portion of a typical IC manufacturing process. In contrast, the phrase "front-side circuit element" refers to a finished circuit structure that collectively performs image sensor operations and includes both front-end circuit structures and back-end circuit structures (e.g., metal interconnects and other structures formed during the back-end portion of a typical IC manufacturing process). When completed, the front-side circuit elements include photosensitive devices (e.g., charge-coupled devices (CCDs), complementary metal-oxide semiconductor (CMOS) imagers, and photodiodes), as well as other semiconductor devices (e.g., transistors, diodes, resistors, and capacitors) configured to collectively perform image sensor operations when implementing the image sensor 150 in an inspection system. As described in the specific embodiments referenced below Figure 2 and 3 in some cases, only the front-end circuit structures are formed during the process of block 101, and in other cases, the front-end circuit structures are formed together with the back-end circuit structures to provide finished front-side circuit elements. Thus, at least the front-end circuit structures of the front-side circuit elements are formed during the process of block 101. After completion of the front-side processing, the diaphragm 160 is typically thoroughly cleaned using standard cleanings RCA1 and RCA 2 together with a dilute HF or BHF dip to remove surface contaminants and surface oxides from the surface and to ensure that only a silicon surface or a silicon-hydrogenated surface is exposed during the subsequent processing described below. Optionally, a layer may be formed above the front-end circuit structures 171 for protection during the subsequent processing.

[0035] Next, a pure boron coating 180 is formed on the back (second) surface 162 of the semiconductor diaphragm 160 at least in a position opposite to the active sensor region defined by the position of the front-end circuit structures 171 (block 110). The pure boron coating 180 includes a boron concentration of 80% or higher, with silicon atoms and oxygen atoms that have diffused into each other mainly constituting the remaining 20% or less. In one embodiment, the formation of the pure boron coating 180 involves depositing one or more amorphous pure boron layers on the exposed back surface 162 until the pure boron coating 180 has a total thickness T in the range of 2 nm to 20 nm 180。In an alternative embodiment, a pure boron layer 180 can be formed using one of the following: physical vapor deposition (PVD) methods such as thermal evaporation or electron beam evaporation; chemical vapor deposition (CVD) methods such as atmospheric pressure chemical vapor deposition (APCVD), plasma enhanced chemical vapor deposition (PECVD), or low pressure chemical vapor deposition (LPCVD); atomic layer deposition (ALD) methods, which can be thermally enhanced or plasma enhanced; or molecular beam epitaxy (MBE). In some embodiments, a pure boron coating 180 is formed using a multi-cycle plasma ALD boron deposition process, where multiple plasma ALD cycles are performed to sequentially produce boron nanolayers that together form the pure boron coating 180. This multi-cycle plasma ALD boron deposition process is described in the co-owned and co-pending U.S. Patent Application Publication No. 2022 / 0254829, titled "Back Illuminated Sensor with Boron Layer Deposited Using Plasma Atomic Layer Deposition," which is incorporated herein by reference.

[0036] A two-part anti-reflection coating 181 is then provided over the pure boron coating 180 by forming a protective layer 182 over the pure boron coating 180 (i.e., such that the pure boron coating 180 is between the protective layer 182 and the semiconductor diaphragm 160; block 120), and then forming a fluoride-based anti-reflection (AR) coating 185 over the protective layer 182 (i.e., such that the protective layer 182 is between the fluoride-based AR coating 185 and the pure boron coating 180; block 130).

[0037] Referring to block 120, the formation of the protective layer 182 involves forming one of an oxide film and a nitride film over the pure boron coating 180, where the oxide / nitride film has a minimum thickness T of about 0.5 nm 182 (i.e., when properly fabricated, an oxide / nitride film having this minimum thickness can substantially impede the migration of fluoride ions from the subsequently formed fluoride-based AR coating 185 to the pure boron layer 180, thereby protecting the pure boron coating 180 from the subsequently formed fluoride-based AR coating 185). In one embodiment, the protective layer 182 is formed by depositing at least one of Al2O3, MgO, La2O3, Li2O, CaO, BeO, HfO2, AlN, Li3N, LaN, Mg3N2, HfN, and Ca3N2 on the upper surface 180U of the pure boron coating 180 using one of the PVD, CVD, ALD, or MBE methods mentioned above. The final maximum thickness T of the protective layer 182 182Preferably limited to 10 nm or less to minimize absorption of the selected oxide / nitride material to DUV / VUV radiation. In some embodiments, such as when forming the fluoride-based AR layer 185 using the fluorination process described below with reference to Figures 5A to 5C the protective layer 182 may be formed with an initial thickness of up to 50 nm, provided that the fluorination process converts a sufficient amount of the oxide / nitride film to produce a final protective layer thickness T preferably in the range of 0.5 nm and 10 nm 182 . In some higher wavelength DUV applications (e.g., above 170 nm), absorption through the oxide / nitride material may be negligible, allowing a thickness of up to 50 nm. That is, when the two-part antireflection coating 181 is designed for the long wavelength end of DUV or VUV (e.g., wavelengths in the range from about 170 nm to about 250 nm), the optical properties of the thicker oxide / nitride protective layer 182 (e.g., up to 50 nm) can be used to further reduce reflectivity (i.e., in combination with the fluoride-based antireflection coating 185).

[0038] Referring to block 130, in an alternative exemplary embodiment, formation of the fluoride-based AR coating 185 involves depositing a fluoride-based material or converting the oxide / nitride material to a fluoride-based material using a fluorine-containing gas. In some embodiments (e.g., as described below with reference to Figures 4A to 4C ), the fluoride-based AR coating 185 is formed by depositing a selected fluoride-based material (e.g., at least one of AlF3, MgF2, CaF2, LaF3, LiF, and HfF4) onto the protective layer 182. In other embodiments (e.g., as described below with reference to Figures 5A to 5C ), a fluoride-based material is formed by converting an upper region portion of the oxide / nitride material forming the protective layer 182 to fluoride (e.g., by exposing the oxide / nitride material to one or more fluorine-containing gases such as F2, HF, XeF2, CH3F, SF6, CF4, NbF5, or Wf6). In either case, the fluoride-based AR coating 185 is formed such that its final thickness T 185 minimizes reflection from the image sensor 150 at the DUV / VUV wavelengths of interest (e.g., in the range of 2 nm and 40 nm).

[0039] After completion of the formation of the pure boron coating 180 and the two-part antireflection coating 181, additional processing (block 140) is performed to complete the fabrication and packaging of the image sensor 150. For example, as shown by Figure 2As indicated by the image sensor 150A shown at the bottom, in some embodiments, additional processing may include completing the fabrication of the front-end circuit elements 170A by forming the back-end interconnects 172A on the front-end circuit structure 171A. Figure 2 and 3 including a flowchart that further details the method 100 of manufacturing an image sensor ( Figure 1 ), wherein Figure 2 depicts a first alternative method 100A that utilizes a high-temperature boron formation process, and Figure 3 depicts a method 100B that utilizes a low-temperature boron formation process. It should be noted that like reference numerals are used in these figures to indicate like processes and features, and the suffixes "A" and "B" are appended to the ends of the reference numerals to identify the specific process / feature under consideration. A similar numbering method is utilized in the additional embodiments described below with reference to Figures 4A to 8 .

[0040] Referring to the top of Figure 2 , method 100A generally begins by forming the front-side circuit structure 171A on the front-side surface 161A of the semiconductor diaphragm 160A using standard semiconductor processing steps including lithography, deposition, ion implantation, annealing, and etching. Referring to the image sensor 150A, the semiconductor diaphragm 160A includes a silicon epitaxial (epi) layer 163A and a single-crystalline or polycrystalline silicon substrate 165A, wherein the downward-facing surface of the epitaxial layer 163A defines the front-side surface 161A of the semiconductor diaphragm 160A, and the upward-facing surface of the substrate 165A defines the back-side surface 162A of the diaphragm 160B. In alternative embodiments, the front-side circuit structure 171A is configured to implement CCD or CMOS sensor elements and devices. In one embodiment, the epitaxial layer 163A has a thickness of about 10 μm to 40 μm. In a preferred embodiment, both the epitaxial layer 163A and the substrate 165A are doped with a p-type dopant (e.g., boron), wherein the epitaxial layer 163A has a much lower dopant concentration than the substrate 165A (e.g., such that the epitaxial layer 163A has a resistivity in the range of 10 Ωcm to 2000 Ωcm and the substrate 165A has a resistivity of less than about 1 Ωcm). It should be noted that only the front-side circuit structure 171A (e.g., polysilicon interconnects) is formed at this stage, and the metal interconnects 172A required to complete the front-end circuit elements 170A are not formed at this time because the metal would be damaged in subsequent high-temperature processing steps.

[0041] A protective layer (block 102A) is then formed over the front-side surface 161A. In one embodiment, the protective layer (not shown) can be formed by depositing one or more protective materials on top of the front-side circuit structure 171A. The one or more protective materials may include silicon dioxide, silicon nitride, or other materials.

[0042] In some embodiments, the wafer including the diaphragm 160A is thinned from the back side to expose the epitaxial layer 163A at least in the active sensor region (block 104A). This step may involve polishing, etching, or both. In some embodiments, the entire wafer is back-thinned using known techniques. In other embodiments, only the active sensor region is thinned until the epitaxial layer.

[0043] Next, the back side surface is cleaned and prepared for boron deposition / formation (block 108A). During this cleaning process, native oxide and any contaminants (including organics and metals) should be removed from the exposed back side surface (i.e., the surface exposed during the thinning process of block 104A). In one embodiment, this cleaning can be performed using a diluted HF solution or using an RCA cleaning process. After cleaning, the wafer can be dried using Marangoni drying techniques or similar techniques to dry the surface and leave no wafer marks. In a preferred embodiment, the wafer is protected in a controlled environment (e.g., in a vacuum environment or in an environment flushed with dry inert gas such as nitrogen) during the thinning and cleaning / preparation processes to minimize the regrowth of native oxide after cleaning.

[0044] Next, an amorphous pure boron layer is deposited on the exposed back side surface using a high-temperature boron deposition process (block 110A). In a preferred embodiment, this deposition can be performed using a mixture of diborane and hydrogen at a temperature of about 700 °C to 800 °C to produce a high-purity amorphous boron layer. In a preferred embodiment, the thickness of the amorphous boron layer is between 2 nm and 20 nm. The minimum thickness is typically limited by the trade-off between the need for a pinhole-free uniform film and the absorption of boron for the photons of interest. In a preferred embodiment, before boron deposition, the wafer can be held at a high temperature in a reducing environment (such as diluted hydrogen or low-pressure hydrogen) for a few minutes to remove any native oxide layer that may have regrown after the back-thinning process while the wafer is maintained in the same chamber used for boron deposition. In a preferred embodiment, the temperature is approximately 800 °C for less than 5 minutes, and the boron deposition process is immediately performed in the same chamber.

[0045] Next, a two-part AR coating 181A is formed above the pure boron coating 180A using any of the processes described above with reference to blocks 120 and 130 ( Figure 1 )). That is, an oxide / nitride protective layer 182A is formed on the pure boron coating 180A (block 120A), and then a fluoride-based AR coating 185A is formed in or on the protective layer 182A (block 130A).

[0046] Next, perform the processes associated with the completion of the image sensor 150 (block 141A). In one embodiment, these processes include removing or patterning the front-side protective layer to facilitate the fabrication of metal interconnects 172A on the front-side circuit structure 171A. In some embodiments, this removal / patterning can include various wet etching and dry etching processes and photolithographic patterning steps. The metal interconnects 172A can be formed using one or more of Al, Cu, or another metal. After the interconnect fabrication is complete, a passivation layer can be deposited on the front-side surface to protect the finished image sensor 150A.

[0047] In some embodiments, after the fluoride-based AR coating formation process (block 130A), the protective layer formation process (block 120A) and the completion of the image sensor (block 141A) can be performed in the Figure 2 order indicated. In alternative embodiments, the protective layer formation process (block 120A) and the fluoride-based AR coating formation process (block 130A) are after the completion of the image sensor (block 141A). In other alternative embodiments, the completion of the image sensor (block 141A) can be performed after the protective layer formation process (block 120A), and then the fluoride-based AR coating formation process (block 130A) can be performed after the completion of the image sensor (block 141A).

[0048] After the front-end circuit elements 170A are completed, the image sensor 150A is packaged. This packaging process can include flip-chip bonding or wire bonding of the chip to a substrate. The package can include a window that transmits the wavelength of interest or can include a flange or seal for an interface with a vacuum seal.

[0049] Figure 3 Describe a method 100B for producing an image sensor 150B on a semiconductor diaphragm 160B using a low-temperature (i.e., at or below 450 °C) boron layer formation process (see the Figure 3 bottom of). Referring to the image sensor 150B, the semiconductor diaphragm 160B includes a lightly doped epitaxial layer 163B that defines a front-side surface 161B and a highly p-doped epitaxial layer 165B that defines a back-side surface 162B. Other structural features and resistivity of the diaphragm 160B are similar to those described above with reference to the diaphragm 160A ( Figure 2 ).

[0050] Next, as indicated in block 101B, a completed front-end circuit element 170B (i.e., both the front-end circuit structure 171B and the metal interconnects 172B) is created on the front-side surface 161B of the p-epitaxial layer 163B using standard semiconductor processing steps such as lithography, deposition, ion implantation, annealing, and etching. Charge-coupled device (CCD) and / or CMOS sensor elements and devices may also be created during the fabrication of the front-end circuit element 170B. Note that at this time, both the front-side circuit structure 171A (e.g., polysilicon interconnects) and the metal interconnects 172A can be formed, as the subsequent low-temperature processing will not damage the metal interconnects.

[0051] In some embodiments, one or more protective layers (e.g., silicon dioxide, silicon nitride, or other materials) are then deposited on the front-end circuit element 170B (block 102B). This protection may include attaching the wafer containing the diaphragm 160B to a handling wafer (not shown) (e.g., a silicon wafer, a quartz wafer, or a wafer made of other materials). The handling wafer may include through-wafer vias for connection to the circuit elements.

[0052] Next, the wafer is thinned from the back side to expose the epitaxial layer at least in the active sensor region. This process may involve polishing, etching, or both. In some embodiments, the entire wafer is back-thinned. In other embodiments, only the active sensor region is thinned down to the epitaxial layer.

[0053] Next, the diaphragm 160B is cleaned and prepared for the formation of the pure boron coating 180B. During this cleaning / preparation process, native oxide and any contaminants (including organics and metals) should be removed from the back-side surface. In one embodiment, this cleaning can be performed using a diluted HF solution or using an RCA cleaning process. After cleaning, the wafer can be dried using Marangoni drying techniques or similar techniques to leave the surface dry and free of wafer marks. In a preferred embodiment, the wafer is protected in a controlled environment (e.g., in a vacuum environment or in an environment flushed with dry inert gas (e.g., nitrogen)) during the back-thinning and cleaning / preparation processes to minimize the regrowth of native oxide after cleaning.

[0054] Next, a pure boron coating 180B is formed by depositing an amorphous pure boron layer on the exposed dorsal surface using a low temperature boron deposition process (block 110B). In some embodiments, a p+(second) epitaxial layer 165B is formed on the p-epitaxial layer 163B by growing epitaxial silicon on the exposed dorsal surface using a low temperature epitaxial growth process while doping a second epitaxial silicon layer with boron during the epitaxial growth process. Next, an amorphous pure boron layer is deposited above the second epitaxial layer 165B. In a preferred embodiment, the second epitaxial silicon layer 165B and the amorphous boron layer are deposited at 450 °C or below 450 °C so as not to damage the metal contacts on the front side. In a preferred embodiment, the thickness of the second boron-doped epitaxial layer and the amorphous boron layer is in the range of 2 nm to 20 nm.

[0055] Next, a two-part AR coating 181B is formed above the pure boron coating 180B using any of the processes described above with reference to blocks 120 and 130 ( Figure 1 ). That is, an oxide / nitride protective layer 182B (block 120B) is formed on the pure boron coating 180B, and then a fluoride-based AR coating 185B (block 130B) is formed in or on the protective layer 182B. After forming the two-part AR coating 181B as described above, the front side protective layer is removed, the wafer is diced and then the individual image sensor 150B is packaged using known techniques for operation (block 145B). The packaging may include flip-chip bonding or wire bonding of the chip to a substrate. The packaging may include a window that transmits the wavelength of interest or may include a flange or seal for an interface with a vacuum seal or a purge gas seal.

[0056] Figures 4A to 4C Depicts relevant manufacturing stages associated with the production of the image sensor 150C, where a fluoride-based AR coating 185C is formed by depositing one or more boron material layers above the oxide / nitride protective layer 182C. Figures 4A to 4C The layer thicknesses depicted in are not drawn to scale and are provided for illustrative purposes only. In these figures, for the purpose of explaining the relevant concepts, the interfaces are depicted as flat, but in the sensor, the Si surface can be rough, on the scale of nm to microns, and the oxide or nitride protective layer and the fluoride-based AR layer can be deposited in a similar manner. It is also possible that in some embodiments represented by 4B, due to the intermixing of the oxide or nitride and the fluoride layer during the fluoride deposition process, the interface between the protective layer and the fluoride layer can have several mixed fluoroxide or nitrofluoride-type compound layers.

[0057] Figure 4AAn image sensor 150C depicting time T10 after a pure boron coating 180C has been formed over the back (second) surface 162C of a diaphragm 160C. The image sensor 150C includes a very lightly p-doped bulk epitaxial silicon layer 163C and a heavily p-doped layer 165C. In some embodiments, the silicon layer 165C is formed by means of an annealing step after boron deposition, the annealing step causing boron atoms to heavily p-dope a portion of the epitaxial silicon located adjacent to the back surface 162C. In another embodiment, the silicon layer 165C represents a low-temperature heavily p-doped epitaxial silicon layer grown prior to forming the pure boron coating 180C using a low-temperature boron deposition process. The heavily p-doped material forming the silicon layer 165C can be crystalline or polycrystalline and can have a thickness in the range of a few nm to approximately 100 nm. The boron material 503C used to form the pure boron layer 180C can be deposited using a high-temperature process (e.g., greater than 450 °C) or a low-temperature process (e.g., less than or equal to 450 °C), and can include one or more amorphous boron layers having a total thickness T in the range of 2 nm to 20 nm. 180C One or more amorphous boron layers.

[0058] Figure 4B An image sensor 150C depicting time T11 after an oxide and / or nitride material 513C has been deposited over the pure boron layer 185C to form a protective layer 182C. In some embodiments, the oxide / nitride protective layer 182C is formed by forming a thin film including one or more of Al2O3, MgO, La2O3, Li2O, CaO, BeO, HfO2, AlN, Li3N, LaN, Mg3N2, HfN, and Ca3N2. In some embodiments, the oxide / nitride thin film is formed using one of various deposition methods, including but not limited to: physical vapor deposition (PVD) methods such as thermal evaporation or electron beam evaporation; chemical vapor deposition (CVD) methods such as atmospheric pressure chemical vapor deposition (APCVD), plasma-enhanced chemical vapor deposition (PECVD), or low-pressure chemical vapor deposition (LPCVD); atomic layer deposition (ALD), which can also be thermally enhanced or plasma-enhanced; or molecular beam epitaxy (MBE). In the present embodiment, the protective layer 182C is formed to have a total thickness T in the range of 2 nm to 10 nm. 182C(T11) . In a preferred embodiment, due to the required atomic-level control of the oxide thickness, the protective layer 182D is formed by depositing Al2O3 using an ALD process. As mentioned above, the oxide / nitride protective layer 183C is used to protect the pure boron coating 180C during subsequent fluoride anti-reflection coating processes, thereby preventing boron loss and pinhole formation.

[0059] Figure 4CAn image sensor 150C is depicted at time T12 after a fluoride material 513C has been deposited in a manner such that a fluoride-based AR layer 185C is produced over an oxide / nitride protective layer 182C. In some embodiments, the fluoride deposition process is performed using one or more of AlF3, MgF2, LaF2, LiF, or CaF2 and one of a variety of deposition methods, including but not limited to: physical vapor deposition (PVD) methods such as thermal evaporation or electron beam evaporation; chemical vapor deposition (CVD) methods such as atmospheric pressure chemical vapor deposition (APCVD), plasma-enhanced chemical vapor deposition (PECVD), or low-pressure chemical vapor deposition (LPCVD); atomic layer deposition (ALD), which may also be thermally enhanced or plasma-enhanced; or molecular beam epitaxy (MBE). In a preferred embodiment, the fluoride-based layer is deposited via atomic layer deposition or ion beam sputtering deposition at a temperature at or below 450 °C. The fluorination process is carried out until the total thickness T of the resulting fluoride-based AR coating 185C 185C corresponds to the thickness that minimizes reflection for the DUV / VUV wavelengths of interest.

[0060] Figures 5A to 5C Depicts relevant manufacturing stages associated with the production of an image sensor 150D, which utilizes a fluorination process to produce a fluoride-based AR coating 185D by transforming the upper region of a protective layer 182D. Figures 5A to 5C The layer thicknesses depicted in these figures are not drawn to scale and are provided for illustrative purposes only. In these figures, for the purpose of explaining the relevant concepts, the interfaces are depicted as flat, but in a sensor, the Si surface can be rough, on the scale of nm to microns, and the oxide or nitride protective layer and the fluoride-based AR layer can be deposited in a similar manner. It is also possible that in some embodiments represented by 5B, due to the intermixing of the oxide or nitride and the fluoride layer during the fluorination process, the interface between the protective layer and the fluoride layer can have several mixed fluoro-oxide or nitro-fluoride type compound layers.

[0061] Figure 5AAn image sensor 150D depicting time T20 after a pure boron coating 180D has been formed over the back (second) surface 162D of a diaphragm 160D. The image sensor 150D includes a very lightly p-doped bulk epitaxial silicon layer 163D and a heavily p-doped layer 165D. In some embodiments, the silicon layer 165D is formed by means of an annealing step after boron deposition, the annealing step causing boron atoms to heavily p-dope a portion of the epitaxial silicon located adjacent to the back surface 162D. In another embodiment, the silicon layer 165D represents a low-temperature heavily p-doped epitaxial silicon layer grown before forming the pure boron coating 180D using a low-temperature boron deposition process. The heavily p-doped material forming the silicon layer 165D can be crystalline or polycrystalline and can have a thickness in the range of several nm to approximately 100 nm. The boron material 503D used to form the pure boron layer 180D can be deposited using a high-temperature process (e.g., greater than 450 °C) or a low-temperature process (e.g., less than or equal to 450 °C), and can include one or more amorphous boron layers having a total thickness T in the range of 2 nm to 20 nm. 180D One or more amorphous boron layers.

[0062] Figure 5B An image sensor 150D depicting time T21 after an oxide and / or nitride material 513D has been deposited over the pure boron layer 185D to form a protective layer 182D. In some embodiments, the oxide / nitride protective layer 182D is formed by forming a thin film including one or more of Al2O3, MgO, La2O3, Li2O, CaO, BeO, HfO2, AlN, Li3N, LaN, Mg3N2, HfN, and Ca3N2. In some embodiments, the oxide / nitride thin film is formed using one of various deposition methods, including but not limited to: physical vapor deposition (PVD) methods such as thermal evaporation or electron beam evaporation; chemical vapor deposition (CVD) methods such as atmospheric pressure chemical vapor deposition (APCVD), plasma-enhanced chemical vapor deposition (PECVD), or low-pressure chemical vapor deposition (LPCVD); atomic layer deposition (ALD), which can also be thermally enhanced or plasma-enhanced; or molecular beam epitaxy (MBE). In the present embodiment, since the upper region of the oxide / nitride thin film is to be converted by means of a fluorination process (e.g., as described below with reference to Figure 5C ? The protective layer 182C is formed to have a total thickness T in the range of 10 nm to 50 nm 182C(T21) (i.e., to ensure that an appropriately thick oxide / nitride layer will remain after completion of the fluorination process). In a preferred embodiment, due to the required atomic-level control of the oxide thickness, the protective layer 182D is formed by depositing Al2O3 using an ALD process.

[0063] Figure 5C It should be noted that there seems to be a missing reference in where it says "as described below with reference to Figure 5C ", which makes the translation a bit unclear at that point. Also, it's not clear what the "?" in the translation of is supposed to be. You may want to check and correct the original text for a more accurate translation.An image sensor 150D depicting time T22 after a fluorination process has been utilized to convert an upper region of a protective layer 182D into a fluoride-based AR coating 185D. In some embodiments, the fluorination process is achieved by exposing the oxide / nitride material forming the protective layer 182D to a fluorine-containing gas 523D (e.g., F2, HF, XeF2, CH3F, SF6, CF4, NbF5, or Wf6). In some embodiments, the fluorine-containing gas may be mixed with other gases (e.g., O2, Ar, and N2) to enhance the fluorination process. In some embodiments, the fluorination process may include a plasma process (e.g., the plasma process described below with reference to Figure 6A and 6B ) to generate a fluorine-containing plasma in order to accelerate the reaction at a relatively lower temperature compared to the case without plasma. In all cases, exposing the protective layer 182F to the gas 523D causes the fluoride to diffuse / migrate substantially uniformly from top to bottom into the oxide / nitride material (i.e., such that the fluorination process proceeds gradually in the -Y axis direction, thereby converting the upper region of the protective layer 182F from oxide / nitride to a fluoride-based material). The time and temperature for the fluorination process are selected such that the thermal budget for the behavior of the image sensor circuit components does not deviate from the expected behavior by more than a tolerance limit determined by the application. For example, when using method 100B ( Figure 3 ), since the fluorination process is implemented after front-end metallization, the maximum temperature utilized during the fluorination process is preferably equal to or less than 450 °C. The typical temperature for performing the fluorination process is less than 500 °C. The duration of the fluorination process is determined by various factors, such as the selected process conditions, the rate at which the selected oxide / nitride material is converted to fluoride, the target thickness T 185D of the resulting fluoride-based AR coating 185D and the target final thickness T 182D(T22) of the oxide / nitride layer forming the protective layer 182D. The target thickness T 185D of the resulting fluoride-based AR coating 185D is preferably selected to correspond to the thickness that minimizes reflection for the DUV / VUV wavelengths of interest.

[0064] Figure 6A and 6B respectively show exemplary deposition systems 600E and 600F, which can be used to perform the fluorination process described above with reference to Figure 5C using a plasma process. The exemplary systems 600E and 600F are greatly simplified and provided for illustrative purposes only, and the features mentioned below are not intended to be restrictive unless specifically recited in the claims. That is, those skilled in the art will recognize that a plasma-capable deposition chamber suitable for performing the fluorination process may include other components in addition to Figure 6A and 6BFeatures other than those depicted.

[0065] Reference Figure 6A , system 600E includes a plasma-capable deposition chamber 610E, a gas flow system 620E, and a plasma generation system 630E. The deposition chamber 610E includes a chamber wall 611E surrounding a processing region 612E. The gas flow system 620E includes a gas delivery controller 621E configured to control the flow of plasma gas and fluorine-containing gas into the processing region 612E. The plasma generation system 630E includes a plasma generator 631E connected to a plasma controller 635E by means of a conductor 633E. To perform the fluorination process, a partially formed image sensor 150E is placed in the deposition chamber 610E, where a diaphragm 160E is mounted on a stage (support structure) 613E. The diaphragm 160E has a downward-facing first surface 161E (i.e., such that the circuit structure 171E is disposed between the diaphragm 160E and the stage 613E), and an upward-facing second surface 162E towards the plasma generator 631E. In some embodiments, a pure boron coating 180E and an oxide / nitride protection layer 182E have been previously formed above the second surface 162E before the diaphragm 160E is placed on the stage 613E. In other embodiments, the diaphragm 160E is placed on the stage 613 after the circuit structure 171E is fabricated, and the system 600E can be used to perform cleaning and the formation of the pure boron coating 180E and the protection layer 182E before starting the fluorination process. The fluorination process begins by using the gas delivery system 620E to generate an air flow 623E through a gas inlet 614E (indicated by the dashed arrow) and using the plasma generation system 630E to generate a plasma above the protection layer 182E using the plasma gas contained in the air flow 623E. In some embodiments, the air flow 623E also includes a fluorine-containing gas, and in other embodiments, a fluorine-containing gas can also be introduced into the processing region 612E through an optional gas inlet 615E to facilitate an optimized fluorination formulation. In some embodiments, the stage 613E rotates under the resulting plasma and is grounded or biased to a certain voltage to adjust the plasma fluorination formulation. The plasma and the air flow are maintained until a sufficient amount of the oxide / nitride material forming the protection layer 182E is fluorinated (converted to a fluoride-based AR coating 185E), but the fluorination process terminates before the protection layer 182E is completely consumed (i.e., such that after the fluorination process is completed, a properly thick oxide / nitride protection layer 182E separates the pure boron layer 180E from the fluoride-based AR coating 185E).

[0066] Figure 6BShow a second exemplary chamber 600F of a plasma-capable deposition chamber 610F that includes a surround processing region 612E, the processing region 612E containing a stage (substrate holder) 613F on which a partially formed image sensor 150F is placed in the manner described above. To perform a fluorination process, a gas delivery controller 621E controls the flow of plasma gas and fluorine-containing gas into the processing region 612E and through one or more pores formed in an electrode 631F, and a plasma controller 635F biases the electrode 631F relative to the stage 613F that acts as a second electrode (e.g., using a plasma voltage V P ), to generate a capacitively coupled plasma 637F above the diaphragm 160F. In some embodiments, the stage 613F rotates the diaphragm 160F under the plasma 637F, and / or the fluorine-containing gas may be mixed with Ar, O2, and N2 for plasma generation and / or fluorination process purposes. The plasma and gas flow are maintained until a suitably thick fluoride-based AR coating 185F is formed that is separated from the pure boron layer 180F by a thin oxide / nitride protective layer 182F.

[0067] Figure 7A and 7B Show cross-sectional schematic views of partially back-thinned image sensors 150G and 150H fabricated according to additional alternative embodiments.

[0068] Refer to Figure 7A, an image sensor 150G is fabricated on a diaphragm 160G that includes a lightly p-doped (p-) epitaxial silicon layer 163G formed directly on a single-crystalline or polycrystalline silicon substrate 167G. A front-end circuit structure 171G is fabricated on a front-side surface 161G of the epitaxial layer 163G and then covered by a protective layer (not shown). Next, a portion of the silicon substrate 167G positioned above the active sensor region is back-thinned to expose a portion of the p-doped epitaxial silicon layer 163G, wherein the exposed portion of the p-doped epitaxial silicon layer 163G forms a back-side (second) surface 162G of the semiconductor diaphragm 160G. Next, a pure boron coating 180G is formed on the back-side surface 162G, then an oxide / nitride protective layer 182G is formed above the pure boron coating 180C, and then a high-temperature drive-in process is performed to create a highly boron-doped (p+) back-side (second) epitaxial region 165G to provide a high back-surface conductivity. Next, metal interconnects 172G are formed on the front-end circuit structure 171G to complete the front-end circuit elements 170G, and then a fluoride-based anti-reflection coating 185G is formed on the oxide / nitride protective layer 182G to reduce reflection and thus enhance the quantum efficiency of the image sensor 150G for DUV and VUV wavelengths. Additional details related to the formation of the image sensor 150G are described in U.S. Patent No. 9,496,425 to Chern et al., "Back-Illuminated Sensor With Boron Coating", which is incorporated herein by reference.

[0069] Reference Figure 7B , an image sensor 150H is fabricated on a silicon-on-insulator (SOI) structure using a low-temperature fabrication method. Because low-temperature processing is used during subsequent processing, completed front-end circuit elements 170H (i.e., both the front-end circuit structure 171H and the metal interconnects 172H) are formed on a front-side surface 161H of a lightly p-doped epitaxial layer 163H grown on a thin top silicon substrate 165H of the SOI. It should be noted that the top silicon substrate 165HD is highly boron-doped prior to growing the p-epitaxial layer 163H to obtain a high back-surface conductivity. Next, a partial back-thinning of the handle substrate 167H and the oxide layer 169H of the SOI is performed to expose a portion of the back-side surface 162H of the top silicon substrate 165H. Next, a pure boron coating 180H is formed on the exposed back-side surface 162H using a low-temperature (<450 °C) plasma ALD boron coating formation process for long exposure lifetimes, then an oxide / nitride protective layer 182J is formed on the pure boron coating 180D, and then a fluoride-based anti-reflection coating 185D is formed for enhancing the quantum efficiency. Sensor 150H and sensor 150G ( Figure 7A)The main difference is that the sensor 150H retains a portion of the oxide layer 169H of the original SOI structure that is between the retained portion of the disposed silicon substrate 167H and the p+ silicon substrate 165H. That is, the p-epitaxial layer 163H and the p+ silicon substrate 165H form the effective semiconductor diaphragm 160H of the image sensor 150H, where the retained oxide portion 169H and the retained disposed substrate portion 167H are attached to the diaphragm 160H above the inactive sensor regions. Additional details for manufacturing the sensor 150H are provided, for example, in U.S. Patent No. 11,848,350 to Haddidi et al., "Back-Illuminated Sensor And A Method Of Manufacturing A Sensor Using A Silicon On Insulator Wafer", the entire text of which is incorporated herein by reference.

[0070] Figure 8 Another image sensor 150J is shown having a pure plasma ALD boron coating 180J formed on an SOI substrate using a low temperature manufacturing method, as described above with reference to Figure 7BIn the example described, the top silicon substrate 165J of the SOI is highly boron-doped to obtain a high back-surface conductivity, and then a lightly p-doped epitaxial layer 163J is grown on the top silicon substrate 165J of the SOI. The completed front-end circuit elements 170J (i.e., both the front-end circuit structure 171J and the metal interconnects 172J) are formed on the front-side surface 161J of the epitaxial layer 163J. In this embodiment, through-silicon vias 198J are formed in the p+-layer top silicon substrate 165J and the p-epitaxial layer 163J to provide an electrical connection between the back-side surface 162J and the front-end circuit elements 170J. Next, a full-wafer thinning process is performed to remove the entire SOI handling substrate and the oxide layer (not shown), thereby forming the semiconductor diaphragm 160J of the image sensor 150J through the p-epitaxial layer 163J and the p+ silicon substrate 165J. Since the image sensor 150J is fabricated using full-wafer thinning, the method includes bonding the handling substrate 195J to the front-side surface after fabricating the front-end circuit elements 170J and forming a protective layer 197J above the circuit elements 170J. After completing the back-side processing, the handling substrate 195J and the protective layer 197J are removed, and the back-side processing includes forming a pure boron coating 180J on the highly p-doped epitaxial layer 163J using a low-temperature (<450 °C) plasma ALD boron layer formation process, then forming an oxide / nitride protective layer 182J above the pure boron coating 180E, and then forming a fluoride-based anti-reflection coating 185J to obtain long-term stability and a higher quantum efficiency at DUV and VUV wavelengths. In some embodiments, portions of the pure boron coating 180J and the highly doped epitaxial layer 163J are etched / removed to expose the lower ends of the through-silicon vias 198J to facilitate front-side / back-side connections. Additional manufacturing process details for forming the image sensor 150J on the SOI substrate are described, for example, in U.S. Patent No. 11,848,350 cited above. Alternatively, the sensor 150J can be formed on a silicon substrate using the details provided, for example, in U.S. Patent No. 9,496,425 cited above.

[0071] Figure 9 Illustrate an exemplary inspection or metrology system 900 configured to inspect or measure a semiconductor manufacturing-related sample 908 (e.g., a silicon wafer, a reticle, or a photomask) using an image sensor 150 configured according to the present invention. The system 900 generally includes an illumination (light) source 902, a detector assembly 904, and a stage 912.

[0072] The illumination source 902 is preferably configured to generate (emit) deep UV (DUV) and / or vacuum UV (VUV) incident light (radiation) L having a wavelength in the range of 100 nm to 300 nm IN, but can be configured to generate light having a wavelength less than 100 nm (e.g., 13.5 nm for future EUV lithography) or greater than 300 nm. In some embodiments, the illumination source 902 utilizes one or more light sources LS and one or more optical components (e.g., frequency converters) to generate the incident light L IN . In one embodiment, the illumination source 902 may include a continuous light source, such as an arc lamp, a laser-pumped plasma source, or a continuous wave (CW) laser. In another embodiment, the illumination source 902 may include a pulsed light source, such as a mode-locked laser, a Q-switched laser, or a plasma source pumped by a mode-locked or Q-switched laser. Suitable light sources that may be included in the illumination source 902 are described in U.S. Patent No. 7,705,331 to Kirk et al. titled "Methods and systems for providing illumination of a specimen for a process performed on the specimen", U.S. Patent No. 9,723,703 to Bezel et al. titled "System and method for transverse pumping of laser-sustained plasma", and U.S. Patent No. 9,865,447 to Chuang et al. titled "High brightness laser-sustained plasma broadband source". These patents are incorporated herein by reference.

[0073] The stage 912 is configured to receive the sample 908 and facilitate movement of the sample 908 relative to the optical system 903 (i.e., such that the optical system 903 focuses the incident light L IN onto different regions of the sample 908 and directs the reflected / scattered light from different regions to the detector assembly 904). The stage 912 may include an X-Y stage or an R-θ stage. In one embodiment, the stage 912 may adjust the height of the sample 908 during inspection to maintain focus. In another embodiment, the optics 903 may be adjusted to maintain focus.

[0074] The optical system (optics) 903 includes a plurality of optical components and other optical components configured to direct and focus the incident light L IN onto the sample 908 and direct the reflected (including scattered) light L R / S from the sample 908 to the detector assembly 904.Figure 9 Exemplary optical components of the optical system 903 described in Figure 9 include an illumination tube lens 903-1, an objective lens 903-2, a condenser tube lens 903-3, a condenser lens 903-4, and a beam splitter 903-5. During operation of the system 900, incident light L leaving the illumination source 902 IN is directed by the condenser lens 903-4 and the illumination tube lens 903-1 to the beam splitter 903-5, which directs the incident light L IN downward through the objective lens 903-2 onto the sample 908. The reflected / scattered light L R / S represents the portion of the incident light L that is reflected and / or scattered in the upward direction by the surface features of the sample 908 into the objective lens 903-2 and is directed by the objective lens 903-2 and the condenser tube lens 903-3 to the detector assembly 904. IN portion.

[0075] The detector assembly 904 includes one or more of the image sensors 150 fabricated using any of the methods described herein. In alternative embodiments, the sensor 150 includes a back-illuminated CCD sensor, a back-illuminated CMOS sensor, and an electron-bombarded image sensor incorporating a back-thinned solid-state image sensor. The image sensor 150 may include a two-dimensional array sensor or a one-dimensional line sensor. In one embodiment, the output of the detector assembly 904 is provided to a computing system 914 that analyzes the output. The computing system 914 may be configured by program instructions 918 stored on a carrier medium 916. In some embodiments of the inspection system 900 incorporating a Q-switched laser, the image sensor 150 or the sensor 150 within the detector assembly 904 is synchronized with the laser pulse. In such embodiments, the image sensor 150 may operate in the TDI mode during the laser pulse and data may then be read out through multiple outputs on both sides of the sensor during the middle of the laser pulse. Some embodiments of the inspection system illuminate a line on the sample and collect scattered and / or reflected light in one or more dark-field and / or bright-field collection channels. In such embodiments, the image sensor 150 may be a line sensor or an electron-bombarded line sensor. Some embodiments of the inspection system illuminate multiple light spots on the sample and collect scattered and / or reflected light in one or more dark-field and / or bright-field collection channels. In such embodiments, the image sensor 150 may be a two-dimensional array sensor or an electron-bombarded two-dimensional array sensor.

[0076] Additional details of various embodiments of inspection or metrology system 900 are in U.S. Patent No. 9,891,177 to Vazhaeparambil et al. entitled "TDI Sensor in a Darkfield System", U.S. Patent No. 9,279,774 to Romanovsky et al. entitled "Wafer inspection", U.S. Patent No. 7,957,066 to Armstrong et al. entitled "Split field inspection system using small catadioptric objectives", U.S. Patent No. 7,817,260 to Zhuang et al. entitled "Beam delivery system for laser dark-field illumination in a catadioptric optical system", U.S. Patent No. 5,999,310 to Shafer et al. entitled "Ultra-broadband UV microscope imaging system with wide range zoom capability", U.S. Patent No. 7,525,649 to Leong et al. entitled "Surface inspection system using laser line illumination with two dimensional imaging", U.S. Patent No. 9,080,971 to Kandel et al. entitled "Metrology systems and methods", U.S. Patent No. 7,474,461 to Zhuang et al. entitled "Broad band objective having improved lateral color performance", U.S. Patent No. 9,470,U.S. Patent No. 639, U.S. Patent No. 9,228,943 to Wang et al. entitled "Dynamically Adjustable Semiconductor Metrology System", U.S. Patent No. 5,608,526 to Piwonka-Corle et al. issued on March 4, 1997 entitled "Focused Beam Spectroscopic Ellipsometry Method and System", and U.S. Patent No. 6,297,880 to Rosencwaig et al. issued on October 2, 2001 entitled "Apparatus for Analyzing Multi-Layer Thin Film Stacks on Semiconductors". All of these patents are incorporated herein by reference.,

[0077] The various embodiments of the structure and method of the present invention described above merely illustrate the principles of the present invention and are not intended to limit the scope of the present invention to the described embodiments. For example, additional steps may be added, or the order of steps may be changed from Figure 1 , 2 and the order of steps depicted in the flowcharts of 3. Accordingly, the present invention is limited only by the appended claims and their equivalents.

Claims

1. A back-illuminated image sensor configured to sense at least one of deep ultraviolet (DUV) radiation and vacuum ultraviolet (VUV) radiation, the image sensor comprising: A semiconductor diaphragm having a front surface and an opposite back surface; A front-end circuit structure disposed on the front surface; A pure boron coating disposed on the back surface; A protective layer disposed on the pure boron coating; And A fluoride-based anti-reflection coating disposed on the protective layer, Wherein the protective layer comprises one of an oxide film and a nitride film having a thickness in the range of 0.5 nm and 10 nm.

2. The image sensor according to claim 1, wherein the semiconductor diaphragm comprises an epitaxial layer having a thickness in the range of 10 μm to 100 μm.

3. The image sensor according to claim 1, wherein the pure boron coating has a thickness in the range of 2 nm to 20 nm.

4. The image sensor according to claim 3, wherein the protective layer comprises one of Al2O3, MgO, La2O3, Li2O, CaO, BeO, HfO2, AlN, Li3N, LaN, Mg3N2, HfN and Ca3N2.

5. The image sensor according to claim 4, wherein the protective layer comprises one of Al2O3 and AlN and has a thickness in the range of 0.5 nm and 5 nm.

6. The image sensor according to claim 4, wherein the fluoride-based anti-reflection coating comprises one of AlF3, MgF2, CaF2, LaF3, LiF and HfF4 and has a thickness in the range of 2 nm and 40 nm.

7. A method of manufacturing an image sensor configured to sense at least one of deep ultraviolet (DUV) radiation and vacuum ultraviolet (VUV) radiation, the method comprising: Forming a front-end circuit structure on a first surface of a semiconductor diaphragm; Forming a pure boron coating on a second surface of the semiconductor diaphragm; Forming a protective layer on the pure boron coating; And Forming a fluoride-based anti-reflection coating on the protective layer, Wherein the protective layer comprises one of an oxide film and a nitride film and has a thickness in the range of 0.5 nm and 50 nm.

8. The method according to claim 7, wherein forming the pure boron coating comprises depositing one or more amorphous boron layers on the second surface until the pure boron coating has a total thickness in the range of 2 nm to 20 nm.

9. The method according to claim 8, Wherein forming the pure boron coating comprises using a high-temperature deposition process, and Wherein the method further comprises forming metal interconnects above the front-end circuit structure after forming the pure boron coating.

10. The method according to claim 8, Wherein the method further comprises forming metal interconnects above the front-end circuit structure before forming the pure boron coating, and Wherein forming the pure boron coating comprises using a low-temperature deposition process.

11. The method according to claim 7, wherein forming the protective layer includes depositing at least one of Al2O3, MgO, La2O3, Li2O, CaO, BeO, HfO2, AlN, Li3N, LaN, Mg3N2, HfN, and Ca3N2 on the upper surface of the pure boron coating.

12. The method according to claim 7, wherein forming the protective layer includes depositing one of the oxide film and the nitride film such that the thickness is in the range of 0.5 nm to 10 nm, and wherein forming the fluoride-based antireflection coating includes depositing one or more fluoride-based materials on the protective layer.

13. The method according to claim 12, wherein depositing one or more fluoride-based materials includes depositing at least one of AlF3, MgF2, CaF2, LaF3, LiF, and HfF4.

14. The method according to claim 7, wherein forming the protective layer includes depositing one of the oxide film and the nitride film having a total thickness in the range of 10 nm to 50 nm, and wherein forming the fluoride-based antireflection coating includes using a fluorination process to convert an upper region of the protective layer into the fluoride-based antireflection coating.

15. The method according to claim 14, wherein using the fluorination process includes exposing the protective layer to at least one fluorine-containing gas.

16. The method according to claim 15, wherein using the fluorination process includes using a plasma process.

17. The method according to claim 7, wherein the semiconductor diaphragm includes a p-doped epitaxial silicon layer disposed on a silicon substrate, and wherein the method further includes back-thinning at least a portion of the silicon substrate to expose at least a portion of the p-doped epitaxial silicon layer, wherein the exposed portion of the p-doped epitaxial silicon layer forms the second surface of the semiconductor diaphragm.

18. The method according to claim 7, wherein the semiconductor diaphragm includes a p-doped epitaxial silicon layer formed on a top silicon substrate of a silicon-on-insulator (SOI) structure, the p-doped epitaxial silicon layer having a first p-type doping concentration and the top silicon substrate having a second p-type doping concentration greater than the first p-type doping concentration, wherein forming the front-end circuit structure on the first surface of the semiconductor diaphragm includes forming the front-end circuit structure on the p-doped epitaxial silicon layer, and wherein forming the pure boron coating on the second surface of the semiconductor diaphragm includes: removing at least a portion of the handle substrate and the oxide layer of the SOI structure to expose one or more surface portions of the top silicon substrate; and forming the pure boron coating on the exposed surface portions.

19. The method according to claim 18, wherein the method further includes forming through-silicon vias in the semiconductor diaphragm before forming the pure boron coating.

20. A test system, comprising: Light source; A set of optical devices including an objective lens, configured to direct and focus incident light from the illumination source onto a sample and collect reflected / scattered light from the sample, and direct and focus the reflected / scattered light from the sample onto a detector assembly, wherein the detector includes one or more image sensors configured to sense at least one of deep ultraviolet (DUV) radiation and vacuum ultraviolet (VUV) radiation, wherein each of the image sensors includes a semiconductor diaphragm, circuit elements formed on a first surface of the semiconductor diaphragm, at least one pure boron layer formed on a second surface of the semiconductor diaphragm, a protective layer formed on the pure boron layer, and a fluoride-based antireflection coating disposed above the protective layer, and wherein the protective layer includes one of an oxide and a nitride and has a thickness in the range of 0.5 nm and 10 nm.

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