Small unmanned aerial vehicle efficient hardware architecture system based on multi-modal input

Abstract

The invention is suitable for the technical field of unmanned aerial vehicles, provides a multi-modal input-based efficient hardware architecture system for a small unmanned aerial vehicle, and constructs a hardware system integrated with a GNSS SOC chip, a TSN protocol hardware circuit, an FPGA bridge and a multi-modal sensor through hardware architecture innovation and intelligent algorithm collaborative optimization. A time-sensitive network protocol and FPGA collaborative design is adopted, hardware-level time sequence synchronization of a visual sensor, a barometric altimeter, an ultrasonic obstacle avoidance module and an IMU unit is realized, a positioning range is dynamically constrained by using an ultrasonic module, and redundant calculation is reduced; meanwhile, a fuzzy PID algorithm is deeply fused with GNSS positioning data and visual SLAM environment modeling, a mixed pose correction model is formed, a safe obstacle avoidance constraint matrix is constructed in low-altitude flight, and time division multiplexing and a dynamic power consumption distribution strategy are combined, so that the overall power consumption of the system is greatly reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of unmanned aerial vehicles, and particularly to an efficient hardware architecture system for small unmanned aerial vehicles based on multimodal input. Background Art

[0002] In recent years, with the rapid development of miniaturized electronic devices and high-precision sensors, the application potential of small unmanned aerial vehicles has been continuously released in fields such as logistics distribution, agricultural plant protection, and disaster relief. However, the existing technology still faces multiple challenges: traditional unmanned aerial vehicles rely on software algorithms to achieve multi-sensor data fusion, resulting in insufficient real-time performance of dynamic obstacle avoidance and path planning. Especially in scenarios with weak GPS signals or dense obstacles, the positioning accuracy is easily interfered by multi-path effects, and the error can reach 5 - 10 meters. At the same time, the standardization degree of sensor interfaces in the distributed hardware architecture is low, and the bandwidth bottleneck of general-purpose buses (such as UART, SPI) and the timing synchronization error of software scheduling not only cause data accumulation errors but also increase power consumption and volume due to redundant design. These problems seriously restrict the operation reliability and endurance of unmanned aerial vehicles in complex environments, and systematic technological breakthroughs are urgently needed.

[0003] The current industry technology evolution is focusing on hardware architecture optimization and intelligent algorithm upgrade. For example, sensor hardware-level synchronization is achieved through the Time-Sensitive Networking (TSN) protocol, multiple protocol interfaces are bridged by FPGA to improve data processing efficiency, and at the same time, lightweight MEMS sensors and adaptive power management strategies are integrated to extend the endurance. However, the existing solutions still have key limitations: the software-dominated synchronization mechanism is difficult to meet the millisecond-level dynamic response requirements, the traditional flight control algorithm lags in response during sudden obstacle avoidance, and the computational complexity of multi-source data fusion limits the real-time performance. These technical bottlenecks indicate that simply relying on software optimization or local hardware improvement can no longer meet the application requirements of high-precision and high-real-time scenarios, and comprehensive innovation from architecture design to algorithm collaboration is urgently needed. Therefore, an efficient hardware architecture system for small unmanned aerial vehicles based on multimodal input is required to solve the above problems. Summary of the Invention

[0004] Aiming at the deficiencies of the existing technology, the purpose of the present invention is to provide an efficient hardware architecture system for small unmanned aerial vehicles based on multimodal input to solve the problems existing in the above background art.

[0005] The present invention is implemented as follows. An efficient hardware architecture system for small unmanned aerial vehicles based on multimodal input, the system includes a GNSS SOC chip, a flight control system, a ground control terminal, an FPGA, a Time-Sensitive Networking protocol, a vision sensor, a barometric altimeter, an ultrasonic obstacle avoidance module, and an IMU module. The steps for flight control are as follows: The ground control terminal activates the GNSS positioning system. The flight control system receives the start signal. The main control module in the flight control system loads the driver program, the GNSS SOC chip loads the positioning driver program, the antenna pre-starts, the channel starts to load, and the accelerometer, gyroscope, barometric altimeter, ultrasonic obstacle avoidance module, and vision sensor in the IMU module perform self-checks. After receiving the satellite signal reception instruction, the antenna searches for satellite signals according to the preset frequency band, and the GNSS baseband and processor process the received signals to capture accurate satellite signals. When satellite signals are captured, it enters the signal tracking stage, and real-time adjustments are made through the delay locked loop and phase locked loop tracking loops. When the signal tracking stage is completed, it enters the navigation solution process, and the pseudo-range information of multiple satellites is used to construct the observation model equation to calculate the position, speed, and time information of the mobile device. After the solution is completed, the accelerometer, gyroscope, and vision sensor in the IMU module start to work synchronously, respectively starting to measure the acceleration and angular velocity of the carrier and the environmental image within a preset range around the carrier. The time-sensitive network protocol hardware circuit is adopted, and FPGA is used for bridging to perform hardware timing synchronization for external sensors and cooperate with the pose correction model to correct the data to obtain the pose information of the aircraft. Based on the pose information and combined with the preset flight control algorithm, real-time flight control is performed, and the information is synchronized to the ground control terminal.

[0006] As a further solution of the present invention: The IMU module, barometric altimeter, ultrasonic obstacle avoidance module, and vision sensor adopt the hardware circuit of the time-sensitive network protocol for hardware timing alignment, with FPGA used for bridging in the middle, and then connected to the main control module of the flight control system.

[0007] As a further solution of the present invention: When the ultrasonic obstacle avoidance module starts to detect surrounding obstacles, it restricts the positioning range of the aircraft, reduces the deduction range of the pose correction model, so as to improve the pose estimation efficiency.

[0008] As a further solution of the present invention: The system further includes a PMIC module, a fuzzy PID algorithm module, and an RTC module. The PMIC module is used to supply power to different components of the entire aircraft; the fuzzy PID algorithm module is used to assist the flight control system in adjusting the flight attitude; the RTC module provides a real-time clock for the entire system.

[0009] As a further solution of the present invention: the GNSS SOC chip is used to perform satellite signal reception, signal acquisition, signal tracking, navigation calculation, positioning data correction, and multipath effect optimization; the flight control system is used to integrate multi-sensor data, process in real time and control the flight attitude, path planning, emergency response, and real-time flight obstacle avoidance of the drone; the time-sensitive network protocol is used to perform hardware synchronization of the timing of various sensors externally connected to the flight control system; the FPGA is used to cooperate with the time-sensitive network protocol to perform hardware synchronization of the timing of various sensors externally connected to the flight control system and act as a bridge between the flight control system and the sensors; the vision sensor captures environmental images through a camera and provides visual data for the drone to achieve auxiliary obstacle avoidance, navigation, and positioning functions; the barometric altimeter provides altitude data by measuring atmospheric pressure; the ultrasonic obstacle avoidance module detects the distance of the front obstacle by emitting sound waves, assists in real-time obstacle avoidance during low-speed flight, and provides a constraint on the safe flight space range; the IMU module monitors the motion state of the drone in real time through an accelerometer and a gyroscope and provides dynamic balance control.

[0010] As a further solution of the present invention: the output port of the PMIC module is electrically connected to the input port of the GNSS SOC chip, the output port of the GNSS SOC chip is signal-connected to the input port of the flight control system, the output port of the PMIC module is electrically connected to the input port of the flight control system, the output port of the PMIC module is electrically connected to the input port of the fuzzy PID algorithm module, the output port of the PMIC module is electrically connected to the input port of the RTC module, the output port of the PMIC module is electrically connected to the input port of the FPGA, the output port of the PMIC module is electrically connected to the input port of the vision sensor, the output port of the PMIC module is electrically connected to the input port of the barometric altimeter, the output port of the PMIC module is electrically connected to the input port of the ultrasonic obstacle avoidance module, and the output port of the PMIC module is electrically connected to the input port of the IMU module.

[0011] As a further solution of the present invention: the output port of the flight control system is signal-connected to the input port of the fuzzy PID algorithm module, the output port of the flight control system is signal-linked to the input port of the ground control terminal, the output port of the flight control system is signal-linked to the input port of the FPGA, the output port of the fuzzy PID algorithm module is signal-connected to the input port of the FPGA, the output port of the RTC module is signal-connected to the input port of the time-sensitive network protocol, the output port of the FPGA is signal-connected to the input port of the time-sensitive network protocol, the output port of the vision sensor is signal-connected to the input port of the time-sensitive network protocol, the output port of the barometric altimeter is signal-connected to the input port of the time-sensitive network protocol, the output port of the ultrasonic obstacle avoidance module is signal-connected to the input port of the time-sensitive network protocol, and the output port of the barometric altimeter is signal-connected to the input port of the IMU module.

[0012] Compared with the prior art, the present invention has the following beneficial effects: This invention uses the TSN protocol to achieve hardware-level timing synchronization (nanosecond accuracy) between sensors and the main control module, reducing data exchange latency and ensuring rapid response to attitude adjustments during high-speed drone movements. A hardware-based timing synchronization architecture uses an FPGA as a bridge between sensors and the flight control system, replacing traditional software synchronization mechanisms and reducing communication latency. The positioning solution area is dynamically narrowed by detecting obstacle distances, reducing redundant calculations and improving positioning efficiency during low-altitude flight. Visual sensors capture environmental images, combined with dynamic attitude data from the IMU, to achieve real-time optimization of obstacle avoidance decisions and navigation paths. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 This is a structural block diagram of an efficient hardware architecture system for small UAVs based on multimodal input.

[0014] Figure 2 This is a flight control operation flow chart of an efficient hardware architecture system for a small UAV based on multimodal input.

[0015] Figure 3 This is a multimodal data control flow chart for an efficient hardware architecture system for a small UAV based on multimodal input.

[0016] Figure numerals: 1-GNSS SOC chip, 2-PMIC module, 3-flight control system, 4-fuzzy PID algorithm module, 5-RTC module, 6-ground control terminal, 7-FPGA, 8-time-sensitive network protocol, 9-visual sensor, 10-barometric altimeter, 11-ultrasonic obstacle avoidance module, 12-IMU module. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0018] The specific implementation of the present invention is described in detail below with reference to specific embodiments.

[0019] like Figure 1 、 Figure 2 and Figure 3 As shown, an embodiment of the present invention provides an efficient hardware architecture system for a small unmanned aerial vehicle based on multimodal input, wherein the system includes a GNSS SOC chip 1, a flight control system 3, a ground control terminal 6, an FPGA 7, a time-sensitive network protocol 8, a visual sensor 9, a barometric altimeter 10, an ultrasonic obstacle avoidance module 11, and an IMU module 12.

[0020] It should be noted that the embodiment of the present invention proposes a comprehensive solution that combines hardware architecture innovation and intelligent algorithm optimization. Through the co - design of the TSN protocol (Time - Sensitive Networking Protocol 8) and FPGA7, the sensor data acquisition delay is compressed to the nanosecond level, eliminating the cumulative error of software synchronization. At the same time, a hybrid pose correction model is constructed by using the dynamic characteristics of the IMU and the environmental modeling ability of visual SLAM, and the ultrasonic obstacle avoidance module 11 is combined to constrain the positioning range, significantly improving the positioning accuracy in complex terrains. In addition, the hardware layer adopts a time - division multiplexing and dynamic power consumption allocation strategy, reducing the overall system power consumption by more than 30%. This technical solution breaks through the technical barriers of real - time performance, power consumption, and environmental adaptability in traditional designs through hardware - level reconstruction and algorithm collaborative optimization, laying a solid foundation for the large - scale application of unmanned aerial vehicles in high - demand scenarios such as industrial inspection and emergency rescue.

[0021] In the embodiment of the present invention, the steps of flight control are as follows: S100, the ground control terminal 6 turns on the GNSS positioning system. The flight control system 3 receives the start signal. The main control module in the flight control system 3 loads the driver program, configures the predetermined parameters. The GNSS SOC chip 1 loads the positioning driver program, the antenna pre - starts, and the channel starts to load. The accelerometer and gyroscope in the IMU module 12, the barometric altimeter 10, the ultrasonic obstacle avoidance module 11, and the vision sensor 9 perform self - checks. At the same time, the accelerometer and gyroscope perform initial alignment, the barometric altimeter 10 and the ultrasonic obstacle avoidance module 11 start self - calibration, and the vision sensor 9 performs automatic vision correction; S200, after receiving the satellite signal reception instruction, the antenna searches for satellite signals according to the preset frequency band. The GNSS baseband and processor process the received signals, search for satellite signals within the possible code phase and carrier frequency range, and capture the accurate satellite signals through corresponding algorithms; S300, when the satellite signal is captured, it enters the signal tracking stage. Through the delay - locked loop and phase - locked loop tracking loops, it is adjusted in real - time to ensure the synchronization and accuracy of the received signal, continuously tracks the changes of the satellite signal and makes corresponding adjustments to achieve the tracking of the satellite signal. When the signal tracking stage is completed, it enters the navigation solution process, uses the pseudorange information of multiple satellites to construct the observation model equation, and calculates the position, speed, and time information of the mobile device; In S400, after initially calculating the information of the mobile device, the parameters of the unique model are corrected. The accelerometer and gyroscope in the IMU module 12 and the vision sensor 9 start working synchronously, and begin to measure the acceleration and angular velocity of the carrier and the environmental image within a preset range around the carrier respectively. The time-sensitive network protocol 8 hardware circuit is adopted, and the FPGA 7 is used for bridging to perform hardware timing synchronization on the external sensors, and cooperate with the pose correction model to correct the data. Finally, the pose information of the aircraft is obtained, and the corrected pose information parameters are finally fed back to the mobile terminal; In S500, at the same time, the corresponding pose parameters will be combined with the preset flight control algorithm for real-time flight control, and the information will be synchronized to the ground control terminal 6. Subsequently, the processes of S300, S400, and S500 will be continuously carried out until the ground control terminal 6 turns off the aircraft switch.

[0022] In the embodiment of the present invention, the IMU module 12, the barometric altimeter 10, the ultrasonic obstacle avoidance module 11, and the vision sensor 9 adopt the hardware circuit of the time-sensitive network protocol 8 for hardware timing alignment, and the FPGA 7 is used for bridging in the middle, and then connected to the main control module of the flight control system 3, so as to reduce the data interaction time between each sensor and the main control module, thereby making the reaction of the UAV more sensitive.

[0023] In the embodiment of the present invention, when the ultrasonic obstacle avoidance module 11 starts to detect surrounding obstacles, the positioning range of the aircraft is restricted, and the deduction range of the pose correction model is reduced to improve the pose estimation efficiency.

[0024] In the embodiment of the present invention, the system further includes a PMIC module 2, a fuzzy PID algorithm module 4, and an RTC module 5. The PMIC module 2 is used to supply power to different components of the entire aircraft; the fuzzy PID algorithm module 4 is used to assist the flight control system 3 in adjusting the flight attitude; the RTC module 5 provides a real-time clock for the entire system.

[0025] In the embodiment of the present invention, the GNSS SOC chip 1 is used to perform satellite signal reception, signal acquisition, signal tracking, navigation solution, positioning data correction, and multipath effect optimization; the flight control system 3 is used to integrate multi-sensor data, and in real time process and control the flight attitude, path planning, emergency response, and real-time flight obstacle avoidance of the drone; the time-sensitive network protocol 8 is used to perform hardware synchronization of the timing of various sensors externally connected to the flight control system 3; the FPGA 7 is used to cooperate with the time-sensitive network protocol 8 to perform hardware synchronization of the timing of various sensors externally connected to the flight control system 3 and serve as a bridge between the flight control system 3 and the sensors; the vision sensor 9 captures environmental images through a camera and provides visual data for the drone to achieve auxiliary obstacle avoidance, navigation, and positioning functions; the barometric altimeter 10 provides altitude data by measuring atmospheric pressure and helps the drone maintain a stable altitude during flight; the ultrasonic obstacle avoidance module 11 detects the distance of obstacles ahead by emitting sound waves, assists in real-time obstacle avoidance during low-speed flight, and provides a constraint on the safe flight space range; the IMU module 12 monitors the motion state of the drone in real time through an accelerometer and a gyroscope and provides dynamic balance control.

[0026] In the embodiment of the present invention, the output port of the PMIC module 2 is electrically connected to the input port of the GNSS SOC chip 1, the output port of the GNSS SOC chip 1 is signal-connected to the input port of the flight control system 3, the output port of the PMIC module 2 is electrically connected to the input port of the flight control system 3, the output port of the PMIC module 2 is electrically connected to the input port of the fuzzy PID algorithm module 4, the output port of the PMIC module 2 is electrically connected to the input port of the RTC module 5, the output port of the PMIC module 2 is electrically connected to the input port of the FPGA 7, the output port of the PMIC module 2 is electrically connected to the input port of the vision sensor 9, the output port of the PMIC module 2 is electrically connected to the input port of the barometric altimeter 10, the output port of the PMIC module 2 is electrically connected to the input port of the ultrasonic obstacle avoidance module 11, and the output port of the PMIC module 2 is electrically connected to the input port of the IMU module 12. The output port of the flight control system 3 is signal-connected to the input port of the fuzzy PID algorithm module 4, the output port of the flight control system 3 is signal-linked to the input port of the ground control terminal 6, the output port of the flight control system 3 is signal-linked to the input port of the FPGA 7, the output port of the fuzzy PID algorithm module 4 is signal-connected to the input port of the FPGA 7, the output port of the RTC module 5 is signal-connected to the input port of the time-sensitive network protocol 8, the output port of the FPGA 7 is signal-connected to the input port of the time-sensitive network protocol 8, the output port of the vision sensor 9 is signal-connected to the input port of the time-sensitive network protocol 8, the output port of the barometric altimeter 10 is signal-connected to the input port of the time-sensitive network protocol 8, the output port of the ultrasonic obstacle avoidance module 11 is signal-connected to the input port of the time-sensitive network protocol 8, and the output port of the barometric altimeter 10 is signal-connected to the input port of the IMU module 12.

[0027] As a preferred embodiment of the present invention, when the ground control terminal 6 is powered on and signals are linked to the small unmanned aerial vehicle through wireless signals, after sending a power-on command (pre-flight command), the communication module in the flight control system 3 of the unmanned aerial vehicle is linked to the ground control terminal 6, and the main control module starts to pre-load the driver program. Subsequently, the interactive interface loads various driver programs onto the visual sensor 9, barometric altimeter 10, ultrasonic obstacle avoidance module 11, IMU module 12, GNSS SOC chip 1, and fuzzy PID algorithm module 4 on the unmanned aerial vehicle. The fault detection and safety module in the flight control system 3 of the unmanned aerial vehicle starts to perform fault detection on the visual sensor 9, barometric altimeter 10, ultrasonic obstacle avoidance module 11, IMU module 12, GNSS SOC chip 1, and fuzzy PID algorithm module 4 and self-detection on various hardware. At the same time, the visual sensor 9 starts to collect environmental visual data around the carrier, the barometric altimeter 10 starts to collect barometric pressure and altitude data, the ultrasonic obstacle avoidance module 11 starts to scan the surrounding environment, and the IMU module 12 starts to collect acceleration and angular velocity parameters. Subsequently, the data transmission link performs a link transmission test in a preset manner. The antenna in the GNSS SOC chip 1 starts to receive satellite signals and starts signal search, capture, and tracking. The fuzzy PID algorithm module 4 drives the pre-loading, and the hardware performs the algorithm program test process. The FPGA 7 starts to perform channel debugging of the time-sensitive network protocol 8 to perform pre-loading processing for the hardware synchronization of the channels between the visual sensor 9, barometric altimeter 10, ultrasonic obstacle avoidance module 11, IMU module 12, and the flight control system 3.

[0028] When the ground control section issues a flight command, the command is transmitted to the flight control system 3 through the communication module. The flight control system 3 starts to operate the actuator drive module to perform flight operations. The visual sensor 9, barometric altimeter 10, ultrasonic obstacle avoidance module 11, and IMU module 12 start to collect data, and various algorithms start to operate. The FPGA 7 cooperates with the time-sensitive network protocol 8 to bridge the flight control system 3 and the visual sensor 9, barometric altimeter 10, ultrasonic obstacle avoidance module 11, and IMU module 12 to ensure that the time delay of data transmission is reduced to less than 10 ns, achieving efficient and smooth data transmission. The GNSS SOC chip 1 starts to collect, correct, and transmit positioning data, and obtains more accurate positioning information through the positioning correction model in combination with real-time visual images. The barometric altimeter 10 will assist in measuring the altitude data of the current unmanned aerial vehicle, and the ultrasonic obstacle avoidance module 11 will detect the surrounding environment, delimit a safe flight range, and output a safety constraint matrix. Finally, the real-time flight pose data of the current unmanned aerial vehicle is estimated through the pose estimation model, and the flight control of the small unmanned aerial vehicle starts to perform algorithm correction through the output pose data in combination with the fuzzy PID algorithm module 4, ultimately making the flight process of the small unmanned aerial vehicle smoother, the flight control reaction speed faster, and the flight safety more guaranteed.

[0029] The above only describes the preferred embodiments of the present invention in detail and is not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

[0030] It should be understood that although the steps in the flowcharts of the embodiments of the present invention are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear indication in this article, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, at least a part of the steps in each embodiment may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same moment, but can be executed at different moments. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed alternately or in turn with at least a part of other steps or sub-steps or stages of other steps.

[0031] Those of ordinary skill in the art can understand that all or part of the processes of implementing the methods in the above embodiments can be completed by instructing relevant hardware through a computer program. The program can be stored in a non-volatile computer-readable storage medium. When the program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, storage, database, or other medium used in the embodiments provided in the present application can include non-volatile and / or volatile memories. Non-volatile memories can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memories can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM), etc.

[0032] Other embodiments of the present disclosure will be readily contemplated by those skilled in the art after considering the disclosure in the specification and the embodiments. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include known common general knowledge or conventional technical means in the technical field not disclosed in the present disclosure. The specification and the embodiments are only regarded as exemplary, and the true scope and spirit of the present disclosure are pointed out by the claims.

Claims

1. A high - efficiency hardware architecture system for small unmanned aerial vehicles based on multi - modal input, characterized in that, The system includes a GNSS SOC chip, a flight control system, a ground control terminal, an FPGA, a time-sensitive network protocol, a vision sensor, a barometric altimeter, an ultrasonic obstacle avoidance module, and an IMU module. The steps for flight control are as follows: The ground control terminal activates the GNSS positioning system. The flight control system receives the start signal. The main control module in the flight control system loads the driver program, and the GNSS SOC chip loads the positioning driver program. The antenna pre-starts, the channel starts to load, and the accelerometer and gyroscope in the IMU module, the barometric altimeter, the ultrasonic obstacle avoidance module, and the vision sensor perform self-checks; After receiving the satellite signal reception instruction, the antenna searches for satellite signals according to the preset frequency band, and the GNSS baseband and processor process the received signals to capture accurate satellite signals; When satellite signals are captured, it enters the signal tracking stage, and real-time adjustments are made through the delay lock loop and the phase lock loop tracking loop; When the signal tracking stage is completed, it enters the navigation solution process. The observation model equation is constructed using the pseudorange information of multiple satellites to calculate the position, speed, and time information of the mobile device; After the solution is completed, the accelerometer and gyroscope in the IMU module and the vision sensor start to work synchronously, respectively measuring the acceleration and angular velocity of the carrier and the environmental image within a preset range around the carrier. The time-sensitive network protocol hardware circuit is used, and the FPGA is used for bridging to perform hardware timing synchronization for the external sensors, and data correction is performed in cooperation with the pose correction model to obtain the pose information of the aircraft; Based on the pose information and combined with the preset flight control algorithm, real-time flight control is performed, and the information is synchronized to the ground control terminal.

2. The high-efficiency hardware architecture system of a small unmanned aerial vehicle based on multimodal input according to claim 1, wherein The IMU module, the barometric altimeter, the ultrasonic obstacle avoidance module, and the vision sensor use the hardware circuit of the time-sensitive network protocol for hardware timing alignment, with the FPGA used for bridging in the middle, and then connected to the main control module of the flight control system.

3. The small UAV high-efficiency hardware architecture system based on multimodal input according to claim 1, characterized in that, When the ultrasonic obstacle avoidance module starts to detect surrounding obstacles, it restricts the positioning range of the aircraft, reducing the deduction range of the pose correction model to improve the efficiency of pose estimation.

4. The efficient hardware architecture system for small unmanned aerial vehicles based on multimodal input according to claim 1, characterized in that, The system also includes a PMIC module, a fuzzy PID algorithm module, and an RTC module. The PMIC module is used to supply power to different components of the entire aircraft; the fuzzy PID algorithm module is used to assist the flight control system in adjusting the flight attitude; the RTC module provides a real-time clock for the entire system.

5. The small UAV efficient hardware architecture system based on multimodal input according to claim 1, wherein, The GNSS SOC chip is used to execute satellite signal reception, signal capture, signal tracking, navigation solution, positioning data correction, and multipath effect optimization; the flight control system is used to integrate multi-sensor data, process and control the flight attitude, path planning, emergency response, and real-time flight obstacle avoidance of the UAV in real time; the time-sensitive network protocol is used to perform hardware synchronization of the timing of various sensors externally connected to the flight control system; the FPGA is used to cooperate with the time-sensitive network protocol to perform hardware timing synchronization for various sensors externally connected to the flight control system and act as a bridge between the flight control system and the sensors; The vision sensor captures environmental images through a camera, providing visual data for the UAV to achieve auxiliary obstacle avoidance, navigation, and positioning functions; the barometric altimeter provides altitude data by measuring atmospheric pressure; the ultrasonic obstacle avoidance module detects the distance of obstacles around the UAV by emitting sound waves, assisting in real-time obstacle avoidance during low-speed flight and providing a safety flight space range constraint; the IMU module monitors the motion state of the UAV in real time through an accelerometer and a gyroscope, providing dynamic balance control.

6. The high-efficiency hardware architecture system of a small unmanned aerial vehicle based on multimodal input according to claim 4, characterized in that, The output port of the PMIC module is electrically connected to the input port of the GNSS SOC chip, the output port of the GNSS SOC chip is signal-connected to the input port of the flight control system, the output port of the PMIC module is electrically connected to the input port of the flight control system, the output port of the PMIC module is electrically connected to the input port of the fuzzy PID algorithm module, the output port of the PMIC module is electrically connected to the input port of the RTC module, the output port of the PMIC module is electrically connected to the input port of the FPGA, the output port of the PMIC module is electrically connected to the input port of the vision sensor, the output port of the PMIC module is electrically connected to the input port of the barometric altimeter, the output port of the PMIC module is electrically connected to the input port of the ultrasonic obstacle avoidance module, and the output port of the PMIC module is electrically connected to the input port of the IMU module.

7. The small UAV high-efficiency hardware architecture system based on multimodal input according to claim 6, characterized in that, The output port of the flight control system is signal-connected to the input port of the fuzzy PID algorithm module, the output port of the flight control system is signal-link-connected to the input port of the ground control terminal, the output port of the flight control system is signal-link-connected to the input port of the FPGA, the output port of the fuzzy PID algorithm module is signal-connected to the input port of the FPGA, the output port of the RTC module is signal-connected to the input port of the time-sensitive network protocol, the output port of the FPGA is signal-connected to the input port of the time-sensitive network protocol, the output port of the vision sensor is signal-connected to the input port of the time-sensitive network protocol, the output port of the barometric altimeter is signal-connected to the input port of the time-sensitive network protocol, the output port of the ultrasonic obstacle avoidance module is signal-connected to the input port of the time-sensitive network protocol, and the output port of the barometric altimeter is signal-connected to the input port of the IMU module.

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