Satellite-borne computer on-orbit one-bit data line connection fault remedy method and system

Abstract

The invention relates to the technical field of spaceflight electronic systems, and discloses a satellite-borne computer in-orbit one-bit data line connection fault remedy method and system, and the method comprises the steps: starting an EDAC error detection and correction function in a satellite-borne computer, and shielding the interruption triggered by a one-bit EDAC error; an atomic operation instruction in an application program target code is replaced by a common instruction with an equivalent function, and the risk of atomic operation interruption caused by EDAC errors is avoided; reconstructing a random access memory (RAM) maintenance mechanism, and replacing an original maintenance mode based on error detection and correction of EDAC interruption by adopting a read-out and write-back mode under the condition of shielding interruption protection; and modifying a reset processing function of the application program in an on-orbit programming mode, namely autonomously completing a bootstrap process of the bootstrap program in the PROM, modifying and perfecting a target code of the bootstrap program loaded into the RAM, and skipping to execute the modified and perfected bootstrap program. And hardware fault remedy processing is implemented through a software on-orbit programming measure, so that normal operation of satellite-borne computer software is ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of aerospace electronic systems, and particularly to a method and system for remedying one-bit data line connection faults of an on-board computer in orbit. Background Art

[0002] With the increasingly heavy tasks of current aerospace model development, the development and testing time of on-board computer products is continuously compressed, and the potential quality hazards during the in-orbit operation of the products also increase accordingly. Among them, the problem of chip pin soldering is the most prominent. Once it is exposed in orbit, most of them can only be dealt with by switching to backup operation, which seriously affects the reliability of the long-term in-orbit operation of the on-board computer.

[0003] For data memories, most current on-board computer core processors have EDAC (Error Detection And Correction) error detection and correction functions. For one-bit errors that can be corrected, the software usually reads and writes back in the one-bit error EDAC interrupt for correction; for two-bit uncorrectable errors, after the processor captures the exception, the software usually resets and restarts for processing.

[0004] When a one-bit data line pin connection anomaly occurs in the on-board computer in orbit, although the EDAC function can correct program codes and data, at the same time, the program will also be frequently interrupted by EDAC error interrupts, resulting in abnormal program operation and reset. If the EDAC error interrupt is simply masked through in-orbit programming, once a one-bit data line error is superimposed with a one-bit single event upset error in space, a two-bit EDAC error will occur, resulting in program reset. And the boot program stored in the PROM does not support in-orbit programming modification. Once the application program resets and re-executes the boot program in the PROM, the boot program will fall into a continuous reset anomaly. If the data line is completely disconnected, the on-board computer will completely fail.

[0005] Therefore, inventing a software remedy method for the on-board computer when a one-bit data line connection anomaly occurs in orbit, and implementing a remedy process through software in-orbit programming measures during the intermittent period when the data line connection is normal, to ensure that the on-board computer software can still operate normally and will not completely fail after the data line is completely disconnected, has become an urgent problem to be solved in the ground maintenance of the current aerospace on-board computer system. Summary of the Invention

[0006] The purpose of the present invention is to solve the above-mentioned drawbacks existing in the prior art, and provide a method and system for remedying one-bit data line connection faults of an on-board computer in orbit, realizing the ground remedy measures when a one-bit data line connection hardware anomaly occurs in the on-board computer in orbit.

[0007] On the one hand, a method for remedying one-bit data line connection faults of an on-board computer in orbit is provided, including the following steps: S1: While starting the EDAC error detection and correction function in the on-board computer, mask the interrupt triggered by a 1-bit EDAC error; S2: Replace the atomic operation instructions in the application program object code with ordinary instructions with equivalent functions to avoid the risk of atomic operation interruption caused by EDAC errors; S3: Reconstruct the random access memory (RAM) maintenance mechanism, and use the method of reading and then writing back under the protection of masked interrupts to replace the original maintenance method based on EDAC interrupts for error detection and correction; S4: Modify the application program exception reset processing function through in-orbit programming, including: Autonomously complete the bootstrap process of the boot program in the PROM, modify and improve the boot program object code loaded into the RAM, then jump to execute the modified and improved boot program, and then the boot program loads the application program to run.

[0008] Furthermore, step S1 includes: Configure the corresponding registers to start the EDAC error detection and correction function in the on-board computer, and detect and repair memory errors through the error correction code (ECC); If a 1-bit error is detected, the EDAC error detection and correction function automatically corrects the data by flipping the error bit without triggering an interrupt. If an uncorrectable error is detected, a reset process is triggered; To ensure that 1-bit errors do not accumulate into uncorrectable errors, a proactive RAM maintenance mechanism is periodically executed.

[0009] Furthermore, in step S2, replacing the atomic operation instructions in the application program object code with ordinary instructions with equivalent functions includes: Use a combination of ordinary instructions to disable the interrupt or lock mechanism, simulate atomic operations, ensure that the operation sequence is not interrupted, achieve the same logical behavior as the atomic operation instructions, and avoid instruction abortion after triggering an EDAC error during atomic operations; Increase the execution time of ordinary instructions, and at the same time alleviate the performance impact caused by multiple operations in the ordinary instruction sequence through hardware optimization.

[0010] Furthermore, in step S3, the reconstruction of the random access memory (RAM) maintenance mechanism includes: S31: Set the RAM maintenance period, and the setting of this period needs to be determined according to the single-event upset rate and the RAM capacity; S32: Save the current interrupt status and disable the interrupt for subsequent recovery; S33: Traverse the RAM addresses, read the data, let EDAC automatically correct 1-bit errors, write the corrected data back to the original address after returning the correct data, and refresh the parity bits to avoid the accumulation of single-event upset error bits in the space resulting in multiple-bit EDAC error exceptions; S34: Restore the interrupt enable state.

[0011] Further, in step S4, the modified application program exception reset processing function includes: S41: Change the application program exception reset processing function by means of on-orbit programming. Write 0 to the RAM space where the application program runs to regenerate the EDAC parity bits to eliminate potential errors, and copy the boot program code block of the PROM to the specified area of the RAM, so as to modify the program boot process that jumps to the PROM for execution after reset to the application program's independent execution of the boot program self-boot process; S42: Modify and improve the boot program object code in the RAM, enable the EDAC function but mask the interrupt triggered by 1-bit EDAC errors, and replace the atomic operation instructions in the program object code with ordinary instructions to ensure the normal operation of the boot program.

[0012] Preferably, the method further includes: When the data line with a connection exception is completely disconnected and superimposed with the state of 1-bit EDAC error in the RAM, EDAC detects 2-bit uncorrectable errors, triggers the reset of the application program, and executes the reset process after on-orbit programming in step S4 to restore normal operation and avoid continuous reset exceptions.

[0013] More preferably, the method further includes: If the on-orbit programming modification process cannot be automatically executed before running the reloaded application program after reset, when modifying the boot program object code in step S4, insert supplementary code before jumping to run to enable the boot program to independently enable the on-orbit programming modification process for the application program and avoid errors in the operation of the original version of the reloaded application program.

[0014] On the other hand, a spaceborne computer on-orbit one-bit data line connection fault remedy system is provided, including: An EDAC configuration module, which is used to start the EDAC error detection and correction function in the spaceborne computer while masking the interrupt triggered by 1-bit EDAC errors; An instruction optimization module, which is used to replace the atomic operation instructions in the application program object code with ordinary instructions with equivalent functions to avoid the risk of atomic operation interrupts caused by EDAC errors; A maintenance mechanism reconstruction module, which is used to reconstruct the random access memory RAM maintenance mechanism, and adopt the method of reading and writing back under the protection of masked interrupts to replace the original maintenance method based on EDAC interrupts for error detection and correction; A reset process reconstruction module, which is used to modify the application reset processing function through on-orbit programming, including: Autonomously complete the bootstrap process of the bootloader in the PROM. After modifying and improving the bootloader object code loaded into the RAM, jump to execute the modified and improved bootloader, and then the bootloader loads the application to run.

[0015] Meanwhile, a computer-readable storage medium is provided, on which a computer program is stored. The program includes a bootloader and an application, and when executed by a processor, it implements the on-orbit one-bit data line connection fault remediation method of the on-board computer described in any one of the above.

[0016] In addition, an electronic device is provided, including: one or more processors; a storage device for storing one or more programs. When the one or more programs are executed by the one or more processors, the one or more processors implement the on-orbit one-bit data line connection fault remediation method of the on-board computer described in any one of the above.

[0017] Compared with the prior art, the beneficial effects of the present invention are: By shielding the 1-bit EDAC interrupt, the present invention avoids frequent interruptions from interrupting program operation while maintaining the error correction ability, ensuring data correctness. At the same time, replacing atomic instructions with non-atomic sequences (cooperating with interrupt disabling) avoids atomic operations being terminated midway due to EDAC errors and prevents program logic errors, improving the long-term reliability of the system; Through active RAM maintenance, the background task performs periodic full-memory read-write-back operations to actively repair single-event upsets (SEUs), avoiding the formation of uncorrectable 2-bit EDAC errors caused by the superposition of 1-bit hardware errors and 1-bit SEUs, and preventing error accumulation from triggering a fatal failure; Through boot chain reconstruction and modifying the reset processing function, the present invention enables the application to directly execute the modified bootloader in the RAM after reset, bypassing the original PROM bootloader, avoiding continuous reset failures. At the same time, supplementary code for implementing autonomous modification logic is inserted into the bootloader to force the on-orbit programming repair of the original program to be completed before loading the application, ensuring that even if the data line is completely disconnected, the system can still run normally through the patched software, realizing autonomous repair and system self-healing. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation to the present invention. In the drawings: Figure 1 is a flowchart of an on-orbit one-bit data line connection fault remediation method for an on-board computer of the present invention; Figure 2 Schematic diagram of the reset operation process and storage topology of the on-board computer program before the execution software is reprogrammed in orbit according to the present invention; Figure 3 Schematic diagram of the reset operation process and storage topology of the program after the execution software is reprogrammed in orbit according to the present invention. Specific implementation manner

[0019] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts shall fall within the protection scope of the present application.

[0020] A remedial method and system for an on-board computer when a one-bit data line connection anomaly occurs in orbit provided by the present invention realizes a ground remedial measure for a one-bit data line connection hardware anomaly in an on-board computer. During the intermittent period when the data line connection is normal, a hardware fault remedial process is implemented through the measure of in-orbit software programming to ensure that after the data line is completely disconnected, the on-board computer software can still operate normally and will not be permanently invalidated and shut down, thereby improving the reliability of the system during long-term in-orbit operation.

[0021] The following illustrates the specific implementation manner of the present invention in conjunction with the accompanying drawings and embodiments.

[0022] Embodiment 1 Please refer to Figure 1 , which is a technical solution for a remedial method for a one-bit data line connection fault of an on-board computer provided in this embodiment, including the following steps: S1: While starting the EDAC error detection and correction function in the on-board computer, mask the interrupt triggered by a one-bit EDAC error; S2: Replace the atomic operation instructions in the application program object code with ordinary instructions with equivalent functions to avoid the risk of atomic operation interruption caused by EDAC errors; S3: Reconstruct the random access memory RAM maintenance mechanism, and use the method of reading and then writing back under the protection of masked interrupts to replace the original maintenance method based on EDAC interrupts for error detection and correction; S4: Modify the application program exception reset processing function through in-orbit programming, including: Autonomously complete the bootstrap process of the boot program in the PROM, modify and improve the boot program object code loaded into the RAM, then jump to execute the modified and improved boot program, and then the boot program loads the application program to run.

[0023] Among them, step S1 specifically includes: Configure the corresponding registers to start the EDAC error detection and correction function in the on-board computer, and detect and repair memory errors through the error correction code ECC; If a 1-bit error is detected, the EDAC error detection and correction function automatically corrects the data by flipping the error bit without triggering an interruption. If an uncorrectable error is detected, a reset process is triggered; To ensure that 1-bit errors do not accumulate into uncorrectable errors, a proactive RAM maintenance mechanism is periodically executed.

[0024] Specifically, in this embodiment, taking the on-board computer of the AT697F processor platform as an example, this processor has the EDAC protection function for external RAM. The 32-bit wide SRAM requires 8-bit SRAM to store the EDAC check value, which altogether forms a 40-bit width. When the processor reads the data in the SRAM and detects a 1-bit error, it can return the correct data and at the same time generate interrupt No. 1. The application writes the data corrected by EDAC back to the SRAM through this interrupt. In this step example, the on-orbit programming method with the hook method available in the application is used to change the application to mask interrupt No. 1.

[0025] After that, we need to replace the atomic operation instructions in the program object code with ordinary instructions, including: Use ordinary instruction combinations to disable the interrupt or lock mechanism, simulate atomic operations, ensure that the operation sequence is not interrupted, achieve the same logical behavior as the atomic operation instructions, and avoid the instruction abort after triggering an EDAC error during atomic operations; Increase the execution time of ordinary instructions, and at the same time relieve the performance impact caused by multiple operations required for the ordinary instruction sequence through hardware optimization.

[0026] In this embodiment, the AT697F processor is of the SPARC V8 instruction set, and there are two atomic instructions, SWAP and LDSTUB. Among them, the application uses the SWAP exchange instruction in the system underlying functions __attach_handler and __set_stack_ptr, and it is a one-way exchange. Therefore, it can be replaced with the ST write instruction through the on-orbit programming method with the hook method available in the application.

[0027] Then, change the way of maintaining the RAM for the background task to read out and write back, specifically including: S31: Set the RAM maintenance period, and the setting of this period needs to be determined according to the single-event upset rate and the RAM capacity; S32: Save the current interrupt status and disable the interrupt for subsequent restoration; S33: Traverse the RAM addresses, read the data, and let EDAC automatically correct 1-bit errors. After returning the correct data, write the corrected data back to the original address and refresh the parity bits to avoid the accumulation of single-event upset error bits in the space, which may lead to multiple-bit EDAC error exceptions. S34: Restore the interrupt enable state.

[0028] In this embodiment, to avoid the accumulation of EDAC error bits leading to uncorrectable EDAC exceptions, the application program designs a background task to read and traverse the SRAM, and corrects and writes back the data at the error address in the EDAC error interrupt service subroutine. Since the EDAC error interrupt is masked in step S1, in this step example, the background task SRAM maintenance function Check_RAM is modified by the in-orbit programming method with hooks available in the application program, and it is changed to read and write back the data of each SRAM address in turn under the protection of interrupt disabling.

[0029] Finally, modify the application program exception reset processing function, which further includes: S41: Change the application program exception reset processing function by in-orbit programming. Write 0 to the RAM space where the application program runs to regenerate the EDAC parity bits to eliminate potential errors, and copy the boot program code block of the PROM to the specified area of the RAM, so as to modify the program bootstrap process that jumps to the PROM after reset to the application program's independent execution of the bootstrap process of the boot program. S42: Modify and improve the boot program object code in the RAM, enable the EDAC function but mask the interrupt triggered by 1-bit EDAC errors, and replace the atomic operation instructions in the program object code with ordinary instructions to ensure the normal operation of the boot program.

[0030] Specifically, in this embodiment, before performing the software in-orbit programming modification in this step, as Figure 2 shown, the system is designed to store the boot program in the PROM at the reset entry zero address, which consists of a bootstrap function program and a main function program. When the system is powered on or the application program is reset, after the bootstrap function of the boot program refreshes the EDAC check code of the SRAM, the main function code of the boot program is loaded to the end of the SRAM for operation. When the boot program runs, the triple modular redundancy of the application program in the EEPROM is loaded to the head of the SRAM and then jumps to run.

[0031] After performing the software in-orbit programming modification in this step, as Figure 3As shown in the figure, by using the on-orbit programming method of the hook method in the application program to modify the application program reset processing function _abend, first, the bootstrap function program of the bootstrap program is autonomously executed to refresh the EDAC check code of the SRAM, and the main function program of the bootstrap program in the PROM is loaded into the RAM. Then, the bootstrap program in the SRAM is modified and improved. Similar to the application program, the EDAC function is enabled but the 1-bit error EDAC interrupt is masked, and the atomic operation instruction in the program object code is replaced with a general instruction. Finally, it jumps to the entry address of the bootstrap program in the RAM and starts running the modified and improved bootstrap program. That is, through this step, the on-orbit programming repair of the bootstrap program is indirectly realized.

[0032] Optionally, the method further includes: When the data line with abnormal connection is completely disconnected and the state of 1-bit EDAC error occurs in the RAM, the EDAC detects 2-bit uncorrectable errors, triggers the application program reset, and executes the reset process after on-orbit programming in step S4 to resume normal operation, avoiding continuous reset exceptions, rather than jumping to the zero address to run the original version of the bootstrap program in the PROM after reset and falling into continuous reset exceptions, unless a hard reset such as system power-on or watchdog timer occurs.

[0033] In addition, if the on-orbit programming modification process cannot be automatically executed before running the reloaded application program after reset, when modifying the target code of the bootstrap program in step S4, supplementary code is inserted before jumping and running to enable the bootstrap program to autonomously enable the on-orbit programming modification process for the application program, avoiding errors in the original version of the application program after reloading.

[0034] Specifically, in this embodiment, as Figure 3 shown, since in this example, the on-orbit programming modification of the application program is carried out in the form of a patch, the original program stored in the EEPROM has not changed, and the bootstrap program does not autonomously execute the on-orbit programming modification process of the application program in steps S1~S4 before running the reloaded application program after reset. Therefore, when modifying the target code of the bootstrap program in step S4, before jumping and running after loading the application program, a section of code is inserted through the on-orbit programming method of the hook method to autonomously modify the logic and autonomously enable the replacement of the hook function entry in steps S1~S4, avoiding errors in the application program that resumes the original version after reloading.

[0035] On the other hand, this embodiment provides a on-orbit one-bit data line connection fault remedy system for a spaceborne computer, including: An EDAC configuration module, used to start the EDAC error detection and correction function in the spaceborne computer while masking the interrupt triggered by 1-bit EDAC error; An instruction optimization module, which is used to replace the atomic operation instructions in the application program object code with ordinary instructions with equivalent functions, so as to avoid the risk of atomic operation interruption caused by EDAC errors; A maintenance mechanism reconstruction module, which is used to reconstruct the random access memory (RAM) maintenance mechanism, and adopt the method of reading and writing back under the protection of masked interrupts to replace the original maintenance method based on error detection and correction (EDAC) interrupts; A reset process reconstruction module, which is used to modify the application program reset processing function through in-orbit programming, including: Autonomously complete the bootstrap process of the boot program in the PROM. After modifying and improving the object code of the boot program loaded into the RAM, jump to execute the modified and improved boot program, and then the application program is loaded and run by the boot program.

[0036] It should be noted that the steps in the method for remedying the on-orbit single-bit data line connection failure of the on-board computer provided in this embodiment can be implemented by using the corresponding modules, devices, units, etc. in the on-orbit single-bit data line connection failure remedy system for the on-board computer. Those skilled in the art can refer to the technical solutions of the system to implement the step flow of the method. That is, the embodiments in the system can be understood as the preferred examples for implementing the method, and will not be elaborated here.

[0037] In addition to implementing the system and its various devices provided by the present invention in the form of pure computer-readable program codes, the method steps can be logically programmed to enable the system and its various devices provided by the present invention to be implemented in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers, etc. to achieve the same functions. Therefore, the system and its various devices provided by the present invention can be regarded as a kind of hardware components, and the devices included therein for implementing various functions can also be regarded as the structures within the hardware components; the devices for implementing various functions can also be regarded as both software modules for implementing the method and the structures within the hardware components.

[0038] Finally, it should be noted that the above are only the preferred embodiments of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions falling within the idea of the present invention belong to the protection scope of the present invention. It should be pointed out that for those of ordinary skill in the art, several improvements and refinements made without departing from the principle of the present invention should also be regarded as the protection scope of the present invention.

[0039] The technical features of the above embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

Claims

1. A method for remedying on-orbit single-bit data line connection faults of a spaceborne computer, characterized in that, It includes the following steps: S1: While starting the EDAC error detection and correction function in the on-board computer, mask the interrupt triggered by a 1-bit EDAC error; S2: Replace the atomic operation instructions in the application program object code with ordinary instructions with equivalent functions to avoid the risk of atomic operation interruption caused by EDAC errors; S3: Reconstruct the random access memory (RAM) maintenance mechanism, and use the method of reading and writing back under the protection of masked interrupts to replace the original maintenance method based on EDAC interrupts for error detection and correction; S4: Modify the application program exception reset processing function through on-orbit programming, including: Autonomously complete the bootstrap process of the bootstrap program in the PROM, modify and improve the object code of the bootstrap program loaded into the RAM, then jump to execute the modified and improved bootstrap program, and then the bootstrap program loads the application program to run.

2. The on-orbit single-bit data line connection fault remedy method for a spaceborne computer according to claim 1, characterized in that Step S1 further includes: Configure the corresponding registers to start the EDAC error detection and correction function in the on-board computer, and detect and repair memory errors through the error correction code (ECC); If a 1-bit error is detected, the EDAC error detection and correction function automatically corrects the data by flipping the error bit without triggering an interrupt. If an uncorrectable error is detected, the reset process is triggered; To ensure that 1-bit errors do not accumulate into uncorrectable errors, a proactive RAM maintenance mechanism is periodically executed.

3. The on-orbit single-bit data line connection fault remedy method for a spaceborne computer according to claim 1, characterized in that, In step S2, replacing the atomic operation instructions in the application program object code with ordinary instructions with equivalent functions further includes: Use a combination of ordinary instructions to disable the interrupt or lock mechanism, simulate atomic operations, ensure that the operation sequence is not interrupted, and achieve the same logical behavior as the atomic operation instructions, avoiding the instruction abort after triggering an EDAC error during atomic operations; Increase the execution time of ordinary instructions, and at the same time relieve the performance impact caused by multiple operations in the ordinary instruction sequence through hardware optimization.

4. The on-orbit one-bit data line connection fault remedy method for the spaceborne computer according to claim 1, characterized in that In step S3, the reconstruction of the random access memory (RAM) maintenance mechanism further includes: S31: Set the RAM maintenance period, and the setting of this period needs to be determined according to the single-event upset rate and the RAM capacity; S32: Save the current interrupt status and disable the interrupt for subsequent recovery; S33: Traverse the RAM addresses, read the data, the EDAC automatically corrects a 1-bit error, write the corrected data back to the original address after returning the correct data, and refresh the parity bit to avoid the accumulation of single-event upset error bits in space leading to multi-bit EDAC error exceptions; S34: Restore the interrupt enable status.

5. The on-orbit one-bit data line connection fault remedy method for a spaceborne computer according to claim 1, characterized in that In step S4, modifying the application program reset processing function further includes: S41: Change the application program exception reset processing function through on-orbit programming, write 0 to the RAM space where the application program runs to regenerate the EDAC parity bit to eliminate potential errors, and copy the bootstrap program code block of the PROM to the specified area of the RAM, so as to modify the program bootstrap process that jumps to the PROM for execution after reset to the application program autonomously executing the bootstrap process; S42: Modify and improve the boot program object code in the RAM to enable the EDAC function but mask the interrupt triggered by 1-bit EDAC error, replace the atomic operation instructions in the program object code with ordinary instructions, and ensure the normal operation of the boot program.

6. The on-orbit one-bit data line connection fault remedy method for a spaceborne computer according to claim 1, characterized in that, The method further includes: If the data line with abnormal connection is completely disconnected and the state of 1-bit EDAC error occurs in the RAM, the EDAC detects 2-bit uncorrectable errors, triggers the reset of the application program, and executes the reset process after in-orbit programming in step S4 to restore normal operation, avoiding continuous abnormal reset.

7. The on-orbit single-bit data line connection fault remedy method for the on-board computer according to claim 1, characterized in that, The method further includes: If the in-orbit programming modification process cannot be automatically executed before running the reloaded application program after reset, when modifying the boot program object code in step S4, insert supplementary code before jumping to run to enable the boot program to autonomously enable the in-orbit programming modification process for the application program, avoiding errors in the operation of the original version of the application program after reloading.

8. An on-orbit one-bit data line connection fault remedy system for a spaceborne computer, characterized in that, It includes: An EDAC configuration module, used to enable the EDAC error detection and correction function in the on-board computer while masking the interrupt triggered by 1-bit EDAC error; An instruction optimization module, used to replace the atomic operation instructions in the application program object code with ordinary instructions with equivalent functions, avoiding the risk of atomic operation interruption caused by EDAC errors; A maintenance mechanism reconstruction module, used to reconstruct the random access memory (RAM) maintenance mechanism, and use the method of reading and rewriting back under the protection of masked interrupts to replace the original maintenance method based on EDAC interrupt for error detection and correction; A reset process reconstruction module, used to modify the application program reset processing function through in-orbit programming, including: Autonomously complete the boot process of the boot program in the PROM, modify and improve the boot program object code loaded into the RAM, then jump to execute the modified and improved boot program, and then the boot program loads the application program to run.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, The program includes a boot program and an application program, and when executed by a processor, it implements the method for remedying the on-orbit one-bit data line connection failure of the on-board computer as described in any one of claims 1-7.

10. An electronic device, characterized in that, It includes: One or more processors; A storage device, used to store one or more programs, and when the one or more programs are executed by the one or more processors, the one or more processors implement the method for remedying the on-orbit one-bit data line connection failure of the on-board computer as described in any one of claims 1-7.

Images