Data backfilling circuit, data backfilling method, chip and electronic equipment

Abstract

The invention discloses a data backfilling circuit, a data backfilling method, a chip and electronic equipment, and belongs to the technical field of processors. The circuit comprises a distribution module, a storage module and a plurality of first control modules, the plurality of first control modules are connected with the distribution module and a memory, and the storage module is connected with the memory and a buffer. The distribution module is used for acquiring a backfilling request and distributing the backfilling request to a second control module in the plurality of first control modules; the second control module is used for sending a backfill request to the memory, the backfill request is used for indicating the memory to send backfill data to the storage module for multiple times, and the memory sends one backfill data to the storage module each time; and the storage module is used for storing the received backfill data to the buffer when each backfill data is received. In the circuit, the plurality of first control modules share the storage module, and the storage module only needs one backfill data storage space, so that the area of the processor can be greatly reduced.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of processors, and particularly to a data backfill circuit, a data backfill method, a chip, and an electronic device. Background Art

[0002] A processor includes a cache. During the execution of a program by the processor, data is preferentially read from the cache. If the data does not exist in the cache, the processor needs to perform data backfill to store the data in the memory into the cache for subsequent data reading from the cache. Based on this, how to design a data backfill circuit has become an urgent problem to be solved. Summary of the Invention

[0003] The present application provides a data backfill circuit, a data backfill method, a chip, and an electronic device, which can backfill the data in the memory to the cache through the data backfill circuit. The technical solution includes the following content.

[0004] On the one hand, a data backfill circuit is provided. The circuit includes a distribution module, a storage module, and a plurality of first control modules. Each first control module in the plurality of first control modules is connected to the distribution module and the memory, and the storage module is connected to the memory and the cache.

[0005] The distribution module is configured to obtain a backfill request and allocate the backfill request to a second control module among the plurality of first control modules.

[0006] The second control module is configured to send the backfill request to the memory. The backfill request is used to instruct the memory to send backfill data to the storage module multiple times, where the memory sends one backfill data to the storage module each time.

[0007] The storage module is configured to store the received backfill data in the cache each time a backfill data is received.

[0008] On the other hand, a data backfill method is provided. The method is executed by a data backfill circuit. The circuit includes a distribution module, a storage module, and a plurality of first control modules. Each first control module in the plurality of first control modules is connected to the distribution module and the memory, and the storage module is connected to the memory and the cache. The method includes:

[0009] Obtaining a backfill request through the distribution module and allocating the backfill request to a second control module among the plurality of first control modules.

[0010] Send the backfill request to the memory through the second control module, where the backfill request is used to instruct the memory to send backfill data to the storage module multiple times, and each time the memory sends one backfill data to the storage module;

[0011] Each time the storage module receives a backfill data, store the received backfill data in the buffer.

[0012] On the other hand, a chip is provided, and the chip includes the data backfill circuit described above.

[0013] On the other hand, an electronic device is provided, and the electronic device includes the chip described above.

[0014] The technical solution provided by this application at least brings the following beneficial effects:

[0015] The data backfill circuit provided by this application includes a distribution module, a storage module, and multiple first control modules. Among them, the distribution module obtains a backfill request and distributes the backfill request to the second control module among the multiple first control modules. The second control module sends the backfill request to the memory, and the memory sends backfill data to the storage module multiple times based on the backfill request. Each time the memory sends one backfill data to the storage module. Since the second control module can be any one of the first control modules, and the storage module is used to receive the backfill data requested by the second control module, the storage module is a module shared by at least two first control modules. Since the storage module stores the received backfill data in the buffer each time it receives a backfill data, it can avoid blocking the backfill process. And the storage module only needs the storage space for one backfill data, which can greatly reduce the area of the processor. Description of the Drawings

[0016] In order to more clearly illustrate the technical solutions in the embodiments of this application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of this application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0017] Figure 1 is a schematic diagram of a data backfill circuit provided by an embodiment of this application;

[0018] Figure 2 is a schematic diagram of another data backfill circuit provided by an embodiment of this application;

[0019] Figure 3 is a schematic diagram of a data backfill process provided by an embodiment of this application;

[0020] Figure 4 It is a flowchart of a data backfilling method provided by an embodiment of the present application;

[0021] Figure 5 It is a schematic structural diagram of a chip provided by an embodiment of the present application;

[0022] Figure 6 It is a schematic structural diagram of an electronic device provided by an embodiment of the present application. Detailed implementation manners

[0023] To make the objectives, technical solutions, and advantages of the present application clearer, the following will further describe the embodiments of the present application in detail with reference to the accompanying drawings.

[0024] It should be noted that the terms "first", "second", etc. in the present application are used to distinguish similar objects and do not necessarily need to describe a specific order or sequence. It should be understood that such terms can be interchanged under appropriate circumstances so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. The implementation manners described in the following exemplary embodiments do not represent all implementation manners consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0025] An embodiment of the present application provides a data backfilling circuit. As Figure 1 shown, the data backfilling circuit 10 is connected to the memory 20 and is also connected to the buffer 30. The embodiment of the present application does not limit the structure, devices, etc. of the data backfilling circuit 10. Any circuit that can backfill the data in the memory 20 to the buffer 30 can be used as the data backfilling circuit 10.

[0026] Among them, the memory 20 is a device for storing instructions and data. The electronic device may include at least one memory, and the memory 20 is any one of the at least one memory. Alternatively, the memory 20 may also be a memory cluster. Optionally, the electronic device includes at least two memories. According to functions, connection methods, etc., the at least two memories are divided into a main memory (Main Memory) and an auxiliary memory, and the memory 20 may be the main memory. The main memory is an important component of the electronic device for storing instructions and data and can be directly accessed by a central processing unit (Central Processing Unit, CPU).

[0027] The buffer 30, also known as cache, is a device that can perform high-speed data exchange. Generally speaking, the data exchange rate of the buffer 30 can be faster than that of the memory 20. Generally, when the CPU needs to read a piece of data, it first looks for it in the buffer 30. If the data exists in the buffer 30, the CPU reads the data from the buffer 30. If the data does not exist in the buffer 30, the CPU needs to read the data from the memory 20. At the same time, the data block where this data is located is stored in the buffer 30. Subsequently, when the CPU needs to read the data in the data block, it can directly read it from the buffer 30 without having to read it from the memory 20. This technology of storing the data in the memory 20 into the buffer 30 is called data backfilling.

[0028] In a possible implementation, the processor is connected to the memory 20, and the processor includes a buffer 30 and a data backfilling circuit 10.

[0029] In this example, the data backfilling circuit 10 includes a distribution module 101, a storage module 103, and multiple first control modules 102. Each of the multiple first control modules 102 in the multiple first control modules 102 is connected to the distribution module 101 and the memory 20, and the storage module 103 is connected to the memory 20 and the buffer 30. Optionally, the number of first control modules is N, where N is a positive integer greater than or equal to 2. For example, N is equal to 8. For ease of description, the labels 102-1 to 102-N are used to represent the N first control modules respectively.

[0030] The distribution module 101 is configured to obtain a backfilling request and distribute the backfilling request to a second control module among the multiple first control modules 102.

[0031] In this example, the data backfilling circuit 10 further includes a request module. The request module can generate a backfilling request and send the backfilling request to the distribution module 101. The backfilling request is a request for backfilling the data in the memory 20 into the buffer 30. For ease of description, the data requested by the backfilling request is called backfilling data, and there are at least two pieces of backfilling data. The data block mentioned above includes each piece of backfilling data. The backfilling request carries a source address and a destination address. The source address is the address of the backfilling data in the memory 20, which is used to represent the storage location of the backfilling data in the memory 20. The destination address is the address of the backfilling data in the buffer 30, which is used to represent the storage location of the backfilling data in the buffer 30.

[0032] The manner in which the request module generates the backfilling request is not limited herein. For example, the request module can generate the backfilling request at any time, or the request module can generate the backfilling request when a condition is met. In practical applications, the condition can be set flexibly. The following shows a possible implementation.

[0033] AsFigure 2 As shown, the data backfill circuit 10 further includes a request module 104, and the request module 104 is connected to the allocation module 101 and the buffer 30.

[0034] The request module 104 is configured to send an access request to the allocation module 101 and the buffer 30, and the access request is used to request to read access data.

[0035] The request module 104 can generate an access request, and the access request is a request for reading data. For the convenience of description, the data requested by the access request is referred to as access data, and there is at least one access data. It can be understood that the access data may or may not be backfill data. The access request carries an access address. The access address is the address of the access data in the buffer 30 and is used to represent the storage location of the access data in the buffer 30.

[0036] After the request module 104 generates an access request, on the one hand, the request module 104 sends the access request to the allocation module 101 so that the allocation module 101 receives the access request. On the other hand, the request module 104 sends the access request to the buffer 30 so that the buffer 30 receives the access request.

[0037] The allocation module 101 is further configured to send first response information to the request module 104, and the first response information characterizes whether there is a first control module to execute processing on the access data.

[0038] The first control module is a circuit for processing backfill requests. Since the backfill request is used to request to store the backfill data of the memory 20 into the buffer 30, therefore, processing the backfill request is equivalent to executing processing on the backfill data. In this example, if the first control module is in an idle state, the first control module does not process the backfill request, that is, the first control module does not execute processing on the backfill data. If the first control module is in a backfill state, the first control module processes the backfill request, that is, the first control module executes processing on the backfill data. Since the access data may or may not be backfill data, the first control module in the backfill state may execute processing on the access data.

[0039] The allocation module 101 can obtain information on whether each first control module executes processing on the access data, generate first response information based on this information, and send the first response information to the request module 104. The first response information includes a first character or a second character. The existence of a first control module executing processing on the access data is characterized by the first character, and the non-existence of a first control module executing processing on the access data is characterized by the second character. The first character and the second character are different characters. For example, the first character is 1 and the second character is 0.

[0040] In an exemplary embodiment, the access request carries a second address, and the second address represents the storage location of the access data in the buffer 30. Among them, the first control module is further configured to store a third address, and the third address represents the storage location of the data requested by the first control module for backfilling in the buffer 30. The allocation module 101 is further configured to compare the second address with the third addresses stored in each first control module, and determine the first response information based on the comparison result. Among them, the second address is the access address mentioned below, and the third address is the destination address mentioned below.

[0041] If the first control module is in the backfill state, the first control module performs processing on the backfill data. The first control module stores the source address and the destination address carried in the backfill request. If the first control module is in the idle state, the first control module does not perform processing on the backfill data, and the first control module does not store the source address and the destination address.

[0042] Based on this, the request module 104 sends an access request to the allocation module 101 so that the allocation module 101 receives the access request, thereby obtaining the access address carried in the access request. The first control module includes a status flag, and the status flag represents the idle state or the backfill state. Since the first control module in the idle state does not store the destination address, the allocation module 101 can directly determine that the first control module with the status flag representing the idle state does not perform processing on the access data. Based on this, the allocation module 101 can determine the first control modules with the status flag representing the backfill state, and determine whether these first control modules perform processing on the access data.

[0043] Optionally, the allocation module 101 traverses the destination addresses stored in each first control module with the status flag representing the backfill state to compare whether the destination address contains the access address, and obtains a comparison result. If the comparison result indicates that there is a destination address that contains the access address, it means that the backfill data corresponding to the first control module storing the destination address includes the access data corresponding to the access request. That is to say, there is a first control module that performs processing on the access data. In this case, the allocation module 101 generates the first response information, and the first response information indicates that there is a first control module that performs processing on the access data. If the comparison result indicates that there is no destination address that contains the access address, it means that the backfill data corresponding to each first control module does not include the access data corresponding to the access request. That is to say, there is no first control module that performs processing on the access data. In this case, the allocation module 101 generates the first response information, and the first response information indicates that there is no first control module that performs processing on the access data.

[0044] Optionally, the allocation module 101 may determine a first control module whose status identifier represents the backfill status, and send a comparison request carrying an access address to the first control module. After receiving the comparison request, the first control module compares the access address with the destination address stored in the first control module. If the destination address contains the access address, the first control module generates a comparison result indicating that the comparison has passed. If the destination address does not include the access address, the first control module generates a comparison result indicating that the comparison has failed.

[0045] Each first control module in the backfill state sends a comparison result to the allocation module 101, so that the allocation module 101 can receive at least one comparison result. If there is a comparison result indicating that the comparison has passed among the comparison results, the allocation module 101 generates a first response message, and the first response message indicates that there is a first control module that executes processing on the access data. If all the comparison results indicate that the comparison has failed, the allocation module 101 generates a first response message, and the first response message indicates that there is no first control module that executes processing on the access data.

[0046] By comparing the second address carried in the access request with the third address stored in each first control module, it is realized to confirm whether the backfill data corresponding to each first control module contains the access data, so as to accurately confirm whether there is a first control module that executes processing on the access data, and improve the accuracy of the first response message.

[0047] For the convenience of description, the first response message indicating that there is a first control module that executes processing on the access data is abbreviated as: the first response message indicates a hit; the first response message indicating that there is no first control module that executes processing on the access data is abbreviated as: the first response message indicates a miss.

[0048] The allocation module 101 may send the first response message to the request module 104 so that the request module 104 receives the first response message.

[0049] The buffer 30 is further configured to send a second response message to the request module 104, and the second response message indicates whether there is access data in the buffer 30.

[0050] The request module 104 sends an access request to the buffer 30 so that the buffer 30 receives the access request, thereby obtaining the access address carried in the access request. Then, the buffer 30 can query whether there is data at the storage location corresponding to the access address. If there is data at the storage location corresponding to the access address, the buffer 30 generates a second response message, and the second response message indicates that there is access data in the buffer 30. If there is no data at the storage location corresponding to the access address, the buffer 30 generates a second response message, and the second response message indicates that there is no access data in the buffer 30.

[0051] For the sake of description, it is abbreviated that the second response information representation buffer 30 has access data as: the second response information representation hits; and it is abbreviated that the second response information representation buffer 30 does not have access data as: the second response information representation misses.

[0052] The buffer 30 can send the second response information to the request module 104 so that the request module 104 can receive the second response information.

[0053] The request module 104 is further configured to send a backfill request to the allocation module 101 when the first response information representation does not have the first control module to execute the processing of the access data and the second response information representation buffer 30 does not have the access data, and the data requested by the backfill request includes the access data.

[0054] The request module 104 can receive the first response information and the second response information. Since each response information can represent a hit or a miss, there are the following four cases.

[0055] Case 1: The first response information representation hits and the second response information also represents a hit. That is: the first response information representation has the first control module execute the processing of the access data, and the second response information representation buffer 30 has the access data. Explanation: The access data is backfill data, and the access data has been stored in the buffer 30. Optionally, there are at least two access data, and the buffer 30 having the access data specifically may be that the buffer 30 has some of the access data. That is to say: each access data is backfill data, but some of the access data has been stored in the buffer 30, and the remaining access data has not been stored in the buffer 30 yet.

[0056] Case 2: The first response information representation hits and the second response information representation misses. That is: the first response information representation has the first control module execute the processing of the access data, and the second response information representation buffer 30 does not have the access data. Explanation: The access data is backfill data, and the access data has not been stored in the buffer 30 yet.

[0057] Case 3: The first response information representation misses and the second response information representation hits. That is: the first response information representation does not have the first control module execute the processing of the access data, and the second response information representation buffer 30 has the access data. Explanation: The access data is not backfill data, and the access data has been stored in the buffer 30.

[0058] Case 4: The first response message indicates a miss, and the second response message indicates a miss. That is: The first response message indicates that there is no first control module to execute the processing for the access data, and the second response message indicates that the access data does not exist in the buffer 30. Explanation: The access data is not backfill data, and the access data has not been stored in the buffer 30 temporarily.

[0059] For Case 1 and Case 3, since the access data has been stored in the buffer 30, the request module 104 can directly read the access data from the buffer 30. For Case 1 and Case 2, although the access data has not been stored in the buffer 30 temporarily, since the access data is backfill data, the request module 104 can read the access data from the buffer 30 after the backfill is completed, that is, the request module 104 can read the access data from the buffer 30 after the access data is backfilled to the buffer 30. For Case 4, since the access data is not backfill data and the access data is stored in the buffer 30, the request module 104 cannot read the access data from the buffer 30. In this case, the request module 104 needs to send a backfill request to the allocation module 101 to request that the backfill data containing the access data be backfilled to the buffer 30.

[0060] Only when there is no first control module to execute the processing for the access data and the access data does not exist in the buffer 30, the request module 104 sends a backfill request to the allocation module 101, which realizes accurately sending a backfill request when the access data has not been backfilled and reduces the sending frequency of invalid backfill requests.

[0061] The request module 104 sends a backfill request to the allocation module 101 so that the allocation module 101 receives the backfill request. Then, the allocation module 101 selects a first control module whose status flag indicates an idle state from at least two first control modules, and the selected first control module is the second control module. Optionally, the allocation module 101 can traverse each first control module. When it traverses a first control module whose status flag indicates an idle state, the allocation module 101 determines that the first control module is the second control module and sends a backfill request to the second control module. In addition, after the allocation module 101 traverses out the second control module, it stops the traversal operation.

[0062] The second control module is used to send a backfill request to the memory 20, and the backfill request is used to instruct the memory 20 to send backfill data to the storage module 103 multiple times, where the memory 20 sends one backfill data to the storage module 103 each time.

[0063] The allocation module 101 sends a backfill request to the second control module so that the second control module receives the backfill request. Optionally, before the second control module receives the backfill request, the status flag of the second control module indicates an idle state. After the second control module receives the backfill request, the second control module changes the status flag, changing the status flag from indicating an idle state to indicating a backfill state.

[0064] After the second control module receives the backfill request, the second control module stores the source address and destination address carried in the backfill request and sends the backfill request to the memory 20. The backfill request sent by the second control module to the memory 20 carries the source address. After the memory 20 receives the backfill request, it reads the backfill data in the storage location corresponding to the source address (i.e., the address of the backfill data in the memory 20) and sends the backfill data to the storage module 103.

[0065] It should be noted that there are at least two backfill data, and these backfill data belong to a data block. The memory 20 sequentially sends each backfill data to the storage module 103. That is to say, the memory 20 sends the backfill data to the storage module 103 multiple times. Among them, the memory 20 sends one backfill data to the storage module 103 each time, and a total of at least two backfill data will be sent. It should be noted that one backfill data refers to one unit of data. In the computer field, 128-bit data is the basic unit of data storage and data processing. Based on this, one backfill data refers to 128-bit data.

[0066] The transmission interval between any two backfill data is an arbitrary clock cycle. For example, the memory 20 sends the first backfill data to the storage module 103. After two clock cycles, the memory 20 sends the second backfill data to the storage module 103. After five clock cycles, the memory 20 sends the third backfill data to the storage module 103. In the next clock cycle, the memory 20 sends the fourth backfill data to the storage module 103. If the memory 20 processes at least two backfill requests simultaneously, the memory 20 can interleavingly send the backfill data of different backfill requests to the storage module 103.

[0067] The storage module 103 is used to store the received backfill data in the buffer 30 every time a backfill data is received.

[0068] Since the memory 20 sequentially sends each backfill data to the storage module 103, the storage module 103 sequentially receives each backfill data. These backfill data belong to a data block, and the data block is stored in a cache line of the buffer 30.

[0069] Optionally, the cache line includes at least two cache blocks, and the number of cache blocks included in the cache line is the same as the number of backfill data included in the data block. Each time the storage module 103 receives a piece of backfill data, it stores the backfill data in the corresponding cache block of the cache line. For example, when the storage module 103 receives the first piece of backfill data, it stores the first piece of backfill data in the first cache block of the cache line. When the storage module 103 receives the second piece of backfill data, it stores the second piece of backfill data in the second cache block of the cache line. When the storage module 103 receives the third piece of backfill data, it stores the second piece of backfill data in the third cache block of the cache line, and so on.

[0070] It can be understood that in addition to the storage module 103 being able to access the buffer 30, there are other devices that can access the buffer 30. In this example, the storage module 103 has the highest priority to access the buffer 30. Through this setting, it is ensured that each time the storage module 103 receives a piece of backfill data, it can store the backfill data in the buffer 30 in the next clock cycle, and can receive new backfill data in this clock cycle, which not only reduces the storage space of the storage module 103, but also reduces the probability that the storage module 103 blocks the memory 20 from sending backfill data.

[0071] In a possible implementation, the second control module is further configured to store a first address, where the first address represents the storage location of the received backfill data in the buffer. The storage module 103 is further configured to receive a first identifier sent by the memory 20, where the first identifier is used to indicate the second control module. The storage module 103 is configured to obtain the first address from the second control module indicated by the first identifier, and store the received backfill data in the storage location represented by the first address in the buffer 30. Wherein, the first address is the destination address.

[0072] During the process of the second control module sending a backfill request to the memory 20, it also sends a first identifier indicating the second control module. The memory 20 receives the backfill request and the first identifier, sequentially reads each piece of backfill data based on the backfill request, and sends the read backfill data and the first identifier to the storage module 103.

[0073] Each time the storage module 103 receives a piece of backfill data and the first identifier, it reads the destination address from the second control module indicated by the first identifier, and stores the backfill data in the storage location corresponding to the destination address (i.e., the address of the data in the buffer 30), thereby realizing backfilling the backfill data to the buffer 30.

[0074] The storage module 103 accurately determines the storage location of the backfill data in the buffer 30 by obtaining the first address from the second control module, so that the backfill data can be accurately stored in the buffer 30.

[0075] In another possible implementation, the storage module 103 is further configured to receive a second identifier sent by the memory 20, where the second identifier is used to indicate whether the received backfill data is abnormal data. The storage module 103 is configured to store the received backfill data into the buffer 30 when the second identifier indicates that the received backfill data is not abnormal data.

[0076] In the embodiment of the present application, each time the memory 20 sends backfill data to the storage module 103, it also sends a second identifier, so that the storage module 103 can receive the second identifier. The second identifier is used to indicate whether the backfill data is abnormal data. Optionally, if the backfill data is abnormal data, the second identifier includes a third character to indicate that the backfill data is abnormal data through the third character. If the backfill data is not abnormal data, the second identifier includes a fourth character to indicate that the backfill data is not abnormal data through the fourth character. The third character and the fourth character are different characters. For example, the third character is 1 and the fourth character is 0.

[0077] If the second identifier indicates that the backfill data is abnormal data, the storage module 103 sends a prompt message to the buffer 30 to indicate that the backfill data is abnormal through the prompt message. After receiving the prompt message, the buffer 30 changes the status identifier of the cache line to change the status identifier from indicating valid to indicating invalid. If the status identifier of the cache line indicates invalid, the buffer 30 releases the data of the cache line to empty the cache line. After emptying the data of the cache line, the buffer 30 changes the status identifier of the cache line to change the status identifier from indicating invalid to indicating valid. In addition, the storage module 103 sends the second identifier to the second control module so that the second control module stores the second identifier.

[0078] If the second identifier indicates that the backfill data is not abnormal data, the storage module 103 stores the backfill data into the buffer 30. In addition, the storage module 103 sends the second identifier to the second control module so that the second control module stores the second identifier.

[0079] The storage module 103 stores the backfill data into the buffer 30 only when the received backfill data is not abnormal data, reducing the possibility of the buffer 30 storing abnormal data, realizing the effective utilization of the storage space of the buffer 30, and reducing the waste of the storage space.

[0080] Optionally, the received backfill data is not the first backfill data. The second control module is further configured to store a third identifier, where the third identifier is used to indicate whether each of the backfill data before the non-first backfill data is abnormal data. The storage module 103 is configured to store the received backfill data into the buffer 30 when the second identifier indicates that the received backfill data is not abnormal data and the third identifier indicates that each of the backfill data before the non-first backfill data is not abnormal data.

[0081] In an embodiment of the present application, when the memory 20 sends the fill data before the non-first fill data to the storage module 103, a third identifier is also sent to indicate whether the fill data is abnormal data through the third identifier. Optionally, if the fill data is abnormal data, the third identifier includes a third character to indicate that the fill data is abnormal data through the third character. If the fill data is not abnormal data, the third identifier includes a fourth character to indicate that the fill data is not abnormal data through the fourth character. The storage module 103 may send the third identifier to the second control module so that the second control module stores the third identifier. Based on this, before the storage module 103 receives the non-first fill data, the second control module has stored the third identifiers corresponding to each fill data before the non-first fill data.

[0082] After the storage module 103 receives the non-first fill data and the second identifier, if the second identifier indicates that the non-first fill data is abnormal data, the storage module 103 sends a prompt message to the buffer 30. After receiving the prompt message, the buffer 30 changes the status identifier from indicating valid to indicating invalid. In addition, the storage module 103 sends the second identifier to the second control module so that the second control module stores the second identifier.

[0083] If the second identifier indicates that the non-first fill data is not abnormal data, the storage module 103 obtains each third identifier from the second control module. If there is a third identifier indicating that the fill data before the non-first fill data is abnormal data, the storage module 103 sends the second identifier to the second control module so that the second control module stores the second identifier. If each third identifier indicates that the fill data before the non-first fill data is not abnormal data, the storage module 103 stores the non-first fill data in the buffer 30. In addition, the storage module 103 sends the second identifier to the second control module so that the second control module stores the second identifier.

[0084] The storage module 103 stores the non-first fill data in the buffer 30 only when the received non-first fill data is not abnormal data and each fill data before the non-first fill data is not abnormal data, reducing the possibility of the buffer 30 storing abnormal data, realizing the effective utilization of the storage space of the buffer 30, and reducing the waste of the storage space.

[0085] It can be understood that if the first backfilled data is abnormal data, the buffer 30 will not store the first backfilled data and the non-first backfilled data. If the non-first backfilled data is abnormal data and the backfilled data before the non-first backfilled data is not abnormal data, then when the buffer 30 has stored the backfilled data before the non-first backfilled data, the buffer 30 will not store the non-first backfilled data and the backfilled data after the non-first backfilled data, and the buffer 30 needs to release the backfilled data before the non-first backfilled data that has been stored. The second control module will continuously receive and store the identifier indicating whether the backfilled data is abnormal data. If the second control module receives the identifier indicating whether the last backfilled data is abnormal data, it means that the memory 20 has sent each backfilled data to the data backfill circuit 10 and the data backfill circuit 10 has completed the data backfill. In this case, the second control module releases the stored source address, destination address, identifier, etc., and changes the status identifier to change the status identifier from indicating the backfill status to indicating the idle status.

[0086] In a possible implementation, as Figure 2 shown, the data backfill circuit 10 further includes a request module 104, and the request module 104 is connected to the second control module and the storage module 103. The second control module is further configured to store a fourth identifier for indicating whether any backfilled data has been stored in the buffer 30. The request module 104 is configured to read any backfilled data from the storage module 103 or the buffer 30 based on the fourth identifier.

[0087] In this example, the second control module stores the fourth identifier of each backfilled data. For any backfilled data, before the storage module 103 receives the backfilled data sent by the memory 20, the fourth identifier indicates that the backfilled data has not been stored in the buffer 30. After the storage module 103 receives the backfilled data sent by the memory 20, if the storage module 103 stores the backfilled data in the buffer 30, the storage module 103 generates a notification message, and the notification message indicates that the backfilled data has been stored in the buffer 30; if the storage module 103 determines that the backfilled data will not be stored in the buffer 30, the storage module 103 generates a notification message, and the notification message indicates that the backfilled data has not been stored in the buffer 30. The storage module 103 can send the notification message to the second control module. After receiving the notification message, if the notification message indicates that the backfilled data has not been stored in the buffer 30, the second control module does not change the fourth identifier. At this time, the fourth identifier still indicates that the backfilled data has not been stored in the buffer 30; if the notification message indicates that the backfilled data has been stored in the buffer 30, the second control module changes the fourth identifier to change the fourth identifier from indicating that the backfilled data has not been stored in the buffer 30 to indicating that the backfilled data has been stored in the buffer 30.

[0088] The request module 104 sends an access request to the buffer 30 and the allocation module 101, and receives the first response information sent by the allocation module 101 and the second response information sent by the buffer 30. If the first response information indicates a miss and the second response information indicates a miss (i.e., the above-mentioned case 4), the request module 104 sends a refill request to the allocation module 101. If the first response information indicates a miss and the second response information indicates a hit (i.e., the above-mentioned case 3), the request module 104 directly reads the access data from the buffer 30. If the first response information indicates a hit and the second response information indicates a miss (i.e., the above-mentioned case 2), or if the first response information indicates a hit and the second response information indicates a hit (i.e., the above-mentioned case 1), then: for any access data that is refill data, the request module 104 can read the refill data from the storage module 103 or the buffer 30 based on the fourth identifier.

[0089] Optionally, the request module 104 is configured to read any refill data from the buffer 30 when it is determined based on the fourth identifier that any refill data has been stored in the buffer 30. When it is determined based on the fourth identifier that any refill data has not been stored in the buffer 30, read any refill data from the storage module 103.

[0090] If the fourth identifier indicates that the refill data has been stored in the buffer 30, the request module 104 directly reads the refill data from the buffer 30. Specifically, the access request sent by the request module 104 to the buffer 30 carries the access address, and the buffer 30 reads the refill data in the storage location corresponding to the access address and sends the refill data to the request module 104, so that the request module 104 can obtain the refill data.

[0091] If the fourth identifier indicates that the refill data has not been stored in the buffer 30, it means that: the memory 20 has not yet sent the refill data to the storage module 103, and the storage module 103 can receive the refill data subsequently, or the storage module 103 has received the refill data and has not yet stored the refill data in the buffer 30. Based on this, the request module 104 can directly read the refill data from the storage module 103. Specifically, since the first response information indicates a hit, that is, the first response information indicates that there is a first control module executing the processing of the access data, the destination address stored in this first control module is the access address. For the sake of description, the first control module storing the access address is called the third control module, and the third control module may or may not be the second control module.

[0092] The request module 104 sends an access request to the allocation module 101, and the allocation module 101 may send an access request to the request module 104, so that the request module 104 can obtain the access address carried in the access request. After the storage module 103 receives the backfill data sent by the memory 20, the storage module 103 obtains the destination address from the second control module. If the destination address is the access address, it indicates that the second control module is the third control module. In this case, on the one hand, the storage module 103 sends the backfill data to the request module 104 so that the request module 104 can receive the backfill data. On the other hand, the storage module 103 stores the backfill data at the storage location corresponding to the destination address in the buffer 30. If the destination address is not the access address, it indicates that the second control module is not the third control module. In this case, the storage module 103 stores the backfill data at the storage location corresponding to the destination address in the buffer 30.

[0093] Optionally, when the storage module 103 sends the backfill data to the request module 104, if the backfill data is abnormal data, the storage module 103 sends an exception message to the request module 104 to indicate that the access data requested by the request module 104 is abnormal through the exception message.

[0094] The request module 104 reads the backfill data from the storage module 103 or the buffer 30 based on the fourth identifier indicating whether the backfill data has been stored in the buffer 30, realizing fast reading of the backfill data and improving data access efficiency.

[0095] The above describes the data backfill circuit of the embodiment of the present application from the perspective of method steps. The following will be described in a systematic and comprehensive manner in combination with Figure 3 To elaborate. In this example, the data backfill circuit may perform the following steps.

[0096] Step 1: The request module 104 sends an access request to the buffer 30 and the allocation module 101, and obtains the response information returned by the buffer 30 and the allocation module 101. Among them, the response information returned by the allocation module 101 is the first response information mentioned above, and the response information returned by the buffer 30 is the second response information mentioned above.

[0097] Step 2: In the case where both the first response information and the second response information indicate a miss, the request module 104 sends a backfill request to the allocation module 101.

[0098] Step 3: The allocation module 101 selects a second control module whose status identifier indicates an idle state from each first control module 102, and sends a backfill request to the second control module. After receiving the backfill request, the second control module stores the source address and destination address carried in the backfill request. As Figure 3As shown, label 03 represents the status identifier. In this example, when the status identifier is 0, it represents the idle state, and when the status identifier is 1, it represents the backfill state. After the second control module receives the backfill request, it updates the status identifier 03 so that the status identifier represents the backfill state.

[0099] Step 4: The second control module sends a backfill request to the memory 20.

[0100] Step 5: Based on the source address carried in the backfill request, the memory 20 reads the backfill data and sends the backfill data to the storage module 103. In addition, when sending the backfill data, the memory 20 also sends a first identifier for indicating the second control module and a second identifier for indicating whether the backfill data is abnormal data.

[0101] Step 6: When the second identifier indicates that the backfill data is not abnormal data, the storage module 103 determines the second control module based on the first identifier and reads the destination address from the second control module. If the received backfill data is not the first backfill data, the storage module 103 also reads a third identifier from the second control module for indicating whether each of the backfill data before the non-first backfill data is abnormal data. As Figure 3 shown, label 01 is the third identifier for the two backfill data before the third backfill data, and the third identifier represents whether the backfill data is abnormal data. In this example, if the third identifier is 0, it represents that the backfill data is not abnormal data, and if the third identifier is 1, it represents that the backfill data is abnormal data.

[0102] Step 7: For the first backfill data, the storage module 103 stores the first backfill data in the buffer 30 based on the destination address. For the non-first backfill data, when the third identifier indicates that each of the backfill data before the non-first backfill data is not abnormal data, the storage module 103 stores the non-first backfill data in the buffer 30 based on the destination address.

[0103] Step 8: The storage module 103 sends a notification message to the second control module to indicate that the backfill data has been stored in the buffer 30 through the notification message. Before the second control module receives the notification message, the fourth identifier indicates that the backfill data has not been stored in the buffer 30. After the second control module receives the notification message, it determines that the fourth identifier indicates that the backfill data has been stored in the buffer 30. As Figure 3As shown, label 02 represents the fourth identifier of each piece of backfill data. In this example, the fourth identifier is 1, indicating that the backfill data has been stored in buffer 30, and the fourth identifier is 0, indicating that the backfill data has not been stored in buffer 30. Among them, the size of storage module 103 is 128 bits (i.e., 16 bytes). The cache line of buffer 30 includes four cache blocks, and the size of each cache block is 128 bits, that is, the size of the cache line is 64 bytes. Assume that the first two cache blocks of the cache line have stored backfill data, and the last two cache blocks have not stored backfill data (i.e., Figure 3 in buffer 30, the two gray squares represent the cache blocks that have stored backfill data, and the two white squares represent the cache blocks that have not stored backfill data), then the fourth identifiers corresponding to the four pieces of backfill data are: 1, 1, 0, 0.

[0104] The above data backfill circuit includes a distribution module, a storage module, and multiple first control modules. Among them, the distribution module obtains a backfill request and distributes the backfill request to the second control module among the multiple first control modules. The second control module sends a backfill request to the memory, and the memory sends backfill data to the storage module multiple times based on the backfill request. Among them, the memory sends one piece of backfill data to the storage module each time. Since the second control module can be any one of the first control modules, and the storage module is used to receive the backfill data requested by the second control module, the storage module is a module shared by at least two first control modules. Since the storage module stores the received backfill data in the buffer every time it receives a piece of backfill data, it can avoid blocking the backfill process. And the storage module only needs the storage space for one piece of backfill data, which can greatly reduce the area of the processor.

[0105] An embodiment of the present application also provides a data backfill method, which is executed by the data backfill circuit. The data backfill circuit includes a distribution module, a storage module, and multiple first control modules. Each first control module among the multiple first control modules is connected to the distribution module and the memory, and the storage module is connected to the memory and the buffer. As Figure 4 shown, the method includes the following steps.

[0106] Step 401, obtain a backfill request through the distribution module and distribute the backfill request to the second control module among the multiple first control modules.

[0107] Step 402, send a backfill request to the memory through the second control module. The backfill request is used to instruct the memory to send backfill data to the storage module multiple times, where the memory sends one piece of backfill data to the storage module each time.

[0108] Step 403, store the received backfill data in the buffer every time the storage module receives a piece of backfill data.

[0109] In a possible implementation, the data backfilling method further includes:

[0110] The second control module stores the first address, where the first address represents the storage location of the received backfilled data in the buffer;

[0111] The storage module receives a first identifier sent by the memory, and the first identifier is used to indicate the second control module;

[0112] Storing the received backfilled data into the buffer includes:

[0113] The storage module obtains the first address from the second control module indicated by the first identifier, and stores the received backfilled data into the storage location represented by the first address in the buffer.

[0114] In a possible implementation, the data backfilling method further includes:

[0115] The storage module receives a second identifier sent by the memory, and the second identifier is used to indicate whether the received backfilled data is abnormal data;

[0116] Storing the received backfilled data into the buffer includes:

[0117] When the second identifier indicates that the received backfilled data is not abnormal data, the storage module stores the received backfilled data into the buffer.

[0118] In a possible implementation, the received backfilled data is not the first backfilled data; the data backfilling method further includes:

[0119] The second control module stores a third identifier, where the third identifier is used to indicate whether each of the backfilled data before the non-first backfilled data is abnormal data;

[0120] When the second identifier indicates that the received backfilled data is not abnormal data, the storage module stores the received backfilled data into the buffer, including:

[0121] When the second identifier indicates that the received backfilled data is not abnormal data and the third identifier indicates that each of the backfilled data before the non-first backfilled data is not abnormal data, the storage module stores the received backfilled data into the buffer.

[0122] In a possible implementation, the circuit further includes a request module, and the request module is connected to the allocation module and the buffer; the data backfilling method further includes:

[0123] The request module sends an access request to the allocation module and the buffer, and the access request is used to request a read access to data;

[0124] Send a first response message from the allocation module to the request module, where the first response message indicates whether there is a first control module to perform processing on the access data;

[0125] Send a second response message from the buffer to the request module, where the second response message indicates whether the access data exists in the buffer;

[0126] When the first response message indicates that there is no first control module to perform processing on the access data and the second response message indicates that the access data does not exist in the buffer, send a backfill request from the request module to the allocation module, where the data requested by the backfill request includes the access data.

[0127] In a possible implementation, the access request carries a second address, where the second address indicates the storage location of the access data in the buffer; the data backfill method further includes:

[0128] Store a third address by the first control module, where the third address indicates the storage location of the data requested for backfill by the first control module in the buffer;

[0129] Compare the second address with the third addresses stored by each first control module by the allocation module, and determine the first response message based on the comparison result.

[0130] In a possible implementation, the circuit further includes a request module, where the request module is connected to the second control module and the storage module; the data backfill method further includes:

[0131] Store a fourth identifier by the second control module, where the fourth identifier is used to indicate whether any backfill data has been stored in the buffer;

[0132] Read any backfill data from the storage module or the buffer by the request module based on the fourth identifier.

[0133] In a possible implementation, reading any backfill data from the storage module or the buffer by the request module based on the fourth identifier includes:

[0134] When it is determined based on the fourth identifier that any backfill data has been stored in the buffer, read any backfill data from the buffer by the request module;

[0135] When it is determined based on the fourth identifier that any backfill data has not been stored in the buffer, read any backfill data from the storage module by the request module.

[0136] The data backfilling circuit of the above method includes a distribution module, a storage module, and multiple first control modules. Among them, the distribution module obtains a backfilling request and distributes the backfilling request to a second control module among the multiple first control modules. The second control module sends the backfilling request to the memory, and the memory sends backfilling data to the storage module multiple times based on the backfilling request. Each time the memory sends one piece of backfilling data to the storage module. Since the second control module can be any one of the first control modules, and the storage module is used to receive the backfilling data requested by the second control module, the storage module is a module shared by at least two first control modules. Since the storage module stores the received backfilling data in the buffer each time it receives a piece of backfilling data, it can avoid blocking the backfilling process. Moreover, the storage module only needs the storage space for one piece of backfilling data, which can greatly reduce the area of the processor.

[0137] It should be understood that the above method embodiment and the data backfilling circuit described above belong to the same concept. For the specific implementation process, refer to the embodiment of the data backfilling circuit, which will not be elaborated here.

[0138] In an exemplary embodiment, a chip is further provided, as Figure 5 shown. The chip 500 includes the data backfilling circuit 10 mentioned above, and the data backfilling circuit 10 is used to execute the data backfilling method mentioned above.

[0139] In an exemplary embodiment, an electronic device is further provided, as Figure 6 shown. The electronic device 600 includes the chip 500 mentioned above.

[0140] It should be understood that "multiple" mentioned in this article refers to two or more. "And / or" describes the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally represents an "or" relationship between the front and rear associated objects.

[0141] The serial numbers of the above embodiments of the present application are only for description and do not represent the advantages or disadvantages of the embodiments.

[0142] The above are only exemplary embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the principle of the present application shall be included in the protection scope of the present application.

Claims

1. A data backfill circuit, characterized in that, The circuit includes a distribution module, a storage module, and a plurality of first control modules. Each first control module among the plurality of first control modules is connected to the distribution module and the memory, and the storage module is connected to the memory and the buffer; The distribution module is configured to obtain a backfill request and distribute the backfill request to a second control module among the plurality of first control modules; The second control module is configured to send the backfill request to the memory, and the backfill request is used to instruct the memory to send backfill data to the storage module multiple times, where the memory sends one backfill data to the storage module each time; The storage module is configured to store the received backfill data in the buffer each time a backfill data is received.

2. The circuit according to claim 1, wherein The second control module is further configured to store a first address, and the first address represents the storage location of the received backfill data in the buffer; The storage module is further configured to receive a first identifier sent by the memory, and the first identifier is used to indicate the second control module; The storage module is configured to obtain the first address from the second control module indicated by the first identifier and store the received backfill data at the storage location represented by the first address in the buffer.

3. The circuit according to claim 1, characterized in that, The storage module is further configured to receive a second identifier sent by the memory, and the second identifier is used to indicate whether the received backfill data is abnormal data; The storage module is configured to store the received backfill data in the buffer when the second identifier indicates that the received backfill data is not abnormal data.

4. The circuit according to claim 3, characterized in that The received backfill data is not the first backfill data; The second control module is further configured to store a third identifier, and the third identifier is used to indicate whether each of the backfill data before the non-first backfill data is abnormal data; The storage module is configured to store the received backfill data in the buffer when the second identifier indicates that the received backfill data is not abnormal data and the third identifier indicates that each of the backfill data before the non-first backfill data is not abnormal data.

5. The circuit according to any one of claims 1 to 4, characterized in that, The circuit further includes a request module, and the request module is connected to the distribution module and the buffer; The request module is configured to send an access request to the distribution module and the buffer, and the access request is used to request to read access data; The distribution module is further configured to send first response information to the request module, and the first response information represents whether there is a first control module performing processing on the access data; The buffer is further configured to send second response information to the request module, and the second response information represents whether the access data exists in the buffer; The request module is further configured to send the backfill request to the distribution module when the first response information represents that there is no first control module performing processing on the access data and the second response information represents that the access data does not exist in the buffer, and the data requested by the backfill request includes the access data.

6. The circuit according to claim 5, wherein The access request carries a second address, and the second address represents the storage location of the access data in the buffer; The first control module is further configured to store a third address, and the third address represents the storage location of the data requested by the first control module for backfilling in the buffer; The allocation module is further configured to compare the second address with the third addresses stored in each first control module, and determine the first response information based on the comparison result.

7. The circuit according to any one of claims 1 to 4, characterized in that The circuit further includes a request module, and the request module is connected to the second control module and the storage module; The second control module is further configured to store a fourth identifier, and the fourth identifier is used to indicate whether any backfilled data has been stored in the buffer; The request module is configured to read any backfilled data from the storage module or the buffer based on the fourth identifier.

8. The circuit according to claim 7, characterized in that The request module is configured to, when it is determined based on the fourth identifier that any backfilled data has been stored in the buffer, read any backfilled data from the buffer; When it is determined based on the fourth identifier that any backfilled data has not been stored in the buffer, read any backfilled data from the storage module.

9. A data backfill method, characterized in that, The method is executed by a data backfilling circuit, and the circuit includes an allocation module, a storage module, and a plurality of first control modules. Each first control module in the plurality of first control modules is connected to the allocation module and the memory, and the storage module is connected to the memory and the buffer; the method includes: Obtain a backfill request through the allocation module, and allocate the backfill request to a second control module among the plurality of first control modules; Send the backfill request to the memory through the second control module, and the backfill request is used to instruct the memory to send backfill data to the storage module multiple times, where the memory sends one backfill data to the storage module each time; Through the storage module, each time a backfill data is received, store the received backfill data in the buffer.

10. The method according to claim 9, characterized in that, The method further includes: Store a first address through the second control module, and the first address represents the storage location of the received backfill data in the buffer; Receive a first identifier sent by the memory through the storage module, and the first identifier is used to indicate the second control module; The storing the received backfill data in the buffer includes: Obtain the first address from the second control module indicated by the first identifier through the storage module, and store the received backfill data in the storage location represented by the first address in the buffer.

11. The method according to claim 9, wherein The method further includes: Receive a second identifier sent by the memory through the storage module, and the second identifier is used to indicate whether the received backfill data is abnormal data; The storing the received backfill data in the buffer includes: Through the storage module, when the second identifier indicates that the received backfill data is not abnormal data, store the received backfill data in the buffer.

12. The method according to claim 11, wherein The received backfill data is not the first backfill data; the method further includes: Storing a third identifier by the second control module, where the third identifier is used to indicate whether each of the backfill data before the non-first backfill data is abnormal data; The storing the received backfill data into the buffer by the storage module when the second identifier indicates that the received backfill data is not abnormal data includes: Storing the received backfill data into the buffer by the storage module when the second identifier indicates that the received backfill data is not abnormal data and the third identifier indicates that each of the backfill data before the non-first backfill data is not abnormal data.

13. The method according to any one of claims 9 to 12, characterized in that, The circuit further includes a request module, and the request module is connected to the allocation module and the buffer; the method further includes: Sending an access request to the allocation module and the buffer by the request module, where the access request is used to request to read access data; Sending first response information to the request module by the allocation module, where the first response information represents whether there is a first control module to execute processing on the access data; Sending second response information to the request module by the buffer, where the second response information represents whether the access data exists in the buffer; Sending the backfill request to the allocation module by the request module when the first response information represents that there is no first control module to execute processing on the access data and the second response information represents that the access data does not exist in the buffer, where the data requested by the backfill request includes the access data.

14. The method according to claim 13, wherein The access request carries a second address, where the second address represents the storage location of the access data in the buffer; the method further includes: Storing a third address by the first control module, where the third address represents the storage location of the data requested by the first control module for backfill in the buffer; Comparing the second address with each of the third addresses stored by the first control modules by the allocation module, and determining the first response information based on the comparison result.

15. The method according to any one of claims 9 to 12, characterized in that, The circuit further includes a request module, and the request module is connected to the second control module and the storage module; the method further includes: Storing a fourth identifier by the second control module, where the fourth identifier is used to indicate whether any backfill data has been stored in the buffer; Reading any backfill data from the storage module or the buffer by the request module based on the fourth identifier.

16. The method according to claim 15, characterized in that The reading any backfill data from the storage module or the buffer by the request module based on the fourth identifier includes: Reading any backfill data from the buffer by the request module when it is determined based on the fourth identifier that any backfill data has been stored in the buffer; Reading any backfill data from the storage module by the request module when it is determined based on the fourth identifier that any backfill data has not been stored in the buffer.

17. A chip, characterized in that, The chip includes the data backfill circuit as described in any one of claims 1 to 8.

18. An electronic device, characterized in that, The electronic device includes the chip as described in claim 17.

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