Quantum error correction method and device, quantum computing equipment and storage medium

Abstract

The invention provides a quantum error correction method and device, quantum computing equipment and a storage medium, and relates to the technical field of quantum computing. The quantum error correction method comprises the following steps: for any auxiliary bit in logic quantum bits, mapping error information of each data bit connected with the auxiliary bit to the auxiliary bit by executing a multi-bit quantum gate operation and a plurality of single-bit quantum gate operations once, and measuring at least one auxiliary bit in the logic quantum bits, determining an error generated by any data bit, and correcting the error generated by any data bit. According to the method and the device, one auxiliary bit can interact with a plurality of data bits connected with the auxiliary bit at the same time by executing one-time multi-bit quantum gate operation, and multiple two-bit quantum gate operations do not need to be performed, so that the number of quantum gate operations can be reduced, the calculation amount can be reduced, and the operation error can be reduced.

Description

Technical Field

[0001] The present application relates to the field of quantum computing technology, and in particular, to a quantum error correction method, apparatus, quantum computing device, and storage medium. Background Art

[0002] Quantum computing is a computing method different from traditional transistor-based computers. The smallest unit of quantum computing can be called a quantum bit. Quantum bits can generate errors during the quantum computing process, and quantum error correction can be used to reduce the errors.

[0003] Quantum surface coding is a common coding technology in quantum error correction. In quantum surface coding, quantum bits can include data bits and auxiliary bits. The key to quantum error correction is to associate the state of the auxiliary bits with the state of the data bits, and detect errors in the data bits by measuring the auxiliary bits.

[0004] Currently, in each quantum error correction cycle, for a connected auxiliary bit and a data bit, two-bit quantum gate operations need to be performed respectively, resulting in a large number of quantum gate operations during the quantum error correction process, leading to a large computational amount of quantum error correction, and each quantum gate operation will introduce new errors. Summary of the Invention

[0005] Embodiments of the present application provide a quantum error correction method, apparatus, quantum computing device, and storage medium, which can reduce the number of quantum gate operations performed during the quantum error correction process.

[0006] In a first aspect, embodiments of the present application provide a quantum error correction method, which can be executed by a quantum computing device, or a chip, chip system, or circuit in quantum computing. The method may include: for any auxiliary bit in a logical quantum bit, by performing one multi-bit quantum gate operation and multiple single-bit quantum gate operations, map the error information of each data bit connected to the auxiliary bit to the auxiliary bit. Wherein, the logical quantum bit may include at least one auxiliary bit and multiple data bits. After mapping the error information of multiple data bits in the logical quantum bit to at least one auxiliary bit, measure the at least one auxiliary bit to determine the error generated by any one of the multiple data bits, and correct the error generated by any one of the data bits.

[0007] The quantum error correction method provided by the embodiments of the present application, when performing a quantum error correction cycle, by executing a multi-bit quantum gate operation, 1 auxiliary bit can simultaneously interact with multiple data bits connected thereto, without performing multiple two-bit quantum gate operations through a controlled-Z gate for interaction between two bits. Therefore, the number of quantum gate operations can be reduced, the computational amount can be decreased, and the operation error can be reduced.

[0008] In a possible implementation manner, when performing a multi-bit quantum gate operation, the frequencies of at least one auxiliary bit and multiple data bits belong to different frequency bands, so that by executing a multi-bit quantum gate operation, 1 auxiliary bit can simultaneously interact with multiple data bits connected thereto.

[0009] In a possible implementation manner, the ratio between the first frequency difference and the second frequency difference is less than or equal to a first set value; the first frequency difference is the frequency difference between any two data bits, and the second frequency difference is the frequency difference between any one data bit and any one auxiliary bit, so that the frequency difference between two data bits is small enough to reduce the mutual interference between data bits.

[0010] In a possible implementation manner, the ratio between the deviation between any two absolute values and any one of the two absolute values is less than or equal to a second set value; any one absolute value is the absolute value of the frequency difference between any one data bit and any one auxiliary bit. The deviation between the two absolute values is small, which can further reduce the interaction between data bits.

[0011] In a possible implementation manner, the multiple single-bit quantum gate operations include single-bit quantum gate operations for each data bit among the multiple data bits; the single-bit quantum gate operation for each data bit is executed when the state of at least one auxiliary bit is the ground state.

[0012] When the state of at least one auxiliary bit is the ground state, the ZZ interaction between the data bit and the auxiliary bit will not affect the single-bit quantum gate operation. At this time, performing the single-bit quantum gate operation on the data bit can reduce the error rate of the data bit after multiple quantum error correction cycles.

[0013] In a possible implementation, multiple single-bit quantum gate operations include single-bit quantum gate operations for each of at least one auxiliary bit; when performing the single-bit quantum gate operations for the auxiliary bits, the frequencies of multiple data bits are adjusted to a target frequency; the target frequency satisfies the following condition: the ratio between the absolute value of the third frequency difference and the absolute value of the fourth frequency difference is greater than or equal to a third set value; the third frequency difference is: when the frequencies of the multiple data bits are the target frequency, the frequency difference between any one of the data bits and any one of the auxiliary bits; the fourth frequency difference is the frequency difference between any one of the data bits and any one of the auxiliary bits when performing a multi-bit quantum gate operation.

[0014] When performing the single-bit quantum gate operations for the auxiliary bits, by adjusting the frequencies of the data bits to increase the frequency difference between the data bits and the auxiliary bits, the interference of the single-bit quantum gate operations caused by the ZZ interaction can be reduced, and the precision of the single-bit quantum gate operations can be improved.

[0015] In a possible implementation, after measuring any one of at least one auxiliary bit, the state of any one of the auxiliary bits is set to the ground state.

[0016] In a second aspect, an embodiment of the present application provides a quantum error correction device, which may include a module for performing any one of the methods provided in the first aspect above.

[0017] In a third aspect, an embodiment of the present application provides a quantum computing device, including a controller and a quantum chip; the quantum chip includes at least one logical qubit; the controller performs quantum error correction on the quantum chip by executing any one of the methods provided in the first aspect above.

[0018] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored, and the computer-executable instructions are used to cause a computer to execute any one of the methods provided in the first aspect above.

[0019] In a fifth aspect, an embodiment of the present application provides a computer program product, including computer-executable instructions, and the computer-executable instructions are used to cause a computer to execute any one of the methods provided in the first aspect above.

[0020] The technical effects that can be achieved by any one of the second aspect to the eighth aspect above can refer to the description of the beneficial effects in the first aspect above, and will not be repeated here. Description of the Drawings

[0021] Figure 1 It is a schematic diagram of a quantum computing device provided by an embodiment of the present application;

[0022] Figure 2Schematic diagram of the internal structure of the quantum chip provided by the embodiment of the present application;

[0023] Figure 3 Schematic diagram of a process for performing a quantum error correction cycle in related art;

[0024] Figure 4 Schematic diagram of a qubit connection relationship provided by the embodiment of the present application;

[0025] Figure 5 Schematic diagram of the frequency relationship between qubits provided by the embodiment of the present application;

[0026] Figure 6 Schematic flow diagram of an evolution curve provided by the embodiment of the present application;

[0027] Figure 7 Another schematic diagram of a qubit connection relationship provided by the embodiment of the present application;

[0028] Figure 8 Flow chart of a quantum error correction method provided by the embodiment of the present application;

[0029] Figure 9 Schematic diagram of a process for performing a quantum error correction cycle provided by the embodiment of the present application;

[0030] Figure 10 Schematic diagram of the frequency migration of a qubit provided by the embodiment of the present application;

[0031] Figure 11 Block diagram of the structure of a quantum error correction device provided by the embodiment of the present application. Detailed implementation manners

[0032] In order to make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the embodiments of the present application will be described in detail below with reference to the accompanying drawings. The terms used in the embodiments of the present application are only for explaining the specific embodiments of the present application, and are not intended to limit the present application.

[0033] Before introducing the specific solutions provided by the embodiments of the present application, some terms in the present application are explained to facilitate the understanding of those skilled in the art, and the terms in the present application are not limited.

[0034] (1) ZZ interaction: The smallest unit of quantum computing can be called a qubit. The Pauli Z interaction generated between two qubits can be called a ZZ interaction. The effect of the ZZ interaction is that the frequency of one qubit is affected by the state (|0> state or |1> state) of another qubit.

[0035] In the embodiments of the present application, "a plurality of" means two or more. In view of this, in the embodiments of the present application, "a plurality of" can also be understood as "at least two". "At least one" can be understood as one or more, for example, understood as one, two or more. For example, including at least one means including one, two or more, and it does not limit which ones are included. For example, including at least one of A, B, and C, then what can be included are A, B, C, A and B, A and C, B and C, or A and B and C. "And / or" describes the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / ", unless otherwise specified, generally represents an "or" relationship between the front and back associated objects.

[0036] Unless otherwise stated, the ordinal numbers "first", "second", etc. mentioned in the embodiments of the present application are used to distinguish multiple objects, and are not used to limit the order, time sequence, priority or importance of multiple objects.

[0037] The quantum error correction method provided by the embodiments of the present application can be implemented in a quantum computing device. Figure 1 FIG. shows a schematic diagram of a quantum computing device provided by the embodiments of the present application. As Figure 1 shown, the quantum computing device 100 may include a controller 110 and a quantum chip 120. The controller 110 and the quantum chip 120 may be connected by a bus. The quantum computing device 100 may also be referred to as a quantum computer.

[0038] Among them, the controller 110 may also be referred to as a processor. The controller 110 may be a central processing unit (CPU), a network processor (NP), or a combination of a CPU and an NP, etc. The controller 110 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The above PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0039] The quantum chip 120 can be an ordinary quantum chip or can be constructed using superconducting circuits. A quantum chip using superconducting circuits can be called a superconducting quantum chip. A superconducting circuit is a circuit unit used to construct quantum computing hardware and is obtained based on a superconducting resonant circuit. By introducing a non-linear inductive element, i.e., a Josephson junction element, into the superconducting resonant circuit, the energy differences between different energy levels of the superconducting resonant circuit are made non-equidistant. Then, by selecting an appropriate frequency, the lowest two energy levels can be independently controlled and used for quantum computing. When the quantum chip 120 uses a superconducting quantum chip, the quantum computing device 100 can also be called a superconducting quantum computer. A superconducting quantum computer is a dedicated data center device that can provide services externally through a network.

[0040] The controller 110 can control the quantum chip 120 to perform quantum computing. Quantum computing is a computing method different from traditional computers based on transistors. The smallest unit of quantum computing can be called a quantum bit, and a quantum bit is also the most fundamental computing unit in quantum computing. The quantum chip 120 can include multiple quantum bits. The state of a single quantum bit can be expressed as |ψ1> = α|0> + β|1>, where α and β are two complex numbers and satisfy the normalization condition of |α| 2 + |β| 2 = 1. |0> and |1> are the two eigenstates of the quantum bit. The above expression shows that in addition to being able to separately be in the eigenstates of |0> or |1>, the quantum bit can also be in a superposition state of the two eigenstates simultaneously. This is a characteristic of quantum computing different from traditional computing, and the most fundamental computing unit in quantum computing has the characteristic of quantum superposition. Therefore, for two quantum bits, their state can be expressed as |ψ2> = α|00> + β|01> + γ|10> + δ|11>, and the states of the two quantum bits also satisfy the normalization condition. The two quantum bits are simultaneously in a superposition state of the four eigenstates of |00>, |01>, |10>, and |11>.

[0041] The state of a quantum bit can also be represented by a matrix. For a single quantum bit, For a quantum bit in , if the state of this quantum bit is to be changed, a 2x2 matrix operation can be applied to it, and this matrix operation can be called a quantum gate operation. A quantum gate operation acting on a single quantum bit can be called a single-bit quantum gate operation. Single-bit quantum gate operations include the H gate, and the matrix of the H gate can be expressed as Applying the H gate to the quantum bit |ψ1>, the state of this quantum bit becomes Similarly, for two quantum bits, there are also gate operations that act on the two quantum bits simultaneously, including the controlled-Z gate and the controlled-NOT gate. The matrix expression of the controlled-Z gate is The matrix expression of the controlled NOT gate is The way of quantum computing is to implement specific algorithms and solve specific problems by applying different quantum gate operations.

[0042] During the execution of quantum gate operations, errors will occur in qubits. Currently, the minimum error of single-qubit quantum gate operations that can be achieved on a quantum chip is 10 -4 , and the minimum error of two-qubit gate operations is 10 -3 . For common classical quantum algorithms, such as Shor's prime factorization algorithm, the error requirement for quantum gate operations is less than 10 -6 . It can be seen that there is a gap of more than three orders of magnitude between the currently achievable quantum gate operations and the gate operation errors required by the algorithm. Quantum error correction can reduce the quantum gate operation errors in the process of quantum computing. The working principle of quantum error correction is introduced below.

[0043] There are two types of errors in qubits during the quantum algorithm process. The first is the bit flip error, that is, a qubit that should originally be in the |0> state is wrongly flipped to the |1> state; or, a qubit that should originally be in the |1> state is wrongly flipped to the |0> state. The other is the bit phase error, that is, for the state |ψ1> of the qubit, while keeping the absolute values of the coefficients α and β of the |0> state and |1> state components unchanged, the argument of the corresponding complex number is incorrect.

[0044] Quantum error correction can reduce the quantum gate operation errors. Quantum error correction can use multiple qubits to encode a single logical qubit. Quantum surface code is a coding technique used in quantum error correction. In quantum surface code, all qubits are divided into two types: data qubits and auxiliary qubits, and are periodically arranged in a nearest-neighbor connection manner. Among them, the connection between qubits means that there is a direct coupling effect between qubits. Taking Figure 1 the quantum chip 120 shown as an example, the quantum chip 120 can include multiple qubits, and the multiple qubits adopt a bit architecture of a lattice array, and the multiple qubits include data qubits and auxiliary qubits. As Figure 2 shown, the black solid circles represent data qubits, and the white circles represent auxiliary qubits. The auxiliary qubits are divided into two types, which are marked with X and Z respectively in Figure 2 , and these two types of auxiliary qubits are arranged alternately. Among them, the X auxiliary qubits are used to detect the phase errors on the data qubits, and the Z auxiliary qubits are used to detect the bit flip errors on the data qubits. Figure 2The rectangle circled in solid lines in the figure can be understood as a logical qubit, and this logical qubit includes 4 data bits and 3 auxiliary bits. The 4 data bits are respectively: data bit D1, data bit D2, data bit D3, and data bit D4. The 3 auxiliary bits are respectively auxiliary bit M1, auxiliary bit M2, and auxiliary bit M3. Among them, auxiliary bit M1 and auxiliary bit M3 are X auxiliary bits, and auxiliary bit M2 is a Z auxiliary bit. Figure 2 The dotted lines between adjacent qubits in the figure indicate that there is an interaction between two qubits. Through the interaction, quantum gate operations can be realized, that is, the connection between two qubits. The key to quantum error correction lies in correlating the states of the auxiliary bits with the states of the data bits through certain quantum gate operations. When an error corresponding to the data bit occurs, the error can be detected by measuring the auxiliary bit, and then the error on the data bit can be eliminated through the feedback correction method.

[0045] As Figure 3 shown, in the related art, the operations of quantum error correction can be realized by the single-qubit H gate and the two-qubit controlled-Z gate. For Figure 2 the 4 data bits and 3 auxiliary bits in the logical qubit circled in solid lines in the figure, a quantum error correction cycle can be performed using the Figure 3 quantum circuit in the figure. As can be seen from Figure 3 the figure, in a quantum error correction cycle, 8 two-qubit controlled-Z gate operations are required. This will result in a large number of quantum gate operations during the quantum error correction process, resulting in a large computational amount of quantum error correction, and each quantum gate operation will bring new errors.

[0046] To reduce the computational amount of quantum error correction, an embodiment of the present application provides a quantum error correction method. In the embodiment of the present application, a logical qubit may include at least one auxiliary bit and multiple data bits. For any auxiliary bit in the logical qubit, by performing one multi-bit quantum gate operation and multiple single-bit quantum gate operations, the error information of each data bit connected to any auxiliary bit can be mapped to any auxiliary bit. On this basis, by measuring at least one auxiliary bit in the logical qubit, it can be determined which data bit among the multiple data bits has an error, and then the error generated by any data bit can be corrected. In the embodiment of the present application, in a quantum error correction cycle, for one auxiliary bit, only one multi-bit quantum gate operation is performed, instead of performing one two-bit gate operation for each data bit connected to the auxiliary bit respectively. Therefore, the number of quantum gate operations can be reduced, the computational amount of quantum error correction can be reduced, and the error caused by quantum gate operations can be reduced.

[0047] Before introducing the quantum error correction method of the embodiments of the present application in detail, the connection relationship and architecture of the qubits adopted in the embodiments of the present application are first introduced.

[0048] In some alternative embodiments, the multi-bit interaction in the embodiments of the present application can be applied to the Figure 4 5-bit quantum structure shown in the figure. Among them, the auxiliary bit M can be an X auxiliary bit or a Z auxiliary bit. There is a direct coupling effect between the middle auxiliary bit M and the four surrounding data bits D1 to D4. It can also be said that the auxiliary bit M is connected to the four data bits D1 to D4. There is a ZZ interaction between the interconnected data bits and the auxiliary bit. The principle of the ZZ interaction is introduced below.

[0049] A superconducting circuit introduces a nonlinear inductive element into a superconducting resonant circuit, making the energy differences between different energy levels of the superconducting resonant circuit non-equidistant. Thus, by selecting an appropriate frequency, the lowest two energy levels can be independently controlled and used for quantum computing. When the qubit is in the lowest energy level, it is in the |0> state, and when it is in the second energy level, it is in the |1> state. There are infinitely many energy levels in the superconducting resonant circuit that constructs the qubit, and the third energy level has a greater impact on the entire calculation process. The frequency value corresponding to the energy of the lowest energy level and the second energy level is f, and the frequency difference between the third energy level and the second energy level is f + η, where η is the nonlinear frequency of the qubit.

[0050] In a superconducting structure composed of two qubits, assuming the coupling strength between the two qubits is g, the Hamiltonian used to describe the entire superconducting structure can be written as There are Figure 5 4 energy levels shown by the solid line in the figure. Since the qubit has a third energy level and a nonlinear frequency η, when the two qubits are both in the |1> state, that is, when they are in the Figure 5 f1 + f2 energy level in the figure, there will be an interference effect with the third energy level of the low-frequency qubit, that is, Figure 5 2f1 + η in the figure. This interference effect causes the actual energy when the two bits are both in the |1> state ( Figure 5 dashed line 1 in the figure) to have a difference χ from the theoretical energy ( Figure 5 solid line 2 in the figure). Among them, the mathematical expression of χ is χ = 4g 2 Δ / (Δ 2 - η 2), Δ = f1 - f2. The difference in the above energy will cause the ZZ interaction, and the ZZ interaction will only have a practical effect when both qubits are in the |1> state at the same time. Therefore, the equivalent effect of the ZZ interaction on two qubits is a controlled-phase gate. By controlling the accumulation time of the phase such that the magnitude of the controlled phase is exactly π, a controlled-Z gate between two qubits can be achieved.

[0051] After explaining the ZZ interaction clearly, continue the introduction according to the Figure 4 shown quantum connection structure. Since an auxiliary qubit needs to be connected to at most 4 data qubits, to ensure the magnitude of the ZZ interaction between the data qubits and the auxiliary qubit, it is necessary to make any data qubit and the auxiliary qubit obtain the same energy difference when they are both in the first excited state at the same time. Here, the first excited state can refer to the qubit being in the |1> state. However, all data qubits cannot be at the same frequency. Therefore, each qubit satisfies the following frequency condition: the ratio of the first frequency difference to the second frequency difference is less than or equal to the first set value, where the first frequency difference is the frequency difference between any two data qubits, the second frequency difference is the frequency difference between any data qubit and any auxiliary qubit, and the first set value can be 1 / 10. That is to say, the frequency difference between data qubits is more than 10 times less than the frequency difference between a data qubit and an auxiliary qubit. In an alternative embodiment, each qubit can also satisfy the following frequency condition: the ratio of the deviation between any two absolute values to any one of the absolute values is less than or equal to the second set value; any one of the absolute values is the absolute value of the frequency difference between any data qubit and any auxiliary qubit; the second set value can be 1 / 10. That is to say, the deviation between the absolute values of the frequency differences between all data qubits and the auxiliary qubit is more than 10 times less than the absolute value. There is no mutual coupling between the data qubits themselves, but they will generate dispersive coupling through the auxiliary qubit. Therefore, to further reduce the interaction between the data qubits, the frequencies of the data qubits can be symmetric centered on the auxiliary qubit. Exemplarily, Table 1 gives a set of available frequencies of the auxiliary qubit and the data qubits. At this time, the nonlinearity η of the data qubits and the auxiliary qubit is about -250 MHz, and the magnitude of the coupling strength g between the data qubit and the auxiliary qubit is 50 MHz.

[0052] Table 1

[0053] Auxiliary bit M Data bit D1 Data bit D2 Data bit D3 Data bit D4 Frequency (GHz) 5 6.02 4.042 3.982 5.98

[0054] By evolving the system Hamiltonian of a system composed of 5 qubits, namely the auxiliary qubit M, the data qubits D1, D2, D3, and D4, it can be found that the number of excited data qubits D1 to D4 changes from 0 to 4, which will affect the intermediate auxiliary qubit to be in Evolution of the expectation value <+> of the state.

[0055] Among them, when the number of excited data bits is even, the expectation value <+> of the auxiliary bit evolves to 1 at about 195 ns; when the number of excited data bits is odd, the expectation value <+> of the auxiliary bit evolves to 0 at about 195 ns, as Figure 6 shown. Therefore, in the system composed of these 4 data bits and 1 auxiliary bit with the parameters in Table 1, after about 195 ns of evolution time, the state of the number of excited data bits can be judged by the expectation value of the auxiliary bit, and the effect is equivalent to applying 4 controlled-Z gates between the data bit and the auxiliary bit respectively. Therefore, taking the specific evolution time under the above parameters as a multi-bit quantum gate operation in the quantum circuit, this multi-bit quantum gate operation can be used for quantum surface coding.

[0056] In some other alternative embodiments, the multi-bit interaction of the embodiments of the present application can be applied to the Figure 7 3-bit quantum structure shown. Among them, the auxiliary bit M can be an X auxiliary bit or a Z auxiliary bit. One auxiliary bit M has direct interactions with two data bits D1 and D2 respectively, and the absolute value of the frequency difference between the data bits satisfies the condition that it is more than 10 times less than the absolute value of the frequency difference between the data bit and the auxiliary bit. In the system formed by these three qubits, after evolving for a period of time, when the number of excited data bits is even, after a period of evolution, the expectation value <+> of the auxiliary bit will evolve to 0; when the number of excited data bits is odd, after a period of evolution, the expectation value <+> of the auxiliary bit will evolve to 1. The equivalent effect of the evolution during this period is to apply 2 controlled-Z gate operations between the data bit and the auxiliary bit respectively. Therefore, taking the specific evolution time under this parameter as a multi-bit quantum gate operation in the quantum circuit, this multi-bit quantum gate operation can be used for quantum surface coding.

[0057] In some other alternative embodiments, the multi-bit interaction of the embodiments of the present application can be applied to both 3-bit and 5-bit quantum structures in quantum surface coding. For example, it can be applied to Figure 2 the logical qubits circled by solid lines in, and the logical qubits include 3-bit quantum structures and 5-bit quantum structures. The above is only an example with 3-bit and 5-bit quantum structures. In other embodiments, the multi-bit interaction of the embodiments of the present application can also be applied to scenarios where one qubit interacts with more or fewer qubits.

[0058] Figure 8 shows a flowchart of a quantum error correction method provided by the embodiments of the present application, asFigure 8 As shown, the quantum error correction method may include the following steps:

[0059] S801. For any one of the auxiliary bits in the logical qubit, by performing one multi-bit quantum gate operation and multiple single-bit quantum gate operations, map the error information of each data bit connected to any one of the auxiliary bits to any one of the auxiliary bits.

[0060] Among them, the logical qubit may include at least one auxiliary bit and multiple data bits, and the frequencies of at least one auxiliary bit and multiple data bits belong to different frequency bands. Still taking the Figure 2 logical qubit circled by the solid line in as an example, in the embodiment of the present application, the Figure 9 shown quantum circuit can be used to perform one quantum error correction cycle. The quantum error correction cycle process includes a multi-bit quantum gate operation performed on the auxiliary bit M1, a multi-bit quantum gate operation performed on the auxiliary bit M2, a multi-bit quantum gate operation performed on the auxiliary bit M3, and single-bit quantum gate operations respectively performed on the auxiliary bit M1, the auxiliary bit M2, the auxiliary bit M3, the data bit D1, the data bit D2, the data bit D3, and the data bit D4. Among them, the multi-bit quantum gate operation performed on the auxiliary bit M1 and the multi-bit quantum gate operation performed on the auxiliary bit M3 are 3-bit quantum gate operations, and the multi-bit quantum gate operation performed on the auxiliary bit M2 is a 5-bit quantum gate operation, that is, when the controller implements one quantum error correction cycle, it can be controlled in a manner of simultaneously controlling 5 bits. Among them, the single-bit quantum gate operations on the data bits D1, D2, D3, and D4 are performed when the states of the auxiliary bits M1, M2, and M3 are in the ground state. Through the above operations, the error information of the data bits D1, D2, D3, and D4 can be mapped to the auxiliary bits M1, M2, and M3. Among them, the information related to the data bit flip is mapped to the auxiliary bit M2, and the information related to the data bit phase is mapped to the auxiliary bits M1 and M3.

[0061] S802. Measure at least one auxiliary bit to determine the error generated by any one of the multiple data bits.

[0062] S803. Correct the error generated by any one of the data bits.

[0063] By measuring the auxiliary bits M1 to M3, it can be determined whether the data bits D1 to D4 have flip errors or phase errors. After determining the type of error that occurs in the data bit, the corresponding single-bit quantum gate operation U can be performed on the data bit to correct the error.

[0064] Figure 9 The measurement operations on the auxiliary bits M1 to M3 and the single-bit quantum gate operation U on the data bits are outlined by a dashed box, indicating that whether to perform the single-bit operation U needs to be determined by the measurement result. For example, if the data bits D1 to D4 were originally in the |0> state, then after the mapping is completed and the auxiliary bits are measured, it should be measured that the auxiliary bit M2 is in the |0> state. If due to some external noise disturbance, the data bit D1 undergoes a flip error, then it can be measured that M2 is in the |1> state. At this time, it indicates that a flip error has been detected in D1 to D4 by measuring the auxiliary bits. If it can be further confirmed that the error occurred in D1, then in the subsequent single-bit quantum gate operation U, a flip operation is performed on D1, and the other bits do not need to be operated, and the error can be corrected.

[0065] In some embodiments, as Figure 9 shown, in addition to detecting and correcting the above error correction, a reset operation needs to be performed on the auxiliary bits M1 to M3 to set the states of the auxiliary bits M1 to M3 to the ground state, that is, the |0> state, so as to continue the next quantum error correction cycle.

[0066] In the process of the same quantum error correction cycle, the quantum error correction process of the embodiments of the present application only needs to perform 3 multi-bit quantum gate operations to achieve Figure 3 the effect of performing 8 two-bit controlled-Z gate operations in Figure 3 . Exemplarily, for the auxiliary bit M2, the embodiments of the present application can achieve the effect of performing 4 controlled-Z gate operations on the auxiliary bit M2 in

[0067] by performing one multi-bit quantum gate operation, which can reduce the complexity of performing multi-bit quantum gate operations. Figure 10As shown, when performing multi-bit quantum gate operations, the frequencies between qubits satisfy the following conditions: the frequency difference δ between data qubits is more than 10 times smaller than the frequency difference Δ between a data qubit and an auxiliary qubit. When performing single-bit quantum gate operations, in order to reduce the operation error, it is necessary to suppress the influence brought by the ZZ interaction between qubits as much as possible. When performing a single-bit quantum gate operation on an auxiliary qubit, the frequencies of multiple data qubits can be changed to the target frequency. Among them, the target frequency satisfies the following conditions: the ratio between the absolute value of the third frequency difference and the absolute value of the fourth frequency difference is greater than or equal to a third set value. The third frequency difference is the frequency difference between any data qubit and any auxiliary qubit when the frequencies of multiple data qubits are the target frequency; the fourth frequency difference is the frequency difference between any data qubit and any auxiliary qubit when performing multi-bit quantum gate operations. Exemplarily, the third set value can be 2, that is to say, when performing single-bit quantum gate operations, the frequencies of the data qubits can be adjusted so that the frequency difference between the data qubit and the auxiliary qubit is more than 2 times larger than that when performing multi-bit quantum gate operations.

[0068] In some embodiments, in order to reduce the error during single-bit quantum gate operations, the frequency comb technology can be used for single-bit quantum gate operations. The frequency comb technology can use a series of frequency components that are evenly spaced in the frequency spectrum and have a coherent and stable phase relationship to control the frequencies of qubits for single-bit quantum gate operations. At the same time, since the auxiliary qubit is measured in each error correction cycle and then reset to the |0> state, while the data qubit keeps operating. Therefore, when performing single-bit quantum gate operations, when the auxiliary qubit is in the |0> state, the single-bit quantum gate operation on the data qubit can be preferentially performed. At this time, the ZZ interaction between the data qubit and the auxiliary qubit will not affect the single-bit quantum gate operation, and the error rate of the data qubit after multiple quantum error correction cycles can be reduced. After performing the single-bit quantum gate operation on the data qubit, the single-bit quantum gate operation on the auxiliary qubit is performed.

[0069] In the related art, in order to adjust the magnitude of the ZZ interaction between qubits and ensure that there is no ZZ interaction between qubits when no operation is performed, an additional superconducting qubit is inserted between each data qubit and the auxiliary qubit, and this superconducting qubit is called a coupler. The coupler is used when implementing the controlled-Z gate and exists between every pair of data qubits and auxiliary qubits. When implementing the controlled-Z gate, it is necessary to simultaneously operate three objects: the coupler, the data qubit connected to the coupler, and the auxiliary qubit, resulting in great difficulty in actual manipulation. In the embodiments of the present application, the qubits are arranged in a lattice array, and direct interactions are generated between the qubits without the need for a coupler to adjust the interactions, thus reducing the manipulation difficulty. Since the frequency points of the auxiliary qubits and the data qubits are completely different, the deviation between the absolute values of the frequency differences between all data qubits and the auxiliary qubits is more than 10 times smaller than the absolute value. Therefore, during the quantum error correction cycle, by performing a multi-bit quantum gate operation once, one auxiliary qubit can simultaneously generate ZZ interactions with multiple data qubits connected to it. There is no need to use the controlled-Z gate with pairwise interactions between two qubits, which can reduce the number of quantum gate operations, reduce the computational amount, and reduce the operation error. Moreover, when the state of the auxiliary qubit is |0>, first performing a single-bit quantum gate operation on the data qubit and then performing a single-bit quantum gate operation on the auxiliary qubit can reduce the crosstalk generated by the state of the auxiliary qubit on the data qubit through the ZZ interaction. Also, when performing a single-bit quantum gate operation on the auxiliary qubit, the frequency of the data qubit is adjusted, and the frequencies of half of the qubits in the logical qubit are quickly moved to other frequency points without frequency crossover, increasing the frequency difference between the data qubit and the auxiliary qubit, which can reduce the interference of the single-bit quantum gate operation by the ZZ interaction and improve the accuracy of the single-bit quantum gate operation.

[0070] Combined with the above method embodiments, the embodiments of the present application further provide a quantum error correction device. In some embodiments, as Figure 11 shown, the quantum error correction device 1100 may include a mapping unit 1110, a measurement unit 1120, and a correction unit 1130. The quantum error correction device 1100 can be used to implement the functions of the above method embodiments, and thus can achieve the beneficial effects possessed by the above method embodiments.

[0071] Among them, the mapping unit 1110 is configured to, for any auxiliary qubit in the logical qubit, map the error information of each data qubit connected to the auxiliary qubit to the auxiliary qubit by performing a multi-bit quantum gate operation and multiple single-bit quantum gate operations; the logical qubit may include at least one auxiliary qubit and multiple data qubits. The measurement unit 1120 is configured to measure at least one auxiliary qubit to determine the error generated by any one of the multiple data qubits; the correction unit 1130 is configured to correct the error generated by any one of the data qubits.

[0072] In an alternative embodiment, when performing the multi-bit quantum gate operation, the frequencies of at least one auxiliary qubit and the frequencies of the multiple data qubits belong to different frequency bands.

[0073] In an alternative embodiment, the mapping unit 1110 may also be configured to adjust the frequencies of the multiple data qubits to the target frequencies when performing the single-bit quantum gate operation on the auxiliary qubit.

[0074] In an alternative embodiment, the measurement unit 1120 may also be configured to set the state of any one of the at least one auxiliary qubits to the ground state after measuring any one of the at least one auxiliary qubits.

[0075] Among them, the mapping unit 1110, the measurement unit 1120, and the correction unit 1130 can all be implemented by software or can be implemented by hardware. Exemplarily, next, taking the measurement unit 1120 as an example, the implementation manner of the measurement unit 1120 will be introduced. Similarly, the implementation manners of the mapping unit 1110 and the correction unit 1130 can refer to the implementation manner of the measurement unit 1120.

[0076] As an example of a software functional unit, the measurement unit 1120 may include code running on a computing instance. Among them, the computing instance may include at least one of a physical host (computing device), a virtual machine, and a container. Further, the above computing instance may be one or more. For example, the measurement unit 1120 may include code running on multiple hosts / virtual machines / containers.

[0077] As an example of a hardware functional unit, the measurement unit 1120 may include at least one computing device, such as a computer, etc. Alternatively, the measurement unit 1120 may also be a device implemented by an application-specific integrated circuit (ASIC) or a programmable logic device (PLD). Among them, the above PLD may be implemented by a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0078] It should be noted that in other embodiments, the mapping unit 1110 may be used to perform any step in the quantum error correction method, the measurement unit 1120 may be used to perform any step in the quantum error correction method, and the correction unit 1130 may be used to perform any step in the quantum error correction method. The steps to be implemented by the mapping unit 1110, the measurement unit 1120, and the correction unit 1130 can be specified as needed. The full function of the quantum error correction device is realized by implementing different steps in the quantum error correction method through the mapping unit 1110, the measurement unit 1120, and the correction unit 1130 respectively. In other embodiments, the quantum error correction device may further include more or fewer functional modules, which are not limited in this application.

[0079] The embodiment of the present application also provides a quantum computing device. The quantum computing device can be used to implement the functions of the quantum error correction device in the above embodiments, such as Figure 1 shown, the quantum computing device may include a controller 110 and a quantum chip 120. The controller 110 and the quantum chip 120 can be connected through a bus, and the bus can be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc.

[0080] The quantum computing device may further include a memory, which may include volatile memory, such as random access memory (RAM). The memory may also include non-volatile memory, such as read-only memory (ROM), flash memory, hard disk drive (HDD), or solid state drive (SSD). Executable program code is stored in the memory, and the controller 110 executes the executable program code to respectively implement the functions of the aforementioned mapping unit 1110, measurement unit 1120, and correction unit 1130, thereby implementing the quantum error correction method.

[0081] The quantum chip 120 may include a plurality of data qubits and a plurality of auxiliary qubits. Instructions for executing the quantum error correction method are stored on the memory. The controller 110 performs quantum error correction on the quantum chip 120 by executing the instructions in the aforementioned memory.

[0082] The embodiments of the present application also provide a computer program product containing instructions. The computer program product may be software or a program product containing instructions that can run on a computing device or be stored in any available medium. When the computer program product runs on at least one computing device, at least one computing device is caused to execute the aforementioned quantum error correction method.

[0083] The embodiments of the present application also provide a computer-readable storage medium. The computer-readable storage medium may be any available medium that a computing device can store or a data storage device such as a data center that includes one or more available media. The available medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid state drive), etc. The computer-readable storage medium includes instructions that instruct the computing device to execute the quantum error correction method, or instruct the computing device to execute the quantum error correction method.

[0084] Those skilled in the art should understand that the embodiments of the present application may be provided as a method, a system, or a computer program product. Therefore, the present application may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0085] This application is described with reference to the flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing device to produce a machine, such that the instructions executed by the processor of the computer or other programmable data processing device generate means for implementing the functions specified in one or more of the flows Figure 1 one or more of the flows and / or blocks Figure 1 or means for implementing the functions specified in one or more of the blocks.

[0086] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer-readable memory produce a manufacture including instruction means that implement the functions specified in one or more of the flows Figure 1 one or more of the flows and / or blocks Figure 1 or means for implementing the functions specified in one or more of the blocks.

[0087] These computer program instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operational steps are performed on the computer or other programmable device to produce a computer-implemented process, and thus the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more of the flows Figure 1 one or more of the flows and / or blocks Figure 1 or means for implementing the functions specified in one or more of the blocks.

[0088] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application is also intended to include these changes and modifications.

Claims

1. A quantum error correction method, characterized in that, Including: For any auxiliary qubit in a logical qubit, by performing one multi-bit gate operation and multiple single-bit quantum gate operations, mapping the error information of each data qubit connected to the any auxiliary qubit to the any auxiliary qubit; the logical qubit includes at least one auxiliary qubit and multiple data qubits; Measuring the at least one auxiliary qubit to determine the error generated by any one of the multiple data qubits; Correcting the error generated by any one of the data qubits.

2. The method according to claim 1, characterized in that, When performing a multi-bit quantum gate operation, the frequencies of the at least one auxiliary qubit and the multiple data qubits belong to different frequency bands.

3. The method according to claim 1 or 2, characterized in that The ratio between the first frequency difference and the second frequency difference is less than or equal to a first set value; the first frequency difference is the frequency difference between any two data qubits, and the second frequency difference is the frequency difference between any one data qubit and any one auxiliary qubit.

4. The method according to any one of claims 1 to 3, characterized in that The ratio between the deviation between any two absolute values and any one of the two absolute values is less than or equal to a second set value; any one of the absolute values is the absolute value of the frequency difference between any one data qubit and any one auxiliary qubit.

5. The method according to any one of claims 1 to 4, characterized in that The multiple single-bit quantum gate operations include single-bit quantum gate operations for each data qubit among the multiple data qubits; the single-bit quantum gate operation for each data qubit is performed when the state of the at least one auxiliary qubit is the ground state.

6. The method according to any one of claims 1 to 5, characterized in that The multiple single-bit quantum gate operations include single-bit quantum gate operations for each auxiliary qubit among the at least one auxiliary qubit; the method further includes: When performing a single-bit quantum gate operation for an auxiliary qubit, adjusting the frequencies of the multiple data qubits to a target frequency; the target frequency satisfies the following condition: the ratio between the absolute value of the third frequency difference and the absolute value of the fourth frequency difference is greater than or equal to a third set value; the third frequency difference is: when the frequencies of the multiple data qubits are the target frequency, the frequency difference between any one data qubit and any one auxiliary qubit; the fourth frequency difference is the frequency difference between any one data qubit and any one auxiliary qubit when performing a multi-bit quantum gate operation.

7. The method according to any one of claims 1 to 6, characterized in that, The method further includes: After measuring any one of the at least one auxiliary qubit, setting the state of the any one auxiliary qubit to the ground state.

8. A quantum error correction device, characterized in that, The quantum error correction device includes a module for performing the method according to any one of claims 1 to 7.

9. A quantum computing device, characterized in that, Including a controller and a quantum chip; the quantum chip includes at least one logical qubit; the controller performs quantum error correction on the quantum chip by executing the method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions for causing a computer to execute the method according to any one of claims 1 to 7.

11. A computer program product, characterized in that, When the computer program product runs on a computer, causing the computer to execute the method according to any one of claims 1 to 7.

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