Back contact solar cell, preparation method thereof and photovoltaic module

Abstract

The embodiments of the present application relate to the photovoltaic field and provide a back-contact solar cell, a preparation method thereof and a photovoltaic module, wherein the back-contact solar cell comprises: a substrate; a first doping region and a second doping region alternately arranged on the backlight surface of the substrate; wherein the first doping region comprises a tunneling oxide layer and a first doping layer, the first doping layer is located on the side of the tunneling oxide layer away from the substrate, and the first doping layer is a polycrystalline silicon doping layer; the second doping region comprises an intrinsic amorphous silicon layer, a second doping layer and an insulating structure, the second doping layer and the insulating structure are located on the side of the intrinsic amorphous silicon layer away from the substrate, and the insulating structure is located between the second doping layer and the first doping layer, the doping type of the second doping layer is opposite to the doping type of the first doping layer, and the second doping layer is an amorphous silicon doping layer or a microcrystalline silicon doping layer. The back-contact solar cell provided by the present application is at least beneficial to avoiding leakage of the back-contact battery.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and in particular to a back-contact solar cell, a preparation method thereof, and a photovoltaic module. Background Art

[0002] Back Contact Solar Cell (BC) places the doping layer and interconnection circuit on the back of the cell, thereby achieving no grid line shading on the front of the cell, maximizing the efficiency of capturing incident light and thereby improving the overall conversion efficiency of the cell. Summary of the Invention

[0003] The embodiments of the present application provide a back-contact solar cell, a preparation method thereof, and a photovoltaic module, which are at least helpful in preventing leakage of the back-contact cell.

[0004] According to some embodiments of the present application, on the one hand, the embodiments of the present application provide a back-contact solar cell, which includes: a substrate; a first doping region and a second doping region alternately arranged on the backlight surface of the substrate; wherein the first doping region includes a tunneling oxide layer and a first doping layer, the first doping layer is located on the side of the tunneling oxide layer away from the substrate, and the first doping layer is a polycrystalline silicon doping layer; the second doping region includes an intrinsic amorphous silicon layer, a second doping layer and an insulating structure, the second doping layer and the insulating structure are located on the side of the intrinsic amorphous silicon layer away from the substrate, and the insulating structure is located between the second doping layer and the first doping layer, the doping type of the second doping layer is opposite to the doping type of the first doping layer, and the second doping layer is an amorphous silicon doping layer or a microcrystalline silicon doping layer.

[0005] In some embodiments of the present application, the first doped region further includes: an insulating layer, the insulating layer being located between the substrate and the tunneling oxide layer, the insulating layer having an opening, the tunneling oxide layer being connected to the substrate through the opening, and at least a portion of the insulating layer being located between the tunneling oxide layer and the intrinsic amorphous silicon layer.

[0006] In some embodiments of the present application, the insulating structure includes a silicon oxide layer.

[0007] In some embodiments of the present application, in the arrangement direction of the first doping region and the second doping region, the width of the insulating structure accounts for greater than or equal to 10% and less than or equal to 30% of the width of the second doping region.

[0008] In some embodiments of the present application, in the arrangement direction of the first doping region and the second doping region, a ratio of the width of the opening to the width of the tunnel oxide layer is greater than or equal to 15% and less than or equal to 40%.

[0009] In some embodiments of the present application, the insulating layer is any one of a silicon nitride layer, a silicon carbide layer, or a silicon oxynitride layer.

[0010] In some embodiments of the present application, the thickness of the insulating layer is greater than or equal to 5 nm and less than or equal to 20 nm.

[0011] According to some embodiments of the present application, on the other hand, embodiments of the present application provide a method for preparing a back-contact solar cell, which is used to prepare the above-mentioned back-contact solar cell, and the method for preparing the back-contact solar cell includes: forming the first doping region and the second doping region on the substrate; forming the tunneling oxide layer in the first doping region; forming the first doping layer on the tunneling oxide layer; forming the intrinsic amorphous silicon layer in the second doping region; forming the insulating structure on the intrinsic amorphous silicon layer; and forming the second doping layer on the intrinsic amorphous silicon layer.

[0012] In some embodiments of the present application, forming the insulating structure on the intrinsic amorphous silicon layer includes: irradiating a set region of the intrinsic amorphous silicon layer with a laser to form an oxide layer on the set region.

[0013] In some embodiments of the present application, after forming the first doping region and the second doping region on the substrate, and before forming the tunneling oxide layer in the first doping region, the method for preparing the back-contact solar cell further includes: forming an insulating layer in the first doping region, the insulating layer having an opening.

[0014] According to some embodiments of the present application, on the other hand, embodiments of the present application provide a photovoltaic module, which includes: a cell string, which is formed by connecting a plurality of any of the above-mentioned back-contact solar cells or back-contact solar cells prepared by any of the above-mentioned back-contact solar cell preparation methods; an encapsulation film, which is used to cover the surface of the cell string; and a cover plate, which is used to cover the surface of the encapsulation film facing away from the cell string.

[0015] The technical solution provided by the embodiments of the present application has at least the following advantages:

[0016] An embodiment of the present application provides a back-contact solar cell, a preparation method thereof, and a photovoltaic module, wherein the back-contact solar cell includes: a substrate; a first doping region and a second doping region alternately arranged on the backlight surface of the substrate; wherein the first doping region includes a tunneling oxide layer and a first doping layer, the first doping layer is located on the side of the tunneling oxide layer away from the substrate, and the first doping layer is a polycrystalline silicon doping layer; the second doping region includes an intrinsic amorphous silicon layer, a second doping layer, and an insulating structure, the second doping layer and the insulating structure are located on the side of the intrinsic amorphous silicon layer away from the substrate, and the insulating structure is located between the second doping layer and the first doping layer, the doping type of the second doping layer is opposite to the doping type of the first doping layer, and the second doping layer is an amorphous silicon doping layer or a microcrystalline silicon doping layer. By setting an insulating structure between the second doping layer and the first doping layer of opposite doping types, a physical isolation can be formed between the second doping layer and the first doping layer, effectively avoiding charge carrier recombination and leakage between the two doping layers of opposite doping types, thereby improving the conversion efficiency of the battery. In addition, the insulating structure can also play a passivation role, which is beneficial to reduce carrier recombination in the battery and improve the stability of the battery. In addition, the first doping layer and the second doping layer are made of different types of crystalline silicon materials, among which the polycrystalline silicon doping layer helps to ensure a higher carrier transmission efficiency, and the amorphous silicon or microcrystalline silicon doping layer has a better passivation ability, which helps to reduce the carrier recombination loss. The two can adaptively enhance the conductivity or passivation ability of the doping layer according to the needs of different types of doping layers, so that the two are combined in the battery, which is beneficial to optimize the performance of the battery and improve the battery efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] One or more embodiments are exemplified by the figures in the corresponding drawings. These exemplified descriptions do not constitute a limitation on the embodiments. Unless otherwise stated, the figures in the drawings do not constitute a scale limitation. In order to more clearly illustrate the embodiments of the present application or the technical solutions in the traditional technology, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0018] Figure 1 A schematic structural diagram of a back-contact solar cell provided according to an embodiment of the present application;

[0019] Figure 2 A schematic structural diagram of a back-contact solar cell provided according to the relevant technology;

[0020] Figure 3 A schematic structural diagram of another back-contact solar cell provided according to an embodiment of the present application;

[0021] Figure 4 A schematic structural diagram of another back-contact solar cell provided according to an embodiment of the present application;

[0022] Figure 5 A schematic structural diagram of another back-contact solar cell provided according to an embodiment of the present application;

[0023] Figure 6 A schematic flow chart of a method for preparing a back-contact solar cell according to an embodiment of the present application.

[0024] The above drawings include the following reference numerals:

[0025] 1. Substrate; 2. First doped region; 21. Tunneling oxide layer; 22. First doped layer; 23. Insulating layer; 3. Second doped region; 31. Intrinsic amorphous silicon layer; 32. Second doped layer; 33. Insulating structure; 41. First conductive portion; 42. Second conductive portion; 51. First electrode; 52. Second electrode; 6. Front passivation layer; 7. Front anti-reflection layer. DETAILED DESCRIPTION

[0026] In conventional back-contact solar cells, in order to ensure that the back-contact solar cells have a sufficiently large effective light-receiving area, a design in which N-type doping regions and P-type doping regions are alternately arranged is adopted. However, in the above design, some film layers in the N-type doping regions and the P-type doping regions may come into contact, thereby causing leakage. In view of this, an embodiment of the present application provides a solar cell for improving the above-mentioned leakage problem.

[0027] In the description of the embodiments of this application, the technical terms "first" and "second" are used only to distinguish different objects and should not be understood to indicate or imply relative importance or implicitly specify the quantity, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, the meaning of "plurality" is more than two, unless otherwise clearly and specifically defined.

[0028] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0029] In the description of the embodiments of this application, the term "and / or" is simply a description of the association relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent the following three situations: A exists, A and B exist at the same time, and B exists. In addition, the character " / " in this document generally indicates that the associated objects are in an "or" relationship.

[0030] In the description of the embodiments of the present application, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0031] In the description of the embodiments of the present application, the technical terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the embodiments of the present application.

[0032] In the description of the embodiments of the present application, unless otherwise expressly specified or limited, technical terms such as "installed," "connected," "connected," and "fixed" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integration; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; internal connections between two components or interactions between two components. Those skilled in the art can understand the specific meanings of the above terms in the embodiments of the present application based on specific circumstances.

[0033] In the accompanying drawings corresponding to the embodiments of the present application, the thickness and area of ​​the layers are exaggerated for better understanding and ease of description. When describing a component (such as a layer, film, region, or substrate) as being on another component or on the surface of another component, the component may be "directly" located on the surface of the other component, or a third component may be present between the two components. Conversely, when describing a component as being on the surface of another component or as being formed or provided on the surface of a component, it means that there is no third component between the two components. In addition, when describing a component as being "substantially" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a portion of the edge of the entire surface.

[0034] In the description of the embodiments of this application, when a component "includes" another component, unless otherwise specified, other components are not excluded, and other components may be further included. In addition, when a component such as a layer, film, region, or plate is referred to as being "on / located on" another component, it can be "directly on" the other component (i.e., located on the surface of the other component with no other components between them) or another component can be present between them. In addition, when a component such as a layer, film, region, or plate is "directly on" another component, or when a component such as a layer, film, region, or plate is located on the surface of another component, it means that no other components are located between them.

[0035] The terms used herein in the description of the various embodiments are intended only to describe the specific embodiments and are not intended to be limiting. As used in the description of the various embodiments and the appended claims, "part" is intended to include the plural form unless the context clearly indicates otherwise. A component includes a layer, film, region, or plate.

[0036] The following detailed description of the various embodiments of the present application is provided in conjunction with the accompanying drawings. However, those skilled in the art will appreciate that many technical details are provided in the various embodiments of the present application to facilitate a better understanding of the present application. However, even without these technical details and the various variations and modifications based on the following embodiments, the technical solutions claimed in the present application can still be implemented.

[0037] Figure 1 A schematic structural diagram of a back-contact solar cell provided according to an embodiment of the present application.

[0038] like Figure 1 As shown, a back-contact solar cell includes a substrate 1 and a first doped region 2 and a second doped region 3 alternately arranged on the backlight surface of the substrate 1. The first doped region 2 includes a tunneling oxide layer 21 and a first doped layer 22. The first doped layer 22 is located on the side of the tunneling oxide layer 21 facing away from the substrate 1. The first doped layer 22 may be a polycrystalline silicon doped layer. The second doped region 3 includes an intrinsic amorphous silicon layer 31, a second doped layer 32, and an insulating structure 33. The second doped layer 32 and the insulating structure 33 are located on the side of the intrinsic amorphous silicon layer 31 facing away from the substrate 1, and the insulating structure 33 is located between the second doped layer 32 and the first doped layer 22. The doping type of the second doped layer 32 is opposite to that of the first doped layer 22. The second doped layer 32 may be an amorphous silicon doped layer or a microcrystalline silicon doped layer. It is understood that the opposite doping types of the first doped layer 22 and the second doped layer 32 refer to one being N-type doped and the other being P-type doped.

[0039] The embodiment of the present application forms a physical isolation between the second doping layer 32 and the first doping layer 22 by setting an insulating structure 33 between the second doping layer 32 and the first doping layer 22 of opposite doping types, effectively avoiding charge carrier recombination and leakage between the two doping layers of opposite doping types, thereby improving the conversion efficiency of the battery. In addition, the insulating structure 33 can also play a passivation role, which is beneficial to reducing carrier recombination in the battery and improving the stability of the battery. In addition, the first doping layer 22 and the second doping layer 32 in the embodiment of the present application use different types of crystalline silicon materials, among which the polycrystalline silicon doping layer helps to ensure a higher carrier transmission efficiency, and the amorphous silicon or microcrystalline silicon doping layer has a better passivation ability, which helps to reduce the carrier recombination loss. The two can adaptively enhance the conductivity or passivation ability of the doping layer according to the needs of different types of doping layers, so that the two are combined in the battery, which is beneficial to optimize the performance of the battery and improve the battery efficiency.

[0040] For ease of understanding, this application also provides a Figure 2 The schematic diagram of the back contact solar cell without an insulating structure is shown below. Figure 1 The structure and function of each film layer in the back contact solar cell provided by the embodiment of the present application are described in detail in turn, and combined with Figure 1 and Figure 2 For comparison and explanation with the back contact solar cell in , for the convenience of description, the direction in which the first doping regions 2 and the second doping regions 3 are alternately arranged is referred to as the first direction below.

[0041] Substrate 1 can be an N-type doped substrate, with its doping element including, but not limited to, at least one of N-type doping elements such as phosphorus (P), antimony (Sb), and arsenic (As). Alternatively, substrate 1 can be a P-type doped substrate, with its doping element including, but not limited to, at least one of P-type doping elements such as boron (B), aluminum (Al), and gallium (Ga). The material of substrate 1 includes, but is not limited to, single-crystal silicon (c-Si), polycrystalline silicon (poly-Si), amorphous silicon (a-Si), and the like, without limitation. Substrate 1 includes a front side and a back side. The front side of substrate 1 is intended to face a light source (e.g., the sun). The tunneling oxide layer 21 and first doped layer 22 in the first doped region 2, and the intrinsic amorphous silicon layer 31, second doped layer 32, and insulating structure 33 in the second doped region 3 are disposed on the back side of substrate 1. Placing these structures on the back side of the solar cell minimizes obstruction of light incident on the front side, improving the utilization of light incident on the front side, and thereby increasing the conversion efficiency of the solar cell.

[0042] The first doped region 2 includes a tunneling oxide layer 21 and a first doped layer 22. The tunneling oxide layer 21 is located between the substrate 1 and the first doped layer 22 and has an extremely small thickness. Therefore, the tunneling oxide layer 21 is thin enough to allow charge carriers to pass from the substrate 1 through the tunneling oxide layer 21 to the first doped layer 22 in a quantum tunneling manner. The above-mentioned tunneling method allows the charge carriers to quickly cross the domain tunneling oxide layer 21 with almost no resistance, thereby efficiently extracting the charge carriers from the silicon substrate 1, which helps to optimize the transmission of charge carriers and improve the collection efficiency of charge carriers. The tunneling oxide layer 21 can also play a passivation role to reduce surface recombination and increase the lifetime of charge carriers. The thickness of the tunneling oxide layer 21 can be 1.1nm~1.5nm, for example, 1.1nm, 1.2nm, 1.3nm, 1.4nm, 1.5nm or any other value within the above range.

[0043] The second doped region 3 includes an intrinsic amorphous silicon layer 31, a second doped layer 32 and an insulating structure 33. The intrinsic amorphous silicon layer 31 is located between the second doped layer 32 and the substrate 1. Due to its excellent surface passivation performance, it can reduce surface recombination at the interface between the second doped layer 32 and the substrate 1, thereby improving the lifetime of charge carriers. In addition, the intrinsic amorphous silicon layer 31 can also serve as a transmission medium for electrons and holes, promoting their separation and directional movement near the PN junction, and improving the charge collection efficiency. When the second doped layer 32 is a P-type doped layer, the intrinsic amorphous silicon layer 31 can serve as a barrier to electrons and allow holes to pass through. When the second doped layer 32 is an N-type doped layer, the intrinsic amorphous silicon layer 31 can serve as a barrier to holes and allow electrons to pass through.

[0044] In one possible embodiment, the substrate 1 can be an N-type doped substrate, the tunneling oxide layer 21 can be made of silicon oxide (SiOx), the first doped layer 22 can be an N-type doped layer, and the second doped layer 32 can be a P-type doped layer. In this case, the tunneling oxide layer 21 is used to pass electrons, and the second doped layer 32 is used to block electrons and pass holes. Therefore, the embodiment of the present application can balance the transmission of carriers and improve the photoelectric conversion efficiency of the solar cell by combining the high conductivity of the N-type polycrystalline silicon doped layer and the good passivation ability of the P-type amorphous silicon doped layer. In actual applications, the design of each film layer in the back-contact solar cell is not limited to the above-mentioned situation. For example, the substrate 1 can be a P-type doped substrate, the first doped layer 22 can be a P-type doped layer, and the second doped layer 32 can be an N-type doped layer. In this case, the tunneling oxide layer 21 is used to pass holes, and the second doped layer 32 is used to block holes and pass electrons. The following embodiments are all described using the former situation as an example.

[0045] When the insulating structure 33 is not provided in the back contact solar cell, the side walls of some film layers in the first doping region 2 and the second doping region 3 will partially contact each other. Usually, in the preparation process of the back contact solar cell, the intrinsic amorphous silicon layer 31 and the second doping layer 32 are formed after the first doping layer 22, and the pattern of the second doping layer 32 is formed by a laser etching process. However, it is difficult for the current laser etching process to make the edges of the intrinsic amorphous silicon layer 31 and the second doping region 3 completely aligned with the edges of the first doping region 2, so the following will occur. Figure 2 As shown, part of the intrinsic amorphous silicon layer 31 and the second doped layer 32 covers the first doped layer 22 and contacts the side walls of the tunneling oxide layer 21 and the first doped layer 22. Even if the edges of the intrinsic amorphous silicon layer 31 and the second doped region 3 are completely aligned with the edge of the first doped region 2, there may still be a situation where the side walls of the first doped layer 22 and the second doped layer 32 are in contact. The above-mentioned contact portion may cause leakage problems, especially since the first doped layer 22 and the second doped layer 32 are the main conductive components for carriers. The leakage phenomenon of the contact portion between the two is the main factor leading to the reduction of the transmission efficiency of the battery.

[0046] Depend on Figure 1 It can be seen that when an insulating structure 33 is required in a back-contact solar cell, it will be prepared in the order of the first doped layer 22, the intrinsic amorphous silicon layer 31, the insulating structure 33 and the second doped layer 32, wherein the insulating structure 33 is adjacent to the first doped layer 22. Then, when forming the pattern of the second doped layer 32, even if the accuracy of the laser etching process is difficult to achieve complete alignment with the edge of the insulating structure 33, the second doped layer 32 can be only partially covered on the insulating structure 33 instead of contacting the first doped layer 22. In this way, the insulating structure 33 can be used to isolate the first doped layer 22 and the second doped layer 32, avoiding leakage problems caused by contact between the two, reducing carrier recombination in the back-contact solar cell, and improving the conversion efficiency and service life of the back-contact solar cell.

[0047] It should be noted that the drawings of the present application show the situation where the edge of the intrinsic amorphous silicon layer 31 is etched to be aligned with the edge of the first doped region 2. The provision of the insulating structure 33 can at least isolate the first doped layer 22 and the second doped layer 32 to avoid leakage on the side walls of the two. Even if the intrinsic amorphous silicon layer 31 covers the first doped layer 22 and its side walls due to insufficient accuracy of the laser etching process, the insulating structure can also isolate the part of the intrinsic amorphous silicon layer 31 extending to the side wall of the first doped layer 22 from the second doped layer 32, thereby blocking the lateral transmission path of the carriers here and improving the leakage phenomenon.

[0048] In an embodiment of the present application, the insulating structure 33 may be a silicon oxide layer, which is prepared by laser irradiating a set area of ​​the intrinsic amorphous silicon layer 31 and forming an oxide layer on the set area. This method can accurately control the width and thickness of the insulating structure 33, avoiding the commonly used method of first depositing an entire layer of insulating material and then laser etching, which helps to reduce the process flow and reduce the difficulty of the process. In addition, because the silicon oxide layer has a high refractive index, the insulating structure 33 can also perform a back reflection function. After the light incident from the substrate 1 to the insulating structure 33 enters the insulating structure 33, it can be totally reflected on the surface of the insulating structure 33 and returned to the interior of the battery, thereby increasing the probability of light being reused and improving the efficiency of the solar cell.

[0049] In some embodiments of the present application, in the arrangement direction (first direction) of the first doping region 2 and the second doping region 3, the width of the insulating structure 33 accounts for greater than or equal to 10% and less than or equal to 30% of the width of the second doping region 3. For example, the width of the insulating structure 33 accounts for 10%, 11%, 12%, 13%, 14%, 15%, 16%, 17%, 18%, 19%, 20%, 21%, 22%, 23%, 24%, 25%, 26%, 27%, 28%, 29%, 30%, or any other value within the above ranges. Setting the width of the insulating structure 33 to the width of the second doping region 3 within the above ratio range can achieve isolation between the first doping layer 22 and the second doping layer 32 while ensuring a sufficiently large contact area between the second doping layer 32 and the intrinsic amorphous silicon layer 31, thereby providing sufficient space for carrier transmission between the second doping layer 32 and the intrinsic amorphous silicon layer 31, and preventing the insulating structure 33 from occupying too large a proportion of the second doping region 3 and affecting the performance of the back-contact solar cell. It should be understood that the width of the above-mentioned insulating structure 33 refers to its width in the arrangement direction of the first doping region 2 and the second doping region 3, that is, Figure 1 The width in the first direction is shown.

[0050] In addition, if Figure 1As shown, the back-contact solar cell may further include a conductive layer and an electrode structure. The conductive layer is located on the side of the first doped layer 22 and the second doped layer 32 facing away from the substrate 1. The conductive layer includes a first conductive portion 41 and a second conductive portion 42. The electrode structure is located on the side of the conductive layer facing away from the substrate 1 and includes a first electrode 51 and a second electrode 52. The first conductive portion 41 is located on the side of the first doped layer 22 facing away from the tunneling oxide layer 21, and the first electrode 51 is located on the side of the first conductive portion 41 facing away from the first doped layer 22. Thus, the first conductive portion 41 can collect carriers (e.g., electrons) in the first doped layer 22 and transfer them to the first electrode 51. The second conductive portion 42 is located on the side of the second doped layer 32 facing away from the intrinsic amorphous silicon layer 31, and the second electrode 52 is located on the side of the second conductive portion 42 facing away from the second doped layer 32. Thus, the second conductive portion 42 can collect carriers (e.g., holes) in the second doped layer 32 and transfer them to the second electrode 52. The first electrode 51 and the second electrode 52 conduct the carriers generated within the cell to an external circuit to provide power.

[0051] like Figure 1 As shown, the front side of the substrate 1 may be a velvet structure to increase the amount of light entering the front side of the battery. The front side of the substrate 1 may also be provided with a front passivation layer 6 and a front anti-reflection layer 7 and other structures. Optionally, the material of the front passivation layer 6 may include but is not limited to at least one of aluminum oxide (AlOx), silicon oxide (SiOx) and intrinsic amorphous silicon (a-Si:H(i)). The front passivation layer 6 can be used to improve the passivation performance of the front side of the battery, reduce surface recombination, and thus improve the battery efficiency. The material of the front anti-reflection layer 7 may include but is not limited to at least one of silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiOxNy), etc., to reduce light reflection on the front side of the battery, increase light incidence and absorption, and thus improve the photoelectric conversion efficiency of the solar cell.

[0052] Figure 3 This is a schematic structural diagram of another back-contact solar cell provided according to an embodiment of the present application.

[0053] Figure 3 The second doping layer 32, the insulating structure 33, the first conductive portion 41, the second conductive portion 42, the first electrode 51, the second electrode 52, the front passivation layer 6 and the front antireflection layer 7 are Figure 1 The same as in , will not be repeated here. Figure 3 As shown, the back contact solar cell in the embodiment of the present application is Figure 1The difference of the back-contact solar cell shown is that the first doped region 2 can also include an insulating layer 23, the insulating layer 23 is located between the substrate 1 and the tunneling oxide layer 21, the insulating layer 23 has an opening, the tunneling oxide layer 21 is connected to the substrate 1 through the opening, and at least part of the insulating layer 23 is located between the tunneling oxide layer 21 and the intrinsic amorphous silicon layer 31.

[0054] In the embodiment of the present application, an insulating layer 23 is provided between the tunneling oxide layer 21 and the intrinsic amorphous silicon layer 31, so as to block the lateral transmission path of carriers between the intrinsic amorphous silicon layer 31 and the tunneling oxide layer 21, avoid the side wall of the intrinsic amorphous silicon layer 31 from contacting the tunneling oxide layer 21, and avoid the charge carriers from being recombined at the interface between the intrinsic amorphous silicon layer 31 and the tunneling oxide layer 21. In addition, the insulating layer 23 can also block the vertical transmission path of carriers, that is, avoid carriers from being transmitted from the tunneling oxide layer 21 through the substrate 1 to the intrinsic amorphous silicon layer 31 or from the intrinsic amorphous silicon layer 31 through the substrate 1 to the tunneling oxide layer 21 and recombining with carriers of opposite polarity. It can be seen that the provision of the insulating layer 23 can further reduce the recombination phenomenon of carriers of opposite polarity, improve leakage, and improve the conversion efficiency of solar cells.

[0055] In the embodiment of the present application, the insulating layer 23 has an opening, which allows the tunnel oxide layer 21 to connect to the substrate 1, forming a carrier transmission channel. In the arrangement direction of the first doping region 2 and the second doping region 3 (the first direction), the ratio of the width of the opening of the insulating layer 23 to the width of the tunnel oxide layer 21 is greater than or equal to 15% and less than or equal to 40%. Optionally, the ratio of the width of the opening of the insulating layer 23 to the width of the tunnel oxide layer 21 is greater than or equal to 20% and less than or equal to 40%. Exemplarily, the ratio of the width of the opening of the insulating layer 23 to the width of the tunnel oxide layer 21 is 15%, 16%, 17%, 18%, 19%, 20%, 21%, 22%, 23%, 24%, 25%, 26%, 27%, 28%, 29%, 30%, 31%, 32%, 33%, 34%, 35%, 36%, 37%, 38%, 39%, 40%, or any other value within the above range. In the embodiment of the present application, the width of the opening in the insulating layer 23 is set within the above-mentioned range, which can ensure that the opening has a sufficient area while isolating the tunneling oxide layer 21 and the second doping layer 32, so that the tunneling oxide layer 21 and the first doping layer 22 have a sufficiently large contact area, ensuring that the carrier transmission efficiency meets the requirements.

[0056] In some embodiments of the present application, the insulating layer 23 can be any one of a silicon nitride layer, a silicon carbide layer or a silicon oxynitride layer. The above insulating materials have good insulating properties and can block the carriers between the tunneling oxide layer 21 and the intrinsic amorphous silicon layer 31 to prevent their recombination. The insulating layer 23 is similar to the material of the front anti-reflection layer 7. If the two use the same material, there is no need to add the material type required in the original solar cell production line, which is conducive to controlling production costs.

[0057] In some embodiments of the present application, the thickness of the insulating layer 23 is greater than or equal to 5 nm and less than or equal to 20 nm. Setting the thickness of the insulating layer 23 within the above range can, on the one hand, avoid poor insulation due to too small a thickness of the insulating layer 23, prevent the sidewalls of the intrinsic amorphous silicon layer 31 from contacting the tunneling oxide layer 21, and ensure that as much or as little as possible of the sidewalls of the insulating layer 23 are in contact. On the other hand, it can also avoid the insulating layer 23 being too thick, which may affect the carrier transmission efficiency between the substrate 1 and the first doped layer 22, and reduce costs.

[0058] Figure 4 A schematic structural diagram of another back-contact solar cell provided according to an embodiment of the present application; Figure 5 This is a schematic structural diagram of another back-contact solar cell provided according to an embodiment of the present application. Figure 4 and Figure 5 The second doping layer 32, the insulating structure 33, the first conductive portion 41, the second conductive portion 42, the first electrode 51, the second electrode 52, the front passivation layer 6 and the front antireflection layer 7 are Figure 1 and Figure 3 The same as in , I will not repeat them here.

[0059] Figure 4 and Figure 1 The embodiment shown and Figure 5 and Figure 3 The difference between the embodiments shown is that the portion of the substrate 1 in the second doping region 3 is a velvet surface, and accordingly, the portion of each film layer located in the second doping region 3 is also a velvet surface. A velvet structure is provided in the second doping region 3, and light can be refracted and reflected multiple times on the velvet structure and return to the interior of the battery, thereby increasing the probability of light being utilized in the battery, thereby improving the efficiency of the back-contact solar cell.

[0060] Based on the same concept, the present application also provides a method for preparing a back-contact solar cell, and the method for preparing a back-contact solar cell is used to prepare the above-mentioned back-contact solar cell. Figure 6 A schematic diagram of a process for preparing a back-contact solar cell according to an embodiment of the present application is shown in FIG. Figure 6 As shown, the method for preparing the back contact solar cell includes at least the following steps S1 to S6:

[0061] Step S1, forming a first doping region 2 and a second doping region 3 on a substrate 1. Optionally, before forming the first doping region 2 and the second doping region 3, the substrate 1 can be cleaned and polished, wherein chemical solvents (such as acid, alkali, organic solvent, etc.) or physical methods such as ultrasonic and radio frequency (RF) cleaning can be used to remove dust, grease, metal pollutants and other impurities on the surface of the silicon wafer to ensure the quality of the subsequent deposition process, and chemical mechanical polishing (CMP) technology can be used to smooth the surface of the substrate 1 and reduce the surface roughness through the action of grinding liquid and grinding disk to provide a smooth substrate 1 for subsequent preparation processes. Exemplarily, the substrate 1 can be a silicon wafer, which can be an N-type doped single crystal silicon wafer with a thickness of 100μm~200μm, a resistivity of 1~10ohm, and a crystal orientation of <100> After the substrate 1 is pretreated as described above, a laser is used to form grooves on the backlight surface of the substrate 1 according to a predetermined pattern to divide the first doping region 2 and the second doping region 3. For example, a groove is formed in the portion treated by the laser, and the groove area is used as the second doping region 3. The portion not treated by the laser, i.e., the non-groove area, is used as the first doping region 2. The groove area and the non-groove area are arranged along the first direction. Exemplarily, the width of the groove area formed by the laser groove in the first direction can be 300 μm to 800 μm, and the width of the non-groove area in the first direction can be 300 μm to 800 μm, that is, the width of the first doping region 2 and the second doping region 3 in the first direction are both 300 μm to 800 μm.

[0062] In some embodiments of the present application, if it is necessary to form Figure 3 or Figure 5 In the back-contact solar cell shown, after forming the first doping region 2 and the second doping region 3 on the substrate 1 (step S1) and before forming the tunneling oxide layer 21 in the first doping region 2 (step S2), the method for preparing the back-contact solar cell may further include the following steps S11 and S12:

[0063] Step S11: forming an insulating layer 23 in the first doped region 2. Optionally, the insulating layer 23 may be formed by depositing at least one insulating material selected from the group consisting of silicon nitride, silicon oxide, and silicon oxynitride through a chemical vapor deposition (CVD) process. The thickness of the deposited insulating material may be 5 mm to 20 mm.

[0064] Step S12: Form an opening in the insulating layer 23. Optionally, a laser can be used to form the opening in the insulating layer 23. The width of the opening in the first direction can be 50 μm to 300 μm. After step S12, alkaline washing can be used to remove the surface damage layer to improve the surface quality and prepare for subsequent film layer preparation.

[0065] Step S2: Form a tunneling oxide layer 21 in the first doped region 2. Optionally, the tunneling oxide layer 21 can be formed in the first doped region 2 using a thermal oxidation method or a low-pressure chemical vapor deposition (LPCVD) process. The tunneling oxide layer 21 can be a silicon oxide layer. When the first doped region 2 includes an insulating layer 23, a portion of the tunneling oxide layer 21 fills the opening in the insulating layer 23. Exemplarily, the thickness of the tunneling oxide layer 21 can be 1.1 nm to 1.5 nm.

[0066] Step S3: Form a first doped layer 22 on the tunneling oxide layer 21. Optionally, a polysilicon layer can be deposited on the back side of the substrate 1 using a process such as plasma-enhanced chemical vapor deposition (PECVD) or low-pressure chemical vapor deposition (LPCVD). During the deposition process, an N-type doping element is introduced to form the first doped layer 22 (N-type doped layer). The N-type doping element can be at least one of phosphorus (P), antimony (Sb), and arsenic (As). Exemplarily, the thickness of the first doped layer 22 can be 2 nm to 250 nm.

[0067] In step S3, phosphosilicate glass (PSG) is formed on both the front and back sides of the substrate 1. Then, a photoresist and a mask can be used to define the pattern of the second doping layer 32 (P-type doping layer) through exposure and development processes. Then, a wet etching process (such as using an HF solution) is used to remove the PSG on the pattern of the second doping layer 32, but the PSG on the pattern of the first doping layer 22 is retained. The PSG on the front side can also be removed using the same method.

[0068] After completing step S3 and before proceeding to step S4, the following steps may also be included:

[0069] Step S31, texturing. Optionally, double-sided texturing can be performed using chemical or physical methods, forming a velvet surface in the area where the PSG was removed in the previous step. After completing this step, the front side of the substrate 1 is a velvet surface. Since the first doping layer 22 is covered with PSG, the back side of the substrate 1 includes a velvet surface area and a non-velvet surface area. The velvet surface area is located in the second doping region 3, and the non-velvet surface area is located in the first doping region 2. After the texturing is completed, the PSG on the first doping layer 22 can be removed.

[0070] Step S32: forming a front passivation layer 6 on the front surface of the substrate 1. Optionally, the front passivation layer 6 can be formed by depositing any one of aluminum oxide (AlOx), silicon oxide (SiOx), or intrinsic amorphous silicon (a-Si:H(i)) on the front surface of the substrate 1 using a PECVD or CVD process.

[0071] Step S33: forming a front anti-reflection layer 7 on the front passivation layer 6. Optionally, a PECVD process may be used to deposit at least one layer of silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiOxNy), or the like on the front passivation layer 6 to form the front anti-reflection layer 7.

[0072] Step S34: Annealing. Optionally, a high-temperature annealing process may be performed to improve the quality of passivation, reduce surface recombination, and increase battery efficiency.

[0073] Step S35: Remove the back-side metal plating. Optionally, a chain device can be used to remove the back-side metal plating to avoid metal contact and short circuit, thereby improving the reliability of the battery.

[0074] Step S36: Re-cleaning. Optionally, the silicon wafer may be cleaned again using the same method as step S1 to remove all residual chemicals and impurities in preparation for subsequent process steps.

[0075] It is understandable that the above steps S31 to S36 can be selected or not according to actual needs, and the embodiment of the present application does not limit them here.

[0076] Step S4: forming an intrinsic amorphous silicon layer 31 in the second doping region 3. Optionally, a layer of intrinsic amorphous silicon (a-Si:H(i)) can be deposited on the back side of the substrate 1 using a PECVD process under low temperature conditions (less than 250°C). Exemplarily, the thickness of the deposited intrinsic amorphous silicon can be 10 nm to 20 nm. The intrinsic amorphous silicon material is then etched using a laser to form a pattern of the intrinsic amorphous silicon layer 31. In this step, the laser-etched area does not need to be strictly aligned with the edge of the first doping region 2, and even a portion of the intrinsic amorphous silicon material located in the second doping region 3 can be etched away, thereby ensuring that the intrinsic amorphous silicon layer 31 does not cover the tunneling oxide layer 21 and the first doping layer 22, thereby reducing carrier recombination between the intrinsic amorphous silicon layer 31 and the tunneling oxide layer 21 and the first doping layer 22.

[0077] Step S5: Forming an insulating structure 33 on the intrinsic amorphous silicon layer 31. Optionally, forming the insulating structure 33 on the intrinsic amorphous silicon layer 31 includes: irradiating a predetermined region of the intrinsic amorphous silicon layer 31 with a laser to form an oxide layer on the predetermined region, using laser oxidation of the intrinsic amorphous silicon layer 31. Optionally, the above steps can be performed in an oxygen atmosphere, and the insulating structure 33 is a silicon oxide layer. Exemplarily, the thickness of the insulating structure 33 can be 20 nm to 50 nm.

[0078] Step S6: forming a second doped layer 32 on the intrinsic amorphous silicon layer 31. Optionally, an amorphous silicon layer or a microcrystalline silicon layer can be deposited by a PECVD process, and a P-type dopant element can be introduced to form the second doped layer 32 (P-type doped amorphous silicon layer or P-type doped microcrystalline silicon layer). The P-type doped amorphous silicon layer on the first doped layer 22 is then removed by a laser or wet etching process, thereby forming a pattern of the second doped layer 32, and at this time, the first doped layer 22 is exposed.

[0079] After completing step S6, the following steps S7 and S8 may also be included:

[0080] Step S7: forming a conductive layer on the first doped layer 22 and the second doped layer 32. Optionally, one or more layers of indium tin oxide (ITO), indium wolfram oxide (IWO), indium cobalt oxide (ICO), stannic oxide (SnOx), or aluminum-doped zinc oxide (AZO) can be deposited using a physical vapor deposition (PVD) or PECVD process. Exemplarily, the thickness of the deposited conductive layer material can be 30 nm to 120 nm. After depositing the conductive layer material, it is patterned using a laser or wet etching process to form a first conductive portion 41 and a second conductive portion 42 of the conductive layer. The first conductive portion 41 is located on the first doped layer 22, and the second conductive portion 42 is located on the second doped layer 32. There is a gap between the first conductive portion 41 and the second conductive portion 42.

[0081] Step S8: Forming the first electrode 51 and the second electrode 52. Optionally, at least one electrode material such as silver (Ag), copper (Cu), or aluminum (Al) can be deposited on the structure on the back side of the substrate 1, and the first electrode 51 and the second electrode 52 can be formed by a process such as screen printing or laser transfer, wherein the first electrode 51 contacts the first doped layer 22, and the second electrode 52 contacts the second doped layer 32.

[0082] Based on the same concept, the present application also provides a photovoltaic module, which includes: a battery string, a packaging film and a cover plate.

[0083] A cell string is formed by connecting a plurality of any of the aforementioned back-contact solar cells, or back-contact solar cells prepared by any of the aforementioned back-contact solar cell preparation methods. The back-contact solar cells may be connected in series, in parallel, or in a combination thereof, without limitation. By providing a back reflective layer within the solar cell, the utilization rate of incident light by each solar cell is improved, thereby enhancing the efficiency of the solar cell module.

[0084] The encapsulation film covers the surface of the battery string, isolating the battery string from the external environment and preventing water vapor and oxygen from corroding the solar cells, thereby improving the reliability of the components and extending their service life. The encapsulation film can be made of, but not limited to, ethylene vinyl acetate copolymer (EVA) film, polyolefin elastomer (POE) film, etc.

[0085] The cover is located on the surface of the packaging film facing away from the battery string. It can be used to protect its internal structure and improve reliability. The cover can be made of materials with greater hardness and good light transmittance, such as glass, so as to provide protection for the battery while allowing as much light as possible to enter the battery for use.

[0086] Those skilled in the art will appreciate that the above-described embodiments are specific examples for implementing the present application, and that in actual applications, various changes in form and detail may be made thereto without departing from the spirit and scope of the present application. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be based on the scope defined in the claims.

Claims

1. A back contact solar cell, characterized in that: The back contact solar cell comprises: substrate; First doped regions and second doped regions are alternately arranged on the backlight surface of the substrate; The first doped region includes an insulating layer, a tunneling oxide layer, and a first doped layer. The insulating layer is located between the substrate and the tunneling oxide layer. The insulating layer has an opening. The tunneling oxide layer is connected to the substrate through the opening. The first doped layer is located on a side of the tunneling oxide layer away from the substrate. The first doped layer is a polysilicon doped layer. The second doping region includes an intrinsic amorphous silicon layer, a second doping layer and an insulating structure. The second doping layer and the insulating structure are located on the side of the intrinsic amorphous silicon layer away from the substrate, and the insulating structure is located between the second doping layer and the first doping layer. The doping type of the second doping layer is opposite to the doping type of the first doping layer. The second doping layer is an amorphous silicon doping layer or a microcrystalline silicon doping layer. At least part of the insulating layer is located between the tunneling oxide layer and the intrinsic amorphous silicon layer.

2. The back contact solar cell according to claim 1, wherein: The insulating structure includes a silicon oxide layer.

3. The back contact solar cell according to claim 1, wherein: In an arrangement direction of the first doping region and the second doping region, a proportion of the width of the insulating structure to a width of the second doping region is greater than or equal to 10% and less than or equal to 30%.

4. The back contact solar cell according to claim 1, wherein: In an arrangement direction of the first doping region and the second doping region, a ratio of a width of the opening to a width of the tunnel oxide layer is greater than or equal to 15% and less than or equal to 40%.

5. The back contact solar cell according to claim 1, wherein: The insulating layer is any one of a silicon nitride layer, a silicon carbide layer or a silicon oxynitride layer.

6. The back contact solar cell according to claim 1, wherein: The thickness of the insulating layer is greater than or equal to 5 nm and less than or equal to 20 nm.

7. A method for preparing a back-contact solar cell, characterized in that: The method for preparing a back-contact solar cell is used to prepare the back-contact solar cell according to claim 1, and the method for preparing a back-contact solar cell comprises: forming the first doping region and the second doping region on the substrate; forming an insulating layer in the first doping region, wherein the insulating layer has an opening; forming the tunneling oxide layer in the first doped region; forming the first doping layer on the tunneling oxide layer; forming the intrinsic amorphous silicon layer in the second doping region; forming the insulating structure on the intrinsic amorphous silicon layer; The second doping layer is formed on the intrinsic amorphous silicon layer.

8. The method for preparing a back-contact solar cell according to claim 7, wherein: Forming the insulating structure on the intrinsic amorphous silicon layer includes: irradiating a set region of the intrinsic amorphous silicon layer with a laser to form an oxide layer on the set region.

9. A photovoltaic module, characterized in that: The photovoltaic module comprises: A cell string formed by connecting a plurality of back-contact solar cells according to any one of claims 1 to 6 or back-contact solar cells prepared by the method for preparing a back-contact solar cell according to claim 7 or 8; A packaging film, used to cover the surface of the battery string; A cover plate is used to cover the surface of the packaging film facing away from the battery string.

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