Circuit board and semiconductor package including same

Abstract

A circuit board according to an embodiment includes a first circuit layer; a first insulating layer disposed on the first circuit layer; a second insulating layer disposed on the first insulating layer; and a second circuit layer disposed on the second insulating layer, in which at least one of a wiring density of the first circuit layer, a thickness of the first insulating layer, and a property of the first insulating layer is different from at least one of a wiring density of the second circuit layer, a thickness of the second insulating layer, and a property of the second insulating layer, one of the first insulating layer and the second insulating layer includes a single layer, and the other of the first insulating layer and the second insulating layer includes a first layer having a first property and a second layer having a second property different from the first property.

Description

Technical Field

[0001] An embodiment relates to a circuit board, and more particularly, to a circuit board having improved warpage characteristics and a semiconductor package including the circuit board. Background Art

[0002] A printed circuit board (PCB) is used to electrically connect or mechanically fix specific electronic components.

[0003] The circuit board includes an insulating layer such as phenolic resin or epoxy resin and a circuit pattern disposed on the insulating layer.

[0004] According to the number of layers, the circuit board may be classified into a single-sided circuit board having a wiring pattern only on one side of the insulating layer, a double-sided circuit board having wiring patterns on both sides of the insulating layer, and a multi-layer circuit board having a multi-layer wiring pattern.

[0005] During the manufacturing process of the circuit board, warpage may occur through a heat treatment process of the circuit board. In particular, the circuit board becomes thinner according to the miniaturization or thinning of electronic products. In addition, as the circuit board becomes thinner, the degree of warpage may increase, and thus the defect rate of the circuit board may increase.

[0006] Due to the asymmetric structure of the upper and lower layers with respect to the center in the thickness direction of the circuit board, the circuit board may warp. Here, the asymmetric structure may mean a difference in the properties of the insulating layer, a difference in the thickness of the insulating layer, a difference in the thickness of the circuit pattern, and a difference in the wiring density of the circuit patterns in the upper and lower layers. These characteristics may include dielectric constant, coefficient of thermal expansion, glass transition temperature, modulus, shrinkage rate, dielectric loss, etc.

[0007] In addition, if the circuit board warps, the degree of interlayer matching in the manufacturing process of the circuit board may be reduced, which may reduce the mechanical reliability and / or electrical reliability of the circuit board. Summary of the Invention

[0008] Technical Problem

[0009] An embodiment provides a circuit board having an upper and lower asymmetric structure and a semiconductor package including the circuit board.

[0010] In addition, an embodiment provides a circuit board including a buffer layer in one of a corresponding upper insulating layer and lower insulating layer and a semiconductor package including the circuit board.

[0011] In addition, an embodiment provides a circuit board having improved warpage characteristics and a semiconductor package including the circuit board.

[0012] In addition, an embodiment provides a circuit board having improved mechanical reliability and / or electrical reliability and a semiconductor package including the circuit board.

[0013] The technical problems to be solved by the proposed embodiments are not limited to the above technical problems, and other technical problems not mentioned can be clearly understood by those skilled in the art to which the embodiments proposed below belong.

[0014] Technical solution

[0015] A circuit board according to an embodiment includes: a first circuit layer; a first insulating layer disposed on the first circuit layer; a second insulating layer disposed on the first insulating layer; and a second circuit layer disposed on the second insulating layer, wherein at least one of the wiring density of the first circuit layer, the thickness of the first insulating layer, and the property of the first insulating layer is different from at least one of the wiring density of the second circuit layer, the thickness of the second insulating layer, and the property of the second insulating layer, wherein any one of the first insulating layer and the second insulating layer is provided as a single layer, and wherein the other of the first insulating layer and the second insulating layer includes a first layer having a first property and a second layer having a second property different from the first property.

[0016] In addition, the second layer of any one of the first insulating layer and the second insulating layer is provided closer to the other of the first insulating layer and the second insulating layer than the first layer.

[0017] In addition, the wiring density of the first circuit layer is less than the wiring density of the second circuit layer, the first insulating layer has a multilayer structure including a first layer and a second layer, and the second insulating layer has a single-layer structure.

[0018] In addition, the thickness of the first insulating layer is greater than the thickness of the second insulating layer, the first insulating layer has a multilayer structure including a first layer and a second layer, and the second insulating layer has a single-layer structure.

[0019] In addition, the dielectric constant of the first insulating layer is greater than the dielectric constant of the second insulating layer, the first insulating layer has a multilayer structure including a first layer and a second layer, and the second insulating layer has a single-layer structure.

[0020] In addition, the first property of the first layer of the first insulating layer includes a first glass transition temperature, and the second property of the second layer of the first insulating layer includes a second glass transition temperature less than the first glass transition temperature.

[0021] In addition, the second glass transition temperature satisfies the range of 60% to 95% of the first glass transition temperature.

[0022] In addition, the first property of the first layer of the first insulating layer includes a first modulus, and the second property of the second layer of the first insulating layer includes a second modulus less than the first modulus.

[0023] In addition, the second modulus satisfies the range of 50% to 95% of the first modulus.

[0024] In addition, the first property of the first layer of the first insulating layer includes at least one of a first dielectric constant and a first coefficient of thermal expansion, and the second property of the second layer of the first insulating layer includes at least one of a second dielectric constant corresponding to the first dielectric constant and a second coefficient of thermal expansion corresponding to the first coefficient of thermal expansion, and at least one of the first dielectric constant and the first coefficient of thermal expansion satisfies the range of 93% to 107% of at least one of the second dielectric constant and the second coefficient of thermal expansion.

[0025] In addition, the circuit board further includes a third insulating layer disposed between the first insulating layer and the second insulating layer, the thickness of the third insulating layer being greater than the thickness of each of the first insulating layer and the second insulating layer, and the third insulating layer being a core layer.

[0026] In addition, the first layer of the first insulating layer, the second layer of the first insulating layer, and the second insulating layer each include a resin, a glass fiber, and a filler.

[0027] In addition, the circuit board further includes: a first through electrode that commonly penetrates the first layer of the first insulating layer and the second layer of the first insulating layer; and a third circuit layer disposed between the first insulating layer and the third insulating layer, the lower surface of the first through electrode being connected to the first circuit layer, and the upper surface of the first through electrode being connected to the third circuit layer.

[0028] In addition, the circuit board further includes: a fourth insulating layer disposed below the first insulating layer; a fifth circuit layer disposed below the fourth insulating layer; a fifth insulating layer disposed on the third insulating layer; and a sixth circuit layer disposed on the fifth insulating layer, wherein at least one of the wiring density of the fifth circuit layer, the thickness of the fourth insulating layer, and the property of the fourth insulating layer is different from at least one of the wiring density of the sixth circuit layer, the thickness of the fifth insulating layer, and the property of the fifth insulating layer, and wherein either the fifth insulating layer or the sixth insulating layer is composed of a plurality of layers having different properties.

[0029] Meanwhile, the semiconductor package according to the embodiment includes: a first circuit layer; a first insulating layer disposed on the first circuit layer; a second insulating layer disposed on the first insulating layer; a second circuit layer disposed on the second insulating layer; a connection part disposed on the second circuit layer; and a semiconductor device disposed on the connection part, wherein at least one of the thickness and the dielectric constant of the first insulating layer is greater than at least one of the thickness and the dielectric constant of the second insulating layer, and wherein the first insulating layer includes: a first layer having a first property; and a second layer disposed on the first layer and having a second property different from the first property, wherein at least one of the glass transition temperature and the modulus of the second layer is less than at least one of the glass transition temperature and the modulus of the first layer.

[0030] In addition, the first insulating layer and the first circuit layer are an antenna array layer for transmitting a transmission signal to the outside or receiving a received signal from the outside, and the second insulating layer and the second circuit layer are a driving layer for transmitting a transmission signal to the antenna array layer or receiving a received signal from the antenna array layer and supplying the received signal to the semiconductor device.

[0031] Beneficial effects

[0032] The embodiment can prevent the circuit board from warping significantly in a specific direction, thereby improving the electrical reliability and / or physical reliability of the circuit board.

[0033] Specifically, the circuit board may include a lower layer including the first insulating layer and the first circuit layer and an upper layer including the second insulating layer and the second circuit layer. At this time, the required characteristics of each of the upper layer and the lower layer may be different from each other. Therefore, the upper layer and the lower layer may have any one of a property difference of the insulating layer, a thickness difference of the insulating layer, and a wiring density difference of the circuit layer. Thus, according to the warping direction of the circuit board caused by the property difference, the thickness difference, and the wiring density difference, the embodiment includes a buffer layer in any one of the first insulating layer and the second insulating layer. For example, when both ends of the circuit board warp downward, the buffer layer may be provided in the first insulating layer. For example, when both ends of the circuit board warp upward, the buffer layer may be provided in the second insulating layer.

[0034] Therefore, an embodiment may provide a buffer layer in one of the first insulating layer and the second insulating layer, thereby reducing the warpage of the circuit board in a specific direction. For example, the first insulating layer may include a first layer and a second layer corresponding to the buffer layer provided on the first layer. The second layer of the first insulating layer has a lower modulus (Y's Modulus) and glass transition temperature (Tg) than the first layer of the first insulating layer and the second insulating layer, and the second layer of the first insulating layer may be provided in the first lamination region which is the starting point of stress in the process of manufacturing the circuit board. Thereby, the embodiment may reduce the stress formed at the start of lamination, and thus may have the effect of reducing the additional stress generated in the continuous lamination process.

[0035] In addition, due to the property of the second layer of the first insulating layer having a relatively low glass transition temperature and modulus, the fluidity of the resin in the first insulating layer in the high-temperature lamination region may be improved. Thereby, the embodiment may delay the stress initiation time in the region where the temperature decreases by using the second layer of the first insulating layer, thereby reducing the stress acting on the circuit board at room temperature.

[0036] Therefore, an embodiment may provide the first insulating layer with a first layer and a second layer having different moduli (Y's Modulus) and glass transition temperatures (Tg), while making the dielectric constant and thermal expansion coefficient of each of the first layer and the second layer correspond to each other. Therefore, the embodiment may prevent the circuit board from significantly warping in a specific direction while satisfying the required characteristics of the first insulating layer. Thereby, the embodiment may improve the physical reliability and / or electrical reliability of the circuit board and enable the semiconductor device mounted in the semiconductor package including the circuit board to operate stably. Therefore, the embodiment may improve the operating characteristics of the electronic product and / or server applying the semiconductor package, and further improve the operating reliability.

[0037] In summary, the circuit board of the embodiment may include a buffer layer having a relatively low modulus (Y's Modulus) and glass transition temperature (Tg) in the lower layer located below and the upper layer located above with respect to the center of the circuit board. The buffer layer may control the warpage characteristics caused by the asymmetry of the properties and structures between the upper layer and the lower layer. Thereby, the embodiment may improve the internal stress of the circuit board in the manufacturing process of the circuit board, and improve the reliability due to the thermal deformation caused by the internal stress. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 is a diagram showing a circuit board according to a comparative example.

[0039] Figure 2 is a cross-sectional view showing a circuit board according to an embodiment.

[0040] Figures 3 to 6It is a diagram for explaining the warping direction of a circuit board in terms of the conditions of an insulating layer and a circuit layer according to an embodiment.

[0041] Figure 7 It is a diagram for explaining the position of a buffer layer according to an embodiment.

[0042] Figure 8 It is a cross-sectional view of a circuit board according to a second embodiment.

[0043] Figure 9 It shows including Figure 8 a semiconductor package of a circuit board. Detailed Description of the Embodiment

[0044] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. However, the spirit and scope of the present disclosure are not limited to a part of the described embodiments and can be implemented in various other forms, and within the spirit and scope of the present disclosure, one or more elements of the embodiments can be selectively combined and rearranged.

[0045] In addition, unless otherwise clearly defined and described, terms (including technical terms and scientific terms) used in the embodiments of the present disclosure can be interpreted as having the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure pertains, and for example, those terms defined in a common dictionary can be interpreted as having a meaning consistent with their meaning in the context of the relevant field. In addition, the terms used in the embodiments of the present disclosure are used to describe the embodiments and are not intended to limit the present disclosure.

[0046] In this specification, unless specifically stated in the wording, the singular form may also include the plural form, and when described as "at least one (or more) of A (and) B and C", it may include at least one of all combinations that can be combined among A, B, and C.

[0047] Furthermore, when describing elements of the embodiments of the present disclosure, terms such as first, second, A, B, (a), and (b) may be used. These terms are only used to distinguish an element from another element, and these terms are not limited to the nature, order, or sequence of the elements.

[0048] In addition, when an element is described as being "connected", "coupled", or "contacted" to another element, it may include not only the case where the element is directly "connected", "coupled", or "contacted" to other elements, but also the case where the element is "connected", "coupled", or "contacted" to other elements through another element between the element and the other elements.

[0049] In addition, when described as being "on (above)" or "under (below)" each component, "on (above)" or "under (below)" may include not only the case where two components are directly connected to each other, but also the case where one or more other components are formed or disposed between the two components.

[0050] In addition, when expressed as "on (above)" or "under (below)", it may include not only the upward direction based on one component, but also the downward direction based on one component.

[0051] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0052] Figure 1 is a diagram showing a circuit board according to a comparative example.

[0053] Referring to Figure 1 , the circuit board according to the comparative example includes a center layer 10, an upper layer 20, and a lower layer 30.

[0054] The center layer 10 refers to the layer located at the center of the laminated structure in the thickness direction of the circuit board. The center layer 10 refers to the core layer.

[0055] The upper layer 20 is located on the center layer 10. The upper layer 20 includes an upper insulating layer 21 located on the center layer 10. In addition, the upper layer 20 includes a first circuit pattern layer 22 located between the upper insulating layer 21 and the center layer 10 and a second circuit pattern layer 23 located on the upper insulating layer 21. In addition, the upper layer 20 includes an upper protective layer 24 located on the second circuit pattern layer 23.

[0056] The lower layer 30 is disposed below the center layer 10. The lower layer 30 includes a lower insulating layer 31 disposed below the center layer 10. In addition, the lower layer 30 includes a third circuit pattern layer 32 disposed between the lower insulating layer 31 and the center layer 10 and a fourth circuit pattern layer 33 disposed below the lower insulating layer 31. In addition, the lower layer 30 includes a lower protective layer 34 disposed below the fourth circuit pattern layer 33.

[0057] At this time, the upper layer 20 and the lower layer 30 have an asymmetric structure based on the center layer 10.

[0058] Here, the asymmetric structure means that at least one of the thicknesses or properties of the respective layers of the upper layer 20 is different from at least one of the thicknesses or properties of the respective layers of the lower layer 30.

[0059] Specifically, the properties of the upper insulating layer 21 and the lower insulating layer 31 may be different from each other. For example, at least one of the dielectric constant, thermal expansion coefficient, glass transition temperature, modulus, shrinkage rate, and dielectric loss of the upper insulating layer 21 may be different from the dielectric constant, thermal expansion coefficient, glass transition temperature, modulus, shrinkage rate, and dielectric loss of the lower insulating layer 31.

[0060] In addition, the thickness of the upper insulating layer 21 may be different from the thickness of the lower insulating layer 31.

[0061] In addition, the wiring density of the circuit pattern layers 22 and 23 of the upper layer 20 may be different from the wiring density of the circuit pattern layers 32 and 33 of the lower layer 30.

[0062] In addition, the thickness of the circuit pattern layers 22 and 23 of the upper layer 20 may be different from the thickness of the circuit pattern layers 32 and 33 of the lower layer 30.

[0063] Due to the asymmetric structure of the upper layer 20 and the lower layer 30, the circuit board of the comparative example has a problem of warping significantly in a specific direction.

[0064] For example, if the dielectric constant of the upper insulating layer 21 is less than the dielectric constant of the lower insulating layer 31, the circuit board of the comparative example may have a warping with both ends warping downward.

[0065] At this time, if the circuit board warps, the mechanical reliability and / or electrical reliability may be damaged during the manufacturing process of the circuit board.

[0066] For example, if the circuit board warps significantly in a specific direction, it may not be possible to process the circuit pattern or the via hole at the accurate position, and thus the mechanical reliability and / or electrical reliability may be reduced.

[0067] Meanwhile, the warping of the circuit board can be prevented by changing the material of each layer, changing the design of the circuit pattern layer of each layer, changing the thickness of the circuit pattern layer and the insulating layer, or changing from a three-layer structure to a single-layer structure or a multi-layer structure.

[0068] However, the design of the circuit board is determined based on materials, the dimensional specifications of each layer, the error range, etc. to meet the characteristics required by the product using the circuit board. Therefore, among various variables, the items that need to be changed to improve warping are relatively limited.

[0069] In addition, if the material of each layer is changed, the design of the circuit pattern layer of each layer is changed, the thickness of the circuit pattern layer and the insulating layer is changed, or the number of layers is changed, the characteristics required by the circuit board may not be met.

[0070] For example, if the circuit board is applied to an antenna board, the design of, for example, the material and size of each layer can be determined in consideration of the antenna characteristics. At this time, if the design is changed to prevent warping, the required antenna characteristics may not be met, and this may lead to a problem that the antenna operation cannot be performed normally.

[0071] - Electronic device -

[0072] Before describing the embodiments, the electronic device of the semiconductor package to which the embodiments are applied will be briefly described. The electronic device includes a main board (not shown). The main board can be physically and / or electrically connected to various components. For example, the main board can be connected to the semiconductor package of the embodiment. Various chips can be mounted on the semiconductor package. Generally, the semiconductor package can include various devices or chips. The devices or chips can include, for example, memory chips such as volatile memories (e.g., DRAM), non-volatile memories (e.g., ROM), flash memories, application processor chips such as central processors (e.g., CPU), graphics processors (e.g., GPU), digital signal processors, encryption processors, microprocessors, microcontrollers, and logic chips such as analog-to-digital converters and ASICs (application-specific ICs).

[0073] In addition, the devices or chips can include active devices and / or passive devices.

[0074] Active devices refer to devices that actively utilize the non-linear part of the signal characteristics. Passive devices refer to components that do not utilize the non-linear signal characteristics even if both linear and non-linear signal characteristics exist. For example, active devices can include transistors, IC semiconductor devices, and passive devices can include capacitors, resistors, and inductors. Passive devices can improve the signal processing speed of semiconductor chips as active devices, or perform a filtering function. In addition, the chip can be a wireless communication chip available for Wi-Fi or 5G communication.

[0075] On the other hand, the product group of the semiconductor package to which the present embodiment is applied can be any one of CSP (chip-scale package), FC-CSP (flip-chip chip-scale package), FC-BGA (flip-chip ball grid array), POP (package-on-package), and SIP (system-in-package), but is not limited thereto.

[0076] At this time, the electronic device can be a smart phone, a personal digital assistant, a digital video camera, a digital camera, a network system, a computer, a monitor, a tablet computer, a laptop computer, a netbook, a television, a video game console, a smart watch, an automobile, etc. However, the embodiments are not limited thereto, and obviously the electronic device can be any other electronic device that processes data.

[0077] - Circuit board -

[0078] Figure 2 is a cross-sectional view of a circuit board according to an embodiment.

[0079] Referring to Figure 2 , the circuit board 100 enables the attachment of at least one semiconductor device. In addition, the circuit board 100 of the embodiment can be attached to the main board of the electronic device. The main board can refer to the motherboard of the electronic device.

[0080] In addition, the number of semiconductor devices mounted on the circuit board 100 can be one, or alternatively, two or more.

[0081] The circuit board 100 may include an insulating layer 110.

[0082] The insulating layer 110 may have a multi-layer structure.

[0083] For example, the insulating layer 110 may include a first insulating layer 111 and a second insulating layer 112 disposed on the first insulating layer 110.

[0084] At this time, the circuit board 100 of the embodiment may be a core board. For example, the insulating layer 110 may include a third insulating layer 113 disposed between the first insulating layer 111 and the second insulating layer 112. The third insulating layer 113 may be a core layer.

[0085] Therefore, the circuit board 100 of the embodiment may have a structure in which the first insulating layer 111 and the second insulating layer 112 are laminated in the thickness direction on both sides of the third insulating layer 113.

[0086] Hereinafter, the circuit board 100 of the embodiment is described as a core board. Therefore, the second insulating layer 112 is a core layer. However, the embodiment is not limited thereto. For example, the circuit board 100 of the embodiment may be a coreless board that does not include a core layer.

[0087] The third insulating layer 113 may be a core layer, the first insulating layer 111 may be a lower insulating layer disposed under the third insulating layer 113, and the second insulating layer 112 may be an upper insulating layer disposed on the third insulating layer 113.

[0088] Each of the first insulating layer 111 and the second insulating layer 112 may have a different thickness from the third insulating layer 113. For example, the first insulating layer 111 and the second insulating layer 112 may have a smaller thickness than the third insulating layer 113.

[0089] The third insulating layer 113 may include prepreg. For example, the third insulating layer 113 may increase the physical strength of the circuit board to improve the warpage characteristics of the circuit board. The third insulating layer 113 may have a structure of impregnating a fiber layer in the form of a fabric sheet (e.g., a glass fabric woven with glass yarn) with an epoxy resin or the like. However, the third insulating layer 113 of the embodiment may include a fiber layer in the form of a fabric sheet woven with carbon fiber yarns.

[0090] Specifically, the third insulating layer 113 may include a resin and reinforcing fibers disposed in the resin. The resin may be an epoxy resin, but is not limited thereto. The resin is not limited to an epoxy resin, and for example, it may include more than one epoxy group in the molecule, or alternatively, it may include more than two epoxy groups, or alternatively, it may include more than four epoxy groups. Additionally, the resin constituting the insulating layer 110 may include a naphthyl group, and for example, it may be an aromatic amine type, but is not limited thereto. For example, the resin may include bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, phenol novolak type epoxy resin, alkylphenol novolak type epoxy resin, biphenyl type epoxy resin, aralkyl type epoxy resin, dicyclopentadiene type epoxy resin, naphthalene type epoxy resin, naphthol type epoxy resin, epoxy resin of a condensation product of phenol and aromatic aldehyde having a phenolic hydroxyl group, biphenyl aralkyl type epoxy resin, fluorene type epoxy resin, xanthene type epoxy resin, triglycidyl isocyanurate, rubber-modified epoxy resin, and phosphorus epoxy resin, and may include naphthalene type epoxy resin, bisphenol A type epoxy resin, phenol novolak epoxy resin, cresol novolak epoxy resin, rubber-modified epoxy resin, and phosphorus epoxy resin. Additionally, the reinforcing fibers may be glass fibers, carbon fibers, aromatic polyamide fibers (e.g., organic materials of the aromatic polyamide series), nylon, inorganic materials of the silica series, or inorganic materials of the titanium dioxide series. The reinforcing fibers may be arranged in a form intersecting each other in the in-plane direction within the resin.

[0091] Meanwhile, glass fibers, carbon fibers, aromatic polyamide fibers (e.g., organic materials of the aromatic polyamide series), nylon, inorganic materials of the silica series, or inorganic materials of the titanium dioxide series may be used.

[0092] The thickness of the third insulating layer 113 may be 1.5 times or more, 2 times or more, 3 times or more, or 5 times or more the thickness of each of the first insulating layer 111 and the second insulating layer 112.

[0093] For example, the thickness of the third insulating layer 113 may satisfy the range of 100 μm to 600 μm. For example, the thickness of the third insulating layer 113 may satisfy the range of 120 μm to 550 μm. For example, the thickness of the third insulating layer 113 may satisfy the range of 150 μm to 500 μm.

[0094] If the thickness of the third insulating layer 113 is less than 100 μm, the warpage characteristics of the circuit board may deteriorate. In addition, with the advancement of the performance of the semiconductor package, the number of insulating layers of the circuit board is also increasing. For example, the number of insulating layers of the circuit board can be more than 10, more than 12, more than 16, or more than 20. In addition, as the number of insulating layers of the circuit board increases, the warpage of the circuit board should be minimized. In addition, if the thickness of the third insulating layer 113 is less than 100 μm, it is difficult to prevent the circuit board from warping, so the quality of the circuit board may deteriorate. For example, if the circuit board warps, it may be difficult to form the vias included in the circuit board at precise positions. In addition, if the circuit board warps, problems such as misalignment of the position of the semiconductor device may occur during the process of mounting the semiconductor device on the circuit board.

[0095] Meanwhile, if the thickness of the third insulating layer 113 exceeds 600 μm, the total thickness of the circuit board increases, and thus, the total thickness of the semiconductor package may increase. That is, if the thickness of the third insulating layer 113 exceeds 600 μm, it may be difficult to make the circuit board and the semiconductor package thinner.

[0096] The thicknesses of the first insulating layer 111 and the second insulating layer 112 may be less than the thickness of the third insulating layer 113.

[0097] For example, the thickness of each of the first insulating layer 111 and the second insulating layer 112 may be in the range of 30 μm to 120 μm. Preferably, the thickness of each of the first insulating layer 111 and the second insulating layer 112 may be in the range of 35 μm to 115 μm. More preferably, the thickness of each of the first insulating layer 111 and the second insulating layer 112 may be in the range of 40 μm to 110 μm.

[0098] If the thickness of the first insulating layer 111 or the second insulating layer 112 is less than 30 μm, the circuit layers included in the circuit board 100 may not be stably protected. Additionally, if the thickness of the first insulating layer 111 or the second insulating layer 112 exceeds 120 μm, the thickness of the circuit board 100 may increase, and thus the thickness of the semiconductor package may increase. Additionally, if the thickness of the first insulating layer 111 or the second insulating layer 112 exceeds 120 μm, the thicknesses of the circuit layer and the vias may increase correspondingly. Additionally, when the thicknesses of the circuit layer and the vias increase, miniaturization may be difficult to achieve, such that the circuit integration degree may decrease and the signal transmission distance may increase, which may increase signal transmission loss. Additionally, if the thickness of the first insulating layer 111 or the second insulating layer 112 exceeds 120 μm, the first insulating layer 111 or the second insulating layer 112 of the circuit board may not satisfy the required properties. The required properties may include at least one of the dielectric constant, dielectric loss, coefficient of thermal expansion, and glass transition temperature required for the first insulating layer 111 or the second insulating layer 112.

[0099] The first insulating layer 111 and the second insulating layer 112 may have different thicknesses. They may have the same thickness.

[0100] For example, the thickness of the first insulating layer 111 may be greater than the thickness of the second insulating layer 112. For example, the thickness of the first insulating layer 111 may satisfy the range of 105% to 150% of the thickness of the second insulating layer 112. For example, the thickness of the first insulating layer 111 may satisfy the range of 106% to 140% of the thickness of the second insulating layer 112. For example, the thickness of the first insulating layer 111 may satisfy the range of 108% to 135% of the thickness of the second insulating layer 112.

[0101] Preferably, the first insulating layer 111 may include an insulating material different from that of the second insulating layer 112. More preferably, the first insulating layer 111 may have a different number of layers from that of the second insulating layer 112.

[0102] For example, the first insulating layer 111 may have a multi-layer structure with different properties. The first insulating layer 111 may include a first layer 111-1 having a first property and a second layer 111-2 disposed on the first layer 111-1 and having a second property different from the first property.

[0103] That is, the circuit board of the embodiment may have an asymmetric structure in which an upper layer and a lower layer are respectively disposed on the upper and lower portions of the third insulating layer 113. Here, having an asymmetric structure may mean that the properties of the first layer 111-1 of the first insulating layer 111 and the properties of the second insulating layer 112 are different from each other. In addition, having an asymmetric structure may mean that the wiring density of the circuit layer disposed in the lower portion of the first insulating layer 111 is different from the wiring density of the circuit layer disposed in the upper portion of the second insulating layer 112. In addition, having an asymmetric structure may mean that the thickness that the first insulating layer 111 should have and the thickness that the second insulating layer 112 should have are different from each other.

[0104] The first layer 111-1 and the second layer 111-2 of the first insulating layer 111 may have the same through holes. Preferably, one through hole may commonly penetrate the first layer 111-1 and the second layer 111-2 of the first insulating layer 111.

[0105] At this time, the first insulating layer of the circuit board of the comparative example includes only the first layer. At this time, when the first insulating layer of the circuit board of the comparative example includes only the first layer, due to the asymmetric structure of the upper layer and the lower layer, the circuit board may be severely warped in a specific direction.

[0106] For example, when the first insulating layer includes only the first layer and the dielectric constant of the first insulating layer of the first layer is higher than the dielectric constant of the second insulating layer, both ends of the circuit board may be warped downward. On the contrary, when the first insulating layer includes only the first layer and the dielectric constant of the first insulating layer of the first layer is lower than the dielectric constant of the second insulating layer, both ends of the circuit board may be warped upward.

[0107] In addition, when the first insulating layer includes only the first layer and the thickness of the first insulating layer of the first layer is greater than the thickness of the second insulating layer, both ends of the circuit board may be warped downward. On the contrary, when the first insulating layer includes only the first layer and the thickness of the first insulating layer of the first layer is less than the thickness of the second insulating layer, both ends of the circuit board may be warped upward.

[0108] In addition, when the first insulating layer includes only the first layer and the wiring density of the circuit layer disposed below the first insulating layer of the first layer is less than the wiring density of the circuit layer disposed on the second insulating layer, both ends of the circuit board may be warped downward. On the contrary, when the first insulating layer includes only the first layer and the wiring density of the circuit layer disposed below the first insulating layer of the first layer is greater than the wiring density of the circuit layer disposed on the second insulating layer, both ends of the circuit board may be warped upward.

[0109] Therefore, based on the warping direction of the circuit board, an embodiment provides a buffer layer capable of reducing the warping of the circuit board in one of the first insulating layer 111 and the second insulating layer 112.

[0110] For example, both ends of the circuit board can warp downward, and in this case, the first insulating layer 111 can include a first layer 111-1 and a second layer 111-2. At this time, the second layer 111-2 of the first insulating layer 111 can be disposed between the first layer 111-1 and the third insulating layer 113. The second layer 111-2 of the first insulating layer 111 can have properties different from those of the first layer 111-1 and the second insulating layer 112 of the first insulating layer 111. Based on this, the second layer 111-2 of the first insulating layer 111 can alleviate the downward warping of both ends of the circuit board, thereby minimizing the warping degree of the circuit board.

[0111] At the same time, both ends of the circuit board can warp upward. In this case, the first insulating layer 111 can be provided as a single insulating layer with specific properties, and the second insulating layer 112 can be provided as a double-layer insulating layer with different properties. For example, when both ends of the circuit board warp upward, the second insulating layer 112 can include a first layer and a second layer having different properties corresponding to the Figure 2 first insulating layer 111, and the first insulating layer 111 can have a single-layer structure with one property.

[0112] Hereinafter, it is described that both ends of the circuit board warp downward, and a buffer layer for alleviating the warping of the circuit board is provided in the first insulating layer 111.

[0113] The first insulating layer 111 can include a first layer 111-1 having a first property and a second layer 111-2 having a second property different from the first property.

[0114] The first layer 111-1 of the first insulating layer 111 can correspond to the properties that the first insulating layer 111 should have. For example, the first insulating layer 111 can have properties corresponding to the properties required in the semiconductor package and / or electronic product to which the circuit board is applied. At this time, the properties can include dielectric constant, dielectric loss, modulus, coefficient of thermal expansion, and glass transition temperature. In addition, the first layer 111-1 of the first insulating layer 111 can have a dielectric constant, dielectric loss, modulus, coefficient of thermal expansion, and glass transition temperature corresponding to the properties that the first insulating layer 111 should have.

[0115] The second layer 111-2 of the first insulating layer 111 can have properties different from those of the first layer 111-1. Preferably, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 can be different from the modulus (Y's Modulus) of the first layer 111-1 of the first insulating layer 111. In addition, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 can be different from the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111.

[0116] Preferably, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 may be less than the modulus (Y's Modulus) of the first layer 111-1 of the first insulating layer 111.

[0117] In addition, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 may be less than the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111.

[0118] In addition, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 may be less than the modulus (Y's Modulus) of the second insulating layer 112. Further, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 may be lower than the glass transition temperature (Tg) of the second insulating layer 112.

[0119] Thus, the second layer 111-2 of the first insulating layer 111 can be used as a buffer layer to mitigate the warping of the two ends of the circuit board in the downward direction due to the asymmetric structure of the upper and lower layers. Therefore, the embodiment can minimize the degree of warping of the circuit board, thereby improving the electrical reliability and / or physical reliability of the circuit board.

[0120] At this time, each of the first layer 111-1 and the second layer 111-2 of the first insulating layer 111 may be provided with a prepreg including resin, glass fiber, and filler.

[0121] The embodiment can make at least one of the materials (resin, glass fiber, filler) provided in the second layer 111-2 of the first insulating layer 111 have a different type and / or content from at least one of the materials provided in the first layer 111-1, so that the second layer 111-2 of the first insulating layer 111 has a modulus (Y's Modulus) and a glass transition temperature (Tg) smaller than those of the first layer 111-1 of the first insulating layer 111.

[0122] For example, the resin provided in the second layer 111-2 of the first insulating layer 111 may be different from the resin provided in the first layer 111-1 of the first insulating layer 111. At this time, the modulus (Y's Modulus) and / or the glass transition temperature (Tg) of the resin provided in the second layer 111-2 may be different from the modulus (Y's Modulus) and / or the glass transition temperature (Tg) of the resin provided in the first layer 111-1.

[0123] For example, the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111 can have a range of 220°C to 300°C. For example, the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111 can have a range of 225°C to 295°C. For example, the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111 can have a range of 230°C to 280°C. If the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 211 is outside the range of 220°C to 300°C, the required characteristics of the first insulating layer 211 may not be satisfied.

[0124] Meanwhile, the glass transition temperature (Tg) of the second insulating layer 112 can correspond to the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 211. For example, the glass transition temperature (Tg) of the second insulating layer 112 can have a range of 220°C to 300°C or 225°C to 295°C or 230°C to 290°C. Preferably, the glass transition temperature (Tg) of the second insulating layer 112 can be greater than the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 211 within this range.

[0125] Meanwhile, the glass transition temperature (Tg) of the second layer 113 of the first insulating layer 111 can be lower than the glass transition temperature of the first layer 111-1 of the first insulating layer 111 and the glass transition temperature of the second insulating layer 112.

[0126] For example, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 can have a range of 160°C to 210°C. For example, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 can have a range of 165°C to 205°C. For example, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 can have a range of 170°C to 200°C.

[0127] For example, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 can satisfy the range of 60% to 95% of the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111. For example, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 can satisfy the range of 62% to 92% of the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111. For example, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 can satisfy the range of 65% to 90% of the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111.

[0128] If the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 is outside the range of 160°C to 210°C or outside the range of 60% to 95% of the glass transition temperature (Tg) of the first layer 111-1, the stress relaxation effect and stress reduction effect of the second layer 111-2 of the first insulating layer 111 may be insufficient, or the first insulating layer 111 may not meet the required characteristics.

[0129] Specifically, the second layer 111-2 of the first insulating layer 111 can relieve or reduce the stress generated in the manufacturing process of the circuit board.

[0130] For example, the second layer 111-2 of the first insulating layer 111 has a lower modulus (Y′s Modulus) and glass transition temperature (Tg) than the first layer 111-1 and the second insulating layer 112 of the first insulating layer 111, and the second layer 111-2 can be disposed in the first lamination region that is the point where stress starts in the circuit board. Thus, the embodiment can reduce the stress formed at the start of lamination, and thus can have the function of relieving the additional stress generated in the continuous lamination process.

[0131] In addition, the second layer 111-2 of the first insulating layer 111 can improve the fluidity of the resin in the first insulating layer 111 in the high-temperature lamination region due to its characteristics of having a relatively low glass transition temperature and modulus. Thus, the embodiment can delay the stress initiation time in the region where the temperature decreases by using the second layer 111-2 of the first insulating layer 111, thereby reducing the stress acting on the circuit board at room temperature.

[0132] Meanwhile, the modulus (Y's Modulus) of each of the first layer 111-1 and the second insulating layer 112 of the first insulating layer 111 can have a range of 18.5 GPa to 25 GPa. For example, the modulus (Y's Modulus) of each of the first layer 111-1 and the second insulating layer 112 of the first insulating layer 111 can have a range of 19 GPa to 23 GPa. For example, the modulus (Y's Modulus) of each of the first layer 111-1 and the second insulating layer 112 of the first insulating layer 111 can have a range of 19.5 GPa to 22 GPa.

[0133] If the modulus (Y's Modulus) of each of the first layer 111-1 and the second insulating layer 112 of the first insulating layer 211 is outside the range of 18.5 GPa to 25 GPa, the required characteristics of each of the first insulating layer 211 and the second insulating layer 112 may not be met.

[0134] The modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 can satisfy the range of 13 GPa to 18 GPa. For example, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 can satisfy the range of 13.5 GPa to 18 GPa. For example, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 can satisfy the range of 15 GPa to 18 GPa.

[0135] For example, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 can satisfy the range of 50% to 95% of the modulus (Y's Modulus) of the first layer 111-1 of the first insulating layer 111. For example, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 can satisfy the range of 52% to 92% of the modulus (Y's Modulus) of the first layer 111-1 of the first insulating layer 111. For example, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 can satisfy the range of 55% to 90% of the modulus (Y's Modulus) of the first layer 111-1 of the first insulating layer 111.

[0136] If the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 is outside the range of 13 GPa to 18 GPa or outside the range of 50% to 95% of the modulus (Y's Modulus) of the first layer 111-1, the effect of preventing warping of the second layer 111-2 of the first insulating layer 111 may be insufficient, or the second layer 111-2 may warp in the opposite direction.

[0137] At the same time, the dielectric constant of the first layer 111-1 of the first insulating layer 111 and the dielectric constant of the second layer 111-2 of the first insulating layer 111 can correspond to each other. For example, the dielectric constant of the first layer 111-1 of the first insulating layer 111 can satisfy the range of 93% to 107% of the dielectric constant of the second layer 111-2 of the first insulating layer 111. For example, the dielectric constant of the first layer 111-1 of the first insulating layer 111 can satisfy the range of 94% to 106% of the dielectric constant of the second layer 111-2 of the first insulating layer 111. For example, the dielectric constant of the first layer 111-1 of the first insulating layer 111 can satisfy the range of 95% to 105% of the dielectric constant of the second layer 111-2 of the first insulating layer 111.

[0138] If the relationship between the dielectric constants of the first layer 111-1 and the second layer 111-2 of the first insulating layer 111 is outside this range, the first insulating layer 111 including the first layer 111-1 and the second layer 111-2 may not satisfy the required characteristics. For example, the circuit board of the embodiment can be used as an antenna board. Therefore, an antenna pattern can be provided under the first insulating layer 111. At this time, if the relationship between the dielectric constants of the first layer 111-1 and the second layer 111-2 of the first insulating layer 111 is outside this range, the antenna pattern may not satisfy the target antenna frequency characteristics, and thus the antenna communication characteristics may deteriorate.

[0139] In addition, the coefficient of thermal expansion of the first layer 111-1 of the first insulating layer 111 can correspond to the coefficient of thermal expansion of the second layer 111-2. For example, the coefficient of thermal expansion of the second layer 111-2 can satisfy the range of 93% to 107%, 94% to 106%, or 95% to 105% of the coefficient of thermal expansion of the first layer 111-1.

[0140] Thereby, it is possible to minimize the warping problem or the adhesion problem that may occur in the process of manufacturing the circuit board due to the first insulating layer 111 being composed of a plurality of layers including the first layer 111-1 and the second layer 111-2. For example, if the difference in the coefficient of thermal expansion between the first layer 111-1 and the second layer 111-2 is large, the degree of warping may increase during the curing process of the first layer 111-1 and the second layer 111-2. Therefore, the adhesion between the first layer 111-1 and the second layer 111-2 may decrease.

[0141] Therefore, the embodiment can make the first insulating layer 111 composed of the first layer 111-1 and the second layer 111-2 having different moduli (Y’s Modulus) and glass transition temperatures (Tg), and the dielectric constant and the coefficient of thermal expansion of each of the first layer 111-1 and the second layer 111-2 correspond to each other. Thereby, the embodiment can prevent the circuit board from warping significantly in a specific direction while satisfying the required characteristics of the first insulating layer 111. Thereby, the embodiment can improve the physical reliability and / or electrical reliability of the circuit board, and can enable the semiconductor device mounted on the semiconductor package including the circuit board to operate stably. Thereby, the embodiment can improve the operating characteristics of the electronic product and / or server to which the semiconductor package is applied, and further improve the operating reliability. The position of the buffer layer (for example, the second layer of the first insulating layer) of the embodiment and the thickness of the buffer layer according to the position will be described in more detail below.

[0142] The circuit board 100 of the embodiment includes a circuit layer provided on the insulating layer 110.

[0143] For example, the circuit board 100 may include a first circuit layer 120 disposed on the lower surface of the first insulating layer 111. For example, the circuit board 100 of the embodiment may include a second circuit layer 130 disposed on the upper surface of the second insulating layer 112. Additionally, the circuit board 100 of the embodiment may include a third circuit layer 140 disposed between the first insulating layer 111 and the third insulating layer 113. Additionally, the circuit board 100 of the embodiment may include a fourth circuit layer 150 disposed between the second insulating layer 112 and the third insulating layer 113.

[0144] The first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 may be formed using conventional printed circuit board manufacturing processes, such as an additive process, a subtractive process, a modified semi-additive process (MSAP), and a semi-additive process (SAP), the detailed description of which is omitted here.

[0145] The first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 may be formed using at least one metal material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn). Additionally, the first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 may be formed of a paste or solder paste containing at least one metal material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn) having excellent bonding strength. Preferably, the first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 may be formed of relatively inexpensive copper (Cu).

[0146] The thickness of the first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 may be in the range of 5 μm to 30 μm. For example, the thickness of the first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 may be in the range of 6 μm to 27 μm. The thickness of the first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 may be in the range of 7 μm to 23 μm. If the thickness of the first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 is less than 5 μm, the resistance may increase. If the thickness of the first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 exceeds 30 μm, it may be difficult to miniaturize the circuit, and thus the circuit integration may decrease.

[0147] Meanwhile, the first circuit layer 120 and the second circuit layer 130 may have different wiring densities. Here, the wiring density may refer to the volume of each of the first circuit layer 120 and the second circuit layer 130. For example, the wiring density may refer to the surface area of each of the first circuit layer 120 and the second circuit layer 130. For example, the wiring density of the first circuit layer 120 may refer to the ratio of the surface area of the lower surface of the first circuit layer 120 to the surface area of the lower surface of the first insulating layer 111. For example, the wiring density of the second circuit layer 130 may refer to the ratio of the surface area of the lower surface of the second circuit layer 130 to the surface area of the upper surface of the second insulating layer 112.

[0148] At this time, the wiring density of the first circuit layer 120 may be less than the wiring density of the second circuit layer 130. In this case, due to the difference between the wiring density of the first circuit layer 120 and the wiring density of the second circuit layer 130, the circuit board may warp significantly in a specific direction. For example, if the wiring density of the first circuit layer 120 is less than the wiring density of the second circuit layer 130, assuming that the thickness and properties of the first insulating layer and the second insulating layer are the same, both ends of the circuit board may warp downward. Therefore, assuming that the thickness and properties of the first insulating layer and the second insulating layer are the same, if the wiring density of the first circuit layer 120 is less than the wiring density of the second circuit layer 130, the first insulating layer 111 adjacent to the first circuit layer 120 may be provided with a first layer 111-1 and a second layer 111-2 having different properties.

[0149] In addition, assuming that the thickness and properties of the first insulating layer and the second insulating layer are the same, if the wiring density of the first circuit layer 120 is greater than the wiring density of the second circuit layer 130, the first insulating layer may be provided with a first layer having specific properties, and the second insulating layer may be provided with a first layer and a second layer having different properties.

[0150] However, the wiring density of the first circuit layer 120 and the wiring density of the second circuit layer 130 may be different from each other. In addition, the thickness and properties of the first insulating layer 111 may be different from the thickness and properties of the second insulating layer 112. In this case, the embodiment may predict the warping direction of the circuit board due to the differences in wiring density, thickness, and properties, and may set one of the first insulating layer 111 and the second insulating layer 112 to a first layer and a second layer having different characteristics based on the predicted direction.

[0151] The circuit board of the embodiment may include a through electrode.

[0152] Specifically, the through electrode can penetrate the insulating layer 110. Preferably, the through electrode includes a first through electrode 160 that penetrates the first insulating layer 111. Additionally, the through electrode includes a second through electrode 170 that penetrates the second insulating layer 112. Additionally, the through electrode can include a third through electrode 180 that penetrates the third insulating layer 113.

[0153] The first through electrode 160, the second through electrode 170, and the third through electrode 180 can be disposed in through holes that penetrate respective insulating layers. For example, the first through electrode 160, the second through electrode 170, and the third through electrode 180 can be formed by filling the through holes with a conductive material.

[0154] The through holes can be formed by any one of a machining method, a laser processing method, and a chemical processing method. The through holes can be formed by a machining method such as milling, drilling, and wiring. Additionally, the through holes can use a UV or CO2 laser method. Additionally, the first through hole can use a chemical processing method using a chemical reagent including aminosilane, ketone, etc.

[0155] When forming the through holes, the through holes can be filled with any one of metal materials selected from copper (Cu), silver (Ag), tin (Sn), gold (Au), nickel (Ni), and palladium (Pd) to form the first through electrode 160, the second through electrode 170, and the third through electrode 180. At this time, the filling of the conductive material can use any one or a combination of electroless plating, electroplating, screen printing, sputtering, evaporation, inkjet, and dispensing.

[0156] Meanwhile, the first through electrode 160 can include a first portion disposed in the first layer 111-1 of the first insulating layer 111 and a second portion disposed in the second layer 111-2 of the first insulating layer 111. The first portion and the second portion of the first through electrode 160 can be directly connected to each other without arranging other configurations such as pads therebetween. For example, the through hole can commonly penetrate the first layer 111-1 and the second layer 111-2 of the first insulating layer 111, so the first portion and the second portion of the first through electrode 160 can be disposed in a commonly penetrated through hole.

[0157] The circuit board 100 of the embodiment includes a protective layer.

[0158] Specifically, a first protective layer 190 can be disposed on the lower surface of the first insulating layer 111. The first protective layer 190 can include at least one opening. Specifically, the first protective layer 190 can include at least one opening that vertically overlaps the first circuit layer 120.

[0159] In addition, the circuit board may include a second protective layer 195 disposed on the upper surface of the second insulating layer 112. The second protective layer 195 may include at least one opening. Specifically, the second protective layer 190 may include at least one opening that vertically overlaps the second circuit layer 130.

[0160] The first protective layer 190 and the second protective layer 195 may contain an insulating material. The first protective layer 190 and the second protective layer 195 may contain various materials that can be coated and then cured by heating to protect the surfaces of the insulating layer and the circuit layer.

[0161] The first protective layer 190 and the second protective layer 195 may be solder mask layers containing organic polymer materials. For example, the first protective layer 190 and the second protective layer 195 may contain epoxy acrylate series resins. Specifically, the first protective layer 190 and the second protective layer 195 may contain resins, curing agents, photoinitiators, pigments, solvents, fillers, additives, acrylic monomers, etc. However, the embodiments are not limited thereto, and the first protective layer 190 and the second protective layer 195 may be any one of a photoresist layer, a cover layer, and a polymer material.

[0162] The thickness of the first protective layer 190 and the second protective layer 195 may be 1 μm to 20 μm. The thickness of the first protective layer 190 and the second protective layer 195 may be 1 μm to 15 μm. For example, the thickness of the first protective layer 190 and the second protective layer 195 may be 5 μm to 20 μm. If the thickness of the first protective layer 190 and the second protective layer 195 exceeds 20 μm, the total thickness of the circuit board and the semiconductor package may increase. At the same time, in the drawings, the circuit board is shown as including the first protective layer 190 and the second protective layer 195, but is not limited thereto. For example, at least one of the first protective layer 190 and the second protective layer 195 may be omitted.

[0163] Hereinafter, the warping direction of the circuit board according to the insulating layer and the circuit layer according to the embodiment and the position of the buffer layer according to the warping direction will be described.

[0164] Figures 3 to 6 is a diagram for explaining the warping direction of the circuit board according to the conditions of the insulating layer and the circuit layer according to the embodiment.

[0165] Referring to Figure 3 in (a), the circuit board may include a first insulating layer 111A and a second insulating layer 112A. In addition, the circuit board may include a first circuit layer 120A disposed under the first insulating layer 111A and a second circuit layer 130A disposed on the second insulating layer 112A.

[0166] At this time, the properties of the first insulating layer 111A (111A_pom, e.g., dielectric constant, coefficient of thermal expansion, glass transition temperature, modulus, shrinkage rate, dielectric loss) can be the same as those of the second insulating layer 112A (112A_pom, e.g., dielectric constant, coefficient of thermal expansion, glass transition temperature, modulus, shrinkage rate, dielectric loss). For example, the first insulating layer 111A and the second insulating layer 112A can contain the same material.

[0167] In addition, the thickness (Ta) of the first insulating layer 111A can be the same as the thickness (Tb) of the second insulating layer 112A.

[0168] In addition, the wiring density of the first circuit layer 120A can be the same as the wiring density of the second circuit layer 130A.

[0169] Referring to Figure 3 of (b), the warpage profile of the circuit board under the conditions corresponding to (a) of Figure 3 can be a straight line corresponding to the condition where no warpage occurs.

[0170] Referring to Figure 4 of (a), the circuit board can include a first insulating layer 111B and a second insulating layer 112B. In addition, the circuit board can include a first circuit layer 120B disposed under the first insulating layer 111B and a second circuit layer 130B disposed on the second insulating layer 112B.

[0171] At this time, the properties of the first insulating layer 111B (111B_pom) can be the same as those of the second insulating layer 112B (112B_pom). For example, the first insulating layer 111B and the second insulating layer 112B can contain the same material.

[0172] In addition, the thickness (Ta’) of the first insulating layer 111B can be different from the thickness (Tb) of the second insulating layer 112B.

[0173] In addition, the wiring density of the first circuit layer 120B can be the same as the wiring density of the second circuit layer 130B.

[0174] Referring to Figure 4 of (b), the warpage profile of the circuit board under the conditions corresponding to (a) of Figure 4 can be a curve where both ends of the circuit board warp in a specific direction.

[0175] For example, when the thickness (Ta’) of the first insulating layer 111B is greater than the thickness (Tb) of the second insulating layer 112B, the warpage profile of the circuit board can be a first curve WP1 in which both ends of the circuit board are warped in the downward direction. For example, when the thickness (Ta’) of the first insulating layer 111B is less than the thickness (Tb) of the second insulating layer 112B, the warpage profile of the circuit board can be a second curve WP2 in which both ends of the circuit board are warped in the upward direction.

[0176] Referring to Figure 5 (a) of, the circuit board may include a first insulating layer 111C and a second insulating layer 112C. In addition, the circuit board may include a first circuit layer 120C disposed under the first insulating layer 111C and a second circuit layer 130C disposed on the second insulating layer 112C.

[0177] At this time, the property (111C_pom) of the first insulating layer 111C may be different from the property (112C_pom) of the second insulating layer 112C. For example, the dielectric constant of the first insulating layer 111C may be different from the dielectric constant of the second insulating layer 112C.

[0178] In addition, the thickness (Ta) of the first insulating layer 111C may be the same as the thickness (Tb) of the second insulating layer 112C.

[0179] In addition, the wiring density of the first circuit layer 120C may be the same as the wiring density of the second circuit layer 130C.

[0180] Referring to Figure 5 (b) of, the warpage profile of the circuit board under the conditions corresponding to Figure 5 (a) of may be a curve in which both ends of the circuit board are warped in a specific direction.

[0181] For example, when the dielectric constant of the first insulating layer 111C is greater than the dielectric constant of the second insulating layer 112B, the warpage profile of the circuit board can be a first curve WP1 in which both ends of the circuit board are warped in the downward direction. For example, when the dielectric constant of the first insulating layer 111C is less than the dielectric constant of the second insulating layer 112C, the warpage profile of the circuit board can be a second curve WP2 in which both ends of the circuit board are warped in the upward direction.

[0182] Referring to Figure 6 (a) of, the circuit board may include a first insulating layer 111D and a second insulating layer 112D. In addition, the circuit board may include a first circuit layer 120D disposed under the first insulating layer 111D and a second circuit layer 130D disposed on the second insulating layer 112D.

[0183] At this time, the property 111D_pom of the first insulating layer 111D may be the same as the property 112D_pom of the second insulating layer 112D.

[0184] In addition, the thickness (Ta) of the first insulating layer 111D may be the same as the thickness (Tb) of the second insulating layer 112D.

[0185] In addition, the wiring density of the first circuit layer 120D may be different from the wiring density of the second circuit layer 130D.

[0186] Refer to Figure 6 of (b), the warpage profile of the circuit board under the conditions corresponding to Figure 6 of (a) may be a curve in which both ends of the circuit board warp in a specific direction.

[0187] For example, when the wiring density of the first circuit layer 120D is less than the wiring density of the second circuit layer 130D, the warpage profile of the circuit board may be a first curve WP1 in which both ends of the circuit board warp downward. For example, when the wiring density of the first circuit layer 120D is greater than the wiring density of the second circuit layer 130D, the warpage profile of the circuit board may be a second curve WP2 in which both ends of the circuit board warp upward.

[0188] An embodiment may arrange a buffer layer in one of the first insulating layer and the second insulating layer according to the above warpage profile conditions, thereby preventing warpage of the circuit board.

[0189] Figure 7 is a diagram for explaining the position of the buffer layer according to an embodiment.

[0190] Refer to Figure 7 , the circuit board of the embodiment may have any one of the following differences: a thickness difference between the first insulating layer 111 and the second insulating layer 112, a property difference between the first insulating layer 111 and the second insulating layer 112, and a wiring density difference between the first circuit layer 120 and the second circuit layer 130. Accordingly, the warpage profile of the circuit board may be a first curve WP1 in which both ends of the circuit board warp downward.

[0191] In this case, the embodiment arranges a buffer layer in the first insulating layer 111. For example, in the case of the warpage profile such as the first curve WP1, the embodiment configures the first insulating layer 111 using the first layer 111-1 and the second layer 111-2 having different properties. The second layer 111-2 of the first insulating layer 111 may have Figure 2 the properties described in. Accordingly, the second layer 111-2 of the first insulating layer 111 may prevent both ends of the circuit board from warping downward. Therefore, by including the second layer 111-2 in the first insulating layer 111, the embodiment may make the warpage profile of the circuit board approach a straight line (WPla) from the first curve WP1.

[0192] At this time, the first layer 111-1 and the second layer 111-2 of the first insulating layer 111 may have corresponding thicknesses. For example, the thickness T1 of the first insulating layer 111 may be determined by the required characteristics that the first insulating layer 111 must have. In addition, the thickness (T1-1) of the first layer 111-1 and the thickness (T1-2) of the second layer 111-2 of the first insulating layer 111 may correspond to each other. For example, the thickness (T1-1) of the first layer 111-1 of the first insulating layer 111 may be in the range of 90% to 110%, 92% to 108%, or 95% to 105% of the thickness (T1-2) of the second layer 111-2. Thereby, the embodiment can prevent the circuit board from warping while satisfying the required characteristics in the first insulating layer 111.

[0193] At this time, the first insulating layer 111 and the second insulating layer 112 may represent layers disposed between circuit patterns on different layers disposed adjacent to each other. For example, circuit patterns may be disposed on each of the upper surface and the lower surface of the first insulating layer 111, and no circuit pattern may be disposed between the upper surface and the lower surface of the first insulating layer 111. In addition, circuit patterns may be disposed on each of the upper surface and the lower surface of the second insulating layer 112, and no circuit pattern may be disposed between the upper surface and the lower surface of the second insulating layer.

[0194] Alternatively, the first insulating layer 111 or the second insulating layer 112 may represent a region having a plurality of first through electrodes 160 or second through electrodes 170 in the horizontal direction, and may represent a region having one first through electrode 160 or second through electrode 170 in the vertical direction.

[0195] The embodiment can prevent the circuit board from significantly warping in a specific direction, thereby improving the electrical reliability and / or physical reliability of the circuit board.

[0196] Specifically, the circuit board may include a lower layer including a first insulating layer and a first circuit layer and an upper layer including a second insulating layer and a second circuit layer. At this time, the required characteristics of each of the upper layer and the lower layer may be different from each other. Therefore, the upper layer and the lower layer may have any one of a property difference of the insulating layer, a thickness difference of the insulating layer, and a wiring density difference of the circuit layer. Thereby, according to the warping direction of the circuit board based on the property difference, the thickness difference, and the wiring density difference, the embodiment includes a buffer layer in any one of the first insulating layer and the second insulating layer. For example, when both ends of the circuit board warp downward, a buffer layer may be provided in the first insulating layer. For example, when both ends of the circuit board warp upward, a buffer layer may be provided in the second insulating layer.

[0197] Therefore, an embodiment can provide a buffer layer in one of the first insulating layer and the second insulating layer, thereby reducing the warping of the circuit board in a specific direction. For example, the first insulating layer may include a first layer and a second layer corresponding to the buffer layer provided on the first layer. The second layer of the first insulating layer has a lower modulus (Y's Modulus) and glass transition temperature (Tg) than the first layer of the first insulating layer and the second insulating layer, and the second layer of the first insulating layer may be provided in the first lamination region which is the point where stress starts in the process of manufacturing the circuit board. Thus, the embodiment can reduce the stress formed at the start of lamination, and thus can have the effect of reducing the additional stress generated in the continuous lamination process.

[0198] In addition, due to the characteristics of the second layer of the first insulating layer having a relatively low glass transition temperature and modulus, the fluidity of the resin in the first insulating layer in the high-temperature lamination region can be improved. Thus, the embodiment can delay the stress initiation time in the region where the temperature decreases by using the second layer of the first insulating layer, thereby reducing the stress acting on the circuit board at room temperature.

[0199] Therefore, an embodiment can provide the first insulating layer with a first layer and a second layer having different moduli (Y's Modulus) and glass transition temperatures (Tg), while making the dielectric constants and thermal expansion coefficients of each of the first layer and the second layer correspond to each other. Thus, the embodiment can prevent the circuit board from significantly warping in a specific direction while meeting the required characteristics of the first insulating layer. Thereby, the embodiment can improve the physical reliability and / or electrical reliability of the circuit board and enable the semiconductor device mounted in the semiconductor package including the circuit board to operate stably. Therefore, the embodiment can improve the operating characteristics of the electronic product and / or server applying the semiconductor package, and further improve the operating reliability.

[0200] In summary, the circuit board of the embodiment can make the lower layer located below and the upper layer located above with respect to the center of the circuit board include buffer layers having relatively low moduli (Y's Modulus) and glass transition temperatures (Tg). The buffer layer can control the warping characteristics caused by the asymmetry of the properties and structures between the upper layer and the lower layer. Thus, the embodiment can improve the internal stress of the circuit board in the manufacturing process of the circuit board, and improve the reliability due to the thermal deformation caused by the internal stress.

[0201] Figure 8 is a cross-sectional view showing a circuit board according to a second embodiment.

[0202] In Figure 2 the circuit board, each of the upper layer and the lower layer has a single-layer structure based on the third insulating layer 113 provided at the center.

[0203] On the contrary, asFigure 8 As shown, the upper layer and the lower layer may have a multilayer structure corresponding to each other based on the third insulating layer at the center. In this case, a buffer layer may be provided for each of the plurality of layers according to the warping direction of the circuit board.

[0204] For example, the circuit board 200 may include a first insulating layer 211, a second insulating layer 212, and a third insulating layer 213. Additionally, a first circuit layer 220 may be disposed below the first insulating layer 211. Additionally, a second circuit layer 230 may be disposed on the second insulating layer 212. Additionally, a third circuit layer 240 may be disposed below the third insulating layer 213, and a fourth circuit layer 240 may be disposed on the third insulating layer 113.

[0205] At this time, due to any one of the property difference between the first insulating layer 211 and the second insulating layer 212, the thickness difference between the first insulating layer 211 and the second insulating layer 212, and the wiring density difference between the first circuit layer 220 and the second circuit layer 230, the two ends of the circuit board 200 may be bent downward. For example, in the manufacturing process of the circuit board 200, the warping profile of the circuit board before forming the fourth insulating layer 214, the fifth insulating layer 215, the fifth circuit layer 225, and the sixth circuit layer 235 may correspond to the first curve WP1. Therefore, the embodiment may cause the first insulating layer 211 to include a first layer 211-1 and a second layer 211-2 having different properties. Thereby, the embodiment may minimize the warping that occurs in the process of forming the first insulating layer 211, the second insulating layer 212, the first circuit layer 220, and the second circuit layer 230 on both sides of the third insulating layer 213.

[0206] The fourth insulating layer 214 may be disposed below the first insulating layer 211. The fifth insulating layer 215 may be disposed on the second insulating layer 212. The fifth circuit layer 225 may be disposed below the fourth insulating layer 214. The sixth circuit layer 235 may be disposed on the fifth insulating layer 215.

[0207] At this time, in the manufacturing process of the circuit board 200, the buffer layer provided in the first insulating layer minimizes the warping before forming the fourth insulating layer 214, the fifth circuit layer 225, the fifth insulating layer 215, and the sixth circuit layer 235 above and below the first insulating layer 211 and the second insulating layer 212.

[0208] However, due to any one of the property difference between the fourth insulating layer 214 and the fifth insulating layer 215, the thickness difference between the fourth insulating layer 214 and the fifth insulating layer 215, and the wiring density difference between the fifth circuit layer 225 and the sixth circuit layer 235, the circuit board 200 may warp upward at both ends.

[0209] In this case, the embodiments may include a first layer 215-1 and a second layer 215-2 having different properties according to the bending profile of the circuit board in the fifth insulating layer 215.

[0210] For example, when the circuit board has a warpage profile corresponding to the second curve WP2, the first layer 215-1 of the fifth insulating layer 215 corresponding to the buffer layer may be provided, and the warpage of the circuit board may be prevented by using the first layer 215-1.

[0211] However, the embodiments are not limited thereto.

[0212] For example, if both ends of the circuit board are warped downward due to any one of the property difference between the fourth insulating layer 214 and the fifth insulating layer 215, the thickness difference between the fourth insulating layer 214 and the fifth insulating layer 215, and the wiring density difference between the fifth circuit layer 225 and the sixth circuit layer 235, the buffer layer may be included in the fourth insulating layer 214 instead of the fifth insulating layer 215.

[0213] At this time, each insulating layer may be distinguished based on the circuit patterns provided in different layers. For example, each insulating layer may represent the layer between the circuit patterns provided in different layers. Alternatively, a plurality of through electrodes may be provided in the horizontal direction in each insulating layer, and one through electrode may be provided in the vertical direction in each insulating layer.

[0214] Figure 9 is a diagram showing a semiconductor package of a circuit board including Figure 8 the

[0215] Referring to Figure 9 , the semiconductor package may include at least one semiconductor device provided on the circuit board.

[0216] For example, the semiconductor package may be an antenna package.

[0217] In this case, the lower layer (insulating layer and circuit layer) below the first insulating layer 211 in the circuit board of the semiconductor package may constitute an antenna array layer that radiates antenna signals to the outside, and the upper layer above the first insulating layer 211 may constitute a driving layer that provides antenna signals to the antenna array layer or processes the antenna signals received from the antenna array layer.

[0218] In this case, the required characteristics of the antenna array layer and the driving layer may be different from each other. For example, an insulating layer having a relatively high dielectric constant may be used for the antenna array layer to enhance antenna characteristics. Additionally, the antenna array layer may be provided with a circuit layer having a relatively low wiring density to provide a more compact antenna device. For example, an insulating layer having a relatively low dielectric constant may be used for the driving layer to enhance signal processing characteristics while minimizing signal transmission loss. Additionally, the driving layer may be provided with a circuit layer having a relatively high wiring density.

[0219] Since the antenna package as described above needs to have different characteristics in the upper and lower layers of the third insulating layer 113, warping may occur in a specific direction during the manufacturing process of the circuit board. Therefore, according to the warping direction of the circuit board, an embodiment may allow a buffer layer to be included in one of the upper and lower layers, thereby minimizing the warping of the circuit board.

[0220] Meanwhile, the semiconductor package may include a first connection portion 310 and a second connection portion 320. The first connection portion 310 and the second connection portion 320 may represent solder balls, but are not limited thereto.

[0221] A first semiconductor device 330 may be provided on the first connection portion 310. Terminals 335 of the first semiconductor device 330 may be electrically coupled to the circuit board through the first connection portion 310.

[0222] A second semiconductor device 340 may be provided on the second connection portion 320. Terminals 345 of the second semiconductor device 340 may be electrically coupled to the circuit board through the second connection portion 320.

[0223] Additionally, the first semiconductor device 330 may be a driving device. For example, when the semiconductor package is an antenna package, the first semiconductor device 330 may be a driving device for driving the antenna package. The first semiconductor device 330 may provide a transmission signal to the antenna array layer, thereby sending an antenna signal to the outside. The first semiconductor device 330 may receive a received signal from the antenna array layer. Therefore, the semiconductor device 330 processes and analyzes the signal transmitted from the outside.

[0224] Additionally, the second semiconductor device 340 may be a device for supporting the operation of the first semiconductor device 330. For example, the second semiconductor device 340 may include a resistor, a capacitor, an inductor, etc.

[0225] On the other hand, when the circuit board with the above characteristics of the present disclosure is used in IT devices or household appliances such as smart phones, server computers, and televisions (TVs), functions such as signal transmission or power supply can be stably performed. For example, when the circuit board with the characteristics of the present disclosure performs a semiconductor packaging function, the circuit board can be used to safely protect the semiconductor chip from external moisture or contaminants, or alternatively, problems such as leakage current, electrical short circuit between terminals, and electrical disconnection of the terminals provided to the semiconductor chip can be solved. In addition, when responsible for the function of signal transmission, the noise problem can be solved. Thus, the circuit board with the above characteristics of the present disclosure can maintain the stable functions of IT devices or household appliances, enabling the entire product and circuit board applying the present disclosure to achieve functional unity or technical interlocking with each other.

[0226] When the circuit board with the above characteristics of the present disclosure is used in a transportation device such as a vehicle, the problem of distortion of signals transmitted to the transportation device can be solved, or alternatively, by safely protecting the semiconductor chip that controls the transportation device from external influences and solving problems such as leakage current or electrical short circuit between terminals or electrical disconnection of the terminals provided to the semiconductor chip, the safety of the transportation device can be further improved. Therefore, the transportation device and the circuit board applying the present disclosure can achieve functional integrity or technical interlocking with each other.

[0227] The characteristics, structures, and effects described in the above embodiments are included in at least one embodiment, but are not limited to one embodiment. In addition, those of ordinary skill in the art to which the embodiments belong can even combine or modify the characteristics, structures, effects, etc. shown in each embodiment relative to other embodiments. Therefore, it should be understood that the content related to such combinations and such modifications is included within the scope of the embodiments.

[0228] The description focuses on the embodiments, but it is merely illustrative and does not limit the embodiments. Those skilled in the art to which the embodiments belong can understand that various modifications and applications not shown above can be made without departing from the basic characteristics of the embodiments. For example, each component specifically shown in the embodiments can be modified and implemented. In addition, it should be understood that the differences related to such changes and applications are included within the scope of the embodiments defined in the appended claims.

Claims

1. A circuit board, comprising: A first circuit layer; A first insulating layer disposed on the first circuit layer; A second insulating layer disposed on the first insulating layer; And A second circuit layer disposed on the second insulating layer, Wherein at least one of the wiring density of the first circuit layer, the thickness of the first insulating layer, and the property of the first insulating layer is different from at least one of the wiring density of the second circuit layer, the thickness of the second insulating layer, and the property of the second insulating layer, Wherein any one of the first insulating layer and the second insulating layer is provided as a single layer, and Wherein the other of the first insulating layer and the second insulating layer includes a first layer having a first property and a second layer having a second property different from the first property.

2. The circuit board according to claim 1, wherein The second layer of any one of the first insulating layer and the second insulating layer is disposed closer to the other of the first insulating layer and the second insulating layer than the first layer.

3. The circuit board according to claim 1, wherein The wiring density of the first circuit layer is less than the wiring density of the second circuit layer, Wherein the first insulating layer has a multilayer structure including the first layer and the second layer, and Wherein the second insulating layer has a single-layer structure.

4. The circuit board according to claim 1, wherein, The thickness of the first insulating layer is greater than the thickness of the second insulating layer, Wherein the first insulating layer has a multilayer structure including the first layer and the second layer, and Wherein the second insulating layer has a single-layer structure.

5. The circuit board according to claim 1, wherein, The dielectric constant of the first insulating layer is greater than the dielectric constant of the second insulating layer, Wherein the first insulating layer has a multilayer structure including the first layer and the second layer, and Wherein the second insulating layer has a single-layer structure.

6. The circuit board according to any one of claims 3 to 5, wherein, The first property of the first layer of the first insulating layer includes a first glass transition temperature, and Wherein the second property of the second layer of the first insulating layer includes a second glass transition temperature lower than the first glass transition temperature.

7. The circuit board according to claim 6, wherein, The second glass transition temperature satisfies the range of 60% to 95% of the first glass transition temperature.

8. The circuit board according to any one of claims 3 to 5, wherein, The first property of the first layer of the first insulating layer includes a first modulus, and Wherein the second property of the second layer of the first insulating layer includes a second modulus lower than the first modulus.

9. The circuit board according to claim 8, wherein, The second modulus satisfies the range of 50% to 95% of the first modulus.

10. The circuit board according to any one of claims 3 to 5, wherein, The first property of the first layer of the first insulating layer includes at least one of a first dielectric constant and a first coefficient of thermal expansion, and Wherein the second property of the second layer of the first insulating layer includes at least one of a second dielectric constant corresponding to the first dielectric constant and a second coefficient of thermal expansion corresponding to the first coefficient of thermal expansion, and Wherein at least one of the first dielectric constant and the first coefficient of thermal expansion satisfies the range of 93% to 107% of at least one of the second dielectric constant and the second coefficient of thermal expansion.

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