Physical interface verification method and device, electronic equipment and storage medium

Abstract

The invention discloses a physical interface verification method and device, electronic equipment and a storage medium, and relates to the technical field of communication, and the method comprises the steps that a main controller can obtain interface identification information, a function type and an operation instruction corresponding to the function type, and performs access operation on a register corresponding to the interface identification information based on the information. Furthermore, the slave device can perform configuration operation on the physical interface corresponding to the interface identification information included in the slave device. After the configuration operation is executed, the detection equipment can detect corresponding signal information from the physical interface. And furthermore, the main controller can determine whether the physical interface meets the condition of serving as a virtual interface of the main equipment or not according to the function type and the detection signal information. In addition, the physical interface has been verified, so that the probability of occurrence of a fault when the physical interface is subsequently used for carrying out related business operation is low, and the running stability of the main equipment can be greatly improved.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a physical interface verification method, device, electronic device, and storage medium. Background Art

[0002] In the field of communications technology, master devices require a large number of interfaces. In some scenarios, the master device's own interface count is insufficient to meet actual demand, necessitating the use of interfaces from slave devices to expand its own interface count. Directly using interfaces from slave devices increases the probability of failure during service execution, potentially rendering the master device unstable. Summary of the Invention

[0003] The present application provides a physical interface verification method, apparatus, electronic device, storage medium, and program product to solve the problem of unstable operation caused by a master device using the physical interface of a slave device.

[0004] The present application provides a physical interface verification method, which is applied to a data transmission system. The data transmission system includes a master device, a slave device, and a detection device. The physical interface verification method is executed by a master controller in the master device. The physical interface verification method includes:

[0005] Obtain interface identification information, function type, and operation instructions corresponding to the function type;

[0006] Performing an access operation on a register corresponding to the interface identification information according to the interface identification information, the function type, and the operation instruction, wherein the operation result of the access operation is used to perform a configuration operation and a data transfer operation on a physical interface corresponding to the interface identification information included in the slave device;

[0007] receiving detection signal information sent by a detection device, wherein the detection signal information is signal information detected by the detection device from the physical interface after performing a configuration operation and a data transfer operation on the physical interface;

[0008] A verification result corresponding to the physical interface is determined according to the function type and the detection signal information, wherein the verification result is used to indicate whether the physical interface meets the condition of being a virtual interface of the master device.

[0009] The present application also provides a physical interface verification device, which is applied to a data transmission system. The data transmission system includes a master device, a slave device, and a detection device. The master device includes a main controller, and the main controller includes the physical interface verification device. The physical interface verification device includes:

[0010] An acquisition module is used to obtain interface identification information, function type, and operation instructions corresponding to the function type;

[0011] an access module, configured to perform an access operation on a register corresponding to the interface identification information according to the interface identification information, the function type, and the operation instruction, wherein the operation result of the access operation is used by the slave device to perform a configuration operation and a data transfer operation on a physical interface corresponding to the interface identification information;

[0012] A receiving module, configured to receive detection signal information sent by a detection device, wherein the detection signal information is signal information detected by the detection device from the physical interface after performing configuration operations and data transfer operations on the physical interface;

[0013] The determination module is used to determine a verification result corresponding to the physical interface according to the function type and the detection signal information, wherein the verification result is used to indicate whether the physical interface meets the conditions of being a virtual interface of the master device.

[0014] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any one of the above-mentioned physical interface verification methods when executing the computer program.

[0015] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned physical interface verification methods are implemented.

[0016] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned physical interface verification methods when executed by a processor.

[0017] Through the present application, the master controller can obtain interface identification information, function type, and operation instructions corresponding to the function type, and based on this information, perform access operations on the register corresponding to the interface identification information. Furthermore, the slave device can perform configuration operations on the physical interface corresponding to the interface identification information included in itself. After performing the configuration operation, the detection device can detect the corresponding signal information from the physical interface. Furthermore, the master controller can determine whether the physical interface meets the conditions for serving as a virtual interface of the master device based on the function type and the detection signal information. In this way, when the master device needs to expand its own interface, it can first use the above-mentioned verification scheme to verify whether the physical interface on the slave device meets the conditions. If so, the physical interface can be used as its own virtual interface, thereby expanding its own interface quantity. Moreover, since the physical interface has been verified, the probability of failure in subsequent related operations using the physical interface is low, which can greatly improve the stability of the master device operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0019] Figure 1 A schematic diagram of the architecture of a data transmission system provided in an embodiment of the present application;

[0020] Figure 2 A flow chart of a physical interface verification method provided in an embodiment of the present application;

[0021] Figure 3 A schematic diagram of the relationship between a UEFI environment and a VGPIO verification tool provided in an embodiment of the present application;

[0022] Figure 4 A schematic diagram of the architecture of another data transmission system provided in an embodiment of the present application;

[0023] Figure 5 A schematic diagram of the data path under the output function provided in an embodiment of the present application;

[0024] Figure 6 A schematic diagram of the data path under the input function provided in an embodiment of the present application;

[0025] Figure 7 A flow chart of another physical interface verification method provided in an embodiment of the present application;

[0026] Figure 8 A schematic diagram of a flow chart for executing a verification instruction provided in an embodiment of the present application;

[0027] Figure 9 A schematic diagram of the structure of a physical interface verification device provided in an embodiment of the present application;

[0028] Figure 10 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0029] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0030] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0031] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0032] The physical interface verification method provided in this application can be implemented by a data transmission system, such as Figure 1 As shown, the data transmission system may include a master device and a slave device. Alternatively, it may also include a detection device.

[0033] The master device may include a master controller, a first central processing unit (CPU), etc. The master controller may include a main processor, multiple master configuration registers, and multiple master data registers. The multiple master data registers may include input data registers and output data registers. For example, the master device may be a host in a server, and the master controller may be an Enhanced Serial Peripheral Interface Bus (ESPI) protocol controller.

[0034] The slave device may include a slave controller, an interface, a second central processing unit, etc. The slave controller may include a slave processor, multiple slave configuration registers, and multiple slave data registers. The interface may include multiple physical interfaces, each of which may include multiple pins. The multiple slave data registers may include input data registers and output data registers. For example, the slave device may be a baseboard management controller (BMC) in a server. The slave controller may also be an ESPI protocol controller. The interface may be a general purpose input / output (GPIO) interface.

[0035] The embodiment of the present application provides a physical interface verification method, which can be executed by the main controller, such as Figure 2 As shown, the specific processing steps of the physical interface verification method may include:

[0036] Step S201: Acquire interface identification information, function type, and operation instructions corresponding to the function type.

[0037] The interface identification information may be in the form of a number, and the multiple physical interfaces of the slave device's interface may be arranged in ascending order according to the number. The function type may be an input function or an output function. When the function type is an input function, the operation instruction may be a read instruction, or when the function type is an output function, the operation instruction may be a write instruction, and the write instruction may include output data.

[0038] Specifically, the first central processor can obtain a verification instruction input by a user, which may include starting interface identification information, a test quantity, a function type, an operation instruction corresponding to the function type, and controller identification information. Based on the controller identification information, the first central processor can determine the master controller corresponding to the controller identification information from among multiple master controllers included in the master device, and send the verification instruction to the master controller. In this way, the master controller can parse the received verification instruction, obtain the starting interface identification information, the test quantity, the function type, and the operation instruction corresponding to the function type, and perform subsequent processing.

[0039] The main controller can determine a number of interface identification information equal to the number of tests based on the starting interface identification information and the number of tests. Since the verification operation can be performed serially or in parallel, the main controller can perform the verification operation on the physical interface corresponding to each interface identification information in different ways.

[0040] Method 1: In the current verification round, an interface identification information is extracted from the interface identification information that has not been verified as the interface identification information corresponding to the current verification round. In this way, the verification operations between different physical interfaces do not interfere with each other, which can greatly improve the accuracy of the verification result.

[0041] Method 2: Based on the number of parallel verification paths, multiple interface identification information is divided into a number of groups equal to the number of paths. The interface identification information in each group is assigned to a parallel verification path. On each verification path, the physical interface corresponding to each interface identification information in the assigned group is verified in ascending order. Verification operations on different verification paths are performed in parallel. This parallel verification process improves efficiency.

[0042] In some optional embodiments, the interface identification information in the verification instruction can be indicated by the starting pin identification information and the number of pins. For example, the starting pin identification information is 0 and the number of pins is 7 for indicating interface 1, and the starting pin identification information is 8 and the number of pins is 8 for indicating interface 2.

[0043] In some optional embodiments, the verification instruction may further include a verification mode, which may be a serial mode or a parallel mode. The main controller may select whether to perform the verification operation in mode 1 or mode 2 based on the verification mode, thereby providing greater flexibility and adapting to the actual needs of different application scenarios.

[0044] In some optional implementations, the physical interface verification method of the present application may be performed in a Unified Extensible Firmware Interface (UEFI) environment, in which binary files in the EFI format may be executed. Figure 3 As shown, in this environment, a virtual general purpose input and output (VGPIO) verification tool can be installed on the master controller and the slave controller respectively. The VGPIO verification tool can be an executable program in the EFI format. Furthermore, the VGPIO verification tools installed on the two controllers can be used to cooperate with each other to complete the above-mentioned physical interface verification method. In this way, there is no need to enter the processing logic of the operating system to perform the verification operation, eliminating the step of booting the operating system and improving efficiency. In addition, it does not rely on a specific version of UEFI and is universal.

[0045] Step S202: performing an access operation on a register corresponding to the interface identification information according to the interface identification information, the function type, and the operation instruction.

[0046] The operation result of the access operation can be used to enable the slave device to perform configuration operations and data transfer operations on the physical interface corresponding to the interface identification information.

[0047] Specifically, in Figure 1 In the data transmission system shown, the specific steps of performing an access operation on a register may include:

[0048] Step 1: According to the interface identification information, a target master configuration register corresponding to the interface identification information is selected from a plurality of master configuration registers included in the master controller, and a target master data register corresponding to the interface identification information is selected from a plurality of master data registers included in the master controller.

[0049] Step 2: According to the function type, write the data corresponding to the function type into the target master configuration register, so as to execute the configuration operation of the function type of the physical interface from the device.

[0050] Step three: when the physical interface is in a working state corresponding to the functional type, according to the operation instruction, an access operation corresponding to the operation instruction is performed on the target master data register to perform a data transfer operation from the device.

[0051] In case 1, when the function type is output, the operation instruction includes output data, and the access operation corresponding to the operation instruction is a write operation. The master controller can write the output data to the target master data register, which the slave device can then read from the target master data register and set the state of the level signal output by the physical interface based on the output data. The output data is the data transferred by the data transfer operation.

[0052] Case 2: When the function type is an input function, the operation instruction is a read instruction, and the access operation corresponding to the operation instruction is a read operation. The main controller can read the input data from the target master data register, where the input data is determined by the slave device according to the state of the level signal input by the physical interface and written into the target master data register. The input data is the data transferred by the data transfer operation.

[0053] Specifically, the main controller can select, based on the interface identification information, a target main configuration register corresponding to the interface identification information from among the multiple main configuration registers included in the main controller, and select a target main data register corresponding to the interface identification information from among the multiple main data registers included in the main controller. Furthermore, based on the function type, the main controller can obtain data corresponding to the function type and write the data corresponding to the function type into the target main configuration register. Furthermore, when the function type is an output function, the output data included in the operation instruction also needs to be written into the target main data register.

[0054] After completing the configuration operation on the master device side, the slave controller in the slave device can read the configuration data, i.e., the data corresponding to the function type, from the target master configuration register. Based on the configuration data and the identification information of the target master configuration register, the slave controller can set the function type of the physical interface corresponding to the identification information of the target master configuration register (i.e., the physical interface corresponding to the interface identification information). In this way, the physical interface can perform corresponding operations according to the set function type. When the physical interface is in an operating state corresponding to the function type, the slave controller can perform an access operation corresponding to the function type on the target master data configuration register. That is, when the function type is an input function, the slave controller determines the corresponding status data based on the state of the level signal input on the physical interface, and writes the status data into the target master data register. In this way, the slave device can transfer the input data corresponding to the physical interface to the master controller. Alternatively, when the function type is an output function, the slave controller reads the output data from the target master data register, and based on the output data, sets the state of the level signal of the physical interface so that the physical interface outputs the level signal corresponding to the output data. In this way, the slave device can transfer the output data to the physical interface.

[0055] In some optional embodiments, when multiple master data registers are divided into input data registers and output data registers, if the main controller determines that the function type is an input function, the target input data register corresponding to the interface identification information can be selected from the multiple input data registers. Alternatively, if the function type is determined to be an output function, the target output data register corresponding to the interface identification information can be selected from the multiple output data registers. The target input data register and the target output data register can serve as the target master data registers mentioned above.

[0056] In this way, by dividing the registers into finer granularity, the accuracy of data transfer can be improved.

[0057] Step S203: Receive detection signal information sent by the detection device.

[0058] The detection signal information is signal information detected by the detection device from the physical interface after performing configuration operations and data transfer operations on the physical interface.

[0059] Specifically, when the data transmission system includes a detection device in addition to the master device and the slave device, the detection device can be connected to the main controller and the physical interface. The detection device can generate corresponding detection signal information based on the state of the level signal output by the physical interface and send it to the main controller.

[0060] Step S204: Determine a verification result corresponding to the physical interface according to the function type and the detection signal information.

[0061] The verification result may indicate whether the physical interface satisfies the conditions for being a virtual interface of a master device. If the verification result is successful, the verification result indicates that the physical interface satisfies the conditions for being a virtual interface of a master device. Alternatively, if the verification result is failed, the verification result indicates that the physical interface does not meet the conditions for being a virtual interface of a master device.

[0062] Step 1: Determine access information corresponding to the function type according to the function type.

[0063] Case 1: When the function type is determined to be an output function, the output data included in the operation instruction is determined to be the access information.

[0064] In case 2, when the function type is determined to be an input function, the input data read from the target master data register is determined as the access information.

[0065] Step 2: Determine the verification result based on the detection signal information and access information.

[0066] Specifically, the master controller may determine whether the detection signal information matches the access information. For example, when the function type is an output function, the master controller may determine whether the output data included in the operation instruction is consistent with the output data included in the detection signal information. Alternatively, when the function type is an input function, the master controller may determine whether the input data read from the target master data register is consistent with the output data included in the detection signal information. When it is determined that the detection signal information matches the access information, it may be determined that the physical interface cannot be used as a virtual interface of the master device. Alternatively, when it is determined that the detection signal information does not match the access information, it may be determined that the physical interface can be used as a virtual interface of the master device.

[0067] First, determining the corresponding access information based on the specific function type can ensure that accurate access information is selected for different functional requirements, thereby improving the accuracy of the verification process. Second, through automated detection and verification, the accuracy of verification can be improved and the errors caused by manual intervention can be reduced.

[0068] After completing the verification operation of the physical interface corresponding to each of the multiple interface identification information determined in step S201, the physical interface with a successful verification result may be marked as a virtual interface of the master device.

[0069] In some optional embodiments, when the data transmission system includes only a master device and a slave device, the main controller can obtain a verification script, and the verification script includes a first verification instruction and a second verification instruction. The first verification instruction may include first interface identification information, a function type corresponding to the first interface identification information, and a corresponding operation instruction. The second verification instruction may include second interface identification information, a function type corresponding to the second interface identification information, and a corresponding operation instruction. The first verification instruction may be executed before the second verification instruction, and the function type corresponding to the first interface identification information may be an output function, and the function type corresponding to the second interface identification information may be an input function. The first physical interface corresponding to the first interface identification information can be connected to the second physical interface corresponding to the second interface identification information through a line outside the interface.

[0070] When determining the verification result, the main controller may determine the verification result based on the output data in the operation instruction included in the second verification instruction and the input data read from the main data register corresponding to the first interface identification information. Specifically, when the output data in the operation instruction included in the first verification instruction and the input data read from the main data register corresponding to the first interface identification information match, the verification success is determined as the verification result, or when the output data in the operation instruction included in the first verification instruction and the input data read from the main data register corresponding to the first interface identification information do not match, the verification failure is determined as the verification result.

[0071] In this way, no additional testing equipment is required to perform the testing operation, which can save hardware resources.

[0072] In some optional embodiments, when the verification result of a physical interface is verification failure and the number of tests is less than the total number of physical interfaces included in the slave device, a third interface identification information is determined based on the largest interface identification information among multiple interface identification information and preset incremental indication information, so as to verify the third physical interface corresponding to the third interface identification information in accordance with the above-mentioned verification method. The verification operation is stopped until it is determined that the number of physical interfaces for which the verification result is verification success is equal to the number of tests, or when the verification operations corresponding to all physical interfaces included in the slave device are completed. All physical interfaces for which the verification result is verification success are marked as virtual interfaces of the master device.

[0073] Under this solution, firstly, the next interface identification information to be verified is automatically determined based on the preset incremental indication information, so that the solution can select the physical interface that meets the actual required number according to the actual verification results and the number of tests. Secondly, only the interfaces that have been successfully verified are marked as virtual interfaces of the main device, which avoids incorporating invalid or unavailable interfaces into subsequent operations and optimizes resource utilization efficiency. Thirdly, the entire verification process is automated, which reduces the need for manual intervention, reduces operational complexity and error probability, and is particularly suitable for large-scale deployment scenarios. Finally, when a verification failure occurs, the next interface to be verified can be selected according to predetermined rules (such as using the largest interface identification information in combination with preset incremental indication information). This approach of automatically discovering and marking valid interfaces simplifies the configuration steps and improves the user experience.

[0074] In some optional implementations, when the verification mode adopted is a parallel verification mode, the main controller may further perform the following steps:

[0075] Step 1: After completing verification operations corresponding to all physical interfaces on the slave device and determining that the number of physical interfaces is still less than the test number, obtain identification information of multiple candidate interfaces whose verification results are verification failures.

[0076] Step 2: performing a grouping operation on the multiple candidate interface identification information to obtain multiple interface identification information groups.

[0077] The physical interfaces corresponding to all the interface identification information included in the interface identification information group are not adjacent, and the number of the interface identification information included in the interface identification information group is less than or equal to the number of parallel verification paths.

[0078] Step three: In the current verification round, one interface identification information group is selected from the unverified interface identification information groups as the target interface identification information group corresponding to the current verification round.

[0079] Step 4: Use one piece of interface identification information in the target interface identification information group as interface identification information on a parallel verification path.

[0080] Step 5: After executing the physical interface verification operations corresponding to each interface identification information in the target interface identification information group in parallel, a re-verification result corresponding to each interface identification information in the target interface identification information group is obtained.

[0081] Step 6: After completing the verification operations corresponding to all verification rounds, select the backup interface identification information from multiple candidate interface identification information based on the interface identification information whose first verification result is successful, and the first verification result and re-verification result corresponding to each candidate interface identification information.

[0082] Mark the physical interface corresponding to the backup interface identification information as the backup virtual interface of the primary device.

[0083] Among them, step six may include:

[0084] When it is determined that the first verification result and the re-verification result corresponding to the first candidate interface identification information are consistent, the first candidate interface identification information is eliminated, wherein the first candidate interface identification information is any candidate interface identification information among the multiple candidate interface identification information. Alternatively, when it is determined that the first verification result and the re-verification result corresponding to the first candidate interface identification information are inconsistent, the first candidate interface identification information is retained. When the number of retained candidate interface identification information is one, the retained candidate interface identification information is directly determined as the backup interface identification information. Alternatively, when the number of retained candidate interface identification information is multiple, it is determined whether the retained candidate interface identification information contains identification information of a physical interface adjacent to the physical interface position corresponding to the second candidate interface identification information, wherein the second candidate interface identification information is any retained candidate interface identification information. When it is determined that there is no identification information of a physical interface adjacent to the physical interface position corresponding to the second candidate interface identification information, the second candidate interface identification information is determined as the backup interface identification information. Alternatively, when it is determined that there is identification information of a physical interface adjacent to the physical interface position corresponding to the second candidate interface identification information, based on the interface identification information whose first verification result is successful, the second candidate interface identification information, and the identification information of the physical interface adjacent to the physical interface position corresponding to the second candidate interface identification information, one candidate interface identification information is selected as the backup interface identification information from the second candidate interface identification information and the identification information of the physical interface adjacent to the physical interface position corresponding to the second candidate interface identification information, and the unselected candidate interface identification information is eliminated. The physical interface corresponding to the backup interface identification information is determined as the backup virtual interface of the main device.

[0085] First, by performing two verifications on the physical interface (initial verification and re-verification), the operating status of the physical interface can be more accurately determined, thereby ensuring that the selected backup interface has higher reliability. Second, the verification process uses a parallel verification path approach, which allows the identification information of multiple interfaces to be verified simultaneously in a single verification round, accelerating verification. Third, when selecting the backup interface identification information, special attention is paid to the positional relationship of the physical interfaces, avoiding the possibility of selecting adjacent physical interfaces as backup interfaces. This strategy reduces the risk of mutual interference or common failures caused by physical proximity.

[0086] In the physical interface verification method of the embodiment of the present application, the main controller can obtain interface identification information, function type, and operation instructions corresponding to the function type, and perform access operations on the register corresponding to the interface identification information based on this information. Furthermore, the slave device can perform configuration operations on the physical interface corresponding to the interface identification information included in itself. After performing the configuration operation, the detection device can detect the corresponding signal information from the physical interface. Furthermore, the main controller can determine whether the physical interface meets the conditions for serving as a virtual interface of the master device based on the function type and the detection signal information. In this way, when the master device needs to expand its own interface, it can first adopt the above-mentioned verification scheme to verify whether the physical interface on the slave device meets the conditions. If so, the physical interface can be used as its own virtual interface, thereby expanding its own interface quantity. Moreover, since the physical interface has been verified, the probability of failure in subsequent related operations using the physical interface is low, which can greatly improve the stability of the master device operation.

[0087] The following describes in detail the execution process of the above physical interface verification method using a specific example.

[0088] The data transmission system can be Figure 4 As shown, the host includes a first central processing unit and an ESPI master controller. The slave device may include an ESPI slave controller, an interface, and a second central processing unit. The ESPI master controller and the ESPI slave controller can implement different functions, such as SNOOP (monitoring function), keyboard controller style interface (KCS), block transfer (BT), mailbox function (MAILBOX), enhanced serial peripheral interface flash access (ESPIFlash Access), and VGPIO verification tool. The host and the BMC can be connected via the ESPI bus. The physical GPIOs included on the BMC interface are GPIOA and GPIOB.

[0089] Within the host, the first CPU can access the various VGPIO registers (i.e., configuration registers and data registers) within the ESPI master controller via its internal bus. Within the BMC, the second CPU can access the various VGPIO registers within the ESPI slave controller via its internal bus. The VGPIO verification tool and interface within the BMC can be connected via the BMC internal bus.

[0090] The host can access the configuration register of the ESPI slave device through the ESPI bus and set the function type of the BMC's physical GPIO to input or output (specifically, the slave device can read configuration data from the configuration register of the main controller and write it to its own configuration register, and then set the function type of the BMC's physical GPIO according to the configuration data written to its own configuration register). For example, Figure 4 In the example, the function type of GPIOA is set to output and the function type of GPIOB is set to input. GPIOA can be connected to GPIOB through an external line, so that the level signal output by GPIOA can be directly input to GPIOB.

[0091] The following describes the input and output paths of the virtual GPIO.

[0092] When the virtual GPIO is output, the first central processor controls the VGPIO verification tool of the ESPI main controller to generate a virtual GPIO pulse on the ESPI bus. The VGPIO verification tool of the ESPI slave controller on the BMC side receives and parses the virtual GPIO pulse, and reflects the change of the parsed virtual GPIO value to the physical GPIO of the BMC. In this way, the host can control the physical GPIO on the BMC side to output a high level signal or a low level signal. The data path is as follows: Figure 5 shown.

[0093] When the virtual GPIO is input, the current input data of the physical GPIO on the BMC side is sent to the slave controller of the ESPI through the internal bus. The VGPIO verification tool of the ESPI slave controller generates a virtual GPIO pulse on the ESPI bus. The VGPIO verification tool of the ESPI master controller on the host side receives and parses the virtual GPIO pulse and writes the parsed input data of the physical GPIO on the BMC side into the input data register of the VGPIO verification tool. In this way, the host can know the actual input data of the BMC physical GPIO. The data path is as follows: Figure 6 shown.

[0094] The following is combined with Figure 4 The data transmission system architecture diagram shown in the figure illustrates the physical interface verification method process of the VGPIO verification tool. The specific process is as follows Figure 7 shown.

[0095] First, after UEFI boot is completed, the ESPI main controller can import the VGPIO verification tool into the UEFI environment, making the VGPIO verification tool visible under the UEFI Shell. Then, the technician can enter the verification command on the console that establishes a communication connection with the ESPI main controller so that the VGPIO verification tool can execute the verification command. The verification command can be GpioTools.efi-v-start[START]-size[number of pins]-cs[ESPI device]-dir[GPIO direction][-set[value][-get], where "GpioTools.efi" represents the name of the VGPIO verification tool, "[START]" represents the starting pin identifier, [ESPI device] represents the controller identifier information, [GPIO direction] represents the function type, [value] represents the output data in the operation command when the function type is output function, set[value] is the operation command under the output function, and [-get] is the operation command under the input function.

[0096] Example 1, GpioTools.efi-v-start[0]-size[8]-cs[ESPI device0]-dir[0x0B][-set[0][-get]

[0097] This verification instruction is used to instruct the ESPI master controller 0 to set the function type of 0x80-0x87 (GPIOA) to output function (0x0B) and the output value to 0.

[0098] Example 2, GpioTools.efi -v -start[0] -size[8] -cs[ESPI device0] -dir[0x07][-get], this verification instruction is used to instruct the ESPI master controller 0 to set the function type of 0x80-0x87 (GPIOA) to input function (0x07) and read the input value.

[0099] The specific process of executing the verification instruction can be as follows: Figure 8 As shown, the specific steps are as follows:

[0100] Step 1: Parse the verification instruction. The verification instruction includes multiple setting parameters. The setting parameters may include:

[0101] (1) The starting pin identification information can be used to index the configuration registers and data registers on the host side and the BMC side. For example, the range can be 0-127.

[0102] (2) Number of pins.

[0103] (3) Data path direction (i.e. the functional type mentioned above).

[0104] (4) Output function also includes output data.

[0105] (5) Main controller number (also known as the controller identification information mentioned above).

[0106] Step 2: The host writes the configuration register in the ESPI slave controller on the BMC side through the ESPI bus to select the physical GPIO corresponding to the starting pin identification information in step 1. In this way, the physical GPIO on the BMC side can be controlled according to the virtual GPIO number.

[0107] For example, pin identification information "0x0-0x7" corresponds to GPIOA, and pin identification information "0x8-0xF" corresponds to GPIOB. "0x0-0x7" can control GPIOA, specifically multiple pins GPIOA0-GPIOA7 on GPIOA, and "0x8-0xF" can control GPIOB, specifically multiple pins GPIOB0-GPIOB7 on GPIOB.

[0108] Step 3, according to the data path direction, starting pin identification information, and pin number in step 1, set the data path direction of the BMC side VGPIO verification tool and the input and output direction of the physical GPIO pin by writing the BMC's ESPI configuration register. If the output flag of the data path direction is true and the number is "0x0-0x7", then set the function type of GPIOA to output, and the data path is as follows: Figure 4 If the input flag of the data path direction is true and the number is "0x8-0xF", then the function type of GPIOB is set to input, and the data path is as follows Figure 5 shown.

[0109] In step 4, unlock the configuration lock of the host-side VGPIO verification tool to protect the process from steps 5 to 6 and prevent interference from other operations.

[0110] Step 5: According to the data path direction, starting pin identification information and pin number in step 1, the data path direction of the host-side VGPIO verification tool can be set by writing the register of the ESPI main controller.

[0111] When the function type is set to output function, write the configuration register of the ESPI main controller, set the corresponding data path to output direction, and write the data register of the ESPI main controller to control the high or low of the corresponding physical GPIO output level signal.

[0112] For example, by setting the data path corresponding to "0x0-0x7" as the output direction and writing the data register corresponding to "0x0-0x07", GPIOA can be controlled to output a high-level signal or a low-level signal.

[0113] When the function type is set to input function, write the configuration register of the ESPI main controller, set the corresponding data path to input direction, and read the data register of the ESPI main controller to know the actual input data of the physical GPIO corresponding to the current virtual GPIO number.

[0114] For example, if you set the data path direction for 0x8-0xF to input, the input data register value for 0x8-0xF will automatically update to the current value of GPIOB. By reading and printing this value from the data register, you can see the actual input data of GPIOB.

[0115] Step 6: Determine whether all virtual GPIOs required in step 1 have been traversed. If so, proceed to step 7; otherwise, repeat steps 5 to 6.

[0116] Step 7: Disable the configuration lock of the VGPIO verification tool on the host side.

[0117] Step 8, end.

[0118] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0119] The embodiment of the present application also provides a physical interface verification device, such as Figure 9 Shown, including:

[0120] The acquisition module 910 is used to acquire interface identification information, function type, and operation instructions corresponding to the function type;

[0121] an access module 920 configured to perform an access operation on a register corresponding to the interface identification information based on the interface identification information, the function type, and the operation instruction, wherein the operation result of the access operation is used by the slave device to perform a configuration operation and a data transfer operation on the physical interface corresponding to the interface identification information;

[0122] A receiving module 930 is configured to receive detection signal information sent by a detection device, wherein the detection signal information is signal information detected by the detection device from the physical interface after performing configuration operations and data transfer operations on the physical interface;

[0123] The determination module 940 is configured to determine a verification result corresponding to the physical interface according to the function type and the detection signal information, wherein the verification result is used to indicate whether the physical interface meets the conditions for being a virtual interface of the master device.

[0124] In some optional implementations, the determination module 940 is specifically configured to:

[0125] According to the function type, determining access information corresponding to the function type;

[0126] An authentication result is determined based on the detection signal information and the access information.

[0127] In some optional implementations, the registers corresponding to the interface identification information include a target master configuration register and a target master data register; the access module 920 is specifically configured to:

[0128] According to the interface identification information, selecting a target master configuration register corresponding to the interface identification information from a plurality of master configuration registers included in the master controller, and selecting a target master data register corresponding to the interface identification information from a plurality of master data registers included in the master controller;

[0129] According to the interface identification information, selecting a target master configuration register corresponding to the interface identification information from a plurality of master configuration registers included in the master controller, and selecting a target master data register corresponding to the interface identification information from a plurality of master data registers included in the master controller;

[0130] According to the function type, data corresponding to the function type is written into the target master configuration register to perform a configuration operation on the function type of the physical interface from the device;

[0131] When the physical interface is in a working state corresponding to the functional type, an access operation corresponding to the operation instruction is performed on the target master data register according to the operation instruction, so as to perform a data transfer operation from the device.

[0132] In some optional implementations, when the function type is an output function, the operation instruction includes output data, and the access operation corresponding to the operation instruction is a write operation;

[0133] The access module 920 is specifically configured to:

[0134] The output data is written into the target master data register, which is used to read the output data from the target master data register from the slave device, and the state of the level signal output by the physical interface is set based on the output data. The output data is the data transferred by the data transfer operation.

[0135] In some optional implementations, when the function type is an input function, the operation instruction is a read instruction, and the access operation corresponding to the operation instruction is a read operation;

[0136] The access module 920 is specifically configured to:

[0137] Input data is read from the target master data register, wherein the input data is data determined by the slave device according to the state of the level signal input from the physical interface and written into the target master data register, and the input data is the data transferred by the data transfer operation.

[0138] In some optional implementations, the determination module 940 is specifically configured to:

[0139] When the function type is determined to be the output function, the output data included in the operation instruction is determined as the access information.

[0140] In some optional implementations, the determination module 940 is specifically configured to:

[0141] When the function type is determined to be an input function, the input data read from the target master data register is determined as the access information.

[0142] For the description of the features in the embodiment corresponding to the physical interface verification device, please refer to the relevant description of the embodiment corresponding to the physical interface verification method, and no further details will be given here.

[0143] The embodiment of the present application also provides an electronic device, such as Figure 10 As shown, the electronic device includes a memory 10 and a processor 20. The memory 10 stores a computer program, and the processor 20 is configured to run the computer program to execute the steps in any of the above-mentioned physical interface verification method embodiments. The electronic device may be the above-mentioned main controller.

[0144] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps of any of the above-mentioned physical interface verification method embodiments when running.

[0145] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0146] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any of the above-mentioned physical interface verification method embodiments are implemented.

[0147] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above-mentioned physical interface verification method embodiments are implemented.

[0148] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0149] The above is a detailed introduction to a physical interface verification method, device, electronic device, storage medium, and program product provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A physical interface verification method, characterized in that: The method is applied to a data transmission system, which includes a master device, a slave device, and a detection device. The method is executed by a main controller in the master device, and includes: Obtaining interface identification information, function type, and operation instructions corresponding to the function type; Performing an access operation on a register corresponding to the interface identification information according to the interface identification information, the function type, and the operation instruction, wherein an operation result of the access operation is used by the slave device to perform a configuration operation and a data transfer operation on a physical interface corresponding to the interface identification information included in the slave device; receiving detection signal information sent by the detection device, wherein the detection signal information is signal information detected by the detection device from the physical interface after performing the configuration operation and the data transfer operation on the physical interface; A verification result corresponding to the physical interface is determined according to the function type and the detection signal information, wherein the verification result is used to indicate whether the physical interface meets the conditions for being a virtual interface of the master device.

2. The physical interface verification method according to claim 1, characterized in that: The determining, according to the function type and the detection signal information, a verification result corresponding to the physical interface includes: Determining access information corresponding to the function type according to the function type; The verification result is determined according to the detection signal information and the access information.

3. The physical interface verification method according to claim 2, characterized in that: The registers corresponding to the interface identification information include a target master configuration register and a target master data register; The performing an access operation on a register corresponding to the interface identification information according to the interface identification information, the function type, and the operation instruction includes: According to the interface identification information, selecting the target master configuration register corresponding to the interface identification information from a plurality of master configuration registers included in the master controller, and selecting the target master data register corresponding to the interface identification information from a plurality of master data registers included in the master controller; According to the function type, writing data corresponding to the function type into the target master configuration register so that the slave device performs a configuration operation on the function type of the physical interface; When the physical interface is in a working state corresponding to the functional type, an access operation corresponding to the operation instruction is performed on the target master data register according to the operation instruction, so that the slave device performs the data transfer operation.

4. The physical interface verification method according to claim 3, characterized in that: When the function type is an output function, the operation instruction includes output data, and the access operation corresponding to the operation instruction is a write operation; The step of performing, when the physical interface is in a working state corresponding to the functional type, an access operation corresponding to the operation instruction on the target master data register according to the operation instruction includes: The output data is written into the target master data register so that the slave device can read the output data from the target master data register and set the state of the level signal output by the physical interface based on the output data. The output data is the data transferred by the data transfer operation.

5. The physical interface verification method according to claim 3, characterized in that: When the function type is an input function, the operation instruction is a read instruction, and the access operation corresponding to the operation instruction is a read operation; The step of performing, when the physical interface is in a working state corresponding to the functional type, an access operation corresponding to the operation instruction on the target master data register according to the operation instruction includes: Input data is read from the target master data register, wherein the input data is data determined by the slave device according to the state of the level signal input by the physical interface and written into the target master data register, and the input data is the data transferred by the data transfer operation.

6. The physical interface verification method according to claim 4, characterized in that: The determining, according to the function type, access information corresponding to the function type includes: When it is determined that the function type is an output function, the output data included in the operation instruction is determined as the access information.

7. The physical interface verification method according to claim 5, characterized in that: The determining, according to the function type, access information corresponding to the function type includes: When it is determined that the function type is an input function, the input data read from the target master data register is determined as the access information.

8. A physical interface verification device, characterized in that: The device is applied to a data transmission system, which includes a master device, a slave device, and a detection device. The master device includes a main controller, and the main controller includes the device. The device includes: An acquisition module, configured to acquire interface identification information, a function type, and an operation instruction corresponding to the function type; an access module, configured to perform an access operation on a register corresponding to the interface identification information according to the interface identification information, the function type, and the operation instruction, wherein an operation result of the access operation is used by the slave device to perform a configuration operation and a data transfer operation on a physical interface corresponding to the interface identification information included in the slave device; a receiving module, configured to receive detection signal information sent by the detection device, wherein the detection signal information is signal information detected by the detection device from the physical interface after performing the configuration operation and the data transfer operation on the physical interface; A determination module is used to determine a verification result corresponding to the physical interface according to the function type and the detection signal information, wherein the verification result is used to indicate whether the physical interface meets the conditions of being a virtual interface of the master device.

9. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the physical interface verification method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the physical interface verification method according to any one of claims 1 to 7.

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