Semiconductor structure

Abstract

The invention relates to a semiconductor structure. The semiconductor structure comprises a substrate, pixel units and a common electrode, wherein the pixel units are arranged on the substrate in an array mode; the common electrode surrounds the pixel unit and is connected with the pixel unit; the common electrodes comprise a first common electrode, a second common electrode and a third common electrode; the first common electrode extends along a first direction and a second direction; the second common electrodes and the first common electrodes are alternately arranged at intervals in the first direction and extend in the second direction. The third common electrodes and the first common electrodes are alternately arranged at intervals in the second direction and extend in the first direction. The aperture opening ratio of the device can be improved, so that the performance of the device is effectively improved, meanwhile, margin is provided for process preparation, and the process difficulty is remarkably reduced.

Description

Technical Field

[0001] The present disclosure relates to the technical field of integrated circuit design and manufacturing, and in particular to a semiconductor structure. Background Art

[0002] With the development of display technology, the new ultra-light emitting diode (uLED) has become a hot topic of research due to its advantages of small size and high brightness. In particular, uLED is being widely studied as a solution for virtual reality (AR) displays.

[0003] However, uLED technology is not yet mature, especially full-color technology. Although the vertical stacking full-color process has a significantly higher advantage in pixel density, that is, the number of pixels per inch (PPI), compared with the horizontal stacking process, it still has some technical difficulties.

[0004] For example, due to the difficulty of vertical stacking and process bottlenecks, the characteristics of uLEDs are compromised. Therefore, the PN electrodes of each RGB pixel need to be led out, resulting in the electrodes forming a multi-layer stepped morphology. Moreover, due to the high thickness of the overall RGB stack and the need to meet PPI requirements, the resulting structural steps are very short and have a wide pixel pitch. Therefore, the supporting film formation, photolithography, and etching processes are extremely difficult, becoming a bottleneck in the development of uLED technology. At the same time, due to process limitations, the effective light-emitting area of uLEDs is also greatly reduced, thus affecting device performance. Summary of the Invention

[0005] Based on this, the present disclosure provides a semiconductor structure that can increase the aperture ratio of the device, thereby effectively improving the device performance, while also providing a margin for process preparation and significantly reducing the process difficulty.

[0006] In order to solve the above technical problems, according to some embodiments, the present disclosure provides a semiconductor structure, which includes a substrate, pixel units arranged in an array on the substrate, and a common electrode; the common electrode surrounds the pixel unit and is connected to the pixel unit; the common electrode includes a first common electrode, a second common electrode and a third common electrode; the first common electrode extends along the first direction and the second direction; the second common electrode is arranged alternately with the first common electrode along the first direction and extends along the second direction; the third common electrode is arranged alternately with the first common electrode along the second direction and extends along the first direction; the first direction intersects with the second direction.

[0007] In some embodiments, the pixel unit includes a plurality of pixel points arranged in an array; the pixel points include a first light-emitting unit, a second light-emitting unit, and a third light-emitting unit stacked sequentially from bottom to top along the thickness direction of the substrate; the first light-emitting unit is electrically connected to the first common electrode; the second light-emitting unit is electrically connected to the second common electrode, and the third light-emitting unit is electrically connected to the third common electrode.

[0008] In some embodiments, the first light-emitting unit includes a first active layer, the second light-emitting unit includes a second active layer, and the third light-emitting unit includes a third active layer; the semiconductor structure also includes a first via, a second via, and a third via; the first via penetrates the pixel unit until the first active layer is exposed, and the first common electrode is filled in the first via; the second via penetrates the pixel unit until the second active layer is exposed, and the second common electrode is filled in the second via; the third via penetrates the pixel unit until the third active layer is exposed, and the third common electrode is filled in the third via.

[0009] In some embodiments, the depth of the first via hole is less than or equal to 8 um; the depth of the second via hole is less than or equal to 5 um; and the depth of the third via hole is less than or equal to 2 um.

[0010] In some embodiments, the distance between adjacent pixels is less than or equal to 2.5 um.

[0011] In some embodiments, the semiconductor structure further includes a first independent electrode, a second independent electrode, and a third independent electrode; the first independent electrode covers the top and bottom surfaces of the first light-emitting unit, the second independent electrode at least covers the top surface of the second light-emitting unit, and the third independent electrode at least covers the top surface of the third light-emitting unit.

[0012] In some embodiments, the first independent electrode includes a first conductive portion, which is located at the center of multiple pixel points within a pixel unit; the second independent electrode includes a second conductive portion, which is located between adjacent pixel points along the first direction or the second direction within a pixel unit; the third independent electrode includes a third conductive portion, which is located between adjacent pixel points along the second direction or the first direction within a pixel unit.

[0013] In some embodiments, the second independent electrode further covers the bottom surface of the second light-emitting unit, and the third independent electrode further covers the bottom surface of the third light-emitting unit.

[0014] In some embodiments, the pixel unit further includes a bonding layer, and the bonding layer is located between the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit.

[0015] In some embodiments, a plurality of lenses are further included, and the plurality of lenses are located on the pixel points and are arranged in a one-to-one correspondence with the pixel points.

[0016] The embodiments of the present disclosure have the following advantages:

[0017] In the embodiment of the present disclosure, a common electrode is formed surrounding the pixel unit, and the common electrode includes a first common electrode, a second common electrode and a third common electrode. The first common electrode extends along the first direction and the second direction, the second common electrode is arranged alternately with the first common electrode along the first direction and extends along the second direction, and the third common electrode is arranged alternately with the first common electrode along the second direction and extends along the first direction. In this way, the first common electrode, the second common electrode and the third common electrode can form a mesh-like common electrode, which can reduce the spacing between pixels and increase the aperture ratio, thereby effectively improving device performance. At the same time, it also provides a margin for process preparation and significantly reduces the process difficulty. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0019] Figure 1 is a schematic diagram of a pixel structure in the related art;

[0020] Figure 2 A schematic top view of a semiconductor structure provided in one embodiment of the present disclosure;

[0021] Figure 3 A schematic top view of a pixel unit in a semiconductor structure provided in one embodiment of the present disclosure;

[0022] Figure 4 is an enlarged schematic diagram of a top view of a semiconductor structure provided in one embodiment of the present disclosure;

[0023] Figure 5 In one embodiment of the present disclosure Figure 4 A schematic cross-sectional view of the structure shown along the AA' direction;

[0024] Figure 6 In one embodiment of the present disclosure Figure 4 Schematic cross-sectional view of the structure shown along the BB' direction;

[0025] Figure 7 In one embodiment of the present disclosure Figure 4 Schematic cross-sectional view of the structure along CC' direction;

[0026] Figure 8 In one embodiment of the present disclosure Figure 4Schematic cross-sectional view of the structure shown along the DD' direction;

[0027] Figure 9 In another embodiment of the present disclosure Figure 4 Schematic cross-sectional view of the structure along the AA' direction.

[0028] Description of reference numerals:

[0029] 10. Pixel unit; 101. Pixel point; 11. First light-emitting unit; 111. First active layer; 12. Second light-emitting unit; 121. Second active layer; 13. Third light-emitting unit; 131. Third active layer; 20. Common electrode; 21. First common electrode; 22. Second common electrode; 23. Third common electrode; 30. Common electrode via; 31. First via; 32. Second via; 33. Third via; 41. First independent electrode; 411. First conductive portion; 42. Second independent electrode; 421. Second conductive portion; 43. Third independent electrode; 431. Third conductive portion; 50. Bonding layer; 60. Lens. DETAILED DESCRIPTION

[0030] To facilitate understanding of the present disclosure, a more comprehensive description of the present disclosure will be provided below with reference to the accompanying drawings. The drawings illustrate preferred embodiments of the present disclosure. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present disclosure.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art in the art of the present disclosure. The terms used herein in the specification of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure.

[0032] The term "and / or" as used herein includes any and all combinations of one or more of the related listed items. When using "including," "having," and "comprising" as described herein, another component may be added unless a clear limiting term, such as "only," "consisting of," etc., is used. Unless otherwise mentioned, a term in the singular form may include a plural form and is not to be understood as being one in number.

[0033] It should be understood that although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of this disclosure.

[0034] In the description of this disclosure, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they may refer to fixed connections, detachable connections, or integral connections; they may refer to direct connections, indirect connections through an intermediate medium, or internal communication between two components. Those skilled in the art will understand the specific meanings of these terms in this disclosure based on the specific circumstances.

[0035] Please refer to Figures 2 to 9 It should be noted that the illustrations provided in this embodiment are only used to schematically illustrate the basic concept of the present disclosure. Although the illustrations only show components related to the present disclosure and are not drawn according to the number, shape and size of components in actual implementation, the type, quantity and proportion of each component in actual implementation can be changed arbitrarily, and the component layout type may also be more complicated.

[0036] Please refer to Figure 1 In the related art of vertically stacking pixel units 10, due to process difficulties and bottlenecks that result in a certain loss of characteristic uLEDs, it is necessary to provide electrode leads for each pixel. Specifically, when the pixel structure includes a stacked first, second, and third light-emitting units 11, 12, and 13, separate first, second, and third independent electrodes 41, 42, 43 are required to connect to the active layers of the first, second, and third light-emitting units 11, 12, and 13, respectively. Meanwhile, the common electrode 20 needs to connect to the active layers of the first, second, and third light-emitting units 11, 12, and 13, resulting in a multi-layered stepped topography of the electrodes. Furthermore, because the pixel structure also includes a bonding layer 50 between the light-emitting units, the overall stacking thickness of the pixel structure is relatively high. Furthermore, to meet pixel density requirements (pixels per inch (PPI)), the resulting structure has very short steps and a wide pixel pitch. Furthermore, due to process limitations, the effective light-emitting area of the pixel structure is also small, which affects device performance. Therefore, the supporting film forming, photolithography and etching processes are extremely difficult, especially the common electrode via 30 needs to pass through the entire pixel structure, resulting in a large etching depth-to-width ratio and greater process difficulty.

[0037] Please refer to Figure 2 According to some embodiments, the present disclosure provides a semiconductor structure. The semiconductor structure can be used as an LED pixel structure, particularly a uLED pixel structure, and further applied to the display field, for example, in a display panel, which can be a liquid crystal display panel.

[0038] The semiconductor structure includes a substrate (not shown), pixel units 10 and common electrodes 20. The pixel units 10 are located on the substrate and arranged in an array; the common electrodes 20 surround the pixel units 10 and are connected to the pixel units 10; the common electrodes 20 include a first common electrode 21, a second common electrode 22 and a third common electrode 23; the first common electrode 21 extends along the first direction and the second direction; the second common electrode 22 is arranged alternately with the first common electrode 21 along the first direction and extends along the second direction; the third common electrode 23 is arranged alternately with the first common electrode 21 along the second direction and extends along the first direction.

[0039] It should be noted that the first direction is Figure 2 The Y direction is shown, and the second direction is Figure 2 In the X direction shown, the first direction intersects the second direction. For example, the first direction and the second direction are perpendicular to each other.

[0040] In the semiconductor structure of the above embodiment, a common electrode 20 is formed surrounding the pixel unit 10, and the common electrode 20 includes a first common electrode 21, a second common electrode 22 and a third common electrode 23. The first common electrode 21 extends along the first direction and the second direction, the second common electrode 22 is arranged alternately with the first common electrode 21 along the first direction and extends along the second direction, and the third common electrode 23 is arranged alternately with the first common electrode 21 along the second direction and extends along the first direction; in this way, the first common electrode 21, the second common electrode 22 and the third common electrode 23 can form a mesh-like common electrode 20, which can reduce the spacing between pixels and increase the aperture ratio, thereby effectively improving device performance, while also providing a margin for process preparation and significantly reducing the process difficulty.

[0041] In order to more clearly illustrate the semiconductor structures provided by the above embodiments, Figures 2 to 9 Understand some embodiments of the present disclosure.

[0042] For example, the substrate can be made of a semiconductor material, an insulating material, a conductive material, or any combination thereof. The substrate is a semiconductor structure that provides mechanical support and electrical performance for the manufacture of semiconductor devices. The substrate can be a single-layer structure or a multi-layer structure. For example, the substrate can be a III / V semiconductor substrate or a II / VI semiconductor substrate. Those skilled in the art can select the type of substrate based on the type of structure formed on the substrate, and therefore the type of substrate should not limit the scope of protection of the present disclosure.

[0043] For example, the constituent materials of the common electrode 20 include, but are not limited to, one or more of conductive polysilicon, metal, conductive metal nitride, conductive metal oxide and metal silicide. For example, the metal may be tungsten (W), nickel (Ni), copper (Cu), aluminum (Al), molybdenum (Mo), ruthenium (Ru), tantalum (Ta) or titanium (Ti); the conductive metal nitride includes titanium nitride (TiN); the conductive metal oxide includes iridium oxide (IrO2); and the metal silicide includes tungsten silicon (WSi).

[0044] Furthermore, the common electrode 20 may be made of a transparent conductive material or a colorless conductive material, thereby reducing light blocking, thereby improving the luminous efficiency of the pixel unit 10 and effectively enhancing the performance of the pixel device.

[0045] Figure 3 FIG. 1 shows a top view of a pixel unit 10 in a semiconductor structure. It should be noted that: Figure 3 The top view direction of the top view shown is perpendicular to both the first direction and the second direction. Figure 3 Only a top view of one pixel unit 10 is illustrated, and a portion of the common electrode 20 surrounding the pixel unit 10 in a corresponding area is also shown.

[0046] Combine Figure 3 It is understood that in some embodiments, the pixel unit 10 includes a plurality of pixel points 101 arranged in an array. When the mesh common electrode 20 of the embodiment of the present disclosure is adopted, the pixel spacing (PixelSpace) of the pixel points 101 in the pixel unit 10 can be reduced by at least 17% compared to the related art. Here, the pixel spacing can be understood as the actual distance between adjacent pixel points 101, that is, it can be understood as the spacing between the opposite side walls of adjacent pixel points 101. The pixel spacing is an important parameter for measuring image resolution and the fineness of the display device. In the embodiment of the present disclosure, by reducing the pixel spacing, higher resolution and pixel density can be achieved.

[0047] For example, a pixel unit 10 includes four pixel points 101 arranged in an array. Here, the array arrangement of the four pixel points 101 can be embodied as two pixel points 101 arranged in a row and two pixel points 101 arranged in a column, thereby forming a two-row and two-column matrix of pixel points 101. Hereinafter, the embodiments of the present disclosure are explained using an example in which a pixel unit 10 includes four pixel points 101 arranged in an array.

[0048] In some embodiments, the distance between adjacent pixels 101 is less than or equal to 2.5 μm. Here, the distance between adjacent pixels 101 can be understood as the spacing between the opposite side walls of adjacent pixels 101, that is, the pixel spacing described above. For example, the distance between adjacent pixels 101 can be 2.5 μm, 2.4 μm, 2.3 μm, 2.2 μm, 2.1 μm, or 2 μm. In this way, the mesh common electrode 20 is formed by the first common electrode 21, the second common electrode 22, and the third common electrode 23, which reduces the spacing between the pixels 101, thereby improving the aperture ratio.

[0049] It can be understood that the aperture ratio represents the ratio of the effective light-emitting area of a pixel to the overall pixel area. The higher the aperture ratio, the lower the current density corresponding to the pixel device's light-emitting operation under the same brightness conditions, the slower the device decay, and the longer the product lifespan. Therefore, pixel devices need to maximize the light-emitting area to improve the pixel aperture ratio. In related art, the epitaxial chip thickness of a monochrome pixel structure is typically 2μm, and the pixel spacing is 1μm, or 0.5μm on a single side. Therefore, the pixel spacing of a three-color pixel structure is typically greater than 3μm. If the pixel pitch of a three-color pixel structure is 4μm, the aperture ratio of the pixel structure is only 6%. However, in the embodiment of the present disclosure, when the distance between adjacent pixels 101 is 2.5μm, if the pixel pitch is also 4μm, the aperture ratio of the embodiment of the present disclosure can be increased to 14%. In other words, the aperture ratio of the embodiment of the present disclosure can be increased by more than 100% compared to the related art, thereby effectively improving device performance.

[0050] It should be noted that the pixel pitch here can be understood as the distance between the centers of adjacent pixel points 101. The pixel pitch can be used to characterize the pixel density of the display device and can also be used to measure the clarity and resolution of the display device.

[0051] Moreover, since the distance between adjacent pixel points 101 in the embodiment of the present disclosure is small and the aperture ratio of the pixel unit 10 is large, the process preparation margin is also improved when preparing the semiconductor structure of the present disclosure, and the preparation fault tolerance is improved, thereby significantly reducing the process difficulty and facilitating improving the product yield.

[0052] Combine Figure 4 To understand, Figure 4 An enlarged schematic diagram of a top view of a semiconductor structure provided in one embodiment of the present disclosure is shown. In some embodiments, the semiconductor structure further includes a first independent electrode 41 , a second independent electrode 42 and a third independent electrode 43 .

[0053] For example, the constituent materials of the first independent electrode 41 , the second independent electrode 42 and the third independent electrode 43 may also include, but are not limited to, one or more of conductive polysilicon, metal, conductive metal nitride, conductive metal oxide and metal silicide.

[0054] Furthermore, the first independent electrode 41 , the second independent electrode 42 and the third independent electrode 43 may also be made of transparent conductive material or colorless conductive material to reduce light blocking, thereby improving the luminous efficiency of the pixel unit 10 and effectively improving the performance of the pixel device.

[0055] In some embodiments, the first independent electrode 41 includes a first conductive portion 411, which is located at the center of multiple pixel points 101 within a pixel unit 10; the second independent electrode 42 includes a second conductive portion 421, which is located between adjacent pixel points 101 along the first direction or the second direction within a pixel unit 10; the third independent electrode 43 includes a third conductive portion 431, which is located between adjacent pixel points 101 along the second direction or the first direction within a pixel unit 10.

[0056] It should be noted that, for a pixel unit 10, when the second conductive portion 421 is located between pixel points 101 adjacent along the first direction, the third conductive portion 431 is located between pixel points 101 adjacent along the second direction. Correspondingly, when the second conductive portion 421 is located between pixel points 101 adjacent along the second direction, the third conductive portion 431 is located between pixel points 101 adjacent along the first direction.

[0057] It should also be noted that in adjacent pixel units 10, the positional relationship between the second conductive portion 421, the third conductive portion 431, and the pixel points is opposite. That is, when, in a first pixel unit 10, the second conductive portion 421 is located between pixel points 101 adjacent along the first direction, and the third conductive portion 431 is located between pixel points 101 adjacent along the second direction, in the remaining adjacent pixel units 10, the second conductive portion 421 is located between pixel points 101 adjacent along the second direction, and the third conductive portion 431 is located between pixel points 101 adjacent along the first direction. Here, the remaining pixel units 10 adjacent to the first pixel unit 10 can be understood as pixel units 10 adjacent to the first pixel unit 10 in the first direction or in the second direction, or can also be understood as pixel units 10 adjacent to the first pixel unit 10 in the row and column directions.

[0058] Figure 5 In one embodiment, Figure 4 The schematic cross-sectional view of the structure shown along the AA' direction. It should be noted that: Figure 5The cross-sectional direction of the structure shown is consistent with the second direction, i.e. Figure 5 The X direction shown is parallel, that is, Figure 5 The cross-sectional orientation of the structure shown is similar to Figure 4 The top-down directions of the structures shown are perpendicular to each other.

[0059] Combine Figure 5 For understanding, for example, the pixel point 101 includes a first light-emitting unit 11, a second light-emitting unit 12 and a third light-emitting unit 13 stacked in sequence from bottom to top along the thickness direction of the substrate; the first light-emitting unit 11 is electrically connected to the first common electrode 21; the second light-emitting unit 12 is electrically connected to the second common electrode 22, and the third light-emitting unit 13 is electrically connected to the third common electrode 23.

[0060] It should be noted that the thickness direction of the substrate is Figure 5 In the Z direction shown, the substrate thickness direction and the first direction are perpendicular to each other.

[0061] For example, the first light-emitting unit 11, the second light-emitting unit 12 and the third light-emitting unit 13 may include photodiodes. The photodiode has the characteristics of forward conduction and reverse cutoff. The reverse characteristic also has the characteristics of a capacitor. When a reverse bias voltage is applied to the diode, the capacitor will be charged. When the capacitor is fully charged, the injection of photons will cause new electron-hole pairs to be excited inside, which will be paired and discharged with the electron-hole pairs formed by the original charge to form a photocurrent. The photocurrent charges the capacitor and turns it into a voltage output, thereby realizing the conversion of optical signals and electrical signals.

[0062] For example, the first light-emitting unit 11 includes a red light-emitting unit, the second light-emitting unit 12 includes a blue light-emitting unit, and the third light-emitting unit 13 includes a green light-emitting unit; a current is applied to the first light-emitting unit 11 through the first independent electrode 41 to perform a light-emitting action, a current is applied to the second light-emitting unit 12 through the second independent electrode 42 to perform a light-emitting action, and a current is applied to the third light-emitting unit 13 through the third independent electrode 43 to perform a light-emitting action, that is, the first light-emitting unit 11, the second light-emitting unit 12 and the third light-emitting unit 13 perform a light-emitting action by the currents independently provided by the first independent electrode 41, the second independent electrode 42 and the third independent electrode 43, so that the light formed in the red, blue and green light-emitting units are mixed to form a specific color.

[0063] Please continue to combine Figure 5 For example, the first independent electrode 41 covers the top and bottom surfaces of the first light-emitting unit 11 , the second independent electrode 42 at least covers the top surface of the second light-emitting unit 12 , and the third independent electrode 43 at least covers the top surface of the third light-emitting unit 13 .

[0064] In some embodiments, the first light emitting unit 11 includes a first active layer 111 , the second light emitting unit 12 includes a second active layer 121 , and the third light emitting unit 13 includes a third active layer 131 .

[0065] For example, the first active layer 111 is a P-type active layer, and the first light-emitting unit 11 may further include a quantum well layer and an N-type active layer, wherein the quantum well layer may serve as a light-emitting layer. Accordingly, the second active layer 121 is also a P-type active layer, and the second light-emitting unit 12 may further include a quantum well layer and an N-type active layer. The third active layer 131 is also a P-type active layer, and the third light-emitting unit 13 may further include a quantum well layer and an N-type active layer.

[0066] In some embodiments, the pixel unit further includes a bonding layer 50 , and the bonding layer 50 is located between the first light emitting unit 11 , the second light emitting unit 12 , and the third light emitting unit 13 .

[0067] Figure 6 In one embodiment, Figure 4 The cross-sectional view of the structure shown along the BB' direction is as follows: Figure 6 The cross-sectional direction of the structure shown is consistent with the second direction, i.e. Figure 6 The X direction shown is parallel, that is, Figure 6 The cross-sectional orientation of the structure shown is similar to Figure 4 The top-down directions of the structures shown are perpendicular to each other.

[0068] Figure 7 In one embodiment, Figure 4 Schematic cross-sectional view of the structure shown along CC' direction, Figure 8 In one embodiment, Figure 4 The cross-sectional view of the structure shown along the DD' direction is as follows: Figure 7 and Figure 8 The cross-sectional direction of the structure shown is consistent with the first direction, i.e. Figure 7 or Figure 8 The Y direction shown is parallel, that is, Figure 7 and Figure 8 The cross-sectional orientation of the structure shown is similar to Figure 4 The top-down directions of the structures shown are perpendicular to each other.

[0069] Combine Figures 5 to 8For understanding, for example, the semiconductor structure further includes a first via 31, a second via 32 and a third via 33; the first via 31 penetrates the pixel unit 10 until the first active layer 111 is exposed, and the first common electrode 21 is filled in the first via 31; the second via 32 penetrates the pixel unit 10 until the second active layer 121 is exposed, and the second common electrode 22 is filled in the second via 32; the third via 33 penetrates the pixel unit 10 until the third active layer 131 is exposed, and the third common electrode 23 is filled in the third via 33.

[0070] It can be understood that in the disclosed embodiment, by forming a mesh common electrode 20 composed of the first common electrode 21, the second common electrode 22, and the third common electrode 23, the etching depths of the first via holes 31, the second via holes 32, and the third via holes 33 are reduced, thereby reducing the difficulty of the etching process. Specifically, the first via hole 31 does not need to penetrate into the first conductive portion 411 of the first independent electrode 41 on the bottom surface of the first light-emitting unit 11; it only needs to be etched to the first active layer 111 to form the first common electrode 21, thereby reducing the etching depth of the first via hole 31.

[0071] In some embodiments, the depth of the first via 31 is less than or equal to 8um, for example, the depth of the first via 31 is 8um, 7.9um, 7.8um, 7.7um, 7.6um or 7.5um, etc.; the depth of the second via 32 is less than or equal to 5um, for example, the depth of the second via 32 is 5um, 4.9um, 4.8um, 4.7um, 4.6um or 4.5um, etc.; the depth of the third via 33 is less than or equal to 2um, for example, the depth of the third via 33 is 2um, 1.9um, 1.8um, 1.7um, 1.6um or 1.5um, etc.

[0072] Understandable, combined Figure 1 In the related art shown, the common electrode via 30 in the pixel structure is usually etched through the entire pixel structure, resulting in a relatively deep common electrode via 30. For example, in a typical pixel structure, the total stack thickness of the three-color light-emitting unit and the bonding layer 50 therebetween is 9 μm, so the etching depth of the pixel structure is also 9 μm. In this case, the pixel spacing on a single side in the pixel structure is 1.5 μm. However, in the embodiment of the present disclosure, due to the use of a mesh common electrode 20 composed of a first common electrode 21, a second common electrode 22, and a third common electrode 23, the first via 31, the second via 32, and the third via 33 do not need to etch the entire stack structure, so that their etching depths are reduced.

[0073] Specifically, the depth of the first via hole 31 is less than or equal to 8um, and its etching depth can be reduced by at least 1um compared with the related art, and at the same time, it can save at least 0.16um of pixel spacing; accordingly, the depth of the second via hole 32 is less than or equal to 5um, and its etching depth can be reduced by at least 3um compared with the related art, and at the same time, it can save at least 0.67um of pixel spacing; the depth of the third via hole 33 is less than or equal to 2um, and its etching depth can be reduced by at least 2um compared with the related art, and at the same time, it can save at least 1.17um of pixel spacing. That is to say, in the embodiment where the pixel unit 10 includes 4 pixel points 101, the pixel spacing that can be saved by a single pixel unit 10 can be at least 2um, and the average pixel spacing saved for each pixel point 101 can be at least 0.5um, thereby reducing the pixel spacing of the pixel points 101 in the embodiment of the present disclosure from the pixel spacing of 3um in the three-color pixel structure in the related art to below 2.5um, and the aperture ratio can be increased to 14%. That is, the aperture ratio of the embodiment of the present disclosure can be increased by more than 1 times compared with the related art, thereby effectively improving the device performance.

[0074] In some embodiments, multiple lenses 60 are further included, and the multiple lenses 60 are located on the pixel points 101 and are arranged one-to-one with the pixel points 101. The lenses 60 can receive light signals and focus the light signals on the photosensitive device. In other words, the function of the lenses 60 is to focus light to form an image of the scene on the photosensitive device. In order to obtain clear imaging and reduce aberrations, the lenses 60 can also be in the form of a combination of multiple lenses. Those skilled in the art can adjust the lenses 60 as needed to obtain a desired focal length.

[0075] Figure 9 Another embodiment is shown Figure 4 The schematic cross-sectional view of the structure shown along the AA' direction. It should be noted that: Figure 9 The cross-sectional direction of the structure shown is consistent with the second direction, i.e. Figure 9 The X direction shown is parallel, that is, Figure 9 The cross-sectional orientation of the structure shown is similar to Figure 4 The top-down directions of the structures shown are perpendicular to each other.

[0076] Please combine Figure 9 It is understood that in some embodiments, the second independent electrode 42 also covers the bottom surface of the second light-emitting unit 12, and the third independent electrode 43 also covers the bottom surface of the third light-emitting unit 13, so as to increase the conductivity between the second light-emitting unit 12 and the third light-emitting unit 13, and also increase the conductivity between them and other structures such as the first light-emitting unit 11.

[0077] Please note that the above embodiments are for illustrative purposes only and are not intended to limit the present disclosure.

[0078] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0079] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0080] The above embodiments merely illustrate several implementation methods of the present disclosure. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the disclosed patent. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the scope of the present disclosure, all of which fall within the scope of protection of the present disclosure.

Claims

1. A semiconductor structure, characterized in that The device comprises a substrate, pixel units arranged in an array on the substrate, and a common electrode, wherein the common electrode surrounds the pixel units and is connected to the pixel units; The common electrode includes a first common electrode, a second common electrode and a third common electrode; the first common electrode extends along the first direction and the second direction; the second common electrode is arranged alternately with the first common electrode along the first direction and extends along the second direction; the third common electrode is arranged alternately with the first common electrode along the second direction and extends along the first direction; the first direction intersects with the second direction.

2. The semiconductor structure according to claim 1, wherein: The pixel unit includes a plurality of pixel points arranged in an array; the pixel points include a first light-emitting unit, a second light-emitting unit, and a third light-emitting unit stacked in sequence from bottom to top along the thickness direction of the substrate; The first light emitting unit is electrically connected to the first common electrode; the second light emitting unit is electrically connected to the second common electrode; and the third light emitting unit is electrically connected to the third common electrode.

3. The semiconductor structure according to claim 2, wherein: The first light emitting unit includes a first active layer, the second light emitting unit includes a second active layer, and the third light emitting unit includes a third active layer; The semiconductor structure further includes a first via hole, a second via hole, and a third via hole; the first via hole passes through the pixel unit until the first active layer is exposed, and the first common electrode is filled in the first via hole; The second via hole passes through the pixel unit until the second active layer is exposed, and the second common electrode is filled in the second via hole; The third via hole passes through the pixel unit until the third active layer is exposed, and the third common electrode is filled in the third via hole.

4. The semiconductor structure according to claim 3, wherein: The depth of the first via hole is less than or equal to 8 μm; The depth of the second via hole is less than or equal to 5 μm; The depth of the third via hole is less than or equal to 2 μm.

5. The semiconductor structure according to claim 2, wherein: The distance between adjacent pixels is less than or equal to 2.5 μm.

6. The semiconductor structure according to claim 2, wherein: The semiconductor structure further includes a first independent electrode, a second independent electrode and a third independent electrode; The first independent electrode covers the top and bottom surfaces of the first light-emitting unit, the second independent electrode at least covers the top surface of the second light-emitting unit, and the third independent electrode at least covers the top surface of the third light-emitting unit.

7. The semiconductor structure according to claim 6, wherein: The first independent electrode includes a first conductive portion, and the first conductive portion is located at the center of the plurality of pixels in one pixel unit; The second independent electrode includes a second conductive portion, and the second conductive portion is located between the adjacent pixels along the first direction or the second direction in one pixel unit; The third independent electrode includes a third conductive portion, and the third conductive portion is located between the adjacent pixels along the second direction or the first direction in one pixel unit.

8. The semiconductor structure according to claim 7, wherein: The second independent electrode also covers the bottom surface of the second light-emitting unit, and the third independent electrode also covers the bottom surface of the third light-emitting unit.

9. The semiconductor structure according to any one of claims 2 to 8, wherein: The pixel unit further includes a bonding layer, and the bonding layer is located between the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit.

10. The semiconductor structure according to any one of claims 2 to 8, wherein: It also includes a plurality of lenses, which are located on the pixel points and are arranged in a one-to-one correspondence with the pixel points.

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