Wireless communication method, terminal device and network device

Abstract

Provided are a wireless communication method, a terminal device and a network device, the terminal device reporting an index of Q TD base vectors in a first UCI, that is, the first UCI can reflect a time-varying characteristic of a channel within a period of time, so that the network device can perform downlink transmission based on the first UCI, thereby facilitating improvement of transmission performance. The wireless communication method comprises the following steps: a terminal device sends a first UCI; wherein the first UCI comprises indexes of L SD base vectors, indexes of Mv FD base vectors and indexes of Q TD base vectors; wherein the SD base vector is a two-dimensional DFT vector with the length of N1N2, the FD base vector is a DFT vector with the length of N3, the TD base vector is a DFT vector with the length of N4, and N1, N2, N3, N4, L, Mv and Q are all positive integers.

Description

Wireless communication method, terminal device and network device Technical Field

[0001] The embodiments of the present application relate to the field of communications, and specifically to a wireless communication method, terminal device, and network device. Background Art

[0002] In New Radio (NR) systems, terminal devices can report a Precoding Matrix Indicator (PMI) to network equipment. Furthermore, the network equipment can use the codebook corresponding to the PMI for downlink transmission. However, because the PMI does not well reflect the downlink channel state, performance loss occurs at low and medium Doppler shifts. Therefore, improving downlink transmission performance is an urgent problem.

[0003] Summary of the Invention

[0004] The present application provides a wireless communication method, terminal device, and network device. The terminal device reports the indices of Q TD basis vectors in a first UCI. That is, the first UCI can reflect the time-varying characteristics of the channel over a period of time. Therefore, the network device can perform downlink transmission based on the first UCI, which is beneficial to improving transmission performance.

[0005] In a first aspect, a wireless communication method is provided, comprising:

[0006] The terminal device sends first uplink control information (Uplink Control Information, UCI);

[0007] The first UCI includes: L spatial domain (SD) basis vector indices, M v The indices of frequency domain (FD) basis vectors and the indices of Q time domain (TD) basis vectors;

[0008] Among them, the SD basis vector is a two-dimensional DFT vector of length N1N2, the FD basis vector is a DFT vector of length N3, the TD basis vector is a DFT vector of length N4, N1, N2, N3, N4, L, M v and Q are both positive integers.

[0009] In a second aspect, a wireless communication method is provided, including:

[0010] The network device receives a first UCI;

[0011] The first UCI includes: the indices of L SD basis vectors, Mv The indices of FD basis vectors and the indices of Q TD basis vectors;

[0012] Among them, the SD basis vector is a two-dimensional DFT vector of length N1N2, the FD basis vector is a DFT vector of length N3, the TD basis vector is a DFT vector of length N4, N1, N2, N3, N4, L, M v and Q are both positive integers.

[0013] In a third aspect, a terminal device is provided for executing the method in the above-mentioned first aspect or its various implementations.

[0014] Specifically, the terminal device includes a functional module for executing the method in the above-mentioned first aspect or its various implementation modes.

[0015] In a fourth aspect, a network device is provided for executing the method in the above second aspect or its various implementations.

[0016] Specifically, the network device includes a functional module for executing the method in the above-mentioned second aspect or its various implementation modes.

[0017] In a fifth aspect, a terminal device is provided, comprising a processor and a memory, wherein the memory is configured to store a computer program, and the processor is configured to call and execute the computer program stored in the memory to perform the method of the first aspect or its respective implementations.

[0018] In a sixth aspect, a network device is provided, comprising a processor and a memory, wherein the memory is configured to store a computer program, and the processor is configured to call and execute the computer program stored in the memory to perform the method of the second aspect or its respective implementations.

[0019] In a seventh aspect, a chip is provided for implementing the method in any one of the first to second aspects or their respective implementations.

[0020] Specifically, the chip includes: a processor for calling and running a computer program from a memory, so that a device equipped with the device executes the method in any one of the first to second aspects or their respective implementations.

[0021] In an eighth aspect, a computer-readable storage medium is provided for storing a computer program, which enables a computer to execute the method of any one of the first to second aspects or their respective implementations.

[0022] In a ninth aspect, a computer program product is provided, comprising computer program instructions, wherein the computer program instructions enable a computer to execute the method of any one of the first to second aspects or their respective implementations.

[0023] In a tenth aspect, a computer program is provided, which, when executed on a computer, enables the computer to execute the method of any one of the first to second aspects or their respective implementations.

[0024] Through the above technical solution, the terminal device can report the indices of Q TD basis vectors in the first UCI. In other words, the first UCI reported by the terminal device can reflect the time-varying characteristics of the channel over a period of time. Therefore, the network device can perform downlink transmission based on the first UCI, which is beneficial for improving transmission performance. Especially in the case of medium and low mobile speeds, the terminal device can predict the time-varying characteristics of the channel and report the TD basis vector information that can reflect the channel time-varying characteristics through the UCI, which can significantly improve system performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] FIG1 is a schematic diagram of a communication system architecture provided in an embodiment of the present application.

[0026] FIG. 2 is a schematic diagram of PMI feedback in the related art.

[0027] FIG3 is a schematic interaction diagram of a wireless communication method provided according to an embodiment of the present application.

[0028] FIG4 is a schematic diagram of an FD basis vector 0 (strongest coefficient) provided according to an embodiment of the present application.

[0029] FIG5 is a schematic block diagram of a terminal device provided according to an embodiment of the present application.

[0030] FIG6 is a schematic block diagram of a network device provided according to an embodiment of the present application.

[0031] FIG7 is a schematic block diagram of a communication device provided according to an embodiment of the present application.

[0032] FIG8 is a schematic block diagram of a chip provided according to an embodiment of the present application.

[0033] FIG9 is a schematic block diagram of a communication system provided according to an embodiment of the present application. DETAILED DESCRIPTION

[0034] The following will describe the technical solutions in the embodiments of this application in conjunction with the drawings in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of the embodiments. With respect to the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0035] The technical solutions of the embodiments of the present application can be applied to various communication systems, such as: Global System of Mobile communication (GSM) system, Code Division Multiple Access (CDMA) system, Wideband Code Division Multiple Access (WCDMA) system, General Packet Radio Service (GPRS), Long Term Evolution (LTE) system, Advanced Long Term Evolution (LTE-A) system, New Radio (NR) system, NR system evolution system, LTE on unlicensed spectrum (LTE-U) system, NR on unlicensed spectrum (NR-U) system, Non-Terrestrial Networks (NTN) system, Universal Mobile Telecommunication System (UMTS), Wireless Local Area Networks (WLAN), Wireless Fidelity (Wireless Fidelity) system. Fidelity, WiFi), fifth-generation communication (5th-Generation, 5G) system or other communication systems, etc.

[0036] Generally speaking, traditional communication systems support a limited number of connections and are easy to implement. However, with the development of communication technology, mobile communication systems will not only support traditional communications, but will also support, for example, device-to-device (D2D) communication, machine-to-machine (M2M) communication, machine-type communication (MTC), vehicle-to-vehicle (V2V) communication, or vehicle-to-everything (V2X) communication, etc. The embodiments of the present application can also be applied to these communication systems.

[0037] Optionally, the communication system in the embodiment of the present application can be applied to a carrier aggregation (CA) scenario, a dual connectivity (DC) scenario, or a standalone (SA) networking scenario.

[0038] Optionally, the communication system in the embodiment of the present application can be applied to an unlicensed spectrum, where the unlicensed spectrum can also be considered as a shared spectrum; or, the communication system in the embodiment of the present application can also be applied to an authorized spectrum, where the authorized spectrum can also be considered as an unshared spectrum.

[0039] The embodiments of the present application describe various embodiments in conjunction with network devices and terminal devices, wherein the terminal device may also be referred to as user equipment (UE), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication device, user agent or user device, etc.

[0040] The terminal device can be a station (ST) in a WLAN, a cellular phone, a cordless phone, a Session Initiation Protocol (SIP) phone, a Wireless Local Loop (WLL) station, a Personal Digital Assistant (PDA) device, a handheld device with wireless communication capabilities, a computing device or other processing device connected to a wireless modem, a vehicle-mounted device, a wearable device, a terminal device in a next-generation communication system such as an NR network, or a terminal device in a future evolved Public Land Mobile Network (PLMN) network, etc.

[0041] In an embodiment of the present application, the terminal device can be deployed on land, including indoors or outdoors, handheld, wearable or vehicle-mounted; it can also be deployed on the water surface (such as ships, etc.); it can also be deployed in the air (such as airplanes, balloons and satellites, etc.).

[0042] In an embodiment of the present application, the terminal device may be a mobile phone, a tablet computer, a computer with wireless transceiver function, a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a wireless terminal device in industrial control, a wireless terminal device in self-driving, a wireless terminal device in remote medical, a wireless terminal device in a smart grid, a wireless terminal device in transportation safety, a wireless terminal device in a smart city, or a wireless terminal device in a smart home, etc.

[0043] As an example and not a limitation, in the embodiment of the present application, the terminal device may also be a wearable device. Wearable devices may also be called wearable smart devices, which are a general term for wearable devices that are intelligently designed and developed using wearable technology for daily wear, such as glasses, gloves, watches, clothing, and shoes. A wearable device is a portable device that is worn directly on the body or integrated into the user's clothes or accessories. Wearable devices are not only hardware devices, but also achieve powerful functions through software support, data interaction, and cloud interaction. Broadly speaking, wearable smart devices include those that are fully functional, large in size, and can achieve complete or partial functions without relying on smartphones, such as smart watches or smart glasses, as well as those that only focus on a certain type of application function and need to be used in conjunction with other devices such as smartphones, such as various smart bracelets and smart jewelry for vital sign monitoring.

[0044] In an embodiment of the present application, the network device may be a device for communicating with a mobile device. The network device may be an access point (AP) in WLAN, a base station (BTS) in GSM or CDMA, a base station (NodeB, NB) in WCDMA, an evolved base station (eNB or eNodeB) in LTE, or a relay station or access point, or a vehicle-mounted device, a wearable device, and a network device (gNB) in an NR network, or a network device in a future evolved PLMN network or a network device in an NTN network, etc.

[0045] As an example and not a limitation, in an embodiment of the present application, the network device may have a mobile feature, for example, the network device may be a mobile device. Alternatively, the network device may be a satellite or a balloon station. For example, the satellite may be a low earth orbit (LEO) satellite, a medium earth orbit (MEO) satellite, a geostationary earth orbit (GEO) satellite, a high elliptical orbit (HEO) satellite, etc. Optionally, the network device may also be a base station set up in a location such as land or water.

[0046] In an embodiment of the present application, the network device can provide services for a cell, and the terminal device communicates with the network device through the transmission resources used by the cell (for example, frequency domain resources, or spectrum resources). The cell can be a cell corresponding to the network device (for example, a base station). The cell can belong to a macro base station or a base station corresponding to a small cell. The small cells here may include: metro cells, micro cells, pico cells, femto cells, etc. These small cells have the characteristics of small coverage and low transmission power, and are suitable for providing high-speed data transmission services.

[0047] For example, a communication system 100 used in an embodiment of the present application is shown in FIG1 . The communication system 100 may include a network device 110, which may be a device that communicates with a terminal device 120 (or a communication terminal or terminal). The network device 110 may provide communication coverage for a specific geographic area and may communicate with terminal devices within the coverage area.

[0048] FIG1 exemplarily shows a network device and two terminal devices. Optionally, the communication system 100 may include multiple network devices and each network device may include other numbers of terminal devices within its coverage area, which is not limited in this embodiment of the present application.

[0049] Optionally, the communication system 100 may further include other network entities such as a network controller and a mobility management entity, which is not limited in the embodiment of the present application.

[0050] It should be understood that in the embodiments of the present application, a device having a communication function in a network / system may be referred to as a communication device. Taking the communication system 100 shown in FIG1 as an example, the communication device may include a network device 110 and a terminal device 120 having a communication function. The network device 110 and the terminal device 120 may be the specific devices described above and will not be described in detail here. The communication device may also include other devices in the communication system 100, such as a network controller, a mobility management entity, and other network entities, which are not limited in the embodiments of the present application.

[0051] It should be understood that the terms "system" and "network" are often used interchangeably herein. The term "and / or" is simply a description of an association between related objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A exists alone, A and B exist simultaneously, or B exists alone. Furthermore, the character " / " generally indicates that the related objects are in an "or" relationship.

[0052] It should be understood that the "indication" mentioned in the embodiments of this application can be a direct indication, an indirect indication, or an indication of an association. For example, "A indicates B" can mean that A directly indicates B, for example, B can be obtained through A; it can also mean that A indirectly indicates B, for example, A indicates C, and B can be obtained through C; it can also mean that there is an association between A and B.

[0053] In the description of the embodiments of the present application, the term "corresponding" may indicate a direct or indirect correspondence between the two, or an association relationship between the two, or a relationship between indication and being indicated, configuration and being configured, etc.

[0054] In the embodiments of the present application, "pre-defined" may be implemented by pre-storing corresponding codes, tables, or other methods that can be used to indicate relevant information in a device (e.g., a terminal device or a network device). The present application does not limit the specific implementation method. For example, pre-defined may refer to information defined in a protocol.

[0055] In the embodiments of the present application, the "protocol" may refer to a standard protocol in the communication field, for example, it may include an LTE protocol, an NR protocol, and related protocols used in future communication systems, and this application does not limit this.

[0056] To facilitate understanding of the technical solutions of the embodiments of the present application, the following describes concepts related to the frequency-domain-spatial codebook.

[0057] In related technologies, for each layer of codebook, the frequency-domain-space codebook (also known as the NR type II codebook, or the frequency-domain-space joint codebook) is independently encoded in the frequency domain (each subband). Due to the high spatial quantization accuracy, the total feedback amount is too large. By feeding back the frequency-domain-space joint codebook, the feedback amount can be greatly reduced while ensuring NR performance.

[0058] The frequency-space codebook can be expressed as:

[0059]

[0060] Where W represents the frequency-domain-space codebook, W1 represents the discrete Fourier transform (DFT) vector of 2L spatial beams, and W f Represents M frequency-domain DFT basis vectors. Represents W f The transpose of . Represents the weighting coefficients of the spatial-frequency domain DFT vector pair. W1 is a matrix of size 2N1N2*2L, where N1 is the number of ports in the vertical direction and N2 is the number of ports in the horizontal direction. It is a 2L*M matrix, and the 2L value is The number of rows, M value is The number of columns. It is an M*N3 matrix, where N3 is the number of DFT basis vectors in the frequency domain.

[0061] When the terminal device feeds back the frequency-domain-spatial codebook to the network device, the content reported to the network device includes:

[0062] The DFT vectors of the L spatial beams of W1, W f The M frequency domain DFT basis vectors, and the quantized The network device obtains the channel state information (CSI) of each downlink layer by the product of the three.

[0063] In some scenarios, the network device can send a Channel State Information Reference Signal (CSI-RS) at time x. The UE determines the channel information at time x through the CSI-RS, which is recorded as Hx. It further calculates the corresponding precoding matrix indicator (PMI) based on the channel information, which is recorded as PMIx, and reports the PMIx to the network device. The network device then uses PMIx to send the Physical Downlink Shared Channel (PDSCH). The time when the PDSCH is sent is time y, and the channel information at this time is Hy. Due to the time-varying channel, PMIx cannot well reflect the channel state of Hy, affecting the downlink transmission performance.

[0064] Based on the above technical problems, the present application designs an uplink control information (UCI) reporting scheme, in which the terminal device reports the indices of Q TD basis vectors in the first UCI. That is, the first UCI can reflect the time-varying characteristics of the channel over a period of time. Therefore, the network device can perform downlink transmission based on the first UCI, which is conducive to improving transmission performance.

[0065] To facilitate understanding of the technical solutions of the embodiments of the present application, the technical solutions of the present application are described in detail below through specific embodiments. The following related technologies can be combined with the technical solutions of the embodiments of the present application as optional solutions, and they all fall within the scope of protection of the embodiments of the present application. The embodiments of the present application include at least part of the following contents.

[0066] FIG3 is a schematic interaction diagram of a wireless communication method 200 according to an embodiment of the present application. As shown in FIG3 , the wireless communication method 200 includes the following contents:

[0067] S210, the terminal device sends a first UCI; wherein the first UCI includes: indices of L SD basis vectors, M v The index of the FD basis vector, the index of the Q TD basis vector; wherein the SD basis vector is a two-dimensional DFT vector of length N1N2, the FD basis vector is a DFT vector of length N3, and the TD basis vector is a DFT vector of length N4, N1, N2, N3, N4, L, M v and Q are both positive integers;

[0068] S220: The network device receives the first UCI.

[0069] In some embodiments, the network device may perform downlink transmission based on the first UCI.

[0070] In an embodiment of the present application, a terminal device may report the indices of Q TD basis vectors in a first UCI. Since the first UCI contains the indices of Q TD basis vectors, it can reflect the time-varying characteristics of the channel over a period of time. Therefore, the network device can perform downlink transmission based on the first UCI, which is beneficial to improving transmission performance. Especially in the case of medium and low mobile speeds, the system performance can be significantly improved by predicting the time-varying characteristics of the channel by the terminal device and reporting the TD basis vector information reflecting the time-varying characteristics of the channel through the UCI.

[0071] In some embodiments, L may be predefined, or L may be determined based on higher-level parameters.

[0072] In some embodiments, M v Can be predefined, or, M v It is determined based on high-level parameters.

[0073] In some embodiments, Q may be predefined, or may be determined based on higher-level parameters, for example, Q is fixed to 2.

[0074] It should be noted that N1 represents the number of ports in the vertical direction, N2 represents the number of ports in the horizontal direction, N3 represents the total number of frequency domain basis vectors in the frequency domain, and N4 represents the total number of time domain basis vectors in the time domain.

[0075] In some embodiments, the indexes of the Q TD basis vectors are obtained by Bit reporting, where N is a positive integer.

[0076] In some embodiments, N=N4 / 2; or, N=N4; or, N=2Q. Optionally, the index of the candidate TD basis vector is a window of length N centered at 0, that is, the index of the candidate TD basis vector is [-N / 2, (N / 2)-1].

[0077] In some embodiments, N is predefined, or N is determined based on higher-level parameters.

[0078] In some embodiments, when Q=2, the indices of the Q TD basis vectors are fixed to 0 and N4-1.

[0079] In some embodiments, when rank v>1, the index of the TD basis vector of each layer in all layers indicated by the rank v is selected independently, or the index of the TD basis vector of each layer in all layers indicated by the rank v is the same.

[0080] In some embodiments, the first UCI includes a first bitmap;

[0081] The first bitmap is used to determine or indicate at least one of the following: indices of S SD-TD basis vector pairs, indices of S TD-FD basis vector pairs, indices of S SD-FD basis vector pairs, indices of S1 SD-TD basis vector pairs, indices of S2 TD-FD basis vector pairs, and at least one non-zero coefficient;

[0082] The TD-FD basis vector pair is composed of one of the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one FD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an FD basis vector among the L FD basis vectors and a TD basis vector among the Q TD basis vectors. The non-zero coefficient is composed of amplitude and phase, and S, S1 and S2 are all positive integers.

[0083] In some embodiments, S1 and S2 are predefined, or S1 and S2 are determined according to high-level parameters.

[0084] In some embodiments, S is reported by the terminal device, or S is determined based on higher layer parameters. For example, when S is reported by the terminal device, S is reported via the first part (part 1) of the first UCI.

[0085] Example 1: The length of the first bitmap is M v Q+2LS bits, where the length of the first bitmap is M v The Q-bit bitmap is used to determine or indicate the indexes of the S TD-FD basis vector pairs, and the bitmap with a length of 2LS bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

[0086] Specifically, in Example 1, the first bitmap may include two parts, one of which is M in length. v The first part is a bit map of Q bits, and the other part is a bit map of 2LS bits in length.

[0087] Optionally, in Example 1, in the first bitmap, S=M v .

[0088] For example, in Example 1, the value 1 in the first bitmap is used to indicate the index of the TD-FD basis vector pair, that is, the length of the first bitmap is M. v The Q-bit bitmap contains S 1s.

[0089] Example 2: The length of the first bitmap is 2LM v+SQ bits, where the length of the first bitmap is 2LM v The bitmap with a length of SQ bits in the first bitmap is used to determine or indicate the indexes of the S SD-FD basis vector pairs, and the bitmap with a length of SQ bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

[0090] Specifically, in Example 2, the first bitmap may include two parts, one of which is 2LM in length. v bits, and the other part is a bit map with a length of SQ bits.

[0091] For example, in Example 2, the first bitmap has a value of 1 to indicate the index of the SD-FD basis vector pair, that is, the length of the first bitmap is 2LM. v The bitmap of bits contains S 1s.

[0092] Alternatively, in Example 2, when rank v>1, 2vLM v The bitmap of bits is used to determine or indicate the index of the SD-FD basis vector pairs of all layers indicated by the rank v, where each layer of all layers indicated by the rank v has a length of 2LM v bits of bitmap.

[0093] Optionally, in Example 2, when rank v>1, a bitmap of SQv bits is used to determine or indicate the non-zero coefficients of all layers indicated by the rank v, wherein each layer of all layers indicated by the rank v corresponds to a bitmap of SQ bits in length.

[0094] Optionally, in the second bitmap, S=K0, where K0 is the number of non-zero coefficients configured by a higher layer.

[0095] Optionally, in Example 2, when rank v>1, a bitmap of SQ bits is used to determine or indicate the non-zero coefficients of all layers indicated by the rank v, where S=2K0, or, at the same time, the number of non-zero coefficients of each layer indicated by the rank v is less than or equal to K0, where K0 is the number of non-zero coefficients configured by the higher layer.

[0096] Example 3: The length of the first bitmap is 2LQ+SM v bits, wherein the bitmap with a length of 2LQ bits in the first bitmap is used to determine or indicate the index of the S SD-TD basis vector pairs, and the length of the first bitmap is SM v A bitmap of bits is used to determine or indicate the at least one non-zero coefficient.

[0097] Specifically, in Example 3, the first bitmap may include two parts, one part is a bitmap with a length of 2LQ bits, and the other part is a bitmap with a length of SM v bits of bitmap.

[0098] For example, in Example 3, the value 1 in the first bitmap is used to indicate the index of the SD-TD basis vector pair, that is, the bitmap with a length of 2LQ bits in the first bitmap contains S 1s.

[0099] Optionally, in Example 3, when the rank v>1, a bitmap of 2LQ bits is used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or a bitmap of 2LQv bits is used to determine or indicate the index of the SD-TD basis vector pair of all layers indicated by the rank v; and / or,

[0100] In the case of rank v>1, SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v (that is, through the length vSM v The bitmap of bits determines or indicates the non-zero coefficients of all layers indicated by the rank v).

[0101] Optionally, in Example 3, when the rank v>1, a bitmap of 2LQ bits is used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v; and / or,

[0102] In the case of rank v>1, SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v (that is, through the length vSM v The bitmap of bits determines or indicates the non-zero coefficients of all layers indicated by the rank v).

[0103] Optionally, in Example 3, in the third bitmap, S=2L, where 2L is the number of SD basis vectors configured by the higher layer.

[0104] Example 4: The length of the first bitmap is LQ+2SM v bits, wherein the bitmap with a length of LQ bits in the first bitmap is used to determine or indicate the index of the S SD-TD basis vector pairs, and the length of the first bitmap is 2SM v A bitmap of bits is used to determine or indicate the at least one non-zero coefficient.

[0105] Specifically, in Example 4, the first bitmap may include two parts, one part is a bitmap with a length of LQ bits, and the other part is a bitmap with a length of 2SM v bits of bitmap.

[0106] For example, in Example 4, the value 1 in the first bitmap is used to indicate the index of the SD-TD basis vector pair, that is, the bitmap with a length of LQ bits in the first bitmap contains S 1s.

[0107] Optionally, in Example 4, when the rank v>1, the bitmap of LQ bits is used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or the bitmap of LQv bits is used to determine or indicate the index of the SD-TD basis vector pair of all layers indicated by the rank v; and / or,

[0108] In the case of rank v>1, 2SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v (i.e., through a length of 2vSM v The bitmap of bits determines or indicates the non-zero coefficients of all layers indicated by the rank v).

[0109] Optionally, in Example 4, when the rank v>1, the bitmap of LQ bits is used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v; and / or,

[0110] In the case of rank v>1, 2SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v (i.e., through a length of 2vSM v The bitmap of bits determines or indicates the non-zero coefficients of all layers indicated by the rank v).

[0111] Optionally, in Example 4, in the first bitmap, S=L, where L is the number of SD basis vectors configured by the higher layer.

[0112] Example 5: The length of the first bitmap is S1S2+2LQ1+M v Q2 bits, where Q1Q2=Q;

[0113] The bitmap with a length of 2LQ1 bits in the first bitmap is used to determine or indicate the index of the S1 SD-TD basis vector pairs, and the bitmap with a length of M v The bitmap of Q2 bits is used to determine or indicate the indexes of the S2 TD-FD basis vector pairs, and the bitmap of S1S2 bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

[0114] Specifically, in Example 5, the first bitmap may include three parts, one part is a bitmap with a length of S1S2 bits, another part is a bitmap with a length of 2LQ1 bits, and another part is a bitmap with a length of M v A bitmap of Q2 bits.

[0115] Example 6: The length of the first bitmap is 2LM v Q bits, the first bitmap being used to determine or indicate the at least one non-zero coefficient corresponding to the index of the TD-FD-SD basis vector pair;

[0116] The TD-FD-SD basis vector pair is composed of one TD basis vector among the Q TD basis vectors, the M v It consists of one FD basis vector among the L FD basis vectors and one SD basis vector among the L SD basis vectors.

[0117] In some embodiments, the first bitmap is located in the second part (part2) of the first UCI.

[0118] In some embodiments, the first bitmap is located in at least one packet in the second portion of the first UCI.

[0119] In some embodiments, the first bitmap is mapped to the at least one packet according to a preconfigured priority order.

[0120] For example, the second part (part2) of the first UCI is divided into group 0, group 1, and group 2. Based on the pre-configured priority order, the bitmap information in the first bitmap can be mapped to group 0, group 1, and group 2 in descending order of priority. For example, in the above example 5, the length of the first bitmap is S1S2+2LQ1+M v Q2 bits, the bitmap of length 2LQ1 can be mapped to group 0, and the bitmap of length M v The bitmap of Q2 is mapped to group 1, and the bitmap of length S1S2 is mapped to group 2.

[0121] In some embodiments, the first UCI includes a first indication;

[0122] The first indication is used to determine or indicate at least one of the following: indices of S SD-TD basis vector pairs, indices of S TD-FD basis vector pairs, indices of S SD-FD basis vector pairs, indices of S1 SD-TD basis vector pairs, and indices of S2 TD-FD basis vector pairs;

[0123] The TD-FD basis vector pair is composed of one of the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one FD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an FD basis vector among the L FD basis vectors and a TD basis vector among the Q TD basis vectors, and S, S1 and S2 are all positive integers.

[0124] In some embodiments, S1 and S2 are predefined, or S1 and S2 are determined according to high-level parameters.

[0125] In some embodiments, S is reported by the terminal device, or S is determined based on higher layer parameters. For example, when S is reported by the terminal device, S is reported via the first part (part 1) of the first UCI.

[0126] Example 11, the length of the first indication bit is bits, and the first indication is used to determine or indicate the index of the S TD-FD basis vector pairs. Optionally, S=M v .

[0127] Example 12: The length of the first indication is bits, the first indication is used to determine or indicate the index of the S SD-FD basis vector pairs. Optionally, S=K0, K0 is the number of non-zero coefficients configured by the higher layer.

[0128] Example 13, the length of the first indication is bits, and the first indication is used to determine or indicate the indexes of the S SD-TD basis vector pairs.

[0129] Alternatively, in Example 13, in the case where rank v>1, bits are used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or, bits are used to determine or indicate the index of the SD-TD basis vector pairs of all layers indicated by the rank v, or, bits are used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v.

[0130] Optionally, in Example 13, S=2L, where 2L is the number of SD basis vectors configured by the high layer.

[0131] Example 14: The length of the first indication is bits, and the first indication determines or indicates the indexes of the S SD-TD basis vector pairs.

[0132] Alternatively, in Example 14, in the case where rank v>1, bits are used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or, bits are used to determine or indicate the index of the SD-TD basis vector pairs of all layers indicated by the rank v, or, bits are used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v.

[0133] Optionally, in Example 14, S=L, where L is the number of SD basis vectors configured by the high layer.

[0134] Example 15: The first indication includes first sub-information and / or second sub-information;

[0135] Among them, the length of the first sub-information is bits, and the first sub-information is used to determine or indicate the index of the S1 SD-TD basis vector pairs, and the length of the second sub-information is bits, the second sub-information is used to determine or indicate the indexes of the S2 TD-FD basis vector pairs, Q1Q2=Q.

[0136] In some embodiments, the first indication is located in a second portion of the first UCI.

[0137] In some embodiments, the first indication is located in at least one packet in the second portion of the first UCI.

[0138] In some embodiments, the first indication is mapped to the at least one group according to a preconfigured priority order.

[0139] For example, the second part (part 2) of the first UCI is divided into group 0, group 1, and group 2. Based on a preconfigured priority order, the bit information in the first indication can be mapped to group 0, group 1, and group 2, respectively, in descending order of priority. For example, in Example 15 above, the first sub-information can be mapped to group 0, and the second sub-information can be mapped to group 1.

[0140] In some embodiments, the first UCI further includes at least one non-zero coefficient; wherein the non-zero coefficient consists of amplitude and phase.

[0141] In some embodiments, the at least one non-zero coefficient is located in a second part (part2) of the first UCI.

[0142] In some embodiments, the at least one non-zero coefficient is located in at least one group in the second portion of the first UCI.

[0143] In some embodiments, the at least one non-zero coefficient is mapped to the at least one group in a preconfigured priority order.

[0144] In some embodiments, the network device pre-configures the priority order via Radio Resource Control (RRC) signaling.

[0145] For example, the second part (part 2) of the first UCI is divided into group 0, group 1, and group 2. Based on a pre-configured priority order, the non-zero coefficients can be mapped to group 0, group 1, and group 2 in descending order.

[0146] Optionally, group 0 may include at least one of the following: an index of an SD basis vector, an index of an FD basis vector, an index of a TD basis vector, and a length of M v A bitmap of length Q, a bitmap of length SQ, a bitmap of length 2LQ (used to determine the index of the SD-TD basis vector pair, the index of the SD-FD basis vector pair, the index of the TD-FD basis vector pair), and a bitmap of length 2LM v Bitmap of Q.

[0147] Optionally, group 1 may include at least one of the following: an index of an FD basis vector, an index of a TD basis vector, a length of M v Q bitmap, bitmap of length SQ, bitmap of 2LQ (used to determine the index of SD-TD basis vector pair, the index of SD-FD basis vector pair, the index of TD-FD basis vector pair), and the amplitude and phase of some or all non-zero coefficients, and some or all of the length 2LM v Q bitmap, bitmap of length 2LS, bitmap of length 2LM v The bitmap of length SM v The bitmap of .

[0148] Optionally, group 2 may include at least one of the following: the amplitude and phase of the remaining non-zero coefficients, and the remaining bitmap of length 2LS, the bitmap of length 2LM v The bitmap of length SMv The bitmap of .

[0149] For example, group 1 includes high priority Bitmap of group 2, group 2 includes low priority Where K, N, and Z are all positive integers, and the bitmap has a priority according to a predefined method.

[0150] For example, group 1 includes 2LM with TD basis vectors corresponding to 0. v Bitmap of group 2, group 2 includes 2LMs whose TD basis vectors are not 0 v The bitmap of the .

[0151] In some embodiments, the first UCI includes a strongest coefficient indication.

[0152] In some embodiments, the length indicated by the strongest coefficient is bits, the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, and / or the TD basis vector corresponding to the strongest coefficient is moved to TD0 by cyclic shift.

[0153] Optionally, the FD basis vector corresponding to the strongest coefficient can be the M v FD basis vectors among the FD basis vectors.

[0154] Optionally, the TD basis vector corresponding to the strongest coefficient may be a TD basis vector among the Q TD basis vectors.

[0155] In some embodiments, the length indicated by the strongest coefficient is bits, and the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, and bit determines the TD basis vector corresponding to the strongest coefficient, or, by The bits determine the TD basis vector corresponding to the strongest coefficient.

[0156] In some embodiments, the length indicated by the strongest coefficient is Bit, through Determine the SD basis vector corresponding to the strongest coefficient by The bit determines the FD basis vector corresponding to the strongest coefficient, through bit determines the TD basis vector corresponding to the strongest coefficient, or, by The bits determine the TD basis vector corresponding to the strongest coefficient.

[0157] Optionally, the SD basis vector corresponding to the strongest coefficient may be an SD basis vector among the L SD basis vectors.

[0158] In some embodiments, the length indicated by the strongest coefficient is Bit, through Determine the SD basis vector corresponding to the strongest coefficient by The bit determines the TD-FD basis vector pair corresponding to the strongest coefficient, or, by The bit determines the TD-FD basis vector pair corresponding to the strongest coefficient, S is a positive integer, and S = M v .

[0159] In some embodiments, the length indicated by the strongest coefficient is Bit, through The bits determine the SD-TD basis vector pair corresponding to the strongest coefficient, and the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, where S is a positive integer and S=2L.

[0160] In some embodiments, the length indicated by the strongest coefficient is Bit, through The bit determines the SD-FD basis vector pair corresponding to the strongest coefficient, and the TD basis vector corresponding to the strongest coefficient is moved to TD0 by cyclic shift. S is a positive integer, and S=K0, K0 is the number of non-zero coefficients configured by the high layer.

[0161] In some embodiments, the length indicated by the strongest coefficient is Bit, through The bit determines the SD-FD basis vector pair corresponding to the strongest coefficient, through bit determines the TD basis vector corresponding to the strongest coefficient, or, by The bit determines the TD basis vector corresponding to the strongest coefficient, S is a positive integer, and S=K0, K0 is the number of non-zero coefficients configured by the high layer.

[0162] In some embodiments, the TD-FD basis vector pair is formed by combining one of the Q TD basis vectors with the M v The SD-FD basis vector pair is composed of one FD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an FD basis vector among the L FD basis vectors and a TD basis vector among the Q TD basis vectors, and the non-zero coefficient is composed of amplitude and phase.

[0163] For example, FD basis vector 0 may be as shown in FIG4 , where the FD basis vector corresponding to the strongest coefficient (strongest) is located at FD0 .

[0164] In some embodiments, the strongest coefficient indication is located in the second portion of the first UCI.

[0165] In some embodiments, S is reported by the terminal device, or S is determined based on high-level parameters.

[0166] In some embodiments, when S is reported by the terminal device, S is reported through the first part of the first UCI.

[0167] Therefore, in an embodiment of the present application, the terminal device can report the indices of Q TD basis vectors in the first UCI. Since the first UCI contains the indices of Q TD basis vectors, it can reflect the time-varying characteristics of the channel over a period of time. Therefore, the network device can perform downlink transmission based on the first UCI, which is beneficial to improving transmission performance. Especially in the case of medium and low mobile speeds, the system performance can be significantly improved by predicting the time-varying characteristics of the channel through the terminal device and reporting the TD basis vector information reflecting the time-varying characteristics of the channel through the UCI.

[0168] The above, in combination with Figures 3 to 4, describes in detail the method embodiment of the present application. The following, in combination with Figures 5 to 9, describes in detail the device embodiment of the present application. It should be understood that the device embodiment and the method embodiment correspond to each other, and similar descriptions can refer to the method embodiment.

[0169] FIG5 shows a schematic block diagram of a terminal device 300 according to an embodiment of the present application. As shown in FIG5 , the terminal device 300 includes:

[0170] The communication unit 310 is configured to send first uplink control information UCI;

[0171] The first UCI includes: the indexes of L spatial domain SD basis vectors, M v The indices of frequency-domain FD basis vectors and the indices of Q time-domain TD basis vectors;

[0172] Among them, the SD basis vector is a two-dimensional discrete Fourier transform DFT vector of length N1N2, the FD basis vector is a DFT vector of length N3, the TD basis vector is a DFT vector of length N4, N1, N2, N3, N4, L, M v and Q are both positive integers.

[0173] In some embodiments, the indexes of the Q TD basis vectors are obtained by Bit reporting, where N is a positive integer.

[0174] In some embodiments, N=N4 / 2; or, N=N4; or, N=2Q.

[0175] In some embodiments, N is predefined, or N is determined based on higher-level parameters.

[0176] In some embodiments, the indices of the Q TD basis vectors are fixed.

[0177] In some embodiments, when Q=2, the indices of the Q TD basis vectors are fixed to 0 and N4-1.

[0178] In some embodiments, when rank v>1, the index of the TD basis vector of each layer in all layers indicated by the rank v is independently selected, or the index of the TD basis vector of each layer in all layers indicated by the rank v is the same.

[0179] In some embodiments, the first UCI includes a first bitmap;

[0180] The first bitmap is used to determine or indicate at least one of the following: indices of S SD-TD basis vector pairs, indices of S TD-FD basis vector pairs, indices of S SD-FD basis vector pairs, indices of S1 SD-TD basis vector pairs, indices of S2 TD-FD basis vector pairs, and at least one non-zero coefficient;

[0181] The TD-FD basis vector pair is composed of one of the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one FD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an FD basis vector among the L FD basis vectors and a TD basis vector among the Q TD basis vectors. The non-zero coefficient is composed of amplitude and phase, and S, S1 and S2 are all positive integers.

[0182] In some embodiments, the length of the first bitmap is M v Q+2LS bits, where the length of the first bitmap is M v The Q-bit bitmap is used to determine or indicate the indexes of the S TD-FD basis vector pairs, and the bitmap with a length of 2LS bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

[0183] In some embodiments, S=M v .

[0184] In some embodiments, the length of the first bitmap is 2LM v+SQ bits, where the length of the first bitmap is 2LM v The bitmap with a length of SQ bits in the first bitmap is used to determine or indicate the indexes of the S SD-FD basis vector pairs, and the bitmap with a length of SQ bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

[0185] In some embodiments, when rank v>1, 2vLM v The bitmap of bits is used to determine or indicate the index of the SD-FD basis vector pairs of all layers indicated by the rank v, where each layer of all layers indicated by the rank v has a length of 2LM v bits of bitmap.

[0186] In some embodiments, when rank v>1, a bitmap of SQv bits is used to determine or indicate the non-zero coefficients of all layers indicated by the rank v, wherein each layer of all layers indicated by the rank v corresponds to a bitmap of SQ bits in length.

[0187] In some embodiments, S=K0, where K0 is the number of non-zero coefficients configured by the higher layer.

[0188] In some embodiments, when the rank v>1, a bitmap of SQ bits is used to determine or indicate the non-zero coefficients of all layers indicated by the rank v, where S=2K0, or, at the same time, the number of non-zero coefficients of each layer indicated by the rank v is less than or equal to K0, and K0 is the number of non-zero coefficients configured by the high layer.

[0189] In some embodiments, the length of the first bitmap is 2LQ+SM v bits, wherein the bitmap with a length of 2LQ bits in the first bitmap is used to determine or indicate the index of the S SD-TD basis vector pairs, and the length of the first bitmap is SM v A bitmap of bits is used to determine or indicate the at least one non-zero coefficient.

[0190] In some embodiments, when the rank v>1, a 2LQ-bit bitmap is used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or a 2LQv-bit bitmap is used to determine or indicate the index of the SD-TD basis vector pair of all layers indicated by the rank v; and / or,

[0191] In the case of rank v>1, SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

[0192] In some embodiments, when the rank v>1, a 2LQ-bit bitmap is used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v; and / or,

[0193] In the case of rank v>1, SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

[0194] In some embodiments, S=2L, where 2L is the number of SD basis vectors configured by the higher layer.

[0195] In some embodiments, the length of the first bitmap is LQ+2SM v bits, wherein the bitmap with a length of LQ bits in the first bitmap is used to determine or indicate the index of the S SD-TD basis vector pairs, and the length of the first bitmap is 2SM v A bitmap of bits is used to determine or indicate the at least one non-zero coefficient.

[0196] In some embodiments, when the rank v>1, the bitmap of LQ bits is used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or the bitmap of LQv bits is used to determine or indicate the index of the SD-TD basis vector pair of all layers indicated by the rank v; and / or,

[0197] In the case of rank v>1, 2SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

[0198] In some embodiments, when the rank v>1, the LQ-bit bitmap is used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v; and / or,

[0199] In the case of rank v>1, 2SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

[0200] In some embodiments, S=L, where L is the number of SD basis vectors configured by the high layer.

[0201] In some embodiments, the length of the first bitmap is S1S2+2LQ1+M v Q2 bits, where Q1Q2=Q;

[0202] The bitmap with a length of 2LQ1 bits in the first bitmap is used to determine or indicate the index of the S1 SD-TD basis vector pairs, and the bitmap with a length of M vThe bitmap of Q2 bits is used to determine or indicate the indexes of the S2 TD-FD basis vector pairs, and the bitmap of S1S2 bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

[0203] In some embodiments, the length of the first bitmap is 2LM v Q bits, the first bitmap being used to determine or indicate the at least one non-zero coefficient corresponding to the index of the TD-FD-SD basis vector pair;

[0204] The TD-FD-SD basis vector pair is composed of one TD basis vector among the Q TD basis vectors, the M v It consists of one FD basis vector among the L FD basis vectors and one SD basis vector among the L SD basis vectors.

[0205] In some embodiments, the first bitmap is located in the second portion of the first UCI.

[0206] In some embodiments, the first bitmap is located in at least one packet in the second portion of the first UCI.

[0207] In some embodiments, the first bitmap is mapped to the at least one packet according to a preconfigured priority order.

[0208] In some embodiments, the first UCI includes a first indication;

[0209] The first indication is used to determine or indicate at least one of the following: indices of S SD-TD basis vector pairs, indices of S TD-FD basis vector pairs, indices of S SD-FD basis vector pairs, indices of S1 SD-TD basis vector pairs, and indices of S2 TD-FD basis vector pairs;

[0210] The TD-FD basis vector pair is composed of one of the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one FD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an FD basis vector among the L FD basis vectors and a TD basis vector among the Q TD basis vectors, and S, S1 and S2 are all positive integers.

[0211] In some embodiments, the length of the first indication bit is bits, and the first indication is used to determine or indicate the indexes of the S TD-FD basis vector pairs.

[0212] In some embodiments, S=Mv .

[0213] In some embodiments, the length of the first indication is bits, and the first indication is used to determine or indicate the indexes of the S SD-FD basis vector pairs.

[0214] In some embodiments, S=K0, where K0 is the number of non-zero coefficients configured by the higher layer.

[0215] In some embodiments, the length of the first indication is bits, and the first indication is used to determine or indicate the indexes of the S SD-TD basis vector pairs.

[0216] In some embodiments, when rank v>1, bits are used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or, bits are used to determine or indicate the index of the SD-TD basis vector pairs of all layers indicated by the rank v, or, bits are used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v.

[0217] In some embodiments, S=2L, where 2L is the number of SD basis vectors configured by the higher layer.

[0218] In some embodiments, the length of the first indication is bits, and the first indication determines or indicates the indexes of the S SD-TD basis vector pairs.

[0219] In some embodiments, when rank v>1, bits are used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or, bits are used to determine or indicate the index of the SD-TD basis vector pairs of all layers indicated by the rank v, or, bits are used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v.

[0220] In some embodiments, S=L, where L is the number of SD basis vectors configured by the high layer.

[0221] In some embodiments, the first indication includes first sub-information and / or second sub-information;

[0222] Among them, the length of the first sub-information is bits, and the first sub-information is used to determine or indicate the index of the S1 SD-TD basis vector pairs, and the length of the second sub-information is bits, the second sub-information is used to determine or indicate the indexes of the S2 TD-FD basis vector pairs, Q1Q2=Q.

[0223] In some embodiments, the first indication is located in a second portion of the first UCI.

[0224] In some embodiments, the first indication is located in at least one packet in the second portion of the first UCI.

[0225] In some embodiments, the first indication is mapped to the at least one group according to a preconfigured priority order.

[0226] In some embodiments, the first UCI includes a strongest coefficient indication; wherein,

[0227] The length indicated by the strongest coefficient is bits, the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, and / or the TD basis vector corresponding to the strongest coefficient is moved to TD0 by cyclic shift; or

[0228] The length indicated by the strongest coefficient is bits, and the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, and bit determines the TD basis vector corresponding to the strongest coefficient, or, by bits determine the TD basis vector corresponding to the strongest coefficient; or,

[0229] The length indicated by the strongest coefficient is Bit, through Determine the SD basis vector corresponding to the strongest coefficient by The bit determines the FD basis vector corresponding to the strongest coefficient, through bit determines the TD basis vector corresponding to the strongest coefficient, or, by bits determine the TD basis vector corresponding to the strongest coefficient; or,

[0230] The length indicated by the strongest coefficient is Bit, through Determine the SD basis vector corresponding to the strongest coefficient by The bit determines the TD-FD basis vector pair corresponding to the strongest coefficient, or, by The bit determines the TD-FD basis vector pair corresponding to the strongest coefficient, S is a positive integer, and S = M v ;or,

[0231] The length indicated by the strongest coefficient is Bit, through The SD-TD basis vector pair corresponding to the strongest coefficient is determined by the bit, and the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, where S is a positive integer and S=2L; or

[0232] The length indicated by the strongest coefficient is Bit, through The SD-FD basis vector pair corresponding to the strongest coefficient is determined by the bit, and the TD basis vector corresponding to the strongest coefficient is moved to TD0 by cyclic shift, where S is a positive integer and S=K0, where K0 is the number of non-zero coefficients configured by the higher layer; or

[0233] The length indicated by the strongest coefficient is Bit, through The bit determines the SD-FD basis vector pair corresponding to the strongest coefficient, through bit determines the TD basis vector corresponding to the strongest coefficient, or, by The bit determines the TD basis vector corresponding to the strongest coefficient, S is a positive integer, and S=K0, K0 is the number of non-zero coefficients configured by the high-level layer;

[0234] The TD-FD basis vector pair is composed of one of the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one FD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an FD basis vector among the L FD basis vectors and a TD basis vector among the Q TD basis vectors, and the non-zero coefficient is composed of amplitude and phase.

[0235] In some embodiments, the strongest coefficient indication is located in the second portion of the first UCI.

[0236] In some embodiments, S is reported by the terminal device, or S is determined based on high-level parameters.

[0237] In some embodiments, when S is reported by the terminal device, S is reported through the first part of the first UCI.

[0238] In some embodiments, the first UCI further includes at least one non-zero coefficient; wherein the non-zero coefficient consists of amplitude and phase.

[0239] In some embodiments, the at least one non-zero coefficient is located in the second portion of the first UCI.

[0240] In some embodiments, the at least one non-zero coefficient is located in at least one group in the second portion of the first UCI.

[0241] In some embodiments, the at least one non-zero coefficient is mapped to the at least one group in a preconfigured priority order.

[0242] In some embodiments, the communication unit may be a communication interface or a transceiver, or an input / output interface of a communication chip or a system on chip. The processing unit may be one or more processors.

[0243] It should be understood that the terminal device 300 according to the embodiment of the present application may correspond to the terminal device in the embodiment of the method of the present application, and the above-mentioned and other operations and / or functions of each unit in the terminal device 300 are respectively for realizing the corresponding processes of the terminal device in the method 200 shown in Figure 3. For the sake of brevity, they will not be repeated here.

[0244] FIG6 shows a schematic block diagram of a network device 400 according to an embodiment of the present application. As shown in FIG6 , the network device 400 includes:

[0245] The communication unit 410 is configured to receive first uplink control information UCI;

[0246] The first UCI includes: the indexes of L spatial domain SD basis vectors, M v The indices of frequency-domain FD basis vectors and the indices of Q time-domain TD basis vectors;

[0247] Among them, the SD basis vector is a two-dimensional discrete Fourier transform DFT vector of length N1N2, the FD basis vector is a DFT vector of length N3, the TD basis vector is a DFT vector of length N4, N1, N2, N3, N4, L, M v and Q are both positive integers.

[0248] In some embodiments, the indexes of the Q TD basis vectors are obtained by Bit reporting, where N is a positive integer.

[0249] In some embodiments, N=N4 / 2; or, N=N4; or, N=2Q.

[0250] In some embodiments, N is predefined, or N is determined based on higher-level parameters.

[0251] In some embodiments, the indices of the Q TD basis vectors are fixed.

[0252] In some embodiments, when Q=2, the indices of the Q TD basis vectors are fixed to 0 and N4-1.

[0253] In some embodiments, when rank v>1, the index of the TD basis vector of each layer in all layers indicated by the rank v is independently selected, or the index of the TD basis vector of each layer in all layers indicated by the rank v is the same.

[0254] In some embodiments, the first UCI includes a first bitmap;

[0255] The first bitmap is used to determine or indicate at least one of the following: indices of S SD-TD basis vector pairs, indices of S TD-FD basis vector pairs, indices of S SD-FD basis vector pairs, indices of S1 SD-TD basis vector pairs, indices of S2 TD-FD basis vector pairs, and at least one non-zero coefficient;

[0256] The TD-FD basis vector pair is composed of one of the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one FD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an FD basis vector among the L FD basis vectors and a TD basis vector among the Q TD basis vectors. The non-zero coefficient is composed of amplitude and phase, and S, S1 and S2 are all positive integers.

[0257] In some embodiments, the length of the first bitmap is M v Q+2LS bits, where the length of the first bitmap is M v The Q-bit bitmap is used to determine or indicate the indexes of the S TD-FD basis vector pairs, and the bitmap with a length of 2LS bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

[0258] In some embodiments, S=M v .

[0259] In some embodiments, the length of the first bitmap is 2LM v +SQ bits, where the length of the first bitmap is 2LM v The bitmap with a length of SQ bits in the first bitmap is used to determine or indicate the indexes of the S SD-FD basis vector pairs, and the bitmap with a length of SQ bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

[0260] In some embodiments, when rank v>1, 2vLM vThe bitmap of bits is used to determine or indicate the index of the SD-FD basis vector pairs of all layers indicated by the rank v, where each layer of all layers indicated by the rank v has a length of 2LM v bits of bitmap.

[0261] In some embodiments, when rank v>1, a bitmap of SQv bits is used to determine or indicate the non-zero coefficients of all layers indicated by the rank v, wherein each layer of all layers indicated by the rank v corresponds to a bitmap of SQ bits in length.

[0262] In some embodiments, S=K0, where K0 is the number of non-zero coefficients configured by the higher layer.

[0263] In some embodiments, when the rank v>1, a bitmap of SQ bits is used to determine or indicate the non-zero coefficients of all layers indicated by the rank v, where S=2K0, or, at the same time, the number of non-zero coefficients of each layer indicated by the rank v is less than or equal to K0, and K0 is the number of non-zero coefficients configured by the high layer.

[0264] In some embodiments, the length of the first bitmap is 2LQ+SM v bits, wherein the bitmap with a length of 2LQ bits in the first bitmap is used to determine or indicate the index of the S SD-TD basis vector pairs, and the length of the first bitmap is SM v A bitmap of bits is used to determine or indicate the at least one non-zero coefficient.

[0265] In some embodiments, when the rank v>1, a 2LQ-bit bitmap is used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or a 2LQv-bit bitmap is used to determine or indicate the index of the SD-TD basis vector pair of all layers indicated by the rank v; and / or,

[0266] In the case of rank v>1, SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

[0267] In some embodiments, when the rank v>1, a 2LQ-bit bitmap is used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v; and / or,

[0268] In the case of rank v>1, SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

[0269] In some embodiments, S=2L, where 2L is the number of SD basis vectors configured by the higher layer.

[0270] In some embodiments, the length of the first bitmap is LQ+2SM v bits, wherein the bitmap with a length of LQ bits in the first bitmap is used to determine or indicate the index of the S SD-TD basis vector pairs, and the length of the first bitmap is 2SM v A bitmap of bits is used to determine or indicate the at least one non-zero coefficient.

[0271] In some embodiments, when the rank v>1, the bitmap of LQ bits is used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or the bitmap of LQv bits is used to determine or indicate the index of the SD-TD basis vector pair of all layers indicated by the rank v; and / or,

[0272] In the case of rank v>1, 2SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

[0273] In some embodiments, when the rank v>1, the LQ-bit bitmap is used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v; and / or,

[0274] In the case of rank v>1, 2SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

[0275] In some embodiments, S=L, where L is the number of SD basis vectors configured by the high layer.

[0276] In some embodiments, the length of the first bitmap is S1S2+2LQ1+M v Q2 bits, where Q1Q2=Q;

[0277] The bitmap with a length of 2LQ1 bits in the first bitmap is used to determine or indicate the index of the S1 SD-TD basis vector pairs, and the bitmap with a length of M v The bitmap of Q2 bits is used to determine or indicate the indexes of the S2 TD-FD basis vector pairs, and the bitmap of S1S2 bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

[0278] In some embodiments, the length of the first bitmap is 2LM v Q bits, the first bitmap being used to determine or indicate the at least one non-zero coefficient corresponding to the index of the TD-FD-SD basis vector pair;

[0279] The TD-FD-SD basis vector pair is composed of one TD basis vector among the Q TD basis vectors, the M v It consists of one FD basis vector among the L FD basis vectors and one SD basis vector among the L SD basis vectors.

[0280] In some embodiments, the first bitmap is located in the second portion of the first UCI.

[0281] In some embodiments, the first bitmap is located in at least one packet in the second portion of the first UCI.

[0282] In some embodiments, the first bitmap is mapped to the at least one packet according to a preconfigured priority order.

[0283] In some embodiments, the first UCI includes a first indication;

[0284] The first indication is used to determine or indicate at least one of the following: indices of S SD-TD basis vector pairs, indices of S TD-FD basis vector pairs, indices of S SD-FD basis vector pairs, indices of S1 SD-TD basis vector pairs, and indices of S2 TD-FD basis vector pairs;

[0285] The TD-FD basis vector pair is composed of one of the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one FD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an FD basis vector among the L FD basis vectors and a TD basis vector among the Q TD basis vectors, and S, S1 and S2 are all positive integers.

[0286] In some embodiments, the length of the first indication bit is bits, and the first indication is used to determine or indicate the indexes of the S TD-FD basis vector pairs.

[0287] In some embodiments, the length of the first indication is bits, and the first indication is used to determine or indicate the indexes of the S SD-FD basis vector pairs.

[0288] In some embodiments, S=K0, where K0 is the number of non-zero coefficients configured by the higher layer.

[0289] In some embodiments, the length of the first indication is bits, and the first indication is used to determine or indicate the indexes of the S SD-TD basis vector pairs.

[0290] In some embodiments, when rank v>1, bits are used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or, bits are used to determine or indicate the index of the SD-TD basis vector pairs of all layers indicated by the rank v, or, bits are used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v.

[0291] In some embodiments, S=2L, where 2L is the number of SD basis vectors configured by the higher layer.

[0292] In some embodiments, the length of the first indication is bits, and the first indication determines or indicates the indexes of the S SD-TD basis vector pairs.

[0293] In some embodiments, when rank v>1, bits are used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or, bits are used to determine or indicate the index of the SD-TD basis vector pairs of all layers indicated by the rank v, or, bits are used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v.

[0294] In some embodiments, S=L, where L is the number of SD basis vectors configured by the high layer.

[0295] In some embodiments, the first indication includes first sub-information and / or second sub-information;

[0296] Among them, the length of the first sub-information is bits, and the first sub-information is used to determine or indicate the index of the S1 SD-TD basis vector pairs, and the length of the second sub-information is bits, the second sub-information is used to determine or indicate the indexes of the S2 TD-FD basis vector pairs, Q1Q2=Q.

[0297] In some embodiments, the first indication is located in a second portion of the first UCI.

[0298] In some embodiments, the first indication is located in at least one packet in the second portion of the first UCI.

[0299] In some embodiments, the first indication is mapped to the at least one group according to a preconfigured priority order.

[0300] In some embodiments, the first UCI includes a strongest coefficient indication; wherein,

[0301] The length indicated by the strongest coefficient is bits, the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, and / or the TD basis vector corresponding to the strongest coefficient is moved to TD0 by cyclic shift; or

[0302] The length indicated by the strongest coefficient is bits, and the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, and bit determines the TD basis vector corresponding to the strongest coefficient, or, by bits determine the TD basis vector corresponding to the strongest coefficient; or,

[0303] The length indicated by the strongest coefficient is Bit, through Determine the SD basis vector corresponding to the strongest coefficient by The bit determines the FD basis vector corresponding to the strongest coefficient, through bit determines the TD basis vector corresponding to the strongest coefficient, or, by bits determine the TD basis vector corresponding to the strongest coefficient; or,

[0304] The length indicated by the strongest coefficient is Bit, through Determine the SD basis vector corresponding to the strongest coefficient by The bit determines the TD-FD basis vector pair corresponding to the strongest coefficient, or, by The bit determines the TD-FD basis vector pair corresponding to the strongest coefficient, S is a positive integer, and S = M v ;or,

[0305] The length indicated by the strongest coefficient is Bit, through The SD-TD basis vector pair corresponding to the strongest coefficient is determined by the bit, and the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, where S is a positive integer and S=2L; or

[0306] The length indicated by the strongest coefficient is Bit, through The SD-FD basis vector pair corresponding to the strongest coefficient is determined by the bit, and the TD basis vector corresponding to the strongest coefficient is moved to TD0 by cyclic shift, where S is a positive integer and S=K0, where K0 is the number of non-zero coefficients configured by the higher layer; or

[0307] The length indicated by the strongest coefficient is Bit, through The bit determines the SD-FD basis vector pair corresponding to the strongest coefficient, through bit determines the TD basis vector corresponding to the strongest coefficient, or, by The bit determines the TD basis vector corresponding to the strongest coefficient, S is a positive integer, and S=K0, K0 is the number of non-zero coefficients configured by the high-level layer;

[0308] The TD-FD basis vector pair is composed of one of the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one FD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an FD basis vector among the L FD basis vectors and a TD basis vector among the Q TD basis vectors, and the non-zero coefficient is composed of amplitude and phase.

[0309] In some embodiments, the strongest coefficient indication is located in the second portion of the first UCI.

[0310] In some embodiments, S is reported by the terminal device, or S is determined based on high-level parameters.

[0311] In some embodiments, when S is reported by the terminal device, S is reported through the first part of the first UCI.

[0312] In some embodiments, the first UCI further includes at least one non-zero coefficient; wherein the non-zero coefficient consists of amplitude and phase.

[0313] In some embodiments, the at least one non-zero coefficient is located in the second portion of the first UCI.

[0314] In some embodiments, the at least one non-zero coefficient is located in at least one group in the second portion of the first UCI.

[0315] In some embodiments, the at least one non-zero coefficient is mapped to the at least one group in a preconfigured priority order.

[0316] In some embodiments, the communication unit may be a communication interface or a transceiver, or an input / output interface of a communication chip or a system on chip.

[0317] It should be understood that the network device 400 according to the embodiment of the present application may correspond to the network device in the embodiment of the method of the present application, and the above-mentioned and other operations and / or functions of each unit in the network device 400 are respectively for implementing the corresponding processes of the network device in the method 200 shown in Figure 3. For the sake of brevity, they will not be repeated here.

[0318] Figure 7 is a schematic structural diagram of a communication device 500 provided in an embodiment of the present application. The communication device 500 shown in Figure 7 includes a processor 510, which can call and run a computer program from a memory to implement the method in the embodiment of the present application.

[0319] In some embodiments, as shown in FIG7 , the communication device 500 may further include a memory 520. The processor 510 may call and execute a computer program from the memory 520 to implement the method in the embodiment of the present application.

[0320] The memory 520 may be a separate device independent of the processor 510 , or may be integrated into the processor 510 .

[0321] In some embodiments, as shown in FIG7 , the communication device 500 may further include a transceiver 530 , and the processor 510 may control the transceiver 530 to communicate with other devices, specifically, to send information or data to other devices, or to receive information or data sent by other devices.

[0322] The transceiver 530 may include a transmitter and a receiver. The transceiver 530 may further include an antenna, and the number of antennas may be one or more.

[0323] In some embodiments, the processor 510 may implement the functions of a processing unit in a terminal device, or the processor 510 may implement the functions of a processing unit in a network device, which will not be described in detail here for the sake of brevity.

[0324] In some embodiments, the transceiver 530 may implement the functions of a communication unit in a terminal device, which will not be described in detail here for the sake of brevity.

[0325] In some embodiments, the transceiver 530 may implement the function of a communication unit in a network device, which will not be described in detail here for the sake of brevity.

[0326] In some embodiments, the communication device 500 may specifically be a network device of an embodiment of the present application, and the communication device 500 may implement the corresponding processes implemented by the network device in each method of the embodiment of the present application. For the sake of brevity, they will not be repeated here.

[0327] In some embodiments, the communication device 500 may specifically be a terminal device of an embodiment of the present application, and the communication device 500 may implement the corresponding processes implemented by the terminal device in each method of the embodiment of the present application. For the sake of brevity, they will not be repeated here.

[0328] Figure 8 is a schematic structural diagram of an apparatus according to an embodiment of the present application. The apparatus 600 shown in Figure 8 includes a processor 610, which can call and execute a computer program from a memory to implement the method according to the embodiment of the present application.

[0329] In some embodiments, as shown in FIG8 , the apparatus 600 may further include a memory 620 , wherein the processor 610 may call and execute a computer program from the memory 620 to implement the method in the embodiment of the present application.

[0330] The memory 620 may be a separate device independent of the processor 610 , or may be integrated into the processor 610 .

[0331] In some embodiments, the apparatus 600 may further include an input interface 630. The processor 610 may control the input interface 630 to communicate with other devices or chips, and specifically, may obtain information or data sent by other devices or chips. Optionally, the processor 610 may be located inside or outside the chip.

[0332] In some embodiments, the processor 610 may implement the functions of a processing unit in a terminal device, or the processor 610 may implement the functions of a processing unit in a network device, which will not be described in detail here for the sake of brevity.

[0333] In some embodiments, the input interface 630 may implement the function of a communication unit in a terminal device, or the input interface 630 may implement the function of a communication unit in a network device.

[0334] In some embodiments, the apparatus 600 may further include an output interface 640. The processor 610 may control the output interface 640 to communicate with other devices or chips, and specifically, may output information or data to other devices or chips. Optionally, the processor 610 may be located inside or outside the chip.

[0335] In some embodiments, the output interface 640 may implement the function of a communication unit in a terminal device, or the output interface 640 may implement the function of a communication unit in a network device.

[0336] In some embodiments, the device can be applied to the network equipment in the embodiments of the present application, and the device can implement the corresponding processes implemented by the network equipment in the various methods of the embodiments of the present application. For the sake of brevity, they will not be repeated here.

[0337] In some embodiments, the apparatus can be applied to the terminal device in the embodiments of the present application, and the apparatus can implement the corresponding processes implemented by the terminal device in the various methods in the embodiments of the present application. For the sake of brevity, they will not be repeated here.

[0338] In some embodiments, the device mentioned in the embodiments of the present application may also be a chip, such as a system-on-chip, a system-on-chip, a chip system, or a system-on-chip chip.

[0339] FIG9 is a schematic block diagram of a communication system 700 provided in an embodiment of the present application. As shown in FIG9 , the communication system 700 includes a terminal device 710 and a network device 720 .

[0340] Among them, the terminal device 710 can be used to implement the corresponding functions implemented by the terminal device in the above method, and the network device 720 can be used to implement the corresponding functions implemented by the network device in the above method. For the sake of brevity, they will not be repeated here.

[0341] It should be understood that the processor of the embodiments of the present application may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method embodiment can be completed by hardware integrated logic circuits in the processor or software instructions. The above processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. The various methods, steps, and logic block diagrams disclosed in the embodiments of the present application can be implemented or executed. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in the embodiments of the present application can be directly embodied as being executed by a hardware decoding processor, or can be executed by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium mature in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, etc. The storage medium is located in the memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0342] It is understood that the memory in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct RAM bus random access memory (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0343] It should be understood that the above-mentioned memories are exemplary but not restrictive. For example, the memories in the embodiments of the present application may also be static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct RAM RAM (DR RAM), etc. In other words, the memories in the embodiments of the present application are intended to include, but are not limited to, these and any other suitable types of memories.

[0344] An embodiment of the present application also provides a computer-readable storage medium for storing a computer program.

[0345] In some embodiments, the computer-readable storage medium can be applied to the network device in the embodiments of the present application, and the computer program enables the computer to execute the corresponding processes implemented by the network device in the various methods of the embodiments of the present application. For the sake of brevity, they will not be repeated here.

[0346] In some embodiments, the computer-readable storage medium can be applied to the terminal device in the embodiments of the present application, and the computer program enables the computer to execute the corresponding processes implemented by the terminal device in the various methods of the embodiments of the present application. For the sake of brevity, they will not be repeated here.

[0347] An embodiment of the present application also provides a computer program product, including computer program instructions.

[0348] In some embodiments, the computer program product can be applied to the network device in the embodiments of the present application, and the computer program instructions enable the computer to execute the corresponding processes implemented by the network device in the various methods of the embodiments of the present application. For the sake of brevity, they will not be repeated here.

[0349] In some embodiments, the computer program product can be applied to the terminal device in the embodiments of the present application, and the computer program instructions enable the computer to execute the corresponding processes implemented by the terminal device in the various methods of the embodiments of the present application. For the sake of brevity, they will not be repeated here.

[0350] The embodiment of the present application also provides a computer program.

[0351] In some embodiments, the computer program can be applied to the network device in the embodiments of the present application. When the computer program runs on a computer, the computer executes the corresponding processes implemented by the network device in the various methods of the embodiments of the present application. For the sake of brevity, they will not be repeated here.

[0352] In some embodiments, the computer program can be applied to the terminal device in the embodiments of the present application. When the computer program runs on the computer, the computer executes the corresponding processes implemented by the terminal device in the various methods of the embodiments of the present application. For the sake of brevity, they will not be repeated here.

[0353] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0354] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0355] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0356] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0357] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0358] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. In view of this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0359] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A wireless communication method, characterized in that: include: The terminal device sends first uplink control information UCI; The first UCI includes: indices of L spatial SD basis vectors, M v The indices of the frequency domain FD basis vectors and the indices of the time domain TD basis vectors; The SD basis vector is a two-dimensional discrete Fourier transform DFT vector of length N1N2, the FD basis vector is a DFT vector of length N3, and the TD basis vector is a DFT vector of length N4. N1, N2, N3, N4, L, M v and Q are both positive integers.

2. The method according to claim 1, characterized in that The indices of the Q TD basis vectors are given by Bit reporting, where N is a positive integer.

3. The method according to claim 2, characterized in that N=N4 / 2; or, N=N4; or, N=2Q.

4. The method according to claim 2 or 3, characterized in that: N is predefined, or N is determined according to high-level parameters.

5. The method according to any one of claims 1 to 4, characterized in that The indices of the Q TD basis vectors are fixed.

6. The method according to claim 5, characterized in that When Q=2, the indexes of the Q TD basis vectors are fixed to 0 and N4-1.

7. The method according to any one of claims 1 to 6, characterized in that In the case of rank v>1, the index of the TD basis vector of each layer in all the layers indicated by the rank v is independently selected, or the index of the TD basis vector of each layer in all the layers indicated by the rank v is the same.

8. The method according to any one of claims 1 to 7, characterized in that The first UCI includes a first bitmap; The first bitmap is used to determine or indicate at least one of the following: indices of S SD-TD basis vector pairs, indices of S TD-FD basis vector pairs, indices of S SD-FD basis vector pairs, indices of S1 SD-TD basis vector pairs, indices of S2 TD-FD basis vector pairs, and at least one non-zero coefficient; The TD-FD basis vector pair is composed of one TD basis vector among the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one SD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an SD basis vector among the L SD basis vectors and a TD basis vector among the Q TD basis vectors. The non-zero coefficient is composed of amplitude and phase, and S, S1 and S2 are all positive integers.

9. The method according to claim 8, characterized in that The length of the first bitmap is M v Q+2LS bits, where the length of the first bitmap is M v The bitmap of Q bits is used to determine or indicate the indexes of the S TD-FD basis vector pairs, and the bitmap of 2LS bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

10. The method according to claim 9, characterized in that S=M v 。 11. The method according to claim 8, characterized in that The length of the first bitmap is 2LM v +SQ bits, where the length of the first bitmap is 2LM v A bitmap of bits is used to determine or indicate the indexes of the S SD-FD basis vector pairs, and a bitmap of length SQ bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

12. The method according to claim 11, characterized in that In the case of rank v>1, 2vLM v The bitmap of bits is used to determine or indicate the index of the SD-FD basis vector pairs of all layers indicated by the rank v, wherein each layer of all layers indicated by the rank v has a length of 2LM v bits of bitmap.

13. The method according to claim 11 or 12, characterized in that: When rank v>1, a bitmap of SQv bits is used to determine or indicate non-zero coefficients of all layers indicated by the rank v, wherein each layer of all layers indicated by the rank v corresponds to a bitmap of SQ bits in length.

14. The method according to any one of claims 11 to 13, characterized in that S=K0, K0 is the number of non-zero coefficients configured by the high layer.

15. The method according to claim 11 or 12, characterized in that: When the rank v>1, a bit map of SQ bits is used to determine or indicate the non-zero coefficients of all layers indicated by the rank v, where S=2K0, or, at the same time, the number of non-zero coefficients of each layer indicated by the rank v is less than or equal to K0, where K0 is the number of non-zero coefficients configured by the high-level layer.

16. The method according to claim 8, characterized in that The length of the first bitmap is 2LQ+SM v bits, wherein the bitmap having a length of 2LQ bits in the first bitmap is used to determine or indicate the indexes of the S SD-TD basis vector pairs, and the length of the first bitmap is SM v A bitmap of bits is used to determine or indicate the at least one non-zero coefficient.

17. The method according to claim 16, characterized in that In the case where the rank v>1, a bitmap of 2LQ bits is used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or a bitmap of 2LQv bits is used to determine or indicate the index of the SD-TD basis vector pair of all layers indicated by the rank v; and / or, When rank v>1, SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

18. The method according to claim 16, characterized in that In the case where the rank v>1, a bitmap of 2LQ bits is used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v; and / or, When rank v>1, SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

19. The method according to any one of claims 16 to 18, characterized in that: S=2L, where 2L is the number of SD basis vectors configured by the high layer.

20. The method according to claim 8, characterized in that The length of the first bitmap is LQ+2SM v bits, wherein the bitmap having a length of LQ bits in the first bitmap is used to determine or indicate the indexes of the S SD-TD basis vector pairs, and the length of the first bitmap is 2SM v A bitmap of bits is used to determine or indicate the at least one non-zero coefficient.

21. The method according to claim 20, characterized in that In the case where the rank v>1, a bitmap of LQ bits is used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or a bitmap of LQv bits is used to determine or indicate the index of the SD-TD basis vector pair of all layers indicated by the rank v; and / or, When rank v>1, 2SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

22. The method according to claim 20, characterized in that In the case where the rank v>1, the bitmap of LQ bits is used to determine or indicate the indexes of the SD-TD basis vector pairs of all layers indicated by the rank v; and / or, When rank v>1, 2SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

23. The method according to any one of claims 20 to 22, characterized in that S=L, where L is the number of SD basis vectors configured by the high level.

24. The method according to claim 8, characterized in that The length of the first bitmap is S1S2+2LQ1+M v Q2 bits, where Q1Q2=Q; The bitmap with a length of 2LQ1 bits in the first bitmap is used to determine or indicate the indexes of the S1 SD-TD basis vector pairs, and the bitmap with a length of M v The bitmap of Q2 bits is used to determine or indicate the indexes of the S2 TD-FD basis vector pairs, and the bitmap of length S1S2 bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

25. The method according to claim 8, characterized in that The length of the first bitmap is 2LM v Q bits, the first bitmap being used to determine or indicate the at least one non-zero coefficient corresponding to the index of the TD-FD-SD basis vector pair; The TD-FD-SD basis vector pair is composed of one TD basis vector among the Q TD basis vectors, the M v It consists of one FD basis vector among the FD basis vectors and one SD basis vector among the L SD basis vectors.

26. The method according to any one of claims 8 to 25, characterized in that The first bitmap is located in the second part of the first UCI.

27. The method according to claim 26, characterized in that The first bitmap is located in at least one group in the second part of the first UCI.

28. The method according to claim 27, characterized in that The first bitmap is mapped to the at least one group according to a preconfigured priority order.

29. The method according to any one of claims 1 to 7, characterized in that The first UCI includes a first indication; The first indication is used to determine or indicate at least one of the following: indices of S SD-TD basis vector pairs, indices of S TD-FD basis vector pairs, indices of S SD-FD basis vector pairs, indices of S1 SD-TD basis vector pairs, and indices of S2 TD-FD basis vector pairs; The TD-FD basis vector pair is composed of one TD basis vector among the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one SD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an FD basis vector among the L SD basis vectors and a TD basis vector among the Q TD basis vectors, and S, S1 and S2 are all positive integers.

30. The method according to claim 29, characterized in that The length of the first indication bit is bits, and the first indication is used to determine or indicate the indexes of the S TD-FD basis vector pairs.

31. The method according to claim 30, characterized in that S=M v 。 32. The method according to claim 29, characterized in that The length of the first indication is bits, and the first indication is used to determine or indicate the indexes of the S SD-FD basis vector pairs.

33. The method according to claim 32, characterized in that S=K0, K0 is the number of non-zero coefficients configured by the high layer.

34. The method according to claim 29, characterized in that The length of the first indication is bits, and the first indication is used to determine or indicate the indexes of the S SD-TD basis vector pairs.

35. The method according to claim 34, characterized in that When rank v>1, bits are used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or, bits are used to determine or indicate the index of the SD-TD basis vector pairs of all layers indicated by the rank v, or, bits are used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v.

36. The method according to claim 34 or 35, characterized in that S=2L, where 2L is the number of SD basis vectors configured by the high layer.

37. The method according to claim 29, characterized in that The length of the first indication is bits, and the first indication determines or indicates the indices of the S SD-TD basis vector pairs.

38. The method according to claim 37, characterized in that When rank v>1, bits are used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or, bits are used to determine or indicate the indexes of the SD-TD basis vector pairs of all layers indicated by the rank v, or, bits are used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v.

39. The method according to claim 38, characterized in that S=L, where L is the number of SD basis vectors configured by the high level.

40. The method according to claim 29, characterized in that The first indication includes first sub-information and / or second sub-information; Among them, the length of the first sub-information is bits, and the first sub-information is used to determine or indicate the index of the S1 SD-TD basis vector pairs, and the length of the second sub-information is bits, the second sub-information is used to determine or indicate the indexes of the S2 TD-FD basis vector pairs, Q1Q2=Q.

41. The method according to any one of claims 29 to 40, characterized in that The first indication is located in a second portion of the first UCI.

42. The method according to claim 41, characterized in that The first indication is located in at least one packet in a second portion of the first UCI.

43. The method according to claim 42, characterized in that The first indication is mapped to the at least one group according to a preconfigured priority order.

44. The method according to any one of claims 1 to 43, characterized in that The first UCI includes the strongest coefficient indication; wherein, The length of the strongest coefficient indication is bits, the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, and / or the TD basis vector corresponding to the strongest coefficient is moved to TD0 by cyclic shift; or The length of the strongest coefficient indication is bits, and the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, and bits determine the TD basis vector corresponding to the strongest coefficient, or, by bits determine the TD basis vector corresponding to the strongest coefficient; or, The length of the strongest coefficient indication is Bit, through Determine the SD basis vector corresponding to the strongest coefficient, by The bit determines the FD basis vector corresponding to the strongest coefficient, through bits determine the TD basis vector corresponding to the strongest coefficient, or, by bits determine the TD basis vector corresponding to the strongest coefficient; or, The length of the strongest coefficient indication is Bit, through Determine the SD basis vector corresponding to the strongest coefficient, by bits determine the TD-FD basis vector pair corresponding to the strongest coefficient, or, through The bit determines the TD-FD basis vector pair corresponding to the strongest coefficient, S is a positive integer, and S = M v ;or, The length of the strongest coefficient indication is Bit, through The SD-TD basis vector pair corresponding to the strongest coefficient is determined by the bit, and the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, S is a positive integer, and S=2L; or, The length of the strongest coefficient indication is Bit, through The SD-FD basis vector pair corresponding to the strongest coefficient is determined by the bit, and the TD basis vector corresponding to the strongest coefficient is moved to TD0 by cyclic shift, S is a positive integer, and S=K0, K0 is the number of non-zero coefficients configured by the high-level layer; or, The length of the strongest coefficient indication is Bit, through The bit determines the SD-FD basis vector pair corresponding to the strongest coefficient, through bits determine the TD basis vector corresponding to the strongest coefficient, or, by The bit determines the TD basis vector corresponding to the strongest coefficient, S is a positive integer, and S=K0, K0 is the number of non-zero coefficients configured by the high-level layer; The TD-FD basis vector pair is composed of one TD basis vector among the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one SD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an FD basis vector among the L FD basis vectors and a TD basis vector among the Q TD basis vectors, and the non-zero coefficient is composed of amplitude and phase.

45. The method according to claim 44, characterized in that The strongest coefficient indication is located in a second portion of the first UCI.

46. ​​The method according to any one of claims 1-23, 29-39, 44, 45, characterized in that S is reported by the terminal device, or S is determined based on high-level parameters.

47. The method according to claim 46, characterized in that In the case where S is reported by the terminal device, S is reported through the first part of the first UCI.

48. The method according to any one of claims 1 to 47, characterized in that The first UCI also includes at least one non-zero coefficient; wherein the non-zero coefficient consists of amplitude and phase.

49. The method according to claim 48, characterized in that The at least one non-zero coefficient is located in a second portion of the first UCI.

50. The method according to claim 49, characterized in that The at least one non-zero coefficient is located in at least one group in the second part of the first UCI.

51. A wireless communication method, characterized in that: include: The network device receives first uplink control information UCI; The first UCI includes: indices of L spatial SD basis vectors, M v The indices of the frequency domain FD basis vectors and the indices of the time domain TD basis vectors; The SD basis vector is a two-dimensional discrete Fourier transform DFT vector of length N1N2, the FD basis vector is a DFT vector of length N3, and the TD basis vector is a DFT vector of length N4. N1, N2, N3, N4, L, M v and Q are both positive integers.

52. The method according to claim 51, characterized in that The indices of the Q TD basis vectors are given by Bit reporting, where N is a positive integer.

53. The method according to claim 52, characterized in that N=N4 / 2; or, N=N4; or, N=2Q.

54. The method according to claim 52 or 53, characterized in that N is predefined, or N is determined according to high-level parameters.

55. The method according to any one of claims 51 to 54, characterized in that The indices of the Q TD basis vectors are fixed.

56. The method according to claim 55, characterized in that When Q=2, the indexes of the Q TD basis vectors are fixed to 0 and N4-1.

57. The method according to any one of claims 51 to 56, characterized in that In the case of rank v>1, the index of the TD basis vector of each layer in all the layers indicated by the rank v is independently selected, or the index of the TD basis vector of each layer in all the layers indicated by the rank v is the same.

58. The method according to any one of claims 51 to 57, characterized in that The first UCI includes a first bitmap; The first bitmap is used to determine or indicate at least one of the following: indices of S SD-TD basis vector pairs, indices of S TD-FD basis vector pairs, indices of S SD-FD basis vector pairs, indices of S1 SD-TD basis vector pairs, indices of S2 TD-FD basis vector pairs, and at least one non-zero coefficient; The TD-FD basis vector pair is composed of one TD basis vector among the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one SD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an SD basis vector among the L SD basis vectors and a TD basis vector among the Q TD basis vectors. The non-zero coefficient is composed of amplitude and phase, and S, S1 and S2 are all positive integers.

59. The method according to claim 58, characterized in that The length of the first bitmap is M v Q+2LS bits, where the length of the first bitmap is M v The bitmap of Q bits is used to determine or indicate the indexes of the S TD-FD basis vector pairs, and the bitmap of 2LS bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

60. The method according to claim 59, characterized in that S=M v 。 61. The method according to claim 58, characterized in that The length of the first bitmap is 2LM v +SQ bits, where the length of the first bitmap is 2LM v A bitmap of bits is used to determine or indicate the indexes of the S SD-FD basis vector pairs, and a bitmap of length SQ bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

62. The method according to claim 61, characterized in that In the case of rank v>1, 2vLM v The bitmap of bits is used to determine or indicate the index of the SD-FD basis vector pairs of all layers indicated by the rank v, wherein each layer of all layers indicated by the rank v has a length of 2LM v bits of bitmap.

63. The method according to claim 61 or 62, characterized in that When rank v>1, a bitmap of SQv bits is used to determine or indicate non-zero coefficients of all layers indicated by the rank v, wherein each layer of all layers indicated by the rank v corresponds to a bitmap of SQ bits in length.

64. The method according to any one of claims 61 to 63, characterized in that S=K0, K0 is the number of non-zero coefficients configured by the high layer.

65. The method according to claim 61 or 62, characterized in that When the rank v>1, a bit map of SQ bits is used to determine or indicate the non-zero coefficients of all layers indicated by the rank v, where S=2K0, or, at the same time, the number of non-zero coefficients of each layer indicated by the rank v is less than or equal to K0, where K0 is the number of non-zero coefficients configured by the high-level layer.

66. The method of claim 58, wherein: The length of the first bitmap is 2LQ+SM v bits, wherein the bitmap having a length of 2LQ bits in the first bitmap is used to determine or indicate the indexes of the S SD-TD basis vector pairs, and the length of the first bitmap is SM v A bitmap of bits is used to determine or indicate the at least one non-zero coefficient.

67. The method according to claim 66, characterized in that In the case where the rank v>1, a bitmap of 2LQ bits is used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or a bitmap of 2LQv bits is used to determine or indicate the index of the SD-TD basis vector pair of all layers indicated by the rank v; and / or, When rank v>1, SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

68. The method according to claim 66, characterized in that In the case where the rank v>1, a bitmap of 2LQ bits is used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v; and / or, When rank v>1, SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

69. The method according to any one of claims 66 to 68, characterized in that S=2L, where 2L is the number of SD basis vectors configured by the high layer.

70. The method of claim 58, wherein: The length of the first bitmap is LQ+2SM v bits, wherein the bitmap having a length of LQ bits in the first bitmap is used to determine or indicate the indexes of the S SD-TD basis vector pairs, and the length of the first bitmap is 2SM v A bitmap of bits is used to determine or indicate the at least one non-zero coefficient.

71. The method according to claim 70, characterized in that In the case where the rank v>1, a bitmap of LQ bits is used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or a bitmap of LQv bits is used to determine or indicate the index of the SD-TD basis vector pair of all layers indicated by the rank v; and / or, When rank v>1, 2SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

72. The method according to claim 70, characterized in that In the case where the rank v>1, the bitmap of LQ bits is used to determine or indicate the indexes of the SD-TD basis vector pairs of all layers indicated by the rank v; and / or, When rank v>1, 2SM v The bitmap of bits is used to determine or indicate the non-zero coefficients of each layer indicated by the rank v.

73. The method according to any one of claims 70 to 72, characterized in that S=L, where L is the number of SD basis vectors configured by the high level.

74. The method according to claim 58, characterized in that The length of the first bitmap is S1S2+2LQ1+M v Q2 bits, where Q1Q2=Q; The bitmap with a length of 2LQ1 bits in the first bitmap is used to determine or indicate the indexes of the S1 SD-TD basis vector pairs, and the bitmap with a length of M v The bitmap of Q2 bits is used to determine or indicate the indexes of the S2 TD-FD basis vector pairs, and the bitmap of length S1S2 bits in the first bitmap is used to determine or indicate the at least one non-zero coefficient.

75. The method of claim 58, wherein: The length of the first bitmap is 2LM v Q bits, the first bitmap being used to determine or indicate the at least one non-zero coefficient corresponding to the index of the TD-FD-SD basis vector pair; The TD-FD-SD basis vector pair is composed of one TD basis vector among the Q TD basis vectors, the M v It consists of one FD basis vector among the FD basis vectors and one SD basis vector among the L SD basis vectors.

76. The method according to any one of claims 58 to 75, characterized in that The first bitmap is located in the second part of the first UCI.

77. The method according to claim 76, characterized in that The first bitmap is located in at least one group in the second part of the first UCI.

78. The method according to claim 77, characterized in that The first bitmap is mapped to the at least one group according to a preconfigured priority order.

79. The method according to any one of claims 51 to 57, characterized in that The first UCI includes a first indication; The first indication is used to determine or indicate at least one of the following: indices of S SD-TD basis vector pairs, indices of S TD-FD basis vector pairs, indices of S SD-FD basis vector pairs, indices of S1 SD-TD basis vector pairs, and indices of S2 TD-FD basis vector pairs; The TD-FD basis vector pair is composed of one TD basis vector among the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one SD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an FD basis vector among the L SD basis vectors and a TD basis vector among the Q TD basis vectors, and S, S1 and S2 are all positive integers.

80. The method according to claim 79, characterized in that The length of the first indication bit is bits, and the first indication is used to determine or indicate the indexes of the S TD-FD basis vector pairs.

81. The method according to claim 80, characterized in that S=M v 。 82. The method of claim 79, wherein: The length of the first indication is bits, and the first indication is used to determine or indicate the indexes of the S SD-FD basis vector pairs.

83. The method according to claim 82, characterized in that S=K0, K0 is the number of non-zero coefficients configured by the high layer.

84. The method according to claim 79, characterized in that The length of the first indication is bits, and the first indication is used to determine or indicate the indexes of the S SD-TD basis vector pairs.

85. The method according to claim 84, characterized in that When rank v>1, bits are used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or, bits are used to determine or indicate the indexes of the SD-TD basis vector pairs of all layers indicated by the rank v, or, bits are used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v.

86. The method according to claim 84 or 85, characterized in that S=2L, where 2L is the number of SD basis vectors configured by the high layer.

87. The method according to claim 79, characterized in that The length of the first indication is bits, and the first indication determines or indicates the indices of the S SD-TD basis vector pairs.

88. The method according to claim 87, characterized in that When rank v>1, bits are used to determine or indicate the index of the SD-TD basis vector pair of each layer indicated by the rank v, or, bits are used to determine or indicate the index of the SD-TD basis vector pairs of all layers indicated by the rank v, or, bits are used to determine or indicate the indices of the SD-TD basis vector pairs of all layers indicated by the rank v.

89. The method according to claim 88, characterized in that S=L, where L is the number of SD basis vectors configured by the high level.

90. The method of claim 79, wherein: The first indication includes first sub-information and / or second sub-information; Among them, the length of the first sub-information is bits, and the first sub-information is used to determine or indicate the index of the S1 SD-TD basis vector pairs, and the length of the second sub-information is bits, the second sub-information is used to determine or indicate the indexes of the S2 TD-FD basis vector pairs, Q1Q2=Q.

91. The method according to any one of claims 79 to 90, characterized in that The first indication is located in a second portion of the first UCI.

92. The method according to claim 91, characterized in that The first indication is located in at least one packet in a second portion of the first UCI.

93. The method according to claim 92, characterized in that The first indication is mapped to the at least one group according to a preconfigured priority order.

94. The method according to any one of claims 51 to 93, characterized in that The first UCI includes the strongest coefficient indication; wherein, The length of the strongest coefficient indication is bits, the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, and / or the TD basis vector corresponding to the strongest coefficient is moved to TD0 by cyclic shift; or The length of the strongest coefficient indication is bits, and the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, and bits determine the TD basis vector corresponding to the strongest coefficient, or, by bits determine the TD basis vector corresponding to the strongest coefficient; or, The length of the strongest coefficient indication is Bit, through Determine the SD basis vector corresponding to the strongest coefficient, by The bit determines the FD basis vector corresponding to the strongest coefficient, through bits determine the TD basis vector corresponding to the strongest coefficient, or, by bits determine the TD basis vector corresponding to the strongest coefficient; or, The length of the strongest coefficient indication is Bit, through Determine the SD basis vector corresponding to the strongest coefficient, by bits determine the TD-FD basis vector pair corresponding to the strongest coefficient, or, through The bit determines the TD-FD basis vector pair corresponding to the strongest coefficient, S is a positive integer, and S = M v ;or, The length of the strongest coefficient indication is Bit, through The SD-TD basis vector pair corresponding to the strongest coefficient is determined by the bit, and the FD basis vector corresponding to the strongest coefficient is moved to FD0 by cyclic shift, S is a positive integer, and S=2L; or, The length of the strongest coefficient indication is Bit, through The SD-FD basis vector pair corresponding to the strongest coefficient is determined by the bit, and the TD basis vector corresponding to the strongest coefficient is moved to TD0 by cyclic shift, S is a positive integer, and S=K0, K0 is the number of non-zero coefficients configured by the high-level layer; or, The length of the strongest coefficient indication is Bit, through The bit determines the SD-FD basis vector pair corresponding to the strongest coefficient, through bits determine the TD basis vector corresponding to the strongest coefficient, or, by The bit determines the TD basis vector corresponding to the strongest coefficient, S is a positive integer, and S=K0, K0 is the number of non-zero coefficients configured by the high-level layer; The TD-FD basis vector pair is composed of one TD basis vector among the Q TD basis vectors and the M v The SD-FD basis vector pair is composed of one SD basis vector among the L SD basis vectors and the M v The SD-TD basis vector pair is composed of an FD basis vector among the L FD basis vectors and a TD basis vector among the Q TD basis vectors, and the non-zero coefficient is composed of amplitude and phase.

95. The method according to claim 94, characterized in that The strongest coefficient indication is located in a second portion of the first UCI.

96. The method according to any one of claims 51-73, 79-89, 94, 95, characterized in that S is reported by the terminal device, or S is determined based on high-level parameters.

97. The method according to claim 96, characterized in that In the case where S is reported by the terminal device, S is reported through the first part of the first UCI.

98. The method according to any one of claims 51 to 97, characterized in that The first UCI also includes at least one non-zero coefficient; wherein the non-zero coefficient consists of amplitude and phase.

99. The method according to claim 98, characterized in that The at least one non-zero coefficient is located in a second portion of the first UCI.

100. The method according to claim 99, characterized in that The at least one non-zero coefficient is located in at least one group in the second part of the first UCI.

101. A terminal device, characterized in that: include: A communication unit, configured to send first uplink control information UCI; The first UCI includes: indices of L spatial domain SD basis vectors, M v The indices of the frequency domain FD basis vectors and the indices of the time domain TD basis vectors; The SD basis vector is a two-dimensional discrete Fourier transform DFT vector of length N1N2, the FD basis vector is a DFT vector of length N3, and the TD basis vector is a DFT vector of length N4. N1, N2, N3, N4, L, M v and Q are both positive integers.

102. A network device, characterized in that: include: A communication unit, configured to receive first uplink control information UCI; The first UCI includes: indices of L spatial domain SD basis vectors, M v The indices of the frequency domain FD basis vectors and the indices of the time domain TD basis vectors; The SD basis vector is a two-dimensional discrete Fourier transform DFT vector of length N1N2, the FD basis vector is a DFT vector of length N3, and the TD basis vector is a DFT vector of length N4. N1, N2, N3, N4, L, M v and Q are both positive integers.

103. A terminal device, characterized in that: include: A processor and a memory, the memory being used to store a computer program, the processor being used to call and run the computer program stored in the memory, so that the terminal device executes the method as claimed in any one of claims 1 to 50.

104. A network device, characterized in that: include: A processor and a memory, the memory being used to store a computer program, the processor being used to call and run the computer program stored in the memory, so that the network device executes the method as described in any one of claims 51 to 100.

105. A chip, characterized in that: It comprises: a processor, configured to call and run a computer program from a memory, so that a device equipped with the chip executes a method as claimed in any one of claims 1 to 50.

106. A chip, characterized in that: It comprises: a processor, configured to call and run a computer program from a memory, so that a device equipped with the chip executes a method as claimed in any one of claims 51 to 100.

107. A computer-readable storage medium, characterized in that Used for storing a computer program, when the computer program is executed, the method according to any one of claims 1 to 50 is implemented.

108. A computer-readable storage medium, characterized in that Used to store a computer program, when the computer program is executed, the method according to any one of claims 51 to 100 is implemented.

109. A computer program product, characterized in that The method comprises computer program instructions, and when the computer program instructions are executed, the method according to any one of claims 1 to 50 is implemented.

110. A computer program product, characterized in that Comprising computer program instructions, when the computer program instructions are executed, the method as claimed in any one of claims 51 to 100 is implemented.

111. A computer program, characterized in that When the computer program is executed, the method according to any one of claims 1 to 50 is implemented.

112. A computer program, characterized in that When the computer program is executed, the method according to any one of claims 51 to 100 is implemented.

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