Photonic crystal microcavity-based storage-computing integrated optical chip and preparation method thereof

Abstract

The application discloses a kind of based on photon crystal microcavity's storage and calculation integrated light chip and preparation method thereof, belong to optical quantum chip field.Light chip includes by lower to upper arrangement substrate, first contact layer, n-type GaAs contact layer, second contact layer and p-type GaAs contact layer;N-type electrode is prepared on step surface, step surface is formed by etching p-type GaAs contact layer and second contact layer and etching part n-type GaAs contact layer;Multiple p-type electrodes are prepared on the surface of p-type GaAs contact layer;Etching forms two-dimensional photonic crystal structure, which includes a photonic crystal waveguide and multiple photonic crystal microcavities, two gratings are etched at both ends of the photonic crystal waveguide, and air grooves are prepared below the two-dimensional photonic crystal structure and the grating.The light chip of the application can realize the optical calculation of matrix vector product and store the optical signal.

Description

Technical Field

[0001] This invention belongs to the field of optical quantum chips, specifically relating to an in-memory computing optical chip based on a photonic crystal microcavity and its fabrication method. Background Technology

[0002] With the failure of Moore's Law, the development of traditional electronic chips has been limited to some extent. In today's era, ever-evolving computing demands require the search for new computing methods that are faster and less resource-intensive. This has led to the development of photons as the information medium, forming quantum optical chips that can replace traditional electronic chips. Quantum optical chips use photons as the carrier for information transmission and processing, offering advantages such as high speed and low latency, low power consumption, high parallelism, and multi-dimensional multiplexing. They are crucial for meeting the computing power demands of next-generation information technologies such as cloud computing and artificial intelligence.

[0003] However, due to the lack of effective optical logic, storage, and interconnect units, current optical computing solutions cannot support on-chip training and on-chip information storage functions of optical computing chips. Especially in optical storage, existing optical memory solutions for optical computing face numerous challenges such as high power consumption, low storage density, and slow state switching speeds. Summary of the Invention

[0004] To address the problems in the prior art, this invention provides a memory-computing integrated optical chip based on a photonic crystal microcavity and its fabrication method.

[0005] The technical solution of the present invention is as follows:

[0006] In a first aspect, the present invention discloses a method for fabricating an in-memory computing optical chip based on a photonic crystal microcavity, comprising the following steps: preparing a III-V group semiconductor structure with semiconductor quantum dots, which includes, from bottom to top, a substrate, a first contact layer, an n-type GaAs contact layer, a second contact layer, and a p-type GaAs contact layer; the second contact layer contains a quantum dot layer; etching the p-type GaAs contact layer, the second contact layer, and a portion of the n-type GaAs contact layer to form a stepped surface, and fabricating an n-type electrode on the stepped surface; uniformly fabricating a plurality of p-type electrodes on the surface of the p-type GaAs contact layer along its width direction; etching to form a two-dimensional photonic crystal structure, the two-dimensional photonic crystal structure including a photonic crystal waveguide and a plurality of photonic crystal microcavities equal in number to the p-type electrodes, wherein one p-type electrode controls the transmittance of one photonic crystal microcavity; etching the p-type GaAs contact layer to insulate the photonic crystal microcavities from each other and to insulate the p-type electrodes from each other; etching two gratings at both ends of the photonic crystal waveguide; etching the two-dimensional photonic crystal structure and the first contact layer below the gratings to form an air groove.

[0007] Secondly, the present invention provides a memory-computing optical chip based on a photonic crystal microcavity prepared using the method described above.

[0008] Furthermore, the n-type electrode, p-type electrode, grating, and two-dimensional photonic crystal structure constitute an optical chip unit. The III-V group semiconductor structure has multiple optical chip units arranged in the same direction and parallel to each other, and the arrangement direction of the multiple optical chip units is consistent with the length direction of the III-V group semiconductor structure.

[0009] Thirdly, this invention discloses an optical convolution operation method using the aforementioned in-memory computing optical chip, comprising the following steps: First, an external light intensity beam splitter divides the light beam to be input to the optical chip into M paths according to intensity and inputs them into M optical chip units respectively; wherein, the light beam to be input to the optical chip contains light of N wavelengths, and the number of p-type electrodes in the optical chip unit is also N; then, an external voltage source is connected to an n-type electrode and a p-type electrode located in one optical chip unit to form an electrical circuit, wherein each p-type electrode forms an electrical circuit with an n-type electrode respectively; one path of light is input into a grating of one optical chip unit, and after diffraction by the grating, the light is coupled into a photonic crystal waveguide, and light of a specific wavelength resonates at the corresponding photonic crystal microcavity and is absorbed and stored, the remaining light is transmitted to another grating, and after diffraction, is received by an external avalanche photodiode detector, finally obtaining the product of an M×N matrix and an N×1 vector; wherein, by adjusting the voltage of each electrical circuit, the resonant wavelength of the corresponding photonic crystal microcavity is changed, thereby controlling the transmittance of each wavelength.

[0010] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0011] This invention employs methods such as electron beam lithography, metal lift-off, dry etching, wet etching, and electro-evaporation for micro-nano fabrication, forming micro-nano structures such as air slots, two-dimensional photonic crystal structures, gratings, and metal electrodes on the sample. The two-dimensional photonic crystal structure includes a photonic crystal waveguide and multiple photonic crystal microcavities. The air slot is located below the two-dimensional photonic crystal structure and the grating, satisfying the total internal reflection condition of the photonic crystal waveguide and overcoming the problem of no cladding in the sample when the photonic crystal waveguide and grating are coupled. At the same time, when light is coupled from the photonic crystal waveguide to the grating and diffracts, the air slot can also reflect the diffracted light, preventing the light from entering the i-type GaAs substrate. Therefore, with the air slot, the diffracted and downward-moving light will collide with the air boundary of the air slot and be reflected, which also improves the light collection efficiency to a certain extent. Similar to ordinary waveguides, photonic crystal waveguides can be used to transmit light within a certain wavelength range. The photonic crystal waveguide of this invention transmits light with wavelengths of 780–1000 nm. The two-dimensional photonic crystal structure has 16–20 rows of photonic crystal holes, with 20–40 photonic crystal holes periodically arranged in each row. The middle portion of the two-dimensional photonic crystal structure lacks three rows of photonic crystal holes, forming a line defect, thus creating the photonic crystal waveguide. The formation of a photonic crystal microcavity is similar to that of a photonic crystal waveguide. Three to five photonic crystal holes are removed from the interior of the two-dimensional photonic crystal structure, forming a point defect, which is the photonic crystal microcavity. The photonic crystal microcavity can resonate with light of a specific wavelength, thereby localizing most of that wavelength of light within its interior. Furthermore, it can resonate with light of different wavelengths by changing its size. P-type and n-type electrodes can adjust the wavelength of the quantum dots in the photonic crystal microcavity and the refractive index of the photonic crystal microcavity by providing a certain voltage, thereby obtaining light composed of different wavelengths. By effectively utilizing all structures, this invention ultimately achieves a low-loss, high-density, addressable multi-bit optical storage chip. Specifically, the response speed of this in-memory computing optical chip can be reduced to below 100 ps, ​​the power consumption for a single memory state switch is no more than 1 fJ, the power consumption for maintaining a certain memory state is 1 μW, and the required storage area is less than 44 μm. 2 The number of units is 5×5. Attached Figure Description

[0012] Figure 1 This is a front view of a stacked structure of epitaxially grown group III-V semiconductors with semiconductor quantum dots;

[0013] Figure 2 This is a cross-sectional view of a III-V group semiconductor structure after the step surface used to fabricate an n-type electrode has been processed.

[0014] Figure 3 This is a cross-sectional view of a III-V group semiconductor structure after the n-type electrode has been fabricated;

[0015] Figure 4 This is a cross-sectional view of a III-V group semiconductor structure after the p-type electrode has been fabricated;

[0016] Figure 5 This is a cross-sectional view of a III-V group semiconductor structure after it has been processed into a two-dimensional photonic crystal structure;

[0017] Figure 6 This is a cross-sectional view of a III-V group semiconductor structure after the electrical insulating structure has been fabricated.

[0018] Figure 7 This is a cross-sectional view of a III-V group semiconductor structure after the air slots have been fabricated;

[0019] Figure 8 This is a top view of an optical chip unit in a group III-V semiconductor structure;

[0020] Figure 9 This is a top view of the optical chip structure formed by five optical chip units after the optical chip has been processed.

[0021] Figure 10 This is a flowchart of the fabrication process of the in-memory computing integrated optical chip of the present invention.

[0022] In the figure: 1. p-type GaAs contact layer; 2. i-type GaAs contact layer; 3. i-type Al 0.3 Ga 0.7 4. As contact layer; 5. InAs quantum dot layer; 6. i-type GaAs contact layer; 7. n-type GaAs contact layer; 8. n-type Al 0.6 Ga 0.4 As contact layer; 8.i type Al 0.6 Ga 0.4 9. As contact layer; 10. i-type GaAs substrate; 11. Quantum dot structure; 12. Dry etching platform; 13. n-type electrode; 14. p-type electrode; 15. Two-dimensional photonic crystal structure; 16. Electrically insulating structure; 17. Air groove; 18. Grating; 19. Photonic crystal waveguide; 10. Photonic crystal microcavity. Detailed Implementation

[0023] The present invention will be further described and illustrated below with reference to specific embodiments. The embodiments described are merely examples of the content of this disclosure and do not limit the scope of the invention. The technical features of each embodiment in the present invention can be combined accordingly, provided that there is no mutual conflict.

[0024] To facilitate understanding of this invention, some terms are introduced below.

[0025] First, a waveguide is a transmission line that is similar to a pipe. There is a difference in refractive index between the inside and outside of the waveguide. Light that meets a certain angle will undergo total internal reflection at the sidewall of the waveguide. Therefore, the light is confined by the waveguide and will not diverge. This specific angle is the numerical aperture of the waveguide.

[0026] Quantum dots are ideal two-level systems, typically grown through epitaxial growth or filling methods. Due to their small size, approximately tens of nanometers wide, quantum dots are subject to the quantum confinement effect, resulting in a two-level system. Quantum dots are ideal single-photon sources; when light with the same frequency (wavelength) as the two levels is incident, electrons in the quantum dot migrate from the ground state to an excited state, generating a single photon. This invention also utilizes the Stark effect of quantum dots, adjusting the emission frequency of the quantum dots through an electrical bias voltage. The emission wavelength of the quantum dots used in this invention is between 780 nm and 1000 nm.

[0027] A photonic crystal is a micro / nano structure with a periodic arrangement of refractive indices. The present invention uses a two-dimensional photonic crystal structure, which is formed by dry etching to create nano-air columns, thereby achieving a structure with a periodic arrangement of refractive indices. Similar to ordinary crystals, photonic crystals generate photonic bands similar to electronic bands due to their periodic structure, and also generate photonic band gaps. The generation of these band gaps allows photonic crystals to prevent light of certain frequencies (wavelengths) from passing through them.

[0028] A photonic crystal waveguide is a waveguide formed by fabricating line defects on a two-dimensional photonic crystal. This structure is similar to that of a conventional waveguide, but it has a stronger localization of light. This is because the photonic crystal waveguide reduces the group velocity of light. At the same time, the magnitude of the group velocity of light can be controlled by design. After the group velocity of light is reduced, the interaction between light and materials is greatly enhanced, and the efficiency reduction caused by material loss is also greatly reduced.

[0029] A photonic crystal microcavity is a structure created by fabricating point defects on a two-dimensional photonic crystal. If the defect state formed by the defect is within the bandgap of the photonic crystal, light of that frequency (wavelength) will be localized within the microcavity. Due to the reflection effect of the bandgap of the surrounding intact photonic crystal, light with frequencies falling within the bandgap is reflected back to the defect region and cannot propagate outward. Therefore, the light is effectively confined within the defect region and reflects back and forth within the microcavity, forming optical resonances, thus achieving effective light confinement. This confinement mechanism enables photonic crystal microcavities to achieve a high quality factor and extremely small mode volume, thereby significantly enhancing the light intensity within the cavity and the interaction between light and matter. Meanwhile, photonic crystal microcavities have a lifetime. The longer the lifetime of a photonic crystal microcavity, the longer the light can exist within it. The lifetime of a microcavity is inversely proportional to its quality factor Q, a crucial parameter. Q is directly proportional to the reciprocal of the resonant frequency and loss rate of the microcavity. The longer the light can exist within the photonic crystal microcavity, the better the storage effect. From the above analysis, it is clear that the storage effect is mainly affected by the quality factor of the microcavity. Photonic crystal microcavities can be used to store light at a specific resonant wavelength while simultaneously reducing the transmittance of that wavelength.

[0030] A photonic crystal side-coupled cavity is a structure that couples a photonic crystal waveguide and a photonic crystal microcavity. Specifically, a photonic crystal microcavity is fabricated near the photonic crystal waveguide. This allows light resonating with the microcavity to pass through the waveguide and be localized within the microcavity, reducing the intensity of that frequency light within the waveguide. In this invention, five photonic crystal microcavities are located beneath one photonic crystal waveguide.

[0031] A grating is a periodic optical micro / nano structure. Due to the periodic change in refractive index, the propagation angle of the light beam arriving at the grating can be changed. Combining the grating with a waveguide can emit light in the waveguide in a manner perpendicular to the sample surface.

[0032] Electron beam lithography is a technique that uses high-energy focused electrons to perform photolithography. The electrons directly act on electron-sensitive photoresist to form the desired pattern. Due to its short wavelength, electron beam lithography has high resolution, achieving linewidths of several nanometers. Applying electron beam lithography, it is possible to couple quantum dots into a side-coupled cavity of a photonic crystal and collect single photons emitted by the quantum dots using a grating.

[0033] Laser direct writing is a technique that uses a focused laser of a certain intensity to alter the intrinsic properties (such as refractive index or corrosion resistance) of a medium at specific locations. The intensity of the laser light at the focal point is I, and the threshold intensity that the medium can withstand is I0. th , when I>I thWhen this laser is applied to a UV photoresist, certain properties of the medium (such as refractive index or corrosion resistance) are altered. This laser action on the UV photoresist can create the desired pattern.

[0034] Electrodeposition is a method for depositing a metal film on the surface of a material. In this invention, photoresist is first spin-coated onto the material, and the areas where the desired metal deposition is desired are exposed. Then, the desired metal is converted into a gaseous state by electrical heating, thereby depositing it on the material surface (i.e., electrodeposition). Next, the material undergoes metal stripping. The metal-deposited material is placed in NMP (N-methylpyrrolidone, a solution for removing photoresist) and subjected to ultrasonic vibration treatment. The photoresist areas that were not previously exposed are thus stripped along with the metal, resulting in the desired metal structure.

[0035] Thermal annealing is a process of treating and cooling a metal at high temperatures in a specific gas atmosphere. It alters certain physical properties of the metal to achieve different purposes. In this invention, thermal annealing is used to transform the Schottky contact between the n-type electrode and the n-type GaAs contact layer into an ohmic contact, thereby achieving a lower resistance value between the n-type electrode and the n-type GaAs contact layer and better current-voltage regulation.

[0036] Dry etching is a commonly used isotropic etching method. It is a process of removing solid films by chemically reacting with neutral substances in the ground or excited state. At low pressure, a corresponding plasma is generated in the gas. At the same time, a magnetic induction coupling coil is added to the equipment to enhance the downward directionality of the plasma. These plasma gas flows react with the sample surface and produce volatile substances. The volatile substances are carried away in the subsequent vacuum environment, and finally the etching is completed.

[0037] Wet etching is an anisotropic etching method that mainly uses specific acidic or alkaline solutions to perform etching.

[0038] The present invention will now be described in further detail with reference to the accompanying drawings:

[0039] This invention utilizes various micro / nano fabrication methods to fabricate n-type electrodes 12 and p-type electrodes 13 on a group III-V semiconductor structure with quantum dots, and then etches p-type GaAs contact layer 1, i-type GaAs contact layer 2, and i-type Al... 0.3 Ga 0.7A two-dimensional photonic crystal structure is fabricated using As contact layer 3, InAs quantum dot layer 4, i-type GaAs contact layer 5, and n-type GaAs contact layer 6. This two-dimensional photonic crystal structure includes a photonic crystal waveguide 18 and multiple photonic crystal microcavities 19. Then, the p-type GaAs contact layer 1 and i-type GaAs contact layer 2 are etched to fabricate an electrically insulating structure 15, followed by the fabrication of a grating 17 and an air groove 16. After fabrication, process error analysis is performed on the device morphology before final use. Figure 1-8 and Figure 10 As shown, the specific implementation steps for fabricating a memory-based optical chip with a photonic crystal microcavity are as follows:

[0040] Step 1: Grow a group III-V semiconductor structure with quantum dots using epitaxy, such as... Figure 1 As shown, the III-V group semiconductor structure includes, from bottom to top, an i-type GaAs substrate 9 and an i-type Al substrate 9. 0.6 Ga 0.4 As contact layer 8, n-type Al 0.6 Ga 0.4 As contact layer 7, n-type GaAs contact layer 6, i-type GaAs contact layer 5, InAs quantum dot layer 4, i-type Al 0.3 Ga 0.7 As contact layer 3, i-type GaAs contact layer 2, and p-type GaAs contact layer 1; wherein, i-type Al 0.6 Ga 0.4 As contact layer 8 and n-type Al 0.6 Ga 0.4 As contact layer 7 constitutes the first contact layer, i-type GaAs contact layer 5, InAs quantum dot layer 4, i-type Al... 0.3 Ga 0.7 The As contact layer 3 and the i-type GaAs contact layer 2 constitute the second contact layer; the InAs quantum dot layer 4 is used to generate single photons, and it is formed by lattice mismatch between the InAs and GaAs layers. It can generate single photons under laser excitation of a corresponding wavelength, such as... Figure 1 As shown in the front view, the thickness of p-type GaAs contact layer 1 is 30–50 nm, the thickness of i-type GaAs contact layer 2 is 3–10 nm, and the thickness of i-type Al... 0.3 Ga 0.7 The thickness of As contact layer 3 is 50–60 nm, the thickness of InAs quantum dot layer 4 is 10–20 nm, the thickness of i-type GaAs contact layer 5 is 40–50 nm, the thickness of n-type GaAs contact layer 6 is 30–50 nm, and the thickness of n-type Al... 0.6 Ga 0.4 The thickness of the As contact layer 7 is 200–250 nm, and the i-type Al 0.6 Ga 0.4The thickness of the As contact layer 8 is 700–900 nm, n-type Al 0.6 Ga 0.4 As contact layer 7 and type I Al 0.6 Ga 0.4 The As contact layer 8 is a sacrificial layer, and the thickness of the i-type GaAs substrate 9 is 300-500 μm. It is a substrate structure of group III-V semiconductor material and does not have any role in micro-nano structures.

[0041] Step 2: A stepped surface is fabricated using laser direct writing and dry etching techniques to expose the n-type GaAs contact layer 6; an n-type electrode 12 is fabricated using electro-evaporation, metal lift-off, and thermal annealing techniques; a p-type electrode 13 is fabricated using electro-evaporation and metal lift-off techniques; a two-dimensional photonic crystal structure 14 is fabricated using electron beam lithography and dry etching techniques, which includes a photonic crystal waveguide 18 and multiple photonic crystal microcavities 19; an electrically insulating structure 15 is fabricated using laser direct writing and dry etching techniques to isolate the p-type electrodes 13 from each other and to isolate each photonic crystal microcavity 19, ensuring that they can control different photonic crystal microcavities 19; a grating 17 is fabricated using electron beam lithography and dry etching techniques; and finally, an air groove 16 is fabricated using wet etching techniques.

[0042] like Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 and Figure 10 As shown, the specific preparation method is as follows:

[0043] An n-type electrode 12, a p-type electrode 13, a two-dimensional photonic crystal structure 14, an electrically insulating structure 15, a grating 17, and an air groove 16 are fabricated.

[0044] 2.1) Spin-coat AZ5214 (negative resist) onto the upper surface of the p-type GaAs contact layer 1; then, use laser direct writing to photolithographically imprint the desired pattern onto the spin-coated photoresist. The desired pattern is the shape that needs to form a stepped surface on the n-type GaAs contact layer. The p-type GaAs contact layer 1 and the second contact layer, as well as a portion of the n-type GaAs contact layer 6, are etched using a dry etching method to form a stepped surface on the n-type GaAs contact layer 6, thus forming a... Figure 2 The structure of the dry etching platform 11 shown is as follows;

[0045] 2.2) As Figure 3As shown, AR-P 5350 (negative resist) is spin-coated onto the step surface of the n-type GaAs contact layer 6. The desired pattern, the shape of the n-type electrode, is then photolithographically etched onto the spin-coated photoresist using laser direct writing. Exposure and development are then performed. Next, five metal layers—nickel, germanium, gold, nickel, and gold—are sequentially deposited onto the step surface of the n-type GaAs contact layer 6 using electro-evaporation. The five metal layers are then stripped, i.e., the unexposed photoresist is removed using a photoresist removal solution, which also removes the metal layers deposited on the photoresist surface. Finally, thermal annealing is performed to obtain the n-type electrode 12. Therefore, the n-type electrode consists of five metal layers composed of three metals: Ni, Ge, and Au, arranged from top to bottom as a 10nm Ni metal layer, a 60nm Ge metal layer, a 120nm Au metal layer, a 10nm Ni metal layer, and a 100nm Au metal layer. Au metal layer, where Au is the main conductive component of n-type electrode 12, Ge metal can enter n-type GaAs layer 6 during thermal annealing, thereby replacing Ga inside to form ohmic contact, and after forming ohmic contact, quantum dots can be better electrically controlled; Ni metal plays a lubricating role in this process.

[0046] 2.3) As Figure 4 As shown, AR-P 5350 (negative resist) is spin-coated onto the upper surface of the p-type GaAs contact layer 1. Then, the desired pattern is photolithographically etched onto the spin-coated photoresist using laser direct writing. The desired pattern is the shape of the p-type electrode 13. After exposure and development, chromium and gold are sequentially deposited on the surface of the p-type GaAs contact layer 1 using electro-evaporation to form two metal layers. Next, the two metal layers are stripped, i.e., the unexposed photoresist is removed using a photoresist removal solution, which also removes the metal layers deposited on the photoresist surface, thus obtaining the n-type electrode. Therefore, the p-type electrode 13 is composed of two metals, Cr and Au. The Au metal layer is 100 nm long, and the Cr metal layer is 15 nm long. The Au metal layer is on top of the Cr metal layer. Au is the main conductive component of the p-type electrode 13, and Cr plays a role in enhancing the contact.

[0047] 2.4) As Figure 5 , Figure 6 and Figure 8As shown, AR-P 6200.13 electron beam photoresist (positive photoresist) is spin-coated onto the surface of the p-type GaAs contact layer 1. The desired pattern is transferred onto the spin-coated photoresist using electron beam lithography. The desired pattern is a two-dimensional photonic crystal structure 14 and a grating 17 designed based on physical principles such as cavity quantum electrodynamics and waveguide optics. The two-dimensional photonic crystal structure 14 includes a photonic crystal waveguide 18 and multiple photonic crystal microcavities 19. Then, the exposed pattern on the photoresist is removed using a developer, specifically AR-P6200 series developer. Finally, the pattern is removed using dry etching. The transfer to a III-V group semiconductor material involves the following steps: etching a p-type GaAs contact layer 1, a second contact layer, and an n-type GaAs contact layer 6 to form a two-dimensional photonic crystal structure 14. A photonic crystal waveguide 18 is located at the center of the two-dimensional photonic crystal structure 14, and the length direction of the photonic crystal waveguide 18 is consistent with the width direction of the p-type GaAs contact layer 1. The number of photonic crystal microcavities 19 is equal to the number of p-type electrodes 13, and one p-type electrode 13 is used to control the refractive index of one photonic crystal microcavity 19. Figure 5 As shown, after fabricating the two-dimensional photonic crystal structure 14, AR-P 6200.13 electron beam photoresist (positive photoresist) is spin-coated onto the surface of the p-type GaAs contact layer 1. Then, electron beam lithography is used to etch the p-type GaAs contact layer 1 to insulate the p-type electrodes 13 from each other and to insulate the photonic crystal microcavities 19 from each other, thus completing the fabrication of the electrically insulating structure 15. The width of the upper and lower ends of this electrically insulating structure 15 is 1-2 μm, and the width of the left, right and middle parts is 1-3 μm.

[0048] Then, gratings 17 are fabricated. The p-type GaAs contact layer 1, the second contact layer, and the n-type GaAs contact layer 6 at both ends of the photonic crystal waveguide 18 are etched to form two gratings 17. The gratings 17 can be any type of grating in the prior art. In a specific embodiment of the present invention, each grating is composed of two semi-circular slits or multiple arc-shaped slits, with the protruding ends of the semi-circular and arc-shaped slits facing away from the photonic crystal waveguide 18. When a grating is composed of two semi-circular slits, the width of the semi-circular slit is 450–500 nm, and the distance between the two arc-shaped slits is 141–157 nm. When a grating is composed of multiple arc-shaped slits, the number of arc-shaped slits in a grating is 10–20, the central angle of the arc-shaped slit is 20–40 degrees, the width of the arc-shaped slit is 300 nm–400 nm, and the distance between two adjacent arc-shaped slits is 150 nm–200 nm.

[0049] Finally, the residual photoresist on the III-V group semiconductor material is removed to obtain... Figure 7 The structure shown.

[0050] 2.5) such as Figure 7As shown, the first contact layer beneath the two-dimensional photonic crystal structure 14 and the grating 17 is etched using wet etching to form an air groove 16. After fabrication, each photonic crystal microcavity 19 and each p-type electrode 13 are corresponding one-to-one through the fabrication of the electrical insulation structure 15, and one electrode will only control one photonic crystal microcavity 19.

[0051] The n-type electrode 12, p-type electrode 13, grating 17, and two-dimensional photonic crystal structure 14 prepared in steps 2.1)-2.5) constitute an optical chip unit. Multiple optical chip units are arranged parallel to each other along the same direction on the III-V group semiconductor structure, and the arrangement direction of the multiple optical chip units is consistent with the length direction of the III-V group semiconductor structure. Figure 8 As shown, a III-V group semiconductor structure has 5 optical chip units, and the spacing between each unit is 127um; that is, these 5 optical chip units constitute a memory computing optical chip based on a photonic crystal microcavity.

[0052] In the above steps, the n-type electrode 12 needs to be prepared first, because the n-type electrode 12 needs to be thermally annealed to form an ohmic contact, but the p-type electrode 13 does not need to be thermally annealed.

[0053] The two-dimensional photonic crystal structure 14 prepared by the above method has photonic crystal holes with a radius of 70-80 nm and a distance of 200-240 nm between the centers of two adjacent photonic crystal holes. The two-dimensional photonic crystal structure 14 has 16-20 rows of photonic crystal holes, with 20-40 photonic crystal holes in each row. The length of the photonic crystal waveguide 18 is equal to the length of the two-dimensional photonic crystal structure 14, and the width of the photonic crystal waveguide 18 is 340-420 nm. The distance between the photonic crystal waveguide 18 and the photonic crystal microcavity 19 is 2-3 photonic crystal holes. The length of the photonic crystal microcavity 19 is 3-5 photonic crystal holes, and the width of the photonic crystal microcavity 19 is one photonic crystal hole.

[0054] In one specific embodiment of the invention, wet etching uses a 1:20 hydrofluoric acid solution, which can selectively corrode type I Al. 0.6 Ga 0.4 As contact layer 8 and n-type Al 0.6 Ga 0.4 As contact layer 7 Al 0.6 Ga 0.4 As will not corrode other GaAs contact layers and quantum dot layers. The hydrofluoric acid solution enters the i-type Al from the grating 17 and photonic crystal holes generated after dry etching. 0.6 Ga 0.4 As contact layer 8 and n-type Al 0.6 Ga 0.4As the contact layer 7, the final etching process creates an approximately square air groove 16. This air groove 16 is located below the etched two-dimensional photonic crystal structure 14 and the grating 17 to satisfy the total internal reflection localization condition of the photonic crystal waveguide 18. Simultaneously, when a single photon couples from the photonic crystal waveguide 18 into the grating 17 and undergoes diffraction, the air groove 16 can also reflect the diffracted single photon, preventing it from entering the i-type GaAs substrate 9. Therefore, with the air groove 16, the diffracted and downward-moving single photon will collide with the air boundary of the air groove 16 and be reflected, thus improving the single photon collection rate to some extent. Without the air groove 16 located below the grating 17, the diffracted and downward-moving single photon would enter the i-type GaAs substrate 9 and be absorbed by it, reducing the number of collected single photons and lowering the single photon collection rate. Meanwhile, since the metal used in the electrodes is resistant to a 1:20 hydrofluoric acid solution, the already fabricated n-type electrode 12 and p-type electrode 13 will not be corroded.

[0055] During fabrication, smooth sidewalls of the photonic crystal apertures and grating 17 are crucial. Therefore, this invention employs methods such as low-temperature development to achieve this effect. Smooth sidewalls contribute to improved light transmission and grating efficiency. Furthermore, electrode fabrication requires a laser direct-writing overlay step, where overlay accuracy is paramount. The laser direct-writing instrument used in this invention achieves overlay accuracy at the micrometer level.

[0056] This concludes the process. Figure 7 The structure shown is constructed, and the functions of each part are as follows:

[0057] The grating 17 can change the propagation angle of the light beam arriving at the grating. Combining the grating with the waveguide allows light in the waveguide to be emitted perpendicular to the sample surface. The grating 17 of this invention includes, but is not limited to, a semi-circular grating composed of two semi-circular slits, an arc grating composed of two arc-shaped slits, a uniform grating, a two-dimensional grating coupler, or a blazed grating, etc., which have the same effect. The grating 17 composed of two semi-circular slits is a semi-circular grating. The grating is etched to form a semi-circular ring grating. The function of this semi-circular grating is to couple light within the plane of the photonic crystal waveguide 18 to a plane perpendicular to the photonic crystal waveguide 18, resulting in relatively high transmission efficiency. One of the important parameters of grating 17 is its exit angle. The exit angle of grating 17 is defined as the angle between the angle at which light exits from grating 17 and the normal to the plane of grating 17. Generally, the exit angle of a grating is between 0 and 90°. Due to the existence of grating diffraction, the light diffracted from the grating has diffraction orders. These diffraction orders are divided into principal diffraction orders and secondary diffraction orders. The principal diffraction order has the highest light intensity, while the secondary diffraction order is weaker. In this invention, the principal diffraction order exit angle of the grating 17 composed of two semi-circular slits is about 4°, that is, the principal diffraction order exit angle of grating 17 is 4 to 5 degrees. The principal diffraction order exit angle of the grating 17 composed of multiple arc-shaped slits is about 8°, that is, 8 to 15 degrees. That is, it is basically perpendicular to the grating plane. In this invention, the coupling efficiency of the grating 17 composed of two semi-circular slits can theoretically reach 40% to 55%, and the coupling efficiency of the grating 17 composed of multiple arc-shaped slits can theoretically reach 60% to 75%.

[0058] Photonic crystal waveguide 18 and photonic crystal microcavity 19 contain p-type GaAs contact layer 1, i-type GaAs contact layer 2, and i-type Al 0.3 Ga 0.7The structure consists of an As contact layer 3, an InAs quantum dot layer 4, an i-type GaAs contact layer 5, and an n-type GaAs contact layer 6. The photonic crystal waveguide 18 transmits light. Within the photonic crystal waveguide 18, the group velocity of light is reduced. When light passes through a photonic crystal microcavity 19 near the waveguide 18, the lower group velocity allows for stronger coupling with the microcavity. Simultaneously, air and air slots 16 enclose the waveguide 18 in a direction perpendicular to the plane, localizing the light within it. The width of the photonic crystal waveguide 18 is 340–420 nm. The photonic crystal microcavity 19 stores light of a certain frequency passing through the waveguide 18. The microcavity 19 can resonate with this frequency, causing the resonant light to oscillate within it, thus reducing the intensity of this frequency light in the waveguide 18. Ultimately, the intensity of light of this frequency in the light reaching the grating 17 through the photonic crystal waveguide 18 decreases. The transmittance of the photonic crystal microcavity 19 is related to the size, refractive index, and wavelength of the light. A bias voltage can be applied to the quantum dots in the InAs quantum dot layer 4 through the n-type electrode 12 and the p-type electrode 13. Due to the quantum confinement Stark effect, the emission frequency (wavelength) of the quantum dots in the photonic crystal waveguide 18 can be adjusted. The adjustable range is about 7 meV / V, corresponding to a wavelength range of several nanometers. By adjusting the wavelength of the quantum dots, the transmittance of light in the microcavity can be changed, which in turn changes the transmittance of light reaching the grating 17 through the photonic crystal waveguide 18. This achieves the change of a row value in the 5×5 matrix in the optical convolution calculation. In this invention, a 5×5 matrix is ​​used for illustration. Similarly, this invention can be extended to the multiplication of an M×N matrix and an N×1 vector.

[0059] After completing such Figure 9After fabrication as shown, the present invention will perform electrical and optical performance tests. The electrical performance tests include testing the performance of the quantum dots adjusted by the electrodes and measuring the switching time of the electro-optical memory fabricated in this invention. For the former, the present invention will extract the resonant spectrum of the quantum dots by measuring different bias voltages. First, the quantum dots are resonantly driven by a narrow-linewidth continuous-wave (CW) laser, and the wavelength of the narrow-linewidth laser is continuously scanned to measure the fluorescence spectral signal entering the spectrometer. The center wavelength information of the quantum dots is obtained by fitting the fluorescence spectrum. By continuously changing the bias voltage applied to the quantum dots, the present invention measures the change of the resonant energy of the quantum dots with the bias voltage. For the latter, the present invention will use a square wave generated by a high-speed waveform generator to load the electro-optical memory, then pass a continuous laser beam through it and detect the laser signal using a high-speed avalanche photodiode detector. The output signal of the avalanche photodiode detector is connected to a high-speed oscilloscope. Ideally, the signal detected by the oscilloscope should also be a square wave signal. The rise time and fall time of the square wave signal correspond to the switching time of the electro-optical memory. The above measurement techniques can also be used to measure the storage time of the electro-optical memory of this invention. In this invention, square waves with the same duty cycle but different periods are loaded onto the electro-optical memory. Then, a continuous laser is passed through the electro-optical memory, and the time-domain response of the output optical signal is detected using an avalanche photodiode detector and an oscilloscope. The duration of the high voltage of the output square wave signal corresponds to the storage time of the electro-optical memory. In the power consumption calibration of the electro-optical memory, this invention applies different voltages to the electro-optical memory cells using a Keithley source meter while simultaneously detecting leakage current, i.e., measuring the IV curve of the electro-optical memory. By calculating P = I × V, the power consumption of the electro-optical memory can be obtained. The response speed of the in-memory computing optical chip of this invention can be reduced to below 100 ps, ​​the power consumption for a single switching of storage states is no more than 1 fJ, and the power consumption for maintaining a certain storage state is 1 μW.

[0060] This invention also provides an optical convolution method for an in-memory computing optical chip based on a photonic crystal microcavity. First, there is the computational method at the algorithm level. The core computational method is optical convolution operation, which is matrix-vector multiplication. Mathematically, it is the multiplication of an M×N matrix and an N×1 vector. This computational method is the core operation in optical computing. In this invention, it is explained as M=N=5, that is, the multiplication of a 5×5 matrix and a 5×1 vector. First, a broadband light source is demultiplexed into five paths, that is, divided into five paths according to wavelength. Each path is polarization controlled and modulated with a variable optical attenuator. These five paths are 5×1 vectors. Different vector values ​​can be obtained by modulating the light intensity. Then, these five paths are multiplexed, that is, recombined. The current beam contains light of five wavelengths. Then, it passes through an intensity beam splitter to divide the five beams into five paths according to intensity. These five paths are also the input light sources for five optical computing channels. Each channel consists of an incident and an exit grating, a photonic crystal waveguide 18, and five photonic crystal microcavities 19. The five photonic crystal microcavities 19 can resonate with the five wavelengths of light after demultiplexing. These five channels are also 5×5 matrices. When light enters the channel, it passes near the photonic crystal microcavity 19 that resonates with this wavelength. The light of that wavelength then enters the photonic crystal microcavity 19, reducing the amount of light of that wavelength passing through the photonic crystal waveguide 18 and decreasing the overall transmittance of that wavelength in the photonic crystal waveguide 18. Through electrical control, the wavelength of the quantum dot can be adjusted. Due to the dispersion relationship between wavelength and refractive index, the refractive index of the photonic crystal microcavity 19 changes, thereby adjusting the transmittance of the resonant light entering the photonic crystal microcavity 19 and thus the transmittance of single photons passing through the photonic crystal waveguide 18. By adjusting each photonic crystal microcavity 19 in each path, different values ​​of the 5×5 matrix can be obtained. Finally, the calculated results are obtained by measuring the emitted light using an avalanche photodiode detector. The 5×5 matrix-vector multiplication in this invention is not an upper limit; similar to the principle and preparation method in this invention, it can be extended to n×n matrix-vector multiplication in the future.

[0061] The above-described embodiments are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. Those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention.

Claims

1. A method for fabricating a memory-in-memory optical chip based on a photonic crystal microcavity, characterized in that, Includes the following steps: A group III-V semiconductor structure with semiconductor quantum dots is prepared, which includes, from bottom to top, a substrate, a first contact layer, an n-type GaAs contact layer, a second contact layer, and a p-type GaAs contact layer; the second contact layer contains a quantum dot layer; Etching the p-type GaAs contact layer, the second contact layer, and part of the n-type GaAs contact layer forms a step surface, and an n-type electrode is fabricated on the step surface; Multiple p-type electrodes are uniformly fabricated on the surface of a p-type GaAs contact layer along its width direction; Etching forms a two-dimensional photonic crystal structure, which includes a photonic crystal waveguide and multiple photonic crystal microcavities equal in number to the p-type electrodes. Each p-type electrode controls the transmittance of a photonic crystal microcavity. Etching a p-type GaAs contact layer insulates the photonic crystal microcavities from each other and the p-type electrodes from each other. Two gratings are etched at both ends of the photonic crystal waveguide; An air groove is formed by etching the two-dimensional photonic crystal structure and the first contact layer below the grating.

2. The method for fabricating a memory-in-memory optical chip based on a photonic crystal microcavity according to claim 1, characterized in that, Methods for preparing n-type electrodes include: Photoresist is spin-coated onto the step surface of the n-type GaAs contact layer, and then the pattern corresponding to the shape of the n-type electrode is photolithographically etched onto the photoresist. Then, exposure and development are performed. Nickel, germanium, gold, nickel and gold are sequentially deposited on the step surface of the n-type GaAs contact layer to form five metal layers. Then, the unexposed photoresist is removed using a photoresist removal solution, and then thermal annealing is performed to obtain the n-type electrode. The thicknesses of the five metal layers from bottom to top are 10nm, 60nm, 120nm, 10nm and 100nm, respectively.

3. The method for fabricating a memory-in-memory optical chip based on a photonic crystal microcavity according to claim 1, characterized in that, Methods for preparing p-type electrodes include: Photoresist is spin-coated onto the surface of the p-type GaAs contact layer, and then the pattern corresponding to the shape of the p-type electrode is photolithographically etched onto the photoresist. After exposure and development, chromium and gold are sequentially deposited on the surface of the p-type GaAs contact layer to form two metal layers using electro-evaporation. Then, the unexposed photoresist is removed using a photoresist removal solution to obtain the p-type electrode. The thicknesses of the two metal layers from bottom to top are 100 nm and 15 nm, respectively.

4. The method for fabricating a memory-in-memory optical chip based on a photonic crystal microcavity according to claim 1, characterized in that, A two-dimensional photonic crystal structure is formed by etching a p-type GaAs contact layer, a second contact layer, and an n-type GaAs contact layer. The radius of the photonic crystal holes in the two-dimensional photonic crystal structure is 70-80 nm, and the distance between the centers of two adjacent photonic crystal holes is 200-240 nm. The two-dimensional photonic crystal structure has 16-20 rows of photonic crystal holes, and the number of photonic crystal holes in each row is 20-40. The photonic crystal waveguide is located at the middle of the two-dimensional photonic crystal structure, and the length direction of the photonic crystal waveguide is consistent with the width direction of the p-type GaAs contact layer. The length of the photonic crystal waveguide is equal to the length of the two-dimensional photonic crystal structure, and the width of the photonic crystal waveguide is 340–420 nm. The distance between the photonic crystal waveguide and the photonic crystal microcavity is 2–3 photonic crystal holes. The length of the photonic crystal microcavity is 3–5 photonic crystal holes, and the width of the photonic crystal microcavity is one photonic crystal hole.

5. The method for fabricating a memory-in-memory optical chip based on a photonic crystal microcavity according to claim 1, characterized in that, Two gratings are formed by etching the p-type GaAs contact layer, the second contact layer, and the n-type GaAs contact layer at both ends of the photonic crystal waveguide. Each grating consists of two semi-circular slits or multiple arc-shaped slits, with the protruding ends of the semi-circular and arc-shaped slits facing away from the photonic crystal waveguide. When a grating consists of two semi-circular slits, the width of the semi-circular slits is 450–500 nm, and the distance between the two arc-shaped slits is 141–157 nm. When a grating consists of multiple arc-shaped slits, the number of arc-shaped slits in a grating is 10–20, the central angle of the arc-shaped slits is 20–40 degrees, the width of the arc-shaped slits is 300 nm–400 nm, and the distance between two adjacent arc-shaped slits is 150 nm–200 nm.

6. The method for fabricating a memory-in-memory optical chip based on a photonic crystal microcavity according to claim 1, characterized in that, The two-dimensional photonic crystal structure and grating are both fabricated by dry etching; the air groove is fabricated by wet etching.

7. The method for fabricating a memory-in-memory optical chip based on a photonic crystal microcavity according to claim 1, characterized in that, An air groove is prepared using a 1:20 hydrofluoric acid solution. The air groove serves as the cladding of the photonic crystal waveguide to satisfy the total internal reflection condition of the photonic crystal waveguide. At the same time, when a single photon is coupled from the photonic crystal waveguide into the grating and diffracts, the air groove can also reflect the diffracted single photon to prevent it from entering the substrate.

8. A memory-in-memory optical chip based on a photonic crystal microcavity, prepared by the method described in any one of claims 1-7.

9. The in-memory computing optical chip according to claim 8, characterized in that, The n-type electrode, p-type electrode, grating, and two-dimensional photonic crystal structure constitute an optical chip unit. The III-V group semiconductor structure has multiple optical chip units arranged in the same direction and parallel to each other. The arrangement direction of the multiple optical chip units is consistent with the length direction of the III-V group semiconductor structure.

10. An optical convolution method using the in-memory computing optical chip as described in claim 9, characterized in that, Includes the following steps: First, an external light intensity beam splitter splits the light beam to be input to the optical chip into M paths according to intensity and inputs them into M optical chip units respectively; wherein, the light beam to be input to the optical chip contains light of N wavelengths, and the number of p-type electrodes in the optical chip unit is also N; then, an external voltage source is connected to the n-type electrode and the p-type electrode located in one optical chip unit to form an electrical circuit, wherein each p-type electrode forms an electrical circuit with the n-type electrode respectively; One light source is input into a grating of an optical chip unit. After diffraction by the grating, the light is coupled into the photonic crystal waveguide. Light of a specific wavelength resonates at the corresponding photonic crystal microcavity and is absorbed and stored. The remaining light is transmitted to another grating, and after diffraction, it is received by an external avalanche photodiode detector, ultimately obtaining the product of an M×N matrix and an N×1 vector. In this method, the transmittance of each wavelength can be controlled by adjusting the voltage of each electrical circuit to change the resonant wavelength of the corresponding photonic crystal microcavity.

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