Co-packaging optical system and packaging method

Abstract

The invention discloses a co-packaging optical system and a packaging method, and belongs to the technical field of optical communication, and the co-packaging optical system comprises a substrate, an ASIC chip, an optical engine and a heat dissipation plate which are packaged in a housing. The heat dissipation plate is arranged on the substrate; the heat dissipation plate comprises an ASIC chip heat dissipation unit and an optical engine heat dissipation unit, the ASIC chip heat dissipation unit is of a concave cavity structure, the concave cavity structure is located in the middle of the heat dissipation plate, and the optical engine heat dissipation unit is located on the edge of the heat dissipation plate; the ASIC chip is arranged on the substrate and is positioned in the concave cavity structure; the light engine is arranged on the substrate and located in the light engine heat dissipation unit. The integrated heat dissipation plate is used, the heat dissipation area of the switch chip is increased, the overall heat dissipation effect is improved, the packaging process is simplified, and the packaging cost is reduced.

Description

Technical Field

[0001] The present invention belongs to the field of optical communication technology, and more specifically, relates to a co-packaged optical system and a packaging method. Background Art

[0002] Currently, the field of optical communications is developing rapidly, especially in the field of high-speed optical communications. The speed of optical modules has been continuously increasing from 400G, 800G to 1.6T. However, as the speed increases, the power consumption and manufacturing difficulty of the modules are also increasing. This makes it more difficult to continue to increase the speed of optical modules. The field of optical communications urgently needs a newer technology to reduce power consumption and cost.

[0003] Experimental research has found that as the distance between the switch chip (ASIC chip) and the optical engine decreases, the overall power consumption will also be significantly reduced. Therefore, a co-packaged optical (CPO) solution was proposed. This solution packages the switch chip and the optical engine together, retaining only the optical port, thereby shortening the distance between the switch chip and the optical engine and reducing overall power consumption.

[0004] However, current co-packaged optical solutions also have many problems, such as overall yield, advanced packaging technology, and heat dissipation control. Heat dissipation control is a very important part of this. As the speed increases, the power consumption of switch chips and optical engines increases. Traditional heat dissipation solutions are becoming difficult to meet the needs of next-generation switch solutions. It is urgent to propose a new structure to increase the heat dissipation area of the switch chip and the entire system, thereby improving the overall heat dissipation effect. Summary of the Invention

[0005] In response to the above defects or improvement needs of the prior art, the present invention provides a co-packaged optical system and a packaging method, thereby solving the technical problem of poor heat dissipation effect of the optical system.

[0006] To achieve the above objectives, according to one aspect of the present invention, there is provided a co-packaged optical system comprising an ASIC chip and a light engine disposed in a chamber enclosed by a housing and a substrate, wherein a heat sink is further disposed in the chamber;

[0007] The heat dissipation plate is arranged on the substrate; the surface of the heat dissipation plate is provided with an ASIC chip heat dissipation unit and a light engine heat dissipation unit;

[0008] The ASIC chip heat dissipation unit is a concave cavity structure, and the concave cavity structure is located in the middle of the heat dissipation plate. The light engine heat dissipation unit is a concave cavity structure, and the light engine heat dissipation unit is located at the edge of the heat dissipation plate.

[0009] The ASIC chip is arranged in the ASIC chip heat dissipation unit, the bottom surface of the ASIC chip contacts the substrate, and the side surfaces of the ASIC chip contact the ASIC chip heat dissipation unit;

[0010] The light engine is disposed in the light engine heat dissipation unit, the bottom surface of the light engine contacts the substrate, and the side surface of the light engine contacts the light engine heat dissipation unit.

[0011] Preferably, a heat dissipation pad is provided on the inner wall of the cavity structure, and the heat dissipation pad is arranged around the ASIC chip.

[0012] Preferably, the thickness of the heat dissipation pad is less than 0.5 mm.

[0013] Preferably, a heat dissipation pad is provided on the inner wall of the light engine heat dissipation unit, and the heat dissipation pad is arranged in contact with the light engine.

[0014] Preferably, the thickness of the heat dissipation pad is less than 0.5 mm.

[0015] Preferably, the heat dissipation plate is a square structure, and four corners of the heat dissipation plate are provided with positioning surfaces fixedly connected to the substrate.

[0016] According to another aspect of the present invention, there is provided a packaging method, the method comprising the following steps:

[0017] Attach heat dissipation pads to the heat sink, the surface and sides of the ASIC chip, and the surface of the light engine;

[0018] A heat sink is attached to the surface of the substrate to ensure that the ASIC chip and the light engine are located in the ASIC chip heat sink unit and the light engine heat sink unit of the heat sink respectively, thereby completing the packaging.

[0019] In general, the above technical solutions conceived by the present invention can achieve the following beneficial effects compared with the prior art:

[0020] 1. The present invention proposes a co-packaged optical system that uses an integrated heat sink and an ASIC chip heat dissipation unit disposed on the heat sink. The ASIC chip can be placed in the concave structure of the ASIC chip heat dissipation unit, so that the surface and side surfaces of the ASIC chip can be in contact with the heat sink, thereby increasing the heat dissipation area of the switch chip and improving the overall heat dissipation effect.

[0021] 2. The present invention proposes a packaging method for a co-packaged optical system. Since the integrated heat sink is provided with an ASIC chip heat sink unit and a light engine heat sink unit, when the heat sink and the substrate are packaged, it can be ensured that the ASIC chip and the light engine are located in the ASIC chip heat sink unit and the light engine heat sink unit respectively, thereby simplifying the packaging process and reducing the packaging cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a schematic structural diagram of a co-packaged optical system according to an embodiment of the present invention;

[0023] Figure 2 is a structural side view of a co-packaged optical system according to an embodiment of the present invention;

[0024] Figure 3 is a cross-sectional view of the structure of a co-packaged optical system according to an embodiment of the present invention;

[0025] Figure 4 Schematic diagram of the structure of the heat sink in the co-packaged optical system according to an embodiment of the present invention.

[0026] In all drawings, the same reference numerals are used to denote the same elements or structures, wherein: 1 - light engine; 2 - ASIC chip; 3 - substrate; 4 - housing; 5 - light engine heat dissipation unit; 6 - ASIC chip heat dissipation unit; 7 - positioning surface. DETAILED DESCRIPTION

[0027] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely for the purpose of explaining the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

[0028] like Figure 1-4 As shown, the present invention proposes a co-packaged optical system comprising a housing 4, a substrate 3, an ASIC chip 2, a light engine 1, and a heat sink. The heat sink is fixed to the top surface of the substrate 3 and is divided into a central concave structure for the ASIC chip heat sink 6 and an edge region for the light engine heat sink 5. The ASIC chip 2 is embedded within the concave structure, and the light engine 1 is arranged within the edge heat sink, forming a spatially aligned layout of heat source and heat dissipation structure.

[0029] Specifically, the heat sink optimizes thermal management through an integrated structural design. The concave cavity structure encloses the ASIC chip, enhancing longitudinal heat dissipation by increasing the lateral contact area while limiting lateral heat spread to adjacent areas. The edge cooling unit utilizes the natural heat dissipation advantages of the heat sink's outer edge to provide a multi-directional heat dissipation path for the light engine. The substrate serves as a supporting carrier, and surface mount technology is used to achieve precise positioning of the heat sink and electronic components, ensuring close contact at the thermal conduction interface.

[0030] To further explain, a heat dissipation pad is provided on the inner wall of the concave cavity structure of the ASIC chip heat dissipation unit 6, and the heat dissipation pad is arranged around the ASIC chip 2. By surrounding and attaching the heat dissipation pad to the inner wall of the concave cavity structure, the heat dissipation pad is in surface contact with the four sides of the ASIC chip. When the heat generated by the chip is working, it is transferred to the heat dissipation pad through the side, and the heat is rapidly diffused along the plane direction of the heat dissipation pad to the inner wall of the concave cavity structure, and then the heat is conducted to the external heat dissipation structure through the heat dissipation plate body. This surround contact method breaks through the limitations of the traditional top single-sided heat dissipation path, establishes a continuous heat conduction channel between the side wall of the chip and the heat dissipation plate, effectively reduces the contact thermal resistance between the side of the chip and the heat dissipation structure, and prevents heat from forming local accumulation in the concave cavity area.

[0031] To further explain, the inner wall of the light engine heat dissipation unit 5 is provided with a heat dissipation pad, which is attached to the light engine 1. Specifically, heat generated by the light engine during operation is conducted to the heat dissipation pad through its outer surface. Because the heat dissipation pad forms a close contact with the light engine surface, the heat is quickly transferred to the inner wall of the light engine heat dissipation unit through the thermally conductive material. This heat dissipation unit, as part of the heat sink edge structure, forms a heat conduction path with the substrate, thereby continuously conducting heat away from the light engine. By eliminating the thermal resistance bottleneck caused by traditional assembly gaps, this solution optimizes the temperature gradient distribution in the light engine area, avoiding local overheating and signal transmission performance degradation.

[0032] An embodiment of the present invention provides a packaging method, which specifically includes the following steps:

[0033] Attach heat dissipation pads to the heat sink, the surface and sides of the ASIC chip, and the surface of the light engine;

[0034] A heat sink is attached to the surface of the substrate to ensure that the ASIC chip and the light engine are located in the ASIC chip heat sink unit and the light engine heat sink unit of the heat sink respectively, thereby completing the packaging.

[0035] Specifically, the substrate 3 with the ASIC chip 2 and the light engine 1 is prepared and visually inspected to ensure that there are no defects such as damage or cracking.

[0036] Prepare the heat sink, remove the burrs on the surface and use alcohol for ultrasonic cleaning, and then perform plasma cleaning to remove surface dirt. This step is to ensure the flatness and cleanliness of the heat sink to improve heat dissipation efficiency.

[0037] Cut the heat dissipation pad into appropriate size and stick it on the surface and side of the heat dissipation plate that contacts the ASIC chip, as well as on the surface that contacts the light engine.

[0038] The heat sink is positioned using the positioning surfaces on the heat sink, connected to the substrate, and structural adhesive is applied to the positioning surfaces. A jig is then used to press the heat sink and substrate together, and the entire assembly is baked and secured to complete the package. This method effectively simplifies the packaging process and improves heat dissipation efficiency, thereby reducing overall system cost and power consumption, and relatively improving the performance of the co-packaged optical system.

[0039] It will be easily understood by those skilled in the art that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A co-packaged optical system comprising an ASIC chip (2) and a light engine (1) arranged in a chamber enclosed by a housing (4) and a substrate (3), characterized in that: A heat sink is also provided in the chamber; The heat dissipation plate is arranged on the substrate (3); an ASIC chip heat dissipation unit (6) and a light engine heat dissipation unit (5) are provided on the surface of the heat dissipation plate; The ASIC chip heat dissipation unit (6) is a concave cavity structure, and the concave cavity structure is located in the middle of the heat dissipation plate; the light engine heat dissipation unit (5) is a concave cavity structure, and the light engine heat dissipation unit (5) is located at the edge of the heat dissipation plate; The ASIC chip (2) is arranged in the ASIC chip heat dissipation unit (6), the bottom surface of the ASIC chip (2) is in contact with the substrate (3), and the side surfaces of the ASIC chip (2) are in contact with the ASIC chip heat dissipation unit (6); The light engine (1) is arranged in the light engine heat dissipation unit (5), the bottom surface of the light engine (1) is in contact with the substrate (3), and the side surface of the light engine (1) is in contact with the light engine heat dissipation unit (5).

2. A co-packaged optical system according to claim 1, characterized in that: A heat dissipation pad is provided on the inner wall of the cavity structure, and the heat dissipation pad is arranged around the ASIC chip (2).

3. The co-packaged optical system according to claim 2, wherein: The thickness of the heat dissipation pad is less than 0.5 mm.

4. The co-packaged optical system according to claim 1, wherein: The inner wall of the light engine heat dissipation unit (5) is provided with a heat dissipation pad, and the heat dissipation pad is arranged to fit the light engine (1).

5. The co-packaged optical system according to claim 4, characterized in that: The thickness of the heat dissipation pad is less than 0.5 mm.

6. The co-packaged optical system according to claim 1, wherein: The heat dissipation plate is a square structure, and the four corners of the heat dissipation plate are provided with positioning surfaces (7) fixedly connected to the base plate (3).

7. A packaging method for a co-packaged optical system according to any one of claims 1 to 6, characterized in that: The method comprises the following steps: A heat sink is attached to the surface of the substrate, and the ASIC chip and the light engine are ensured to be located in the ASIC chip heat sink unit and the light engine heat sink unit of the heat sink respectively, thereby completing the packaging.

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