Hot upgrade method and device, electronic equipment and storage medium

Abstract

The invention provides a hot upgrading method and device, electronic equipment and a storage medium, and relates to the field of system upgrading, the hot upgrading method can be applied to a vehicle-mounted scene, and the hot upgrading method comprises the following steps: receiving a to-be-processed data packet through a data processing unit DPU; switching a path used by the DPU to a target path which does not include a path of at least one logic unit in the plurality of paths in a hot upgrade period of the at least one logic unit in the plurality of logic units; and processing the to-be-processed data packet based on the target path to obtain a processed data packet, and sending the processed data packet. The hot upgrade method can ensure that the processing and forwarding of the data packet are not interrupted during the hot upgrade period, thereby improving the communication performance.

Description

Technical Field

[0001] The present application relates to the field of system upgrades, and more specifically, to a hot upgrade method, device, electronic device, and storage medium. Background Art

[0002] A Data Processing Unit (DPU) is a specialized data processing chip that accelerates network, storage, and other services. Most DPUs are implemented using Field-Programmable Gate Array (FPGA) chips.

[0003] The logic resources of an FPGA chip can be divided into a dynamic area and a static area. The logic units in the static area can only be changed by burning (writing) the image and then powering off and restarting. For the logic units in the dynamic area, they can be dynamically changed through the partial reconfiguration (PR) technology during the operation of the FPGA chip to achieve the purpose of upgrading the logic function without powering off and restarting.

[0004] However, when using PR technology to reconfigure the partitions in the dynamic area, the partitions being reconfigured will not work properly. In particular, the online reset and update of the dynamic area takes a long time, usually up to several hundred milliseconds. During this period, the logic units in the dynamic area will not work properly, which may cause data interruption in the entire FPGA chip and reduce communication performance. Summary of the Invention

[0005] The embodiments of the present application provide a hot upgrade method, device, electronic device and storage medium, which can ensure that the processing and forwarding of data packets will not be interrupted during the hot upgrade period, thereby improving communication performance.

[0006] In a first aspect, an embodiment of the present application provides a thermal upgrade method, comprising:

[0007] receiving data packets to be processed via a data processing unit DPU;

[0008] The DPU includes a plurality of logic units, and the plurality of logic units are used to form a plurality of paths for performing data processing of the DPU;

[0009] During a hot upgrade period of at least one logical unit among the plurality of logical units, switching a path used by the DPU to a target path among the plurality of paths that does not include a path of the at least one logical unit;

[0010] The data packet to be processed is processed based on the target path to obtain a processed data packet, and the processed data packet is sent.

[0011] In a second aspect, an embodiment of the present application provides a thermal upgrade device, comprising:

[0012] A receiving unit, configured to receive a data packet to be processed via a data processing unit DPU;

[0013] The DPU includes a plurality of logic units, and the plurality of logic units are used to form a plurality of paths for performing data processing of the DPU;

[0014] a processing unit configured to switch, during a hot upgrade period of at least one logical unit among the plurality of logical units, a path used by the DPU to a target path among the plurality of paths that does not include a path of the at least one logical unit;

[0015] The forwarding unit is configured to process the data packet to be processed based on the target path to obtain a processed data packet and send the processed data packet.

[0016] In a third aspect, an embodiment of the present application provides an electronic device, including:

[0017] a processor adapted to implement computer instructions; and,

[0018] A computer-readable storage medium stores computer instructions, wherein the computer instructions are suitable for being loaded by a processor and executing the method of the first aspect mentioned above.

[0019] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, which stores computer instructions. When the computer instructions are read and executed by a processor of a computer device, the computer device executes the method of the first aspect involved above.

[0020] In a fifth aspect, embodiments of the present application provide a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the method of the first aspect described above.

[0021] In this embodiment, the hot upgrade method includes: receiving a data packet to be processed via a data processing unit (DPU); wherein the DPU includes multiple logical units, and the multiple logical units are used to form multiple paths for the DPU to process data; during the hot upgrade period of at least one of the multiple logical units, switching the path used by the DPU to a target path among the multiple paths that does not include the path of the at least one logical unit; processing the data packet to be processed based on the target path to obtain a processed data packet, and sending the processed data packet. This is equivalent to, during the hot upgrade period of the at least one logical unit, on the one hand, hot upgrading the at least one logical unit, and on the other hand, switching the path used by the DPU to a target path among the multiple paths that does not include the path of the at least one logical unit, and then processing the data packet to be processed based on the target path to obtain a processed data packet, and sending the processed data packet; thereby, it is possible to ensure that the processing and forwarding of the data packet to be processed will not be interrupted during the hot upgrade period of the at least one logical unit, thereby improving communication performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0023] Figure 1 This is an example of the system architecture for software and hardware collaborative acceleration provided in the embodiments of the present application.

[0024] Figure 2 This is an example of the division of logical units within the DPU provided in an embodiment of the present application.

[0025] Figure 3 It is a schematic flow chart of the thermal upgrade method provided in the embodiment of the present application.

[0026] Figure 4 This is an example of the status of path 1 and the status of path 2 during the hot upgrade period provided in an embodiment of the present application.

[0027] Figure 5 This is an example of the pre-negotiation process provided in an embodiment of the present application.

[0028] Figure 6 This is an example of renegotiation after hot upgrade provided in an embodiment of the present application.

[0029] Figure 7 This is an example of error perception and fault tolerance processing after hot upgrade provided in an embodiment of the present application.

[0030] Figure 8 This is a schematic block diagram of a thermal upgrade device provided in an embodiment of the present application.

[0031] Figure 9 It is a schematic block diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0032] The following will be combined with the accompanying drawings in the embodiments of this application to clearly describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of this application.

[0033] To facilitate understanding of the technical solutions provided by this application, the relevant terms are explained below.

[0034] Data Processing Unit (DPU): A dedicated data processing chip that accelerates network, storage, and other services. It generally includes a CPU, NIC, and a programmable data acceleration engine, and is mostly implemented based on FPGA chips.

[0035] Field-Programmable Gate Array (FPGA): FPGA consists of a large number of programmable logic elements and programmable interconnect resources, and has reconfigurable digital logic circuits.

[0036] Partial Reconfiguration (PR): The process of partitioning and reconfiguring the logic resources within an FPGA device. Partition reconfiguration allows for dynamic updates of portions of the logic while the FPGA device is running, without requiring system downtime or a full system restart.

[0037] Hotfix: Upgrading or updating software or programmable hardware while the system is running without stopping the system or interrupting service. It is a seamless upgrade method that allows updates to be performed without affecting the normal operation of the system.

[0038] Programmable hardware typically includes FPGAs, programmable logic devices (PLDs), and other devices. These devices can be programmed to change their internal logic and connections to achieve different functions. Hot upgrade technology allows programmable hardware to be reconfigured or upgraded without shutting down the hardware device to achieve more efficient, reliable, or advanced functions. Hot upgrades of programmable hardware typically involve updating the programmable hardware's firmware or configuration files. These firmware or configuration files can be transmitted and loaded via a communication interface. During the upgrade process, the new firmware or configuration file is downloaded to the programmable hardware and replaces the old one. This allows the programmable hardware to achieve different functions based on the new configuration or firmware.

[0039] The flow table is a key component required for data processing by the DPU. It implements flow-based forwarding and is a logical table used to implement traffic control and forwarding. In flow-based forwarding, the DPU performs header inspection on the first few packets and records them in the flow table. The remaining packets in the same flow can then be processed using a flow table lookup.

[0040] Each flow table entry in a flow table may include a match field and an action field. The match field indicates the conditions to match the packet, such as the source IP address, destination IP address, and protocol type. When a packet successfully matches the match field, the action field indicates the action to be performed, such as forwarding the packet to a specific port or dropping the packet. The DPU uses flow tables to quickly match and manipulate packets, thereby improving data processing efficiency and accuracy. The depth of the flow table determines the sophistication of the matching conditions. The deeper the depth, the more refined the matching conditions, enabling more sophisticated data flow control and management. When a packet arrives at the DPU, it matches and processes it according to the rules in the flow table. If the packet successfully matches the match field of a flow table entry, the DPU performs the action defined in the corresponding action field. By using flow tables, the DPU can efficiently process large numbers of packets and implement functions such as rapid data forwarding and filtering.

[0041] Pre-negotiation generally refers to a series of preparations and checks before formal negotiation or communication to ensure that all parties involved in the negotiation can reach consensus or compatibility on key aspects. In the context of software and hardware collaborative hot upgrades, pre-negotiation generally means that before the software starts or executes a specific function, it usually means that the software checks the hardware configuration file that it interacts with to determine whether the software configuration file and the hardware configuration file can work effectively together, or whether the configuration file is compatible with the hardware configuration file.

[0042] It should be noted that the terms used in the implementation method part of this application are only used to explain the embodiments of this application and are not intended to limit this application.

[0043] For example, the term "and / or" in this article is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The term "at least one" is only a description of the combination relationship of enumerated objects, indicating that one or more items may exist. For example, at least one of the following: A, B, C can mean the following combinations: A exists alone, B exists alone, C exists alone, A and B exist at the same time, A and C exist at the same time, B and C exist at the same time, and A, B, and C exist at the same time. The term "multiple" refers to two or more. The character " / " generally indicates that the related objects before and after are in an "or" relationship.

[0044] For example, the term "corresponding" can indicate a direct or indirect correspondence between two items, an association between the two items, or a relationship between an indicator and the indicated, a configuration and the configured, and so on. The term "indication" can be a direct indication, an indirect indication, or an association. For example, "A indicates B" can mean that A directly indicates B, for example, B can obtain it through A; it can also mean that A indirectly indicates B, for example, A indicates C, and B can obtain it through C; it can also mean that A and B have an association. The terms "predefined" or "preconfigured" can mean that the corresponding code, table, or other relevant information that can be used for indication is pre-stored in the device, or it can refer to a protocol agreement. "Protocol" can refer to a standard protocol in this field. The term "when..." can be interpreted as "if," "if," "when," "in response to," and similar descriptions. Similarly, depending on the context, the phrase "if determined" or "if (stated condition or event) is detected" can be interpreted as "when determined" or "in response to determining" or "when (stated condition or event) is detected" or "in response to detecting (stated condition or event)" and similar descriptions. The terms "first", "second", "third", "fourth", "Ath", "Bth" and the like are used to distinguish different objects rather than to describe a specific order. The terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. Among them, digital video compression technology is mainly used to compress huge digital image video data for easy transmission and storage.

[0045] The thermal upgrade method provided in this application is applicable to a DPU platform or an electronic device with a DPU.

[0046] For example, the DPU platform or the electronic device having the DPU may be a terminal device or a server, and the terminal device may be a user terminal.

[0047] The user terminal includes but is not limited to a smart phone, a game console, a desktop computer, a tablet computer, an e-book reader, an MP4 player, an MP4 player and a laptop computer.

[0048] The hot upgrade method provided in this application can be applied to vehicle-mounted scenarios, and the user terminals include but are not limited to mobile phones, computers, intelligent voice interaction devices, smart home appliances, vehicle-mounted terminals, aircraft, etc.

[0049] The server can be an independent physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, as well as big data and artificial intelligence platforms.

[0050] The hot upgrade method provided in this application is suitable for highly reliable collaborative hot upgrades of software and hardware collaborative forwarding systems. Specifically, the flow table required for network data forwarding can be unloaded to the DPU, and the forwarding engine in the DPU performs message matching and processing, thereby greatly accelerating the forwarding speed of network data. This kind of software and hardware collaborative acceleration has become the general trend in the "cloud" computing era. The famous open source virtual switch (Open Virtual Switch, OVS) adopts a similar solution. This kind of software and hardware collaborative unloading acceleration solution needs to be able to perform reliable and stable specific iterations and updates in actual large-scale online operations, such as performing seamless hot upgrades while meeting customer needs.

[0051] Figure 1 This is an example of the system architecture for software and hardware collaborative acceleration provided in the embodiments of the present application.

[0052] like Figure 1 As shown, the system architecture includes a host, a virtual switch, and a DPU.

[0053] Hosts include bare metal (BM) and virtual machines (VM). BM refers to running applications directly on a physical computer. BM / VM consists of upper-layer applications and an elastic network interface card (ENIC) front-end. Upper-layer applications typically refer to applications running on the BM / VM and rely on the operating environment provided by the BM / VM. The ENIC front-end typically refers to the component that provides network connectivity services for upper-layer applications and is responsible for connecting upper-layer applications to the DPU.

[0054] A virtual switch is a logical switch created on a physical network and configured and managed through software. It includes a service processing module and an offload control engine. The service processing module processes incoming data packets, while the offload control engine dynamically determines whether to enable the forwarding engine within the DPU by configuring data path policies.

[0055] The data path under the system architecture may include the following two paths:

[0056] Path 1:

[0057] If the forwarding engine is disabled (that is, DPU acceleration is disabled), the DPU receives data packets through the elastic network interface card (ENIC) backend and forwards them directly to the offload control engine via the upload / reinjection channel. The offload control engine then passes the data packets to the first service processing module in the virtual switch for processing. The forwarding engine is bypassed and does not function. After processing the data packets, the first service processing module forwards them to the physical network interface card (PNIC) via the upload / reinjection channel. The physical network interface card then sends the processed data packets to the peer device via the physical network interface card.

[0058] Path 2:

[0059] If the forwarding engine is turned on, that is, when the DPU acceleration is configured to be turned on, after the DPU receives the data packet through the elastic network card backend, it can send it to the forwarding engine. The forwarding engine includes a flow table lookup module and a second business processing module. The flow table lookup module will extract the packet header information of the data packet and match it in the flow table stored in the flow table lookup module. For the first data packet, the flow table does not hit, and the DPU sends the data packet to the first business processing module in the virtual switch via the upload / reinjection channel; after the business processing of the first business processing module, the matching items and actions required for the flow table are calculated, and the corresponding flow table is generated. After the unloading control engine processes and abstracts according to the flow table, it unloads the flow table to the DPU through the management / unloading channel, and is stored and used by the flow table difference module in the forwarding engine. When subsequent data packets arrive, if the unloaded flow table already exists in the DPU, the second business processing module in the forwarding engine in the DPU can directly use the flow table to process the data and perform forwarding actions. Due to its special and targeted hardware design, the forwarding engine has exponentially improved forwarding performance compared to software, thereby improving the data processing capabilities of the overall system.

[0060] The DPU can be implemented based on an FPGA chip. The logic resources of an FPGA chip can be divided into a dynamic area and a static area. Logic units in the static area can only be modified by burning an image and then powering off and restarting. However, logic units in the dynamic area can be dynamically modified during FPGA operation using partial reconfiguration (PR) technology, enabling logical function upgrades without powering off and restarting.

[0061] However, when using PR technology to reconfigure the partitions in the dynamic area, the partitions being reconfigured will not work properly. In particular, the online reset and update of the dynamic area takes a long time, usually up to several hundred milliseconds. During this period, the logic units in the dynamic area will not work properly, which may cause data interruption in the entire FPGA chip and reduce communication performance.

[0062] In addition, it can be seen that the entire data processing process involves multiple collaborative interactions and concurrent processing between software and hardware (i.e., between the virtual switch and the DPU). If one party upgrades or changes, it will also have a significant impact on the collaborative mechanism.

[0063] In this embodiment, a collaborative hot upgrade of hardware and software, namely, a collaborative hot upgrade of the virtual switch and the DPU, is performed based on the coordinated data forwarding acceleration achieved by the offload control engine and the forwarding engine within the DPU. This ensures that packet processing and forwarding are not interrupted during the hot upgrade, thereby improving communication performance. Specifically, to ensure that packet processing and forwarding are not interrupted during the hot upgrade, the present application divides the logical units within the DPU, hot upgrades the DPU based on the divided logical units, and isolates different data processing paths based on the logical units.

[0064] Figure 2 This is an example of the division of logical units within the DPU provided in an embodiment of the present application.

[0065] like Figure 2 As shown, the DPU can be divided into logical units, that is, through abstraction and isolation, it can be divided into different functional modules. Specifically, the entire DPU can be abstracted into the following functional modules: virtual devices used by services, upload / reinjection channels, flow table management / offload channels, acceleration engine, and physical network interface cards. The strategies adopted for the actual upgrade of these channels are also different, as follows:

[0066] Both the virtual device and the physical network card modules are general-purpose network devices. The protocols they use, such as Virtual I / O (VIRTIO) and Link Aggregation Control Protocol (LACP), are relatively stable and reliable and do not change frequently. Therefore, these two modules are generally not required to be reconfigured online during hot upgrades.

[0067] The upload / reinjection channel is the channel through which the software and hardware process the original message. Normally, the forwarding engine in the DPU will interact with the software and hardware by adding necessary information in the packet header, and the packet header information format or processing method may change before and after the upgrade. Although a certain degree of compatibility can be achieved through extensible packet header definitions, it is still possible that it will not be fully adapted when faced with major feature changes. Therefore, in an embodiment of the present application, a dedicated mode is added for the interaction of the upload / reinjection channel, namely the skip (BYPASS) mode. In this mode, the forwarding engine will not participate in the update of the packet header information of the message by the upload / reinjection channel. The data packet will only be uploaded with an identifier that has skipped the forwarding engine. The virtual switch will use pure software forwarding processing logic to forward the message, that is, the execution of the related unloading logic is shielded.

[0068] The flow table management / offloading channel is used to distribute flow tables, other control table entries, and configuration information (for example, this configuration information can be used to configure DPU and offloading-related information, including but not limited to offloading capability indication). It will stop being used during the hot upgrade because the message format of the offloading interaction may change and because the forwarding engine may not be able to respond while it is being upgraded.

[0069] The forwarding engine integrates the main message processing processes, including parsing, lookup, repackaging, action execution, and Quality of Service (QoS) functions. Unlike the aforementioned basic channels (e.g., upload / reinjection channels, flow table management / offload channels) and general modules (e.g., virtual devices, physical network cards), the forwarding engine is most affected by changes in business requirements and may undergo relatively frequent feature updates and iterations, requiring hot upgrades. Therefore, it is possible to integrate and isolate these functions into the forwarding engine, thereby eliminating other modules and allowing hot upgrades to the forwarding engine alone.

[0070] In this embodiment, data forwarding acceleration can be achieved by cooperating with the forwarding engine in the DPU through the offload control engine. In addition, even if the forwarding engine in the DPU is hot-upgraded, the DPU can use the modules included in path 2 to process and forward data packets, that is, it can ensure that data packets will not be interrupted during the hot upgrade period, thereby improving communication performance.

[0071] In addition, if Figure 2 As shown, the virtual switch may also include a service reconstruction and recovery module and an unloading control plane module. The service reconstruction and recovery module may be used to obtain control plane information from the forwarding engine before the data path of the DPU is switched from path 1 to path 2, or before the DPU is configured to be accelerated and shut down. The control plane information includes information for rebuilding the flow table and status information of the data packets to be processed by the forwarding engine; thus, when the DPU switches to using path 1 for data processing and forwarding, the service reconstruction and recovery module in the virtual switch may rebuild the flow table based on the information for rebuilding the flow table, and continue to process the data packets to be processed based on the rebuilt flow table and the status information of the data packets to be processed. In this embodiment, by saving the control plane information, it is beneficial for the virtual switch to regenerate the flow table, thereby achieving lossless data recovery capability, and lossless import and export of data can be performed during hot upgrades and path switching, reducing the loss and impact of path switching on the service.

[0072] It should be noted that Figure 2 The system framework shown can be understood as Figure 1 Refinements of the system framework shown, e.g. Figure 1 The first business processing module may include Figure 2 The business reconstruction and recovery module shown, for example, Figure 1 The offload control engine shown may include Figure 2 The uninstall control plane module shown, for example, Figure 1 The elastic network card backend shown can be equivalent to Figure 2 The virtual device shown, therefore, Figure 2 The scheme and terminology can also be referred to Figure 1 To avoid repetition, the relevant content will not be repeated here.

[0073] Figure 3 1 is a schematic flow chart of a thermal upgrade method 100 provided in an embodiment of the present application. Figure 3 A schematic flow chart of a thermal upgrade method 100 according to an embodiment of the present application is shown. The method 100 can be executed by a DPU platform or an electronic device having a DPU.

[0074] For example, the DPU platform or the electronic device with the DPU can be implemented as a terminal device or a server, and the terminal device can be a user terminal, and the user terminal includes but is not limited to a smart phone, a game console, a desktop computer, a tablet computer, an e-book reader, an MP4 player, an MP4 player, and a laptop computer. The hot upgrade method provided in this application can be applied to vehicle-mounted scenarios, and the user terminal includes but is not limited to a mobile phone, a computer, an intelligent voice interaction device, a smart home appliance, a vehicle-mounted terminal, an aircraft, etc. The server can be an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, and big data and artificial intelligence platforms.

[0075] For ease of explanation, the method 100 is exemplarily described below with an electronic device as the execution subject.

[0076] like Figure 3 As shown, the method 100 may include:

[0077] S110: The electronic device receives a data packet to be processed through the DPU.

[0078] For example, an electronic device receives a data packet to be processed from a host via a DPU. The host can be the host of the electronic device or a host of another device independent of the electronic device. When the host is the host of the electronic device, the electronic device can be referred to as a hardware-software coordinated forwarding system.

[0079] Illustratively, the type of data packet to be processed depends on the source and application scenario of the data packet, which is not specifically limited in this application.

[0080] For example, here are some common types of pending packets:

[0081] Network data packets: These packets are typically transmitted between the network layer and the application layer to transfer data across the network. They typically contain information such as the Internet Protocol (IP) address, port number, and data content.

[0082] File Transfer Packets: These packets are used in the File Transfer Protocol and contain the contents of the file to be transferred.

[0083] Email data packets: These packets are used in email transmission protocols and include the content and metadata of the email.

[0084] Database data packets: These packets are used in database communication protocols and contain the database data to be queried or updated.

[0085] Multimedia data packets: These data packets are used to transmit multimedia content such as audio and video, and include compressed or encrypted multimedia data.

[0086] Control packets: These packets are used in network control protocols and contain instructions and parameters for controlling network devices.

[0087] Of course, in addition to the common data packet types mentioned above, there are also some custom data packet types, which can be customized according to specific application requirements.

[0088] Exemplarily, the DPU includes multiple logic units, which are used to form multiple paths for the DPU to process data. In other words, the multiple logic units can be associated with the multiple paths. Any one of the multiple logic units includes a programmable logic element or a programmable interconnect resource.

[0089] S120: During a hot upgrade period of at least one logical unit in the DPU, the electronic device switches a path used by the DPU to a target path among the multiple paths that does not include the path of the at least one logical unit.

[0090] For example, a hot upgrade generally refers to upgrading software or firmware without shutting down the electronic device. This is done to ensure service continuity and avoid service interruptions caused by the upgrade. When the electronic device (which may be a central processing unit or other control unit that controls or manages the DPU) performs a hot upgrade on the at least one logical unit, the hot upgrade method of the at least one logical unit includes, but is not limited to, loading new firmware, updating configuration, or performing other upgrade tasks related to the logical unit.

[0091] Exemplarily, the at least one logic unit is a logic unit dedicated to a single path among the multiple paths, or in other words, the number of paths where the at least one logic unit is located is less than the number of the multiple paths, so as to ensure that even when the at least one logic unit is hot-upgraded, other paths can still operate normally, that is, the target path exists, thereby ensuring the overall stability and functionality of the DPU.

[0092] Illustratively, the logic units included in any two of the multiple paths do not overlap, thereby isolating the multiple paths from each other, and further ensuring that data processing on any one of the multiple paths is not affected by other paths. Thus, during a hot upgrade of certain logic units, data processing can be performed on paths composed of logic units that have not been hot upgraded.

[0093] S130, the electronic device processes the data packet to be processed based on the target path to obtain a processed data packet, and sends the processed data packet.

[0094] Exemplarily, the electronic device processes the data packet to be processed based on the logic unit included in the target path, obtains the processed data packet, and sends the processed data packet. Figure 2 When the path 1 is shown, the forwarding engine included in the target path processes the data packet to be processed to obtain a processed data packet, and the physical network card in the target path sends the processed data packet. For example, the target path is Figure 2 In the case of path 2 shown, the uplink / back-injection included in the target path sends the data packet to be processed to the virtual switch included in the target path. After the data packet to be processed is processed by the virtual switch, the processed data packet is sent to the physical network card through uplink / back-injection, and the physical network card forwards the processed data packet after receiving it.

[0095] It's worth noting that DPU upgrades differ from application upgrades. Application upgrades allow for relatively agile code modifications and program replacements. However, FPGA-based DPUs require logic circuit redesign and reconfiguration based on changing requirements, and updates are performed through partition reconfiguration. However, the partition being reconfigured will not function properly, causing data outages. In particular, online resetting and updating of dynamic zones takes considerable time, typically hundreds of milliseconds, significantly impacting user services.

[0096] In this embodiment, during the hot upgrade period of the at least one logical unit, on the one hand, the at least one logical unit is hot upgraded, and on the other hand, the path used by the DPU is switched to a target path among the multiple paths that does not include the path of the at least one logical unit, and then the data packet to be processed is processed based on the target path to obtain a processed data packet, and the processed data packet is sent; thereby, it is possible to ensure that the processing and forwarding of the data packet to be processed will not be interrupted during the hot upgrade period of the at least one logical unit, thereby improving communication performance.

[0097] In other words, to address the problem of interruption in data packet processing and forwarding that may occur during the collaborative hot upgrade process, this embodiment associates the logical units in the DPU with the paths used to process and forward data packets, and thus dynamically switches the path used by the DPU based on at least one hot-upgraded logical unit, that is, switches the path used by the DPU to a target path among the multiple paths that does not include the path of the at least one logical unit. In this way, it can be ensured that the processing and forwarding of the data packets to be processed will not be interrupted during the hot upgrade period of the at least one logical unit, thereby improving communication performance.

[0098] In some embodiments, the multiple paths include a first path and a second path, the first path uses a first logical unit in the DPU to process data packets, and the second path uses a second logical unit in the DPU and a virtual switch to process data packets; wherein S120 includes:

[0099] When the at least one logical unit includes the first logical unit but does not include the second logical unit, during the hot upgrade period of the first logical unit, the path used by the DPU is switched to the second path; when the at least one logical unit does not include the first logical unit but includes the second logical unit, during the hot upgrade period of the second logical unit, the path used by the DPU is switched to the first path; when the at least one logical unit includes the first logical unit and the second logical unit, during the hot upgrade period of the first logical unit, the path used by the DPU is switched to the second path, and during the hot upgrade period of the second logical unit, the path used by the DPU is switched to the first path, and the hot upgrade period of the first logical unit and the hot upgrade period of the second logical unit do not overlap in the time domain.

[0100] Exemplarily, if the at least one logical unit includes the first logical unit but does not include the second logical unit, this indicates that the first path where the first logical unit is located is malfunctioning. Therefore, during the hot upgrade period of the first logical unit, the path used by the DPU can be switched to the second path. If the at least one logical unit does not include the first logical unit but includes the second logical unit, this indicates that the second path where the second logical unit is located is malfunctioning. Therefore, during the hot upgrade period of the second logical unit, the path used by the DPU can be switched to the first path. If the at least one logical unit includes the first logical unit and the second logical unit, the hot upgrade period of the at least one logical unit is divided into a hot upgrade period of the first logical unit and a hot upgrade period of the second logical unit. During the hot upgrade period of the first logical unit, the path used by the DPU is switched to the second path. During the hot upgrade period of the second logical unit, the path used by the DPU is switched to the first path. The hot upgrade periods of the first logical unit and the second logical unit do not overlap in the time domain.

[0101] In this embodiment, the hot upgrade period of the first logical unit and the hot upgrade period of the second logical unit do not overlap in the temporal domain, ensuring that the hot upgrades of the first logical unit and the second logical unit do not conflict. That is, during the hot upgrade of the first logical unit, the second path is available as the target path, and during the hot upgrade of the second logical unit, the first path is available as the target path. This strategy precisely controls which logical units undergo hot upgrades and which paths are considered target paths, minimizing the impact on other components and ensuring the stability and reliability of hot upgrades.

[0102] It should be understood that this application does not impose any restrictions on the order of the hot upgrade period of the first logic unit and the hot upgrade period of the second logic unit. For example, the hot upgrade period of the first logic unit may be before or after the hot upgrade period of the second logic unit. In other words, the hot upgrade of the first logic unit may be performed first, or the hot upgrade of the second logic unit may be performed later. This application does not impose any restrictions on this.

[0103] In some embodiments, the method 100 further includes:

[0104] During the hot upgrade period of the second logic unit, the virtual switch is hot upgraded.

[0105] Exemplarily, during the hot upgrade period of the second logical unit, the second logical unit and the virtual switch are hot upgraded.

[0106] In some embodiments, the method 100 further includes:

[0107] Performing a hot upgrade on the virtual switch during a hot upgrade period of the virtual switch; wherein the hot upgrade period of the virtual switch and the hot upgrade period of the at least one logical unit do not overlap in time domain;

[0108] During the hot upgrade of the virtual switch, the path used by the DPU is switched to the first path.

[0109] Exemplarily, the hot upgrade period of the virtual switch is located before the hot upgrade period of the at least one logical unit in terms of time. In other words, the virtual switch is hot upgraded first, and after the hot upgrade of the virtual switch is completed, the at least one logical unit is hot upgraded. The hot upgrade period of the virtual switch is located after the hot upgrade period of the at least one logical unit in terms of time. In other words, the at least one logical unit is hot upgraded first, and after the hot upgrade of the at least one logical unit is completed, the virtual switch is hot upgraded.

[0110] Figure 4This is an example of the status of path 1 and the status of path 2 during the hot upgrade period provided in an embodiment of the present application.

[0111] like Figure 4 As shown, during the non-hot upgrade period, data packets can be normally processed collaboratively in the software and hardware pathways, that is, path 1 and path 2 are both in an available state. During the hardware hot upgrade period, data packets can be forwarded in the software, that is, path 1 is in an available state. During the software hot upgrade period, data packets can be forwarded within the hardware, that is, path 2 is in an available state. When both software and hardware need to be upgraded, the software upgrade will be performed first, and then the hardware upgrade will be performed, that is, path 2 and path 1 will be alternately available until the upgrade is completed. Among them, the hardware hot upgrade period may include the hot upgrade period of the first logical unit mentioned above, and the software hot upgrade period may include the hot upgrade period of the virtual switch mentioned above. Of course, in other alternative embodiments, the software hot upgrade period and the hot upgrade period of the second logical unit mentioned above may overlap. In this case, the second logical unit and the virtual switch may be hot upgraded simultaneously during the software hot upgrade period. This application does not specifically limit this.

[0112] In some embodiments, before the first logic unit is hot-upgraded, the path used by the DPU is the first path, and the method 100 further includes:

[0113] Sending control plane information to the virtual switch through the first logic unit; the control plane information includes information for rebuilding the flow table and status information of the data packet to be processed; wherein S130 includes:

[0114] Based on the information for reconstructing the flow table, the flow table is reconstructed through the virtual switch; based on the reconstructed flow table and the status information of the data packet to be processed, the data packet to be processed is continued to be processed through the virtual switch to obtain the processed data packet.

[0115] Exemplarily, the reconstructed flow table includes a flow table entry for processing the data packet to be processed. In other words, after the flow table is reconstructed by the virtual switch, the flow table entry can be obtained from the reconstructed flow table, and then based on the flow table entry and the status information of the data packet to be processed, the data packet to be processed is continued to be processed by the virtual switch to obtain the processed data packet. The status information of the data packet to be processed is used to describe: the status of the data packet to be processed in the first logical unit, such as whether it is being processed, whether it is in the queue, etc. These status information are crucial to ensuring the correct processing of the data packet and the continuity of the business logic. If the data packet is directly imported into the virtual switch without status information, it may cause changes in the processing logic, thereby affecting the business.

[0116] Exemplarily, when the offload function is turned off (for example, the first path is turned off), control plane information is sent to the virtual switch via the first logical unit, wherein the control plane information includes data packets that have been offloaded to the hardware, and the data packets that have been offloaded to the hardware may include the pending data packets mentioned above. After the hot upgrade of the first logical unit is completed, due to reasons such as feature changes, the existing data packets of the first logical unit may need to be completely cleared. In this embodiment, before clearing the existing data packets of the first logical unit, control plane information can be sent to the virtual switch via the first logical unit, wherein the control plane information includes the existing data packets of the first logical unit, and the existing data packets of the first logical unit include the pending data packets mentioned above.

[0117] It is worth noting that when the offloading function is turned off (for example, the first path is turned off) or the path is switched (for example, the first path is switched to the second path), the data packets to be processed may have been processed and forwarded in the DPU (for example, the forwarding engine in the DPU) for a period of time, and there is status information of the data packets to be processed. If the processing results of the data packets to be processed are directly imported into the virtual switch for processing at this time, the status information of the data packets to be processed may be lost, thereby causing changes in the processing logic and affecting the business.

[0118] In this embodiment, control plane information is sent to the virtual switch via the first logic unit. The control plane information includes information for rebuilding the flow table and status information of the data packet to be processed. This allows the virtual switch to recover or rebuild the flow table based on the information for rebuilding the flow table. Furthermore, based on the rebuilt flow table and the status information of the data packet to be processed, the virtual switch can continue to process the data packet to obtain the processed data packet, thereby achieving lossless data packet recovery and path switching. In particular, in scenarios where the first path is shut down or a working path in the DPU is switched from the first path to the second path, the virtual switch can be equipped with the ability to fully rebuild and restore the data packet, thereby ensuring that services are not lost during the path switching process.

[0119] In some embodiments, the first logic unit includes at least one of the following: an upstream channel for sending data packets to the virtual switch, and a back-injection channel for receiving data packets from the virtual switch; the second logic unit includes at least one of the following: an offload channel for receiving offload-related information from the virtual switch, and a forwarding engine for processing data packets offloaded by the virtual switch.

[0120] Exemplarily, the upload channel and the return channel may be collectively referred to as the upload / return channel mentioned above. The unload channel may include the flow table management / unload channel mentioned above. It should be understood that in other alternative embodiments, the DPU may also include a common logic unit, for example, the common logic unit may include Figure 1 The elastic network card backend and physical network card shown, and the common logical unit may include Figure 2 The virtual devices and physical network cards shown.

[0121] In some embodiments, before S120, the method 100 further includes:

[0122] Obtaining, through the virtual switch, a first configuration file for hot-upgrading the at least one logical unit; performing pre-negotiation on the first configuration file and a second configuration file of the virtual switch to obtain a pre-negotiation result; the pre-negotiation result is used to indicate whether the pre-negotiation is successful; wherein S120 includes:

[0123] When the pre-negotiation result indicates that the pre-negotiation is successful, the at least one logical unit is hot-upgraded using the first configuration file.

[0124] Specifically, hardware hot upgrade is different from software hot upgrade. For software hot upgrade, its main functional logic can be closed in the program, and the switch can be completed directly; in the scenario of hardware and software collaborative acceleration, many functions require the cooperation of hardware and software to be completed. Therefore, when the message interaction format changes, the upgrade process must be compatible with these changes to ensure normal interaction during the upgrade process, which requires the pre-negotiation mechanism provided by this application. Specifically, the first configuration file for hot upgrade of at least one logical unit and the second configuration file of the virtual switch are pre-negotiated to obtain a pre-negotiation result; the pre-negotiation result is used to indicate whether the pre-negotiation is successful.

[0125] Taking the forwarding engine in the DPU as an example, since the forwarding engine in the DPU does not complete data processing independently, it communicates with the software system through an agreed interface (e.g. Figure 2 Data acceleration is achieved through collaborative processing with the flow table management / offloading channel (shown in the figure). Therefore, when the DPU undergoes feature changes or upgrades, if there are interface changes, the cooperating software system must also be upgraded to adapt to the upgraded DPU forwarding engine. Compared to independent hot upgrades, the collaborative hot upgrade process of software and hardware systems is more complex and faces greater uncertainty.

[0126] It is worth noting that in a system where the at least one logical unit and the virtual switch collaborate to accelerate, changes to the at least one logical unit usually also need to be adapted to the upper-layer software (ie, the virtual switch).

[0127] In this embodiment, when the pre-negotiation result indicates that the pre-negotiation is successful, the at least one logical unit is hot-upgraded using the first configuration file. This is equivalent to ensuring normal interaction between the at least one logical unit and the virtual switch before and after the upgrade through adaptive negotiation of the capabilities supported by the at least one logical unit and the capabilities supported by the virtual switch. This can avoid the problem of the original collaborative system being damaged due to the independent upgrade of the at least one logical unit, thereby preventing the at least one logical unit from being incompatible with the virtual switch after the hot upgrade, thereby improving the reliability of the hot upgrade of the at least one logical unit.

[0128] In other words, in response to collaborative process problems that may arise during the collaborative hot upgrade, this embodiment can ensure the adaptability of the interactive functions before and after the upgrade through adaptive negotiation of the capabilities supported by the at least one logical unit and the capabilities supported by the virtual switch, thereby improving the reliability of the hot upgrade of the at least one logical unit.

[0129] Of course, in other alternative embodiments, the second configuration file may also be a file used to perform a hot upgrade on the virtual switch. That is, if the pre-negotiation result indicates that the pre-negotiation was successful, the first configuration file is used to perform a hot upgrade on the at least one logical unit, and the second configuration file is used to perform a hot upgrade on the virtual switch. For example, the first configuration file may be used to perform a hot upgrade on the at least one logical unit, and then the second configuration file may be used to perform a hot upgrade on the virtual switch. For another example, the second configuration file may be used to perform a hot upgrade on the virtual switch, and then the first configuration file may be used to perform a hot upgrade on the at least one logical unit. This application does not specifically limit this.

[0130] In some embodiments, pre-negotiation is performed on the first configuration file and the second configuration file of the virtual switch to obtain a pre-negotiation result, which can be implemented as follows: by comparing capabilities supported by the first configuration file with capabilities supported by the second configuration file, if the capabilities supported by the second configuration file are a superset of the capabilities supported by the first configuration file, determining that the pre-negotiation result indicates that the pre-negotiation is successful.

[0131] For example, the capabilities supported by the first profile can be understood as the capabilities configured by the first profile, and similarly, the capabilities supported by the second profile can be understood as the capabilities configured by the second profile. The capabilities supported by the second profile being a superset of the capabilities supported by the first profile means that the capabilities supported by the second profile include not only the capabilities supported by the first profile, but also other capabilities not supported by the first profile.

[0132] In this embodiment, the capabilities supported by the second configuration file are a superset of the capabilities supported by the first configuration file, which is equivalent to the capabilities supported by the virtual switch being a superset of the capabilities supported by the at least one logical unit. Since the at least one logical unit is limited by logic resources and compilation and wiring, the functions it can implement are relatively limited, and it is impossible to implement more compatible capabilities or the implementation cost is too high. Therefore, it is necessary to use the capabilities supported by the virtual switch to make the capabilities supported by the at least one logical unit compatible, which can reduce the compatibility cost.

[0133] Of course, the pre-negotiation result may be determined in other ways, which are not specifically limited in this application. For example, in other alternative embodiments, the capabilities supported by the first profile and the capabilities supported by the second profile may be compared, and if the capabilities supported by the first profile and the capabilities supported by the second profile are the same or overlap, then the pre-negotiation result may be determined to indicate that the pre-negotiation was successful.

[0134] In some embodiments, the first configuration file includes a first bit sequence, which is used to indicate whether the at least one logical unit supports at least one capability, and the second configuration file includes a second bit sequence, which is used to indicate whether the virtual switch supports the at least one capability; wherein, pre-negotiation is performed on the first configuration file and the second configuration file of the virtual switch to obtain a pre-negotiation result, which can be implemented as follows: obtaining a third bit sequence, which is used to indicate the pre-negotiated capability in the at least one capability; performing a bitwise AND operation on the first bit sequence and the third bit sequence to obtain a first result; performing a bitwise AND operation on the second bit sequence and the third bit sequence to obtain a second result; when the first result and the second result are the same, determining that the pre-negotiation result indicates that the pre-negotiation is successful.

[0135] Specifically, the first bit sequence is used to indicate whether the at least one logical unit supports at least one capability, and the second bit sequence is used to indicate whether the virtual switch supports the at least one capability, wherein any one of the at least one capability is a capability for collaborative acceleration. The capability for collaborative acceleration may include at least one of the following: data packet processing capability and interaction capability.

[0136] For example, assuming that the first bit sequence is recorded as 10101, the second bit sequence is recorded as 01011, and the third bit sequence is recorded as 11000 (i.e., pre-negotiation is performed on the first two capabilities), based on this, the first result obtained by performing a bitwise AND operation on the first bit sequence and the third bit sequence is 10000, and the second result obtained by performing a bitwise AND operation on the second bit sequence and the third bit sequence is 01000. Because these two results are different, it can be determined that the pre-negotiation has failed. Assuming that the first bit sequence is recorded as 10101, the second bit sequence is recorded as 10111, and the third bit sequence is recorded as 11000 (i.e., pre-negotiation is performed on the first two capabilities), based on this, the first result obtained by performing a bitwise AND operation on the first bit sequence and the third bit sequence is 10000, and the second result obtained by performing a bitwise AND operation on the second bit sequence and the third bit sequence is 10000. Because these two results are the same, it can be determined that the pre-negotiation result indicates that the pre-negotiation is successful.

[0137] In this embodiment, the first configuration file includes a first bit sequence, which is used to indicate whether the at least one logical unit supports at least one capability. The second configuration file includes a second bit sequence, which is used to indicate whether the virtual switch supports the at least one capability. On this basis, by introducing a third bit sequence, the computational complexity of pre-negotiation between the first configuration file and the second configuration file of the virtual switch can be reduced, thereby improving the pre-negotiation efficiency.

[0138] Figure 5 This is an example of the pre-negotiation process 200 provided in an embodiment of the present application.

[0139] like Figure 5 As shown, the pre-negotiation process 200 may include:

[0140] S210, pre-negotiation before hot upgrade.

[0141] Specifically, before hot-upgrading the at least one logical unit, the virtual switch reads the hardware image configuration file to be upgraded (i.e., the first configuration file) and compares it with its own configuration file (i.e., the second configuration file), thereby performing a pre-negotiation between the first configuration file and the second configuration file. Specifically, the first configuration file and the second configuration file are compared bit by bit for their support of each capability, and capabilities that do not require negotiation and configuration are masked and ignored. The hot-upgrading process for the virtual switch and the at least one logical unit can only proceed if the pre-negotiation succeeds (e.g., the first configuration file supports and the second configuration file supports, or the first configuration file does not support and the second configuration file supports).

[0142] S220: Save control plane information before hot upgrade.

[0143] After the pre-negotiation is successful, a new process of the virtual switch is started (i.e., the virtual switch is hot-upgraded using the second configuration file). Due to the easy-to-encode nature of the software, it already has a superset capability of the hardware, can interact based on the current hardware, and completes the saving of the control plane information, and enters the upgrade process. Assuming that the multiple paths include a first path and a second path, the first path uses the first logical unit in the DPU to process data packets, and the second path uses the second logical unit in the DPU and the virtual switch to process data packets; the control plane information can be information sent to the virtual switch through the first logical unit; the control plane information includes information for rebuilding the flow table and status information of the data packet to be processed. It should be understood that the relevant content of the control plane information can refer to the corresponding description above, and in order to avoid repetition, it will not be repeated here.

[0144] S230, execute PR.

[0145] The at least one logical unit is hot-upgraded using the first configuration file. During the hot-upgrade process of the at least one logical unit, the virtual switch shuts down the at least one logical unit. For example, the at least one logical unit may include Figure 2 The following logical units are shown: flow table management / offloading channel, forwarding engine. At this time, the interaction process related to offloading will stop, and only the general message transmission capability will be retained.

[0146] S240, renegotiation after hot upgrade.

[0147] After the upgrade is complete, the virtual switch reads the configuration file in the DPU again and compares it with its own configuration file, and chooses to enable or disable capabilities based on their respective support conditions. Figure 6 As shown, the capabilities selected to be enabled (ie, enabled) are the first two capabilities, and the capabilities selected to be disabled are the fourth and fifth capabilities, wherein the last two capabilities are capabilities that do not require pre-negotiation.

[0148] S250, enable uninstallation.

[0149] After determining the capabilities to be turned on or off, the DPU can be configured for offloading, that is, the offloading capability enabled by the DPU can be configured. The offloading capability can be at least one of the capabilities mentioned above. After receiving the offloading configuration, the DPU can turn on the corresponding capability again based on the offloading configuration for hardware acceleration.

[0150] In some embodiments, after S120, the method 100 further includes:

[0151] The at least one logical unit is error sensed through a virtual switch; and the at least one logical unit is processed based on a perception result of the error sensed.

[0152] It is worth noting that for PR, there is a probability of RAM failure after the upgrade. In large-scale deployment scenarios, the occurrence of this problem will increase significantly, and once it occurs, it will have a great impact on the healthy operation of the system.

[0153] In this embodiment, the virtual switch detects errors in the at least one logical unit and processes the at least one logical unit based on the error detection result. This improves the fault tolerance and reliability of the hot upgrade. Furthermore, the improved reliability of the hot upgrade facilitates its widespread application in various DPU platforms that perform collaborative data packet processing.

[0154] In other words, by targeting reliability issues that may arise during collaborative hot upgrades, error perception and exception handling can improve the reliability of hot upgrades.

[0155] In some embodiments, performing error sensing on the at least one logical unit through the virtual switch may be implemented as follows:

[0156] Performing periodic read and write checks on the memory of the at least one logical unit through the virtual switch to determine whether the memory has failed, and detecting whether the link between the virtual switch and the at least one logical unit is connected by sending a probe data packet to the at least one logical unit through the virtual switch; wherein, based on the perception result of the error perception, processing the at least one logical unit can be implemented as follows: if the perception result indicates that the memory of the at least one logical unit has failed or the perception result indicates that the link between the virtual switch and the at least one logical unit is not connected, re-hot-upgrading the at least one logical unit; if the re-hot-upgrading of the at least one logical unit fails, isolating the logical unit used for data packet processing in the at least one logical unit.

[0157] Specifically, to ensure the proper functioning of the memory of the at least one logical unit, the virtual switch performs periodic read and write checks on the memory of the at least one logical unit. These checks typically involve reading and writing data in the memory and verifying the integrity and consistency of the data. If the read and write checks detect memory failure or data inconsistency, the virtual switch records the corresponding detection results. To confirm the connectivity of the communication link between the virtual switch and the at least one logical unit, the virtual switch sends a probe packet to the at least one logical unit. Probe packets are special packets used to detect link reachability and connectivity. If the virtual switch fails to receive a response from the logical unit or the probe packet is lost, the virtual switch deems the link disconnected and records the corresponding detection results. Based on these detection results, appropriate measures can be taken to address the at least one logical unit. For example, if the detection results indicate a memory failure or link disconnection, a re-upgrade of the at least one logical unit is triggered. If the re-upgrade fails, further measures are taken to isolate the logical unit within the at least one logical unit responsible for processing the packet. Isolation is intended to prevent the problem from spreading to other logical units or the entire system, ensuring system stability and security. After isolation, other measures may be taken to diagnose and resolve the problem of the at least one logical unit, such as offline upgrade, repair, or replacement.

[0158] In this embodiment, by reading and writing checks and sending detection data packets, RAM failure problems and other hardware anomalies that occur with a small probability after PR upgrade can be detected. When the perception result indicates that the memory of the at least one logical unit has failed or the perception result indicates that the link between the virtual switch and the at least one logical unit is not connected, the at least one logical unit is re-hot-upgraded. When the re-hot-upgrade of the at least one logical unit fails, the logical unit used for data packet processing in the at least one logical unit is isolated, thereby ensuring the reliability of the hot upgrade and improving its fault tolerance processing capability as much as possible.

[0159] In some embodiments, error perception of the at least one logical unit is performed through a virtual switch, which can be implemented as follows: reading the error statistics record of the at least one logical unit for the data packet to be processed through the virtual switch, and determining whether there is an error in the data processing logic of the at least one logical unit; wherein, based on the perception result of the error perception, processing the at least one logical unit can be implemented as follows: if the perception result indicates that there is an error in the data processing logic of the at least one logical unit, resetting the configuration file of the at least one logical unit to the configuration file used before the hot upgrade of the at least one logical unit; if the reset fails, isolating the logical unit for data packet processing in the at least one logical unit.

[0160] Specifically, the virtual switch can read and analyze the error statistics of the at least one logical unit for the data packet to be processed. These records typically record errors in packet processing. These error statistics may include indicators such as packet loss, processing delay, and data corruption. By analyzing these statistics, the virtual switch can determine whether there are errors in the data processing logic of the at least one logical unit. Based on the analysis results of the error statistics, the virtual switch can determine whether there is a problem with the data processing logic of the at least one logical unit. If the error statistics show abnormalities or frequent errors, it can be assumed that there is an error in the data processing logic of the at least one logical unit. Once the error in the data processing logic is determined to be an error, the configuration file of the at least one logical unit is reset to the state before the hot upgrade. This is done to restore the system to a known working state and eliminate any problems that may have been introduced by the upgrade. If the reset fails, further measures are taken to isolate the logical unit within the at least one logical unit responsible for processing the data packet. Isolation is intended to prevent the problem from spreading to other logical units or the entire system, ensuring system stability and security. After isolation, other measures may be taken to diagnose and resolve the problem with the at least one logical unit, such as offline upgrade, repair, or replacement.

[0161] In this embodiment, error statistics are recorded to detect whether there are errors in the data processing logic of the at least one logical unit that may occur with a low probability after the PR upgrade. If the perception result indicates that there are errors in the data processing logic of the at least one logical unit, the at least one logical unit is reset. If the reset of the at least one logical unit fails, the logical unit for data packet processing in the at least one logical unit is isolated. This ensures the reliability of the hot upgrade and maximizes its fault tolerance processing capability.

[0162] Figure 7 This is an example of error perception and fault tolerance processing after hot upgrade provided in an embodiment of the present application.

[0163] like Figure 7 As shown, when performing FPGA hot upgrades through online reconfiguration (PR), there is a probability that RAM will fail after the upgrade. In addition, the new hardware image may also have logical function defects and cannot operate normally. In this case, the upgrade method needs to have multi-dimensional error perception and active fault tolerance processing capabilities. The error perception methods provided by this application can be divided into the following methods:

[0164] Method 1: Probe packet detection, which offloads the control engine's active probe packets to confirm link connectivity.

[0165] Method 2: Memory detection, that is, offloading the control engine to the forwarding engine's random access memory (Random Access Memory, RAM) and double data rate (Double Data Rate, DDR) periodic read and write checks.

[0166] Method 3: Detection of error statistics records, that is, uninstalling the control engine to periodically read the error statistics records of the forwarding engine on important functional nodes.

[0167] After detecting an error, the offload control engine will adopt one or more of the following exception handling solutions based on the actual error type to attempt fault tolerance, ensuring service connectivity as much as possible, buying sufficient time for failover, and improving hot upgrade reliability:

[0168] Solution 1: If you encounter an error such as RAM failure, you can try re-upgrading the PR to recover. Because this issue is a rare event, re-upgrading will reset the impact of the previous upgrade, significantly reducing the probability of repeated rare errors.

[0169] Solution 2: If you encounter a logical defect error after the upgrade, you can try to roll back to the old version of the hardware image. Since the software has superset compatibility, it can still run normally after the rollback.

[0170] Solution 3: If a serious error occurs and rollback or reset is impossible, the offload control engine will adopt an active isolation strategy, that is, isolating the forwarding engine in the DPU, rebuilding all flow tables based on the necessary state information saved by the offload control plane information, and relying solely on the DPU's basic channel for pure software forwarding of data packets.

[0171] The preferred embodiments of the present application are described in detail above in conjunction with the accompanying drawings. However, the present application is not limited to the specific details in the embodiments mentioned above. Within the technical concept of the present application, the technical solution of the present application can be subjected to a variety of simple modifications, and these simple modifications all fall within the scope of protection of the present application. For example, the various specific technical features described in the specific embodiments mentioned above can be combined in any suitable manner unless there is any contradiction. In order to avoid unnecessary repetition, the present application will not further explain various possible combinations. For another example, the various different embodiments of the present application can also be arbitrarily combined, and as long as they do not violate the ideas of the present application, they should also be regarded as the contents disclosed in the present application.

[0172] It should also be understood that in the various method embodiments of the present application, the size of the serial numbers of the processes involved above does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0173] The above describes the method provided in the embodiment of the present application, and the following describes the device provided in the embodiment of the present application.

[0174] Figure 8 3 is a schematic block diagram of a thermal upgrade device 300 provided in an embodiment of the present application.

[0175] like Figure 8 As shown, the apparatus 300 may include:

[0176] The receiving unit 310 is configured to receive a data packet to be processed via the data processing unit DPU;

[0177] The DPU includes a plurality of logic units, and the plurality of logic units are used to form a plurality of paths for performing data processing of the DPU;

[0178] The processing unit 320 is configured to switch, during a hot upgrade period of at least one logical unit among the multiple logical units, a path used by the DPU to a target path among the multiple paths that does not include a path of the at least one logical unit;

[0179] The forwarding unit 330 is configured to process the data packet to be processed based on the target path to obtain a processed data packet, and send the processed data packet.

[0180] In some embodiments, the plurality of paths include a first path and a second path, the first path using a first logic unit in the DPU to process data packets, and the second path using a second logic unit in the DPU and a virtual switch to process data packets;

[0181] The processing unit 320 is specifically configured to:

[0182] When the at least one logical unit includes the first logical unit and does not include the second logical unit, during a hot upgrade period of the first logical unit, switching a path used by the DPU to the second path;

[0183] When the at least one logical unit does not include the first logical unit but includes the second logical unit, during a hot upgrade period of the second logical unit, switching a path used by the DPU to the first path;

[0184] In a case where the at least one logical unit includes the first logical unit and the second logical unit, during a hot upgrade period of the first logical unit, the path used by the DPU is switched to the second path, and during a hot upgrade period of the second logical unit, the path used by the DPU is switched to the first path, and the hot upgrade period of the first logical unit and the hot upgrade period of the second logical unit do not overlap in the time domain.

[0185] In some embodiments, the processing unit 320 is further configured to:

[0186] During the hot upgrade period of the second logic unit, the virtual switch is hot upgraded.

[0187] In some embodiments, the processing unit 320 is further configured to:

[0188] Performing a hot upgrade on the virtual switch during the hot upgrade period of the virtual switch;

[0189] wherein the hot upgrade period of the virtual switch and the hot upgrade period of the at least one logical unit do not overlap in the time domain;

[0190] During the hot upgrade of the virtual switch, the path used by the DPU is switched to the first path.

[0191] In some embodiments, before the first logic unit is hot-upgraded, the path used by the DPU is the first path, and the forwarding unit 330 is further configured to:

[0192] Sending control plane information to the virtual switch through the first logic unit; the control plane information includes information for rebuilding the flow table and status information of the data packet to be processed;

[0193] The forwarding unit 330 is specifically configured to:

[0194] Rebuilding the flow table through the virtual switch based on the information for rebuilding the flow table;

[0195] Based on the reconstructed flow table and the status information of the data packet to be processed, the data packet to be processed is further processed through the virtual switch to obtain the processed data packet.

[0196] In some embodiments, the first logic unit includes at least one of the following: an uplink channel for sending data packets to the virtual switch, a backlink channel for receiving data packets from the virtual switch;

[0197] The second logic unit includes at least one of the following: an offload channel for receiving offload-related information from the virtual switch, and a forwarding engine for processing data packets offloaded from the virtual switch.

[0198] In some embodiments, before performing the hot upgrade on the at least one logic unit, the processing unit 320 is further configured to:

[0199] Obtaining, through the virtual switch, a first configuration file for hot upgrading the at least one logical unit;

[0200] Performing pre-negotiation on the first configuration file and the second configuration file of the virtual switch to obtain a pre-negotiation result; the pre-negotiation result is used to indicate whether the pre-negotiation is successful;

[0201] When the pre-negotiation result indicates that the pre-negotiation is successful, the at least one logical unit is hot-upgraded using the first configuration file.

[0202] In some embodiments, the processing unit 320 is specifically configured to:

[0203] By comparing capabilities supported by the first profile with capabilities supported by the second profile, if the capabilities supported by the second profile are a superset of capabilities supported by the first profile, it is determined that the pre-negotiation result indicates that the pre-negotiation is successful.

[0204] In some embodiments, the first configuration file includes a first bit sequence, the first bit sequence is used to indicate whether the at least one logical unit supports at least one capability, and the second configuration file includes a second bit sequence, the second bit sequence is used to indicate whether the virtual switch supports the at least one capability;

[0205] The processing unit 320 is specifically configured to:

[0206] Obtain a third bit sequence, where the third bit sequence is used to indicate a capability for pre-negotiation in the at least one capability;

[0207] Performing a bitwise AND operation on the first bit sequence and the third bit sequence to obtain a first result;

[0208] Performing a bitwise AND operation on the second bit sequence and the third bit sequence to obtain a second result;

[0209] In a case where the first result and the second result are the same, it is determined that the pre-negotiation result indicates that the pre-negotiation is successful.

[0210] In some embodiments, after performing the hot upgrade on the at least one logic unit, the processing unit 320 is further configured to:

[0211] performing error sensing on the at least one logical unit through a virtual switch;

[0212] The at least one logic unit is processed based on a perception result of the error perception.

[0213] In some embodiments, the processing unit 320 is specifically configured to:

[0214] Performing periodic read and write checks on the memory of the at least one logical unit through the virtual switch to determine whether the memory is invalid, and detecting whether a link between the virtual switch and the at least one logical unit is connected by sending a probe data packet to the at least one logical unit through the virtual switch;

[0215] When the sensing result indicates that the memory of the at least one logical unit is faulty or the sensing result indicates that the link between the virtual switch and the at least one logical unit is disconnected, re-hot-upgrading the at least one logical unit;

[0216] In case that the hot upgrade of the at least one logical unit fails, a logical unit for processing data packets in the at least one logical unit is isolated.

[0217] In some embodiments, the processing unit 320 is specifically configured to:

[0218] reading, by the virtual switch, an error statistical record of the at least one logical unit for the data packet to be processed, to determine whether there is an error in the data processing logic of the at least one logical unit;

[0219] If the sensing result indicates that an error exists in the data processing logic of the at least one logical unit, resetting the configuration file of the at least one logical unit to the configuration file used before the hot upgrade of the at least one logical unit;

[0220] In case of a reset failure, a logical unit for processing data packets in the at least one logical unit is isolated.

[0221] It should be understood that the device embodiments and the method embodiments may correspond to each other, and similar descriptions may refer to the method embodiments. To avoid repetition, they will not be described here. Specifically, the device 300 may correspond to the corresponding subjects in the methods 100 to 200 of the embodiments of the present application, and the various units in the device 300 are respectively for implementing the corresponding processes in the methods 100 to 200. For the sake of brevity, they will not be described here.

[0222] It should also be understood that the various units in the device 300 involved in the embodiment of the present application are divided based on logical functions. In practical applications, the function of a unit can also be implemented by multiple units, or the functions of multiple units can be implemented by one unit, or even these functions can also be implemented with the assistance of one or more other units. For example, part or all of the device 300 is merged into one or several other units. For another example, a certain (some) unit in the device 300 can also be split into multiple smaller units in function to constitute, which can achieve the same operation without affecting the realization of the technical effects of the embodiments of the present application. For another example, the device 300 can also include other units. In practical applications, these functions can also be implemented with the assistance of other units, and can be implemented by the collaboration of multiple units.

[0223] It should also be understood that the term "logic unit" referred to in this application refers to a hardware unit in a DPU, for example, which may include at least one of a programmable logic unit (Logic Elements) and a programmable interconnect resources (Interconnect Resources).

[0224] In addition, the "module" or "unit" involved in the embodiments of the present application refers to a computer program or a part of a computer program with a predetermined function, and works together with other related parts to achieve a predetermined goal, and can be implemented in whole or in part by using software, hardware (such as processing circuits or memories) or a combination thereof. Similarly, a processor (or multiple processors or memories) can be used to implement one or more modules or units. In addition, each module or unit can be part of an overall module or unit that includes the function of the module or unit.

[0225] According to another embodiment of the present application, the apparatus 300 involved in the embodiment of the present application can be constructed by running a computer program (including program code) capable of executing each step involved in the corresponding method on a general-purpose computing device of a general-purpose computer including processing elements and storage elements such as a central processing unit (CPU), a random access memory medium (RAM), and a read-only memory medium (ROM), and implementing the method of the embodiment of the present application. The computer program can be recorded on, for example, a computer-readable storage medium and loaded into an electronic device via a computer-readable storage medium, and the computer program is used to implement the corresponding method of the embodiment of the present application. In other words, the units mentioned above can be implemented in hardware form, or can be implemented by instructions in the form of software, or can be implemented in the form of a combination of hardware and software. Specifically, the steps of the method embodiment in the embodiment of the present application can be completed by the integrated logic circuit of the hardware in the processor and / or the instructions in the form of software, and the steps of the method disclosed in the embodiment of the present application can be directly embodied as being executed by a hardware decoding processor, or being executed by a combination of hardware and software in a decoding processor. Optionally, the software can be located in a mature storage medium in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, an electrically erasable programmable memory, a register, etc. The software in the memory can be executed by the processor to complete the steps in the above-mentioned method embodiments.

[0226] Figure 9 It is a schematic structural diagram of an electronic device 400 provided in an embodiment of the present application.

[0227] like Figure 9 As shown, the electronic device 400 includes at least a processor 410 and a computer-readable storage medium 420. The processor 410 and the computer-readable storage medium 420 may be connected via a bus or other means. The computer-readable storage medium 420 is used to store a computer program 421, which includes computer instructions. The processor 410 is used to execute the computer instructions stored in the computer-readable storage medium 420. The processor 410 is the computing core and control core of the electronic device 400. It is suitable for implementing one or more computer instructions, and is specifically suitable for loading and executing one or more computer instructions to implement the corresponding method flow or corresponding function.

[0228] As an example, the processor 410 may also be referred to as a central processing unit (CPU). The processor 410 may include, but is not limited to, a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, and the like.

[0229] As an example, the computer-readable storage medium 420 may be a high-speed RAM memory, or a non-volatile memory (Non-Volatile Memory), such as at least one disk storage; optionally, it may also be at least one computer-readable storage medium located away from the aforementioned processor 410. Specifically, the computer-readable storage medium 420 includes, but is not limited to: volatile memory and / or non-volatile memory. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus random access memory (DR RAM).

[0230] like Figure 9 As shown, the electronic device 400 may further include a transceiver 430 .

[0231] The processor 410 may control the transceiver 430 to communicate with other devices. Specifically, the processor 410 may send information or data to other devices or receive information or data sent by other devices. The transceiver 430 may include a transmitter and a receiver. The transceiver 430 may further include one or more antennas.

[0232] It should be understood that the various components in the electronic device 400 are connected via a bus system, wherein the bus system includes not only a data bus but also a power bus, a control bus, and a status signal bus. It is worth noting that the electronic device 400 can be any electronic device with data processing capabilities; the computer readable storage medium 420 stores a first computer instruction; the processor 410 loads and executes the first computer instruction stored in the computer readable storage medium 420 to implement Figure 1 The corresponding steps in the method embodiment shown; in a specific implementation, the first computer instruction in the computer-readable storage medium 420 is loaded by the processor 410 and executes the corresponding steps. To avoid repetition, they are not repeated here.

[0233] According to another aspect of the present application, an embodiment of the present application provides a chip. The chip can be an integrated circuit chip with signal processing capabilities, and can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present application. The chip can also be called a system-on-chip, a system-on-chip, a chip system, or a system-on-chip chip, etc. The chip can be applied to various electronic devices that can be installed with the chip, so that the device equipped with the chip can execute the corresponding steps in the various methods or logic block diagrams disclosed in the embodiments of the present application. For example, the chip can be suitable for implementing one or more computer instructions, specifically suitable for loading and executing one or more computer instructions to implement the corresponding method flow or corresponding function.

[0234] According to another aspect of the present application, an embodiment of the present application provides a computer-readable storage medium (Memory). The computer-readable storage medium is a memory device of a computer for storing programs and data. It is understandable that the computer-readable storage medium herein may include both built-in storage media in the computer and, of course, extended storage media supported by the computer. The computer-readable storage medium provides a storage space that stores an operating system of an electronic device. The storage space stores computer instructions suitable for being loaded and executed by a processor. When the computer instructions are read and executed by the processor of the computer device, the computer device executes the corresponding steps in the various methods or logic block diagrams disclosed in the embodiments of the present application.

[0235] According to another aspect of the present application, an embodiment of the present application provides a computer program product or computer program. The computer program product or computer program includes computer instructions, which are stored in a computer-readable storage medium. The processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the corresponding steps in the various methods or logic block diagrams disclosed in the embodiments of the present application. In other words, when software is used to implement the solution provided by the present application, it can be implemented in whole or in part in the form of a computer program product or computer program. The computer program product or computer program includes one or more computer instructions. When these computer program instructions are loaded and executed on a computer, the process of the embodiment of the present application is run in whole or in part or the functions of the embodiment of the present application are implemented.

[0236] It is worth noting that the computer involved in this application can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions involved in this application can be stored in a computer-readable storage medium, or can be transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means.

[0237] Those skilled in the art will appreciate that the units and process steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. In other words, professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of protection of this application.

[0238] Finally, it should be noted that the above content is only a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or replacements within the technical scope disclosed in the present application, which should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims. For example, the various specific technical features described in the above specific embodiments can be combined in any suitable manner unless there is any contradiction. For another example, the various different embodiments of the present application can also be arbitrarily combined, as long as they do not violate the basic idea of the present application, they should also be regarded as the content disclosed in the present application.

Claims

1. A thermal upgrade method, characterized in that: include: receiving data packets to be processed via a data processing unit DPU; The DPU includes a plurality of logic units, and the plurality of logic units are used to form a plurality of paths for performing data processing of the DPU; During a hot upgrade period of at least one logical unit among the plurality of logical units, switching a path used by the DPU to a target path among the plurality of paths that does not include a path of the at least one logical unit; The data packet to be processed is processed based on the target path to obtain a processed data packet, and the processed data packet is sent.

2. The method according to claim 1, characterized in that The multiple paths include a first path and a second path, the first path uses a first logic unit in the DPU to process data packets, and the second path uses a second logic unit in the DPU and a virtual switch to process data packets; The step of switching the path used by the DPU to a target path among the multiple paths that does not include the path of the at least one logical unit includes: When the at least one logical unit includes the first logical unit but does not include the second logical unit, during a hot upgrade period of the first logical unit, switching a path used by the DPU to the second path; When the at least one logical unit does not include the first logical unit but includes the second logical unit, during a hot upgrade period of the second logical unit, switching a path used by the DPU to the first path; When the at least one logical unit includes the first logical unit and the second logical unit, during a hot upgrade period of the first logical unit, the path used by the DPU is switched to the second path, and during a hot upgrade period of the second logical unit, the path used by the DPU is switched to the first path, and the hot upgrade period of the first logical unit and the hot upgrade period of the second logical unit do not overlap in the time domain.

3. The method according to claim 2, characterized in that The method further comprises: During the hot upgrade period of the second logic unit, the virtual switch is hot upgraded.

4. The method according to claim 2, characterized in that The method further comprises: During the hot upgrade period of the virtual switch, hot upgrade the virtual switch; wherein the hot upgrade period of the virtual switch and the hot upgrade period of the at least one logical unit do not overlap in the time domain; During a hot upgrade of the virtual switch, the path used by the DPU is switched to the first path.

5. The method according to claim 2, characterized in that Before the first logic unit is hot-upgraded, the path used by the DPU is the first path, and the method further includes: Sending control plane information to the virtual switch through the first logic unit; the control plane information includes information for rebuilding the flow table and status information of the data packet to be processed; The processing of the data packet to be processed based on the target path to obtain a processed data packet includes: Rebuilding the flow table through the virtual switch based on the information for rebuilding the flow table; Based on the reconstructed flow table and the status information of the data packet to be processed, the data packet to be processed is continuously processed through the virtual switch to obtain the processed data packet.

6. The method according to claim 2, characterized in that The first logic unit includes at least one of the following: an uplink channel for sending data packets to the virtual switch, and a backlink channel for receiving data packets from the virtual switch; The second logic unit includes at least one of the following: an offload channel for receiving offload-related information from the virtual switch, and a forwarding engine for processing data packets offloaded by the virtual switch.

7. The method according to any one of claims 1 to 6, characterized in that Before hot-upgrading the at least one logic unit, the method further includes: Obtaining, through the virtual switch, a first configuration file for hot-upgrading the at least one logical unit; Performing pre-negotiation on the first configuration file and the second configuration file of the virtual switch to obtain a pre-negotiation result; the pre-negotiation result is used to indicate whether the pre-negotiation is successful; The hot upgrading of the at least one logic unit includes: In a case where the pre-negotiation result indicates that the pre-negotiation is successful, hot-upgrading the at least one logical unit is performed using the first configuration file.

8. The method according to claim 7, characterized in that The pre-negotiation of the first configuration file and the second configuration file of the virtual switch to obtain a pre-negotiation result includes: By comparing capabilities supported by the first profile with capabilities supported by the second profile, if the capabilities supported by the second profile are a superset of capabilities supported by the first profile, it is determined that the pre-negotiation result indicates that the pre-negotiation is successful.

9. The method according to claim 7, characterized in that The first configuration file includes a first bit sequence, the first bit sequence is used to indicate whether the at least one logical unit supports at least one capability, and the second configuration file includes a second bit sequence, the second bit sequence is used to indicate whether the virtual switch supports the at least one capability; The pre-negotiation of the first configuration file and the second configuration file of the virtual switch to obtain a pre-negotiation result includes: Obtain a third bit sequence, where the third bit sequence is used to indicate a capability of pre-negotiation among the at least one capability; performing a bitwise AND operation on the first bit sequence and the third bit sequence to obtain a first result; performing a bitwise AND operation on the second bit sequence and the third bit sequence to obtain a second result; In a case where the first result and the second result are the same, it is determined that the pre-negotiation result indicates that the pre-negotiation is successful.

10. The method according to any one of claims 1 to 6, characterized in that After hot-upgrading the at least one logic unit, the method further includes: performing error sensing on the at least one logical unit through a virtual switch; The at least one logic unit is processed based on a perception result of the error perception.

11. The method according to claim 10, characterized in that The performing error sensing on the at least one logical unit by using a virtual switch includes: performing periodic read and write checks on a memory of the at least one logical unit through the virtual switch to determine whether the memory is invalid, and detecting whether a link between the virtual switch and the at least one logical unit is connected by sending a probe data packet to the at least one logical unit through the virtual switch; The processing of the at least one logic unit based on the perception result of the error perception includes: When the sensing result indicates that a memory of the at least one logical unit is faulty or the sensing result indicates that a link between the virtual switch and the at least one logical unit is disconnected, hot-upgrading the at least one logical unit again; In the case that the hot upgrade of the at least one logical unit fails, a logical unit for processing data packets in the at least one logical unit is isolated.

12. The method according to claim 10, characterized in that The performing error sensing on the at least one logical unit by using a virtual switch includes: Reading, by the virtual switch, an error statistical record of the at least one logical unit for the data packet to be processed, and determining whether there is an error in the data processing logic of the at least one logical unit; The processing of the at least one logic unit based on the perception result of the error perception includes: If the sensing result indicates that there is an error in the data processing logic of the at least one logical unit, resetting the configuration file of the at least one logical unit to the configuration file used before the hot upgrade of the at least one logical unit; In case of a reset failure, a logic unit for processing data packets in the at least one logic unit is isolated.

13. A thermal upgrade device, characterized in that: include: A receiving unit, configured to receive a data packet to be processed via a data processing unit DPU; The DPU includes a plurality of logic units, and the plurality of logic units are used to form a plurality of paths for performing data processing of the DPU; a processing unit configured to, during a hot upgrade period of at least one logical unit among the plurality of logical units, switch a path used by the DPU to a target path among the plurality of paths that does not include a path of the at least one logical unit; The forwarding unit is configured to process the data packet to be processed based on the target path to obtain a processed data packet, and send the processed data packet.

14. An electronic device, characterized in that: include: a processor adapted to execute a computer program; A computer-readable storage medium having a computer program stored therein, wherein the computer program, when executed by the processor, implements the method according to any one of claims 1 to 12.

15. A computer-readable storage medium, characterized in that Used to store a computer program, which, when run on a computer, causes the computer to execute the method according to any one of claims 1 to 12.

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