Data processing method and device of temporary register, equipment and medium

Abstract

The invention discloses a data processing method and device of a temporary register, equipment and a medium, and the method comprises the steps: executing an operation instruction through an operation unit to obtain a target operation result, and storing the target operation result in a target address space of a corresponding output register; acquiring a target operation result from the target address space by adopting a data selector through an operation unit according to the encoding information corresponding to the target address space; and executing the operation instruction by using the target operation result through the operation unit. According to the technical scheme, the data access time consumption can be reduced, and the data operation efficiency can be improved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a data processing method, device, equipment and medium for a temporary register. Background Art

[0002] In the prior art, after a calculation module of an electronic device obtains a calculation result, it is usually necessary to write the calculation result into a general register before it can be used by other calculation modules.

[0003] If a certain operation module needs to continuously use the operation result of the previous operation module, it needs to frequently access the general register, thereby increasing the data access time and reducing the data operation efficiency. Summary of the Invention

[0004] The present invention provides a temporary register data processing method, device, equipment and medium, which can reduce data access time and improve data operation efficiency.

[0005] According to one aspect of the present invention, a method for processing data of a temporary register is provided, the method comprising:

[0006] After the target operation result is obtained by executing the operation instruction through the operation unit, the target operation result is stored in the target address space of the corresponding output register;

[0007] Obtaining a target operation result from the target address space according to the encoding information corresponding to the target address space by using a data selector in the operation unit;

[0008] The operation instruction is executed using the target operation result through the operation unit.

[0009] Optionally, before the operation unit executes the operation instruction to obtain the target operation result, the method further includes:

[0010] encoding different address spaces in the output register;

[0011] An address-coding mapping table is constructed based on different address spaces and coding information in the output register.

[0012] Optionally, before storing the target operation result in the target address space of the corresponding output register, the method further includes:

[0013] Determining, according to the operation type matched by the target operation result, an alternative address space matching the operation type;

[0014] According to the working status corresponding to the candidate address space, a target address space is determined in the candidate address space.

[0015] Optionally, obtaining a target operation result from the target address space includes:

[0016] The data selector is adopted through the operation unit to obtain the latest operation result stored in the target address space as the target operation result according to the encoding information.

[0017] Optionally, the method further includes:

[0018] After detecting that a new operation result is stored in the output register, the new operation result is used to overwrite the historical operation result.

[0019] Optionally, the operation type includes: integer operation, fixed-point operation and floating-point operation.

[0020] According to another aspect of the present invention, a data processing device for a temporary register is provided, the device comprising:

[0021] A result storage module is used to store the target operation result in the target address space of the corresponding output register after the operation unit executes the operation instruction to obtain the target operation result;

[0022] A result acquisition module, configured to acquire a target operation result from the target address space according to the encoding information corresponding to the target address space by using a data selector through the operation unit;

[0023] The instruction execution module is used to execute the operation instruction using the target operation result through the operation unit.

[0024] According to another aspect of the present invention, an electronic device is provided, comprising:

[0025] at least one processor; and

[0026] a memory communicatively connected to the at least one processor; wherein,

[0027] The memory stores a computer program executable by the at least one processor. The computer program is executed by the at least one processor to enable the at least one processor to perform the temporary register data processing method according to any embodiment of the present invention.

[0028] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the temporary register data processing method described in any embodiment of the present invention when executed.

[0029] According to another aspect of the present invention, a computer program product is provided. The computer program product includes a computer program. When the computer program is executed by a processor, the temporary register data processing method according to any embodiment of the present invention is implemented.

[0030] The technical solution provided by the embodiment of the present invention is as follows: after the target operation result is obtained by executing the operation instruction through the operation unit, the target operation result is stored in the target address space of the corresponding output register; the operation unit adopts a data selector to obtain the target operation result from the target address space according to the encoding information corresponding to the target address space; through the operation unit, a technical means of using the target operation result to execute the operation instruction is used to provide a temporary register for storing the operation result, which can reduce data access time and improve data operation efficiency.

[0031] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0033] Figure 1a is a flow chart of a data processing method of a temporary register provided according to an embodiment of the present invention;

[0034] Figure 1b 1 is a schematic diagram of a scenario applicable to a temporary register data processing method provided in an embodiment of the present invention;

[0035] Figure 2 is a flow chart of another temporary register data processing method provided according to an embodiment of the present invention;

[0036] Figure 3 1 is a schematic structural diagram of a data processing device for a temporary register provided according to an embodiment of the present invention;

[0037] Figure 4 The present invention is a schematic diagram of the structure of an electronic device for implementing the temporary register data processing method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0038] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0039] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0040] Figure 1a This is a flowchart of a temporary register data processing method provided by an embodiment of the present invention. This embodiment is applicable to the case where multiple operation modules execute operation instructions and store the operation results of the operation modules through temporary registers. This method can be executed by a temporary register data processing device. The temporary register data processing device can be implemented in the form of hardware and / or software. The temporary register data processing device can be configured in an electronic device. Figure 1a As shown, the method includes:

[0041] Step 110: After the target operation result is obtained by executing the operation instruction through the operation unit, the target operation result is stored in the target address space of the corresponding output register.

[0042] In this embodiment, Figure 1b A schematic diagram of a scenario in which a temporary register data processing method is applicable may be shown. The operation unit may be Figure 1b Any operation unit in, each operation module may include an operation unit and a corresponding output register.

[0043] In this step, if Figure 1b As shown, taking the operation module 1 as an example, after the operation unit in the operation module 1 executes the operation instruction to obtain the target operation result, the target operation result can be stored in the output register in the operation module 1.

[0044] Specifically, the output register is used to store the return value of a function or instruction or data output to the outside in a short term, and is usually read by the caller. Each address space in the output register corresponds to a coding information, and the coding information can be pre-configured by the control software.

[0045] Step 120 : Using a data selector through the operation unit, obtain a target operation result from the target address space according to the encoding information corresponding to the target address space.

[0046] In this embodiment, after the operation unit stores the target operation result in the target address space, the encoding information corresponding to the target address space may be reported to the software.

[0047] When the operation unit needs to use the target operation result, the encoding information can be obtained through software, and then the data selector locates the target address space according to the encoding information and obtains the target operation result from the target address space.

[0048] In a specific embodiment, Figure 1b As shown, after the operation unit in the operation module 1 executes the operation instruction to obtain the target operation result, the target operation result can be stored in the output register in the operation module 1.

[0049] When the operation unit in the operation module 1 needs to use the target operation result in the next operation process, the data selector can be used to obtain the target operation result from the target address space according to the encoding information corresponding to the target address space;

[0050] Alternatively, when the operation unit in the operation module N needs to use the target operation result, a data selector can be used to obtain the target operation result from the target address space according to the encoding information corresponding to the target address space.

[0051] That is, the operation unit that needs to use the target operation result can be the operation unit that obtains the target operation result, or can be another external operation unit, and this embodiment does not limit this.

[0052] Step 130: Execute the operation instruction using the target operation result through the operation unit.

[0053] The advantage of this setting is that by using output registers and data selectors, the calculation results are temporarily stored and retrieved, providing a temporary register for storing the calculation results. Compared with the standardized, programmable access general registers, this can avoid the problem of frequent access of the general register by the calculation module in the existing technology, thereby reducing data access time and improving data calculation efficiency.

[0054] The technical solution provided by the embodiment of the present invention is to obtain the target operation result after the operation unit executes the operation instruction, and then store the target operation result in the target address space of the corresponding output register. The operation unit adopts a data selector to obtain the target operation result from the target address space according to the encoding information corresponding to the target address space. The operation unit uses the target operation result to execute the operation instruction by technical means, thereby providing a temporary register for storing the operation result, which can reduce data access time and improve data operation efficiency.

[0055] Figure 2 A flowchart of another temporary register data processing method provided by an embodiment of the present invention is shown in FIG. Figure 2 As shown, the method includes:

[0056] Step 210: Execute the operation instruction through the operation unit to obtain the target operation result.

[0057] In one implementation of this embodiment, before the operation unit executes the operation instruction to obtain the target operation result, it also includes: encoding different address spaces in the output register; and constructing an address encoding mapping table based on the different address spaces and encoding information in the output register.

[0058] In this embodiment, different address spaces in the output register may be encoded by software, and an address encoding mapping table may be constructed according to the encoding information.

[0059] The advantage of this setting is that by constructing an address coding mapping table, the target address space for storing the operation results can be quickly located, thereby improving operation efficiency.

[0060] Step 220: According to the operation type matched by the target operation result, determine in the output register an alternative address space that matches the operation type.

[0061] In this embodiment, different address spaces can match different operation types, including integer operations, fixed-point operations, and floating-point operations, which are not limited in this embodiment.

[0062] The advantage of this setting is that by matching the operation type with the address space, the target address space for storing the operation result can be quickly located according to the operation requirements of the operation unit, thereby improving the operation efficiency.

[0063] Step 230: Determine a target address space in the candidate address space according to the working status corresponding to the candidate address space.

[0064] In this step, optionally, a target address space may be determined in the candidate address space according to the amount of stored data in the candidate address space.

[0065] For example, if the amount of stored data in the alternative address space is greater than or equal to a preset data volume threshold, it is determined that the alternative address space is frequently occupied; conversely, if the amount of stored data in the alternative address space is less than the preset data volume threshold, it is determined that there is an idle address segment in the alternative address space, and the alternative address space is used as the target address space.

[0066] Step 240: Store the target operation result in the target address space corresponding to the output register.

[0067] Step 250: Using a data selector through the operation unit, obtain the latest operation result stored in the target address space according to the encoding information as the target operation result.

[0068] Step 260: Execute the operation instruction using the target operation result through the operation unit.

[0069] In one implementation of this embodiment, the method further includes: when it is detected that a new operation of the operation unit is completed, automatically updating the new operation result through the output register.

[0070] The technical solution provided by the embodiment of the present invention obtains a target operation result by executing an operation instruction through an operation unit, determines an alternative address space matching the operation type in an output register according to the operation type matching the target operation result, determines a target address space in the alternative address space according to the working state corresponding to the alternative address space, stores the target operation result in the target address space corresponding to the output register, adopts a data selector through the operation unit, obtains the latest operation result stored in the target address space as the target operation result according to the encoding information, and uses the target operation result to execute the operation instruction through the operation unit. A temporary register for storing operation results is provided, which can reduce data access time and improve data operation efficiency.

[0071] Figure 3 A schematic diagram of a data processing device for a temporary register according to an embodiment of the present invention is provided. The device is applied to an electronic device, such as Figure 3 As shown, the device includes: a result storage module 310 , a result acquisition module 320 and an instruction execution module 330 .

[0072] A result storage module 310 is configured to store a target operation result obtained by executing an operation instruction through an operation unit in a target address space of a corresponding output register;

[0073] A result acquisition module 320 is configured to acquire a target operation result from the target address space according to the encoding information corresponding to the target address space by using a data selector through the operation unit;

[0074] The instruction execution module 330 is configured to execute the operation instruction using the target operation result through the operation unit.

[0075] The technical solution provided by the embodiment of the present invention is as follows: after the target operation result is obtained by executing the operation instruction through the operation unit, the target operation result is stored in the target address space of the corresponding output register; the operation unit adopts a data selector to obtain the target operation result from the target address space according to the encoding information corresponding to the target address space; through the operation unit, a technical means of using the target operation result to execute the operation instruction is used to provide a temporary register for storing the operation result, which can reduce data access time and improve data operation efficiency.

[0076] Based on the above embodiment, the device further includes:

[0077] An encoding module, configured to encode different address spaces in the output register; and construct an address encoding mapping table according to the different address spaces and encoding information in the output register;

[0078] The result update module is used to automatically update the new operation result through the output register when detecting that a new operation of the operation unit is completed.

[0079] The result storage module 310 includes:

[0080] The address selection unit is configured to determine, in a data selector, an alternative address space matching the operation type matched by the target operation result, and to determine a target address space in the alternative address space based on a working state corresponding to the alternative address space. The operation types include integer operation, fixed-point operation, and floating-point operation.

[0081] The result acquisition module 320 includes:

[0082] The latest result obtaining unit is used to obtain the latest operation result stored in the target address space as the target operation result according to the encoding information by using the data selector through the operation unit.

[0083] The above device can execute the methods provided by all the above embodiments of the present invention, and has the corresponding functional modules and beneficial effects of executing the above methods. For technical details not fully described in the embodiments of the present invention, please refer to the methods provided by all the above embodiments of the present invention.

[0084] Figure 4A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or claimed herein.

[0085] like Figure 4 As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., which is communicatively connected to the at least one processor 11. The memory stores a computer program that can be executed by the at least one processor. The processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 into the random access memory (RAM) 13. Various programs and data required for the operation of the electronic device 10 can also be stored in the RAM 13. The processor 11, ROM 12, and RAM 13 are connected to each other via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0086] Multiple components in the electronic device 10 are connected to the I / O interface 15, including an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a magnetic disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0087] The processor 11 may be any general-purpose and / or specialized processing component with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various specialized artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as the data processing method for the temporary register.

[0088] In some embodiments, the data processing method for the temporary register may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the data processing method for the temporary register described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to execute the data processing method for the temporary register by any other appropriate means (e.g., by means of firmware).

[0089] Various embodiments of the systems and techniques described herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-chip systems (SOCs), programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that are executable and / or interpreted on a programmable system that includes at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0090] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when the computer program is executed by the processor, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The computer program may be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0091] In the context of the present invention, computer-readable storage media can be tangible media that can contain or store a computer program for use with an instruction execution system, device or equipment or used in combination with an instruction execution system, device or equipment. Computer-readable storage media can include but are not limited to electronic, magnetic, optical, electromagnetic, infrared or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, computer-readable storage media can be machine-readable signal media. More specific examples of machine-readable storage media can include electrical connections based on one or more lines, portable computer disks, hard disks, random access memories (RAM), read-only memories (ROM), erasable programmable read-only memories (EPROM or flash memory), optical fibers, portable compact disk read-only memories (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0092] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0093] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0094] A computing system may include clients and servers. The clients and servers are typically remote from each other and typically interact via a communication network. This client-server relationship arises through computer programs running on the respective computers, creating a client-server relationship. The server may be a cloud server, also known as a cloud computing server or cloud host. This server is a hosting product within the cloud computing service ecosystem that addresses the management difficulties and limited scalability of traditional physical hosting and VPS services.

[0095] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. This is not limited herein.

[0096] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A data processing method for a temporary register, characterized in that: The method comprises: After the target operation result is obtained by executing the operation instruction through the operation unit, the target operation result is stored in the target address space of the corresponding output register; Obtaining a target operation result from the target address space according to the encoding information corresponding to the target address space by using a data selector in the operation unit; The operation instruction is executed using the target operation result through the operation unit.

2. The method according to claim 1, characterized in that Before the operation unit executes the operation instruction to obtain the target operation result, it also includes: encoding different address spaces in the output register; An address-coding mapping table is constructed based on different address spaces and coding information in the output register.

3. The method according to claim 1, characterized in that Before storing the target operation result in the target address space of the corresponding output register, the method further includes: Determining, according to the operation type matched by the target operation result, an alternative address space matching the operation type; According to the working status corresponding to the candidate address space, a target address space is determined in the candidate address space.

4. The method according to claim 1, wherein Obtaining a target operation result from the target address space includes: The data selector is adopted through the operation unit to obtain the latest operation result stored in the target address space as the target operation result according to the encoding information.

5. The method according to claim 1, wherein The method further comprises: When it is detected that a new operation of the operation unit is completed, the new operation result is automatically updated through the output register.

6. The method according to claim 3, characterized in that The operation types include integer operation, fixed-point operation and floating-point operation.

7. A data processing device for a temporary register, characterized in that: The device comprises: A result storage module is used to store the target operation result in the target address space of the corresponding output register after the operation unit executes the operation instruction to obtain the target operation result; A result acquisition module, configured to acquire a target operation result from the target address space according to the encoding information corresponding to the target address space by using a data selector through the operation unit; The instruction execution module is used to execute the operation instruction using the target operation result through the operation unit.

8. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor. The computer program is executed by the at least one processor to enable the at least one processor to perform the temporary register data processing method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the temporary register data processing method according to any one of claims 1 to 6 when executed.

10. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is executed by a processor, the computer program implements the temporary register data processing method according to any one of claims 1 to 6.

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