Data processing system and method, electronic equipment, storage medium and computer program product

Abstract

The invention relates to the technical field of computers, in particular to a data processing system and method, electronic equipment, a storage medium and a computer program product. The host end sends the configuration parameters of the data processing task to a first storage space in a storage module in the equipment end; a control module in the equipment side sends a configuration instruction to a register configuration module in the equipment side so as to instruct the register configuration module to start to perform register configuration on a data processing module in the equipment side; the register configuration module responds to the configuration instruction and transmits configuration parameters of the data processing task from the first storage space to a corresponding register in the data processing module; and the data processing module executes the data processing task according to the configuration parameters of the data processing task. According to the embodiment of the invention, the parameter configuration task is transferred to the register configuration module, so that the load of the control module is effectively reduced, and the parameter configuration efficiency and the data processing efficiency are improved.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a data processing system, method, electronic device, storage medium, and computer program product. Background Art

[0002] Certain data processing tasks (e.g., JPEG encoding and decoding) may require numerous configuration parameters. In existing technologies, after a host sends the configuration parameters and raw data for the data processing task to a device, each parameter must pass through the cache and internal registers of a control module (e.g., a microcontroller unit (MCU)) on the device before being forwarded to the data processing module. This configuration increases the load on the control module and reduces both parameter configuration and data processing efficiency. Summary of the Invention

[0003] In view of this, the present disclosure proposes a data processing system, method, electronic device, storage medium, and computer program product.

[0004] According to one aspect of the present disclosure, a data processing system is provided, comprising: a host side and a device side, wherein the device side comprises: a control module, a register configuration module, a data processing module, and a storage module; the host side is used to send configuration parameters of a data processing task to a first storage space in the storage module, wherein the first storage space is allocated by the control module for the configuration parameters of the data processing task; the control module is used to send a configuration instruction to the register configuration module, wherein the configuration instruction is used to instruct the register configuration module to start register configuration of the data processing module; the register configuration module is used to respond to the configuration instruction and transfer the configuration parameters of the data processing task from the first storage space to the corresponding registers in the data processing module; the data processing module is used to execute the data processing task according to the configuration parameters of the data processing task.

[0005] In one possible implementation, the host side is used to package and process the configuration parameters of the data processing task according to the target data format, obtain multiple data entries with the target data format, and send the multiple data entries to the first storage space; any data entry includes: an instruction field, an index field, an address field, and a data field, wherein the instruction field is used to indicate the instruction type of the data entry, the index field is used to indicate the identifier of the data processing module, the address field is used to indicate the register address within the data processing module, and the data field is used to indicate the configuration parameters of the data entry.

[0006] In one possible implementation, the control module is further used to allocate a second storage space for the original data of the data processing task in the storage module, and to allocate a third storage space for the target data of the data processing task, wherein the target data of the data processing task is obtained after performing a data processing operation on the original data of the data processing task, and the configuration parameters of the data processing task include the address information of the third storage space; the host side is used to send the original data of the data processing task to the second storage space.

[0007] In one possible implementation, the host side sends a first notification message to the control module after sending the configuration parameters of the data processing task to the first storage space and sending the original data of the data processing task to the second storage space; the control module is used to respond to the first notification message and send the configuration instruction to the register configuration module.

[0008] In one possible implementation, the register configuration module includes: an address register, a byte register, a control register, and a status register; the register configuration module is used to configure the address register, the byte register, the control register, and the status register in response to the configuration instruction; the address register is used to indicate data address information for data transmission to the data processing module; the byte register is used to indicate the data byte length for data transmission to the data processing module; the control register is used to control the interruption, start and stop of data transmission to the data processing module, and indicate the status judgment interval and status query number of the data transmission process; the status register is used to indicate the working status of data transmission to the data processing module.

[0009] In one possible implementation, the register configuration module includes: a reading unit, a cache unit, a parsing unit, and a control unit; the reading unit is used to read any data entry from the first storage space and send the data entry to the cache unit; the parsing unit is used to parse the data entry stored in the cache unit and determine the instruction type of the data entry based on the instruction field of the data entry; the control unit is used to perform register configuration or status query on the data processing module based on the instruction type of the data entry.

[0010] In one possible implementation, the control unit is used to send the configuration parameters indicated by the data field of the data entry to the corresponding register in the data processing module according to the index field and address field of the data entry when the instruction type of the data entry is a configuration instruction.

[0011] In one possible implementation, the control unit is used to, when the instruction type of the data entry is a status query instruction, read configuration parameters from the corresponding registers in the data processing module according to the index field and address field of the data entry, and according to the status judgment interval and number of status queries indicated by the control register, and compare whether the read configuration parameters are consistent with the configuration parameters indicated by the data field of the data entry to obtain a status query result.

[0012] In one possible implementation, the data processing module is used to send a second notification message to the control module after executing the data processing task; the control module is used to send a third notification message to the host end in response to the second notification message; and the host end is used to read the target data of the data processing task from the third storage space in response to the third notification message.

[0013] In a possible implementation, the control module is configured to dynamically allocate different data processing tasks among the data processing modules in the idle state when there are multiple data processing modules in the idle state.

[0014] In a possible implementation, the host side and the device side communicate with each other based on MailBox; and the host side and the device side transmit data based on PCIE.

[0015] According to another aspect of the present disclosure, a data processing method is provided, which is applied to a data processing system, wherein the data processing system includes: a host end and a device end, wherein the device end includes: a control module, a register configuration module, a data processing module, and a storage module; the method includes: based on the host end, sending the configuration parameters of the data processing task to a first storage space in the storage module, wherein the first storage space is allocated by the control module for the configuration parameters of the data processing task; based on the control module, sending a configuration instruction to the register configuration module, wherein the configuration instruction is used to instruct the register configuration module to start register configuration of the data processing module; based on the register configuration module responding to the configuration instruction, transferring the configuration parameters of the data processing task from the first storage space to the corresponding registers in the data processing module; based on the data processing module, executing the data processing task according to the configuration parameters of the data processing task.

[0016] According to another aspect of the present disclosure, an electronic device is provided, including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the above method.

[0017] According to another aspect of the present disclosure, a non-volatile computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the above method are implemented.

[0018] According to another aspect of the present disclosure, a computer program product is provided, including a computer program, or a non-volatile computer-readable storage medium carrying the computer program, wherein the computer program implements the steps of the above method when executed by a processor.

[0019] The data processing system of the embodiment of the present disclosure includes: a host side and a device side, the device side includes a control module, a register configuration module, a data processing module, and a storage module; after the host side sends the configuration parameters of the data processing task to the first storage space allocated for it by the control module in the storage module, the control module only needs to send a configuration instruction to the register configuration module, and the register configuration module can respond to the configuration instruction and transfer the configuration parameters of the data processing task from the first storage space to the corresponding registers in the data processing module, thereby completing the parameter configuration of the data processing task, so that the data processing module can effectively execute the data processing task according to the configuration parameters of the data processing task.

[0020] Compared with the prior art in which the control module writes configuration parameters one by one into the corresponding registers in the data processing module, the embodiment of the present disclosure transfers the parameter configuration task to the register configuration module, thereby effectively reducing the load of the control module and improving the parameter configuration efficiency and data processing efficiency.

[0021] Further features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.

[0023] Figure 1 A block diagram illustrating a data processing system according to an embodiment of the present disclosure.

[0024] Figure 2 A schematic diagram illustrating data entries in a target data format according to an embodiment of the present disclosure.

[0025] Figure 3 A schematic diagram illustrating a data processing system according to an embodiment of the present disclosure.

[0026] Figure 4 A schematic diagram illustrating a register configuration module according to an embodiment of the present disclosure is shown.

[0027] Figure 5 A schematic diagram showing a JPEG encoding and decoding system according to an embodiment of the present disclosure.

[0028] Figure 6 A data processing flow chart of the JPEG encoding and decoding system according to an embodiment of the present disclosure is shown.

[0029] Figure 7 A flow chart showing a data processing method according to an embodiment of the present disclosure is shown.

[0030] Figure 8 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0031] Various exemplary embodiments, features, and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise indicated.

[0032] As used herein, the terms "comprises," "comprising," "having," or variations thereof are open ended and include one or more stated features, integers, elements, steps, parts, or functions, but do not preclude the presence or addition of one or more other features, integers, elements, steps, parts, functions, or groups thereof.

[0033] When an element is referred to as being "connected," "coupled," "responsive" or variations thereof to another element, it can be directly connected, coupled or responsive to the other element or intervening elements may be present.

[0034] Although the terms first, second, third, etc. may be used herein to describe various elements / operations, these elements / operations should not be limited by these terms. These terms are only used to distinguish one element / operation from another element / operation. Therefore, without departing from the teachings of the present invention, the first element / operation in some embodiments may be referred to as the second element / operation in other embodiments.

[0035] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0036] In addition, numerous specific details are provided in the following detailed description to better illustrate the present disclosure. Those skilled in the art will appreciate that the present disclosure can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art are not described in detail in order to highlight the main points of the present disclosure.

[0037] Certain data processing tasks may require numerous configuration parameters. In existing technologies, after the host sends the configuration parameters and raw data for the data processing task to the device, each parameter must pass through the cache and internal registers of the device's control module (e.g., MCU) before being forwarded to the device's data processing module. This configuration increases the load on the control module and reduces both parameter configuration and data processing efficiency.

[0038] Take the data processing task of JPEG encoding and decoding as an example. JPEG encoding and decoding is a widely used image compression algorithm that involves multiple stages. JPEG encoding includes steps such as color space conversion, discrete cosine transform (DCT), quantization, and entropy coding. JPEG decoding includes steps such as entropy decoding, inverse quantization, inverse discrete cosine transform (IDCT), and color space conversion. During the JPEG encoding and decoding process, registers in related hardware modules (e.g., dedicated image processing chips) must be configured to control their operation. These register configurations include setting parameters such as the quantization table, DCT / IDCT coefficient range, and encoding and decoding mode. In existing JPEG encoding and decoding techniques, the host sends configuration parameters and raw image data to the graphics processing unit (GPU) memory on the device. The device's MCU, responsible for task management, reads the configuration parameters from the memory and transmits them to the JPEG processing unit (JPU) on the device. The JPU then initiates JPEG encoding and decoding. Since each configuration parameter must be forwarded to the JPU through the MCU's cache and internal registers, the configuration time is increased, the MCU load is increased, and the encoding and decoding efficiency is reduced.

[0039] The present disclosure provides a data processing system applicable to JPEG encoding and decoding tasks, as well as other data processing tasks requiring extensive register parameter configuration. The present disclosure does not limit the specific types of data processing tasks. The data processing system provided by the present disclosure can offload parameter configuration tasks to a dedicated register configuration module, effectively reducing the load on the control module and improving both parameter configuration and data processing efficiency. The data processing system of the present disclosure is described in detail below.

[0040] Figure 1 FIG. 1 is a block diagram showing a data processing system according to an embodiment of the present disclosure. Figure 1As shown, the data processing system includes: a host side and a device side, wherein the device side includes: a control module, a register configuration module, a data processing module, and a storage module; the host side is used to send the configuration parameters of the data processing task to the first storage space in the storage module, wherein the first storage space is allocated by the control module for the configuration parameters of the data processing task; the control module is used to send a configuration instruction to the register configuration module, wherein the configuration instruction is used to instruct the register configuration module to start register configuration of the data processing module; the register configuration module is used to respond to the configuration instruction and transfer the configuration parameters of the data processing task from the first storage space to the corresponding registers in the data processing module; the data processing module is used to execute the data processing task according to the configuration parameters of the data processing task.

[0041] Compared with the prior art in which the control module writes configuration parameters one by one into the corresponding registers in the data processing module, the embodiment of the present disclosure transfers the parameter configuration task to a dedicated register configuration module, thereby effectively reducing the load of the control module and improving the parameter configuration efficiency and data processing efficiency.

[0042] In order to ensure the normal operation of the register configuration module, the embodiment of the present disclosure defines a target data format to enable the register configuration module to complete the transmission of configuration parameters based on the target data format.

[0043] A data entry in the target data format is the smallest unit of data used by the register configuration module for data transmission. A data entry in the target data format consists of an instruction field, an index field, an address field, and a data field. The instruction field distinguishes different instruction types; the index field distinguishes different data processing modules; the address field indicates the register address within the data processing module; and the data field indicates configuration parameters.

[0044] Figure 2 Schematic diagram showing data entries of the target data format of an embodiment of the present disclosure. Figure 2 As shown, the data entry length of the target data format is 64 bits (bits) and is divided into 4 fields.

[0045] BIT[63:60] is the command field (CMD field), which is 4 bits long and is used to distinguish data entries of different command types. For example, when the bit field value of the command field of a data entry is 0x00, it indicates that the data entry is a configuration command; when the bit field value of the command field of a data entry is 0x01, it indicates that the data entry is a status query command.

[0046] BIT[59:56] is the index field (IDX field), which is 4 bits long. When a data processing system includes multiple data processing modules, the index field is used to distinguish different data processing modules. When the index field is set to 4 bits, it can support the distinction of up to 16 different data processing modules.

[0047] BIT[55:32] is the address field (ADDR field), which is 24 bits long and is used to indicate the register address within the data processing module identified by the index field. When the address field is set to 24 bits, it can support a maximum address space of 16MB.

[0048] BIT[31:00] is the data field (DATA field), which is 32 bits long and is used to indicate configuration parameters. When the instruction field indicates that the data entry is a configuration instruction, the data field contains configuration parameters that need to be configured for register configuration in the data processing module. When the instruction field indicates that the data entry is a status query instruction, the data field contains configuration parameters that need to be compared with the status of the corresponding registers in the data processing module.

[0049] The specific length of the data entry in the target data format and the specific length of each field can be flexibly set according to the actual application scenario, and this disclosure does not make specific limitations on this.

[0050] This flexible approach to setting the target data format can effectively adapt to data processing systems of varying sizes and requirements. For example, in small data processing systems, the length of data entries can be appropriately shortened to reduce the amount of data transmitted and improve data transmission efficiency. In large, complex data processing systems, the length of each field can be increased as needed to accommodate the needs of more data processing modules, larger address spaces, and a wider variety of instruction types. This design not only optimizes the operating efficiency of the register configuration module but also improves the performance and stability of the entire data processing system. It also reduces the error rate that can be caused by data format mismatches, providing a strong guarantee for the reliable operation of the data processing system.

[0051] In a possible implementation, when the host side has a data processing requirement, the host side sends a data processing request to the control module in the device side, wherein the data processing request is used to request the device side to perform a data processing task.

[0052] In a possible implementation, the host and the device communicate with each other based on MailBox.

[0053] Mailbox is a lightweight control channel that enables low-latency communication between the host and device without involving large amounts of data transmission between the two sides.

[0054] Figure 3 A schematic diagram of a data processing system according to an embodiment of the present disclosure is shown. Figure 3 In the data system shown, the host sends a data processing request to the control module in the device through MailBox.

[0055] The control module responds to the data processing request and allocates a first storage space in the storage module in the device end for the configuration parameters of the data processing task.

[0056] In one possible implementation, the control module is also used to allocate a second storage space for the original data of the data processing task in the storage module, and to allocate a third storage space for the target data of the data processing task, wherein the target data of the data processing task is obtained after performing a data processing operation on the original data of the data processing task, and the configuration parameters of the data processing task include address information of the third storage space; the host side is used to send the original data of the data processing task to the second storage space.

[0057] In order to successfully execute the data processing task, in addition to allocating the first storage space for the configuration parameters of the data processing task, the control module also needs to allocate the second storage space for the original data of the data processing task and the third storage space for the target data of the data processing task in the storage module.

[0058] The device side returns the address information of the first storage space, the second storage space, and the third storage space allocated for the data processing task to the host side.

[0059] The host side determines the configuration parameters of the data processing task, wherein the configuration parameters of the data processing task include the address information of the third storage space, so that after the data processing module in the device side executes the data processing task based on the configuration parameters, the target data can be correctly stored in the third storage space within the storage module.

[0060] The host side sends the configuration parameters of the data processing task to the first storage space in the storage module in the device side according to the address information of the first storage space; and sends the original data of the data processing task to the second storage space in the storage module in the device side; and prepares for the subsequent device side to execute the data processing task.

[0061] In one possible implementation, the host side is used to package and process the configuration parameters of the data processing task according to the target data format, obtain multiple data entries with the target data format, and send the multiple data entries to the first storage space; any data entry includes: an instruction field, an index field, an address field, and a data field, wherein the instruction field is used to indicate the instruction type of the data entry, the index field is used to indicate the identifier of the data processing module, the address field is used to indicate the register address within the data processing module, and the data field is used to indicate the configuration parameters of the data entry.

[0062] After the host side obtains the address information of the first storage space, it packages the configuration parameters of the data processing task according to the target data format, and sends the packaged multiple data entries with the target data format to the first storage space in the storage module in the device side.

[0063] In a possible implementation, data transmission between the host side and the device side is based on PCIE.

[0064] PCIE is a high-speed serial bus. The host and device are based on PCIE and can effectively realize large-scale data transmission.

[0065] like Figure 3 In the data processing system shown, the host sends the configuration parameters of the data processing task to the first storage space in the target data format through PCIE, and sends the original data of the data processing task to the second storage space.

[0066] In one possible implementation, the host side sends a first notification message to the control module after sending the configuration parameters of the data processing task to the first storage space and sending the original data of the data processing task to the second storage space; the control module is used to respond to the first notification message and send configuration instructions to the register configuration module.

[0067] After the host sends the configuration parameters of the data processing task to the first storage space and the original data of the data processing task to the second storage space, it sends a first notification message to the control module to notify the control module that the host has completed the data distribution of the data processing task.

[0068] exist Figure 3 In the data processing system shown, the host sends a first notification message to the control module through the MailBox.

[0069] In response to the first notification message, the control module may send a configuration instruction to the register configuration module to instruct the register configuration module to start performing register configuration on the data processing module that performs the data processing task.

[0070] After the control module configures the startup register configuration module, the task of configuring the registers of the data processing module is handed over to the dedicated register configuration module. The control module can handle other tasks, such as preparing to process other data processing tasks, or performing other unrelated computing tasks, thereby greatly reducing the waiting time of the control module.

[0071] In one possible implementation, the register configuration module includes: an address register, a byte register, a control register, and a status register; the register configuration module is used to respond to a configuration instruction and configure the address register, byte register, control register, and status register; the address register is used to indicate data address information for data transmission to the data processing module; the byte register is used to indicate the data byte length for data transmission to the data processing module; the control register is used to control the interruption, start and stop of data transmission to the data processing module, and to indicate the status judgment interval and status query number of the data transmission process; the status register is used to indicate the working status of data transmission to the data processing module.

[0072] The register configuration module provides four groups of registers to the outside, so that the control module can configure the address register, byte register, control register, and status register based on the configuration instructions.

[0073] The address register is used to indicate data address information for data transmission to the data processing module. After starting register configuration for the data processing module, the register configuration module can read data from the corresponding storage space in the storage module based on the data address information in the address register.

[0074] The byte register is used to indicate the byte length of data transmitted to the data processing module. Based on the byte length of the data in the byte register, it can ensure that the register configuration module reads complete and valid data from the storage module without over-reading or under-reading.

[0075] The control register controls the interruption, start, and stop of data transmission to the data processing module, as well as the status check interval and number of status queries during the data transmission process. This control register ensures that the register configuration module can successfully execute register configuration tasks for the data processing module.

[0076] The status register is used to indicate the working status of data transmission to the data processing module, so as to ensure that the working status of the register configuration module in the process of register configuration of the data processing module can be accurately understood.

[0077] Figure 4 Schematic diagram showing the register configuration module of the embodiment of the present disclosure. Figure 4 As shown, the register configuration module includes: address register, byte register, control register, and status register.

[0078] In one possible implementation, the register configuration module includes: a reading unit, a cache unit, a parsing unit, and a control unit; the reading unit is used to read any data entry from the first storage space and send the data entry to the cache unit; the parsing unit is used to parse the data entry stored in the cache unit and determine the instruction type of the data entry based on the instruction field of the data entry; the control unit is used to perform register configuration or status query on the data processing module based on the instruction type of the data entry.

[0079] like Figure 4 As shown, the register configuration module includes: a reading unit, a cache unit, a parsing unit, and a control unit.

[0080] After starting the register configuration module based on the control register, the reading unit reads data entries one by one from the external storage (e.g., the first storage space) indicated by the data address information according to the data address information in the address register, and sends the read data entries to the cache unit for caching.

[0081] The parsing unit parses each data entry stored in the cache unit. For each data entry, the parsing unit determines the instruction type of the data entry based on the instruction field of the data entry obtained after parsing. For example, if the bit field value of the instruction field of the data entry is 0x00, it indicates that the data entry is a configuration instruction; if the bit field value of the instruction field of the data entry is 0x01, it indicates that the data entry is a status query instruction.

[0082] In one possible implementation, the control unit is used to send the configuration parameters indicated by the data field of the data entry to the corresponding register in the data processing module according to the index field and address field of the data entry when the instruction type of the data entry is a configuration instruction.

[0083] For any data entry, when it is determined that the instruction type of the data entry is a configuration instruction, the control unit sends the configuration parameters indicated by the data field to the register corresponding to the address field in the data processing module indicated by the index field based on the index field, address field and data field of the number of entries parsed by the parsing unit, thereby completing the parameter configuration of the corresponding register.

[0084] In one possible implementation, the control unit is used to, when the instruction type of the data entry is a status query instruction, read configuration parameters from the corresponding registers in the data processing module according to the index field and address field of the data entry, the status judgment interval and the number of status queries indicated by the control register, and compare whether the read configuration parameters are consistent with the configuration parameters indicated by the data field of the data entry to obtain a status query result.

[0085] Since the data processing module may need to determine the next configuration based on the status during the execution of the data processing task, for any data entry, when it is determined that the instruction type of the data entry is a status query instruction, the control unit suspends the current configuration, and according to the index field, address field and data field of the number of entries parsed by the parsing unit, reads the configuration parameters from the register corresponding to the address field in the data processing module indicated by the index field, and compares whether the read configuration parameters are consistent with the configuration parameters indicated by the data field.

[0086] If they are inconsistent, continue reading according to the status judgment interval and status query times indicated by the control register.

[0087] If the configuration parameters read are consistent with those indicated in the data field within the status query count, the status query is successful and you can proceed with subsequent configurations.

[0088] If the configuration parameters read after the number of status query times are still inconsistent with the configuration parameters indicated by the data field, the status query fails. At this time, the register configuration module times out and updates the status register to notify the control module.

[0089] The data processing module reads the original data of the data processing task from the second storage space in the storage module, and executes the data processing task based on the configuration parameters sent by the register configuration module. If the data processing task is successfully executed, the data processing module sends the final target data to the third storage space of the storage module for storage.

[0090] In one possible implementation, the data processing module is used to send a second notification message to the control module after executing the data processing task; the control module is used to send a third notification message to the host side in response to the second notification message; and the host side is used to read the target data of the data processing task from the third storage space in response to the third notification message.

[0091] After executing the data processing task, the processing module sends a second notification message to the control module to notify the control module that the data processing task has been executed successfully.

[0092] The control module responds to the second notification message and sends a third notification message to the host based on MailBox to notify the host that the data processing task has been successfully executed.

[0093] The host side responds to the third notification message and reads the target data of the data processing task from the third storage space in the storage module through PCIE.

[0094] In one example, if a data processing task fails, the data processing module sends a fourth notification message to the control module to notify the control module of the failure. In response to the fourth notification message, the control module sends a fifth notification message to the host based on MailBox to notify the host of the failure. In response to the fifth notification message, the host determines whether to restart the data processing task based on a preset application policy.

[0095] In a possible implementation, the control module is configured to dynamically allocate different data processing tasks among the data processing modules in the idle state when there are multiple data processing modules in the idle state.

[0096] When there are multiple data processing modules in an idle state in the data processing system, the control module can dynamically allocate multiple different data processing tasks that need to be executed by the host side among the multiple data processing modules in an idle state, thereby realizing parallel processing of multiple different data processing tasks by the data processing system and improving data processing efficiency.

[0097] In actual applications, the host side does not need to wait for the data processing results of a certain data processing module before it can continue to issue the next data processing task. The control module dynamically allocates and manages multiple data processing tasks among multiple idle data processing modules.

[0098] Compared with the prior art in which the control module writes configuration parameters one by one into the corresponding registers in the data processing module, the embodiment of the present disclosure transfers the parameter configuration task to the register configuration module, thereby effectively reducing the load of the control module and improving the parameter configuration efficiency and data processing efficiency.

[0099] When the data processing system of the embodiment of the present disclosure is used to perform JPEG encoding and decoding tasks, the data processing system is a JPEG encoding and decoding system.

[0100] Figure 5 Schematic diagram of the JPEG encoding and decoding system of the embodiment of the present disclosure is shown. Figure 5As shown, the JPEG encoding and decoding system includes: a host side and a graphics card side (device side), wherein the graphics card side includes: an MCU (control module), a register configuration module, a JPU (data processing module), and a DDR (storage module).

[0101] The host and graphics card communicate with each other based on MailBox, and transmit data based on PCIE. Figure 5 As shown, the MCU allocates three storage spaces in DDR for the JPEG encoding and decoding task on the host side: a first storage space for storing the configuration parameters of the JPEG encoding and decoding task, a second storage space for storing the original data of the JPEG encoding and decoding task, and a third storage space for storing the target data of the JPEG encoding and decoding task. Based on PCIE, the host side sends the configuration parameters of the JPEG encoding and decoding task to the first storage space, and the original data of the JPEG encoding and decoding task to the second storage space. The MCU configures and starts the register configuration module so that the register control module transfers the configuration parameters in the first storage space to the corresponding registers in the JPU. The JPU reads the original data from the second storage space, and performs JPEG encoding and decoding on the original data based on the configuration parameters to obtain the target data, and then sends the target data to the third storage space for storage. Based on PCIE, the host side reads the target data from the third storage space.

[0102] Figure 6 The data processing flow chart of the JPEG encoding and decoding system of the embodiment of the present disclosure is shown. Figure 6 As shown in Figure 1, the data processing flow of the JPEG encoding and decoding system includes:

[0103] (1) When the host has a JPEG encoding and decoding task, it sends a JPEG encoding and decoding request to the MCU.

[0104] (2) In response to the JPEG encoding and decoding request, the MCU allocates the first storage space, the second storage space, and the third storage space in the DDR for the configuration parameters, original data, and target data of the JPEG encoding and decoding task, respectively, and returns the address information of the three storage spaces to the host side.

[0105] (3) After the host obtains the address information of the three storage spaces, it packages the JPEG codec configuration parameters according to the target data format based on the JPEG codec configuration requirements, and sends the multiple data entries in the target data format obtained after packaging to the first storage space in the DDR, and sends the original JPEG codec data to the second storage space in the DDR. The address information of the third storage space in the DDR where the target data obtained after the JPU executes the JPEG codec is stored is provided by the configuration parameters.

[0106] (4) The host notifies the MCU after completing data transmission.

[0107] (5) JPU is released and reset.

[0108] (6) MCU configures the register configuration module and starts the register configuration module.

[0109] (7) After the register configuration module obtains the configuration sent by the MCU, it starts the register configuration program, obtains data entries from the first storage space one by one, parses them, and configures them to the JPU.

[0110] (8) The JPU receives the configuration information from the register configuration module and starts the JPEG encoding and decoding process.

[0111] (9) After the JPU completes the JPEG encoding and decoding, it feeds back the JPEG encoding and decoding execution results to the MCU.

[0112] (10) MCU sends a notification to the host. Query execution results

[0113] (11) The host determines whether the JPEG codec is executed successfully. If so, the data is retrieved from the third storage space in the DDR. If not, the host determines whether to restart the JPEG codec based on the application policy.

[0114] Compared with the JPEG codec system in the prior art, in which the MCU writes configuration parameters one by one into the corresponding registers in the JPU, the embodiment of the present disclosure adds a register configuration module to the JPEG codec system and transfers the parameter configuration task to the register configuration module, thereby effectively reducing the load of the MCU and improving the parameter configuration efficiency and data processing efficiency.

[0115] Figure 7 A flow chart showing a data processing method according to an embodiment of the present disclosure is shown. Figure 1 、 Figure 3 The data processing system shown in FIG. 1 includes a host side and a device side, wherein the device side includes a control module, a register configuration module, a data processing module, and a storage module. Figure 7 As shown, the method includes:

[0116] In step S71, based on the host side, the configuration parameters of the data processing task are sent to the first storage space in the storage module, wherein the first storage space is allocated by the control module for the configuration parameters of the data processing task;

[0117] In step S72, based on the control module, a configuration instruction is sent to the register configuration module, wherein the configuration instruction is used to instruct the register configuration module to start register configuration of the data processing module;

[0118] In step S73, based on the register configuration module responding to the configuration instruction, the configuration parameters of the data processing task are transferred from the first storage space to the corresponding registers in the data processing module;

[0119] In step S74, the data processing task is executed based on the data processing module and according to the configuration parameters of the data processing task.

[0120] In one possible implementation, the method further includes: based on the host side, packaging and processing the configuration parameters of the data processing task according to the target data format to obtain multiple data entries with the target data format, and sending the multiple data entries to the first storage space; any data entry includes: an instruction field, an index field, an address field, and a data field, wherein the instruction field is used to indicate the instruction type of the data entry, the index field is used to indicate the identifier of the data processing module, the address field is used to indicate the register address within the data processing module, and the data field is used to indicate the configuration parameters of the data entry.

[0121] In one possible implementation, the method further includes: based on the control module, allocating a second storage space for the original data of the data processing task in the storage module, and allocating a third storage space for the target data of the data processing task, wherein the target data of the data processing task is obtained after performing a data processing operation on the original data of the data processing task, and the configuration parameters of the data processing task include address information of the third storage space; based on the host side, sending the original data of the data processing task to the second storage space.

[0122] In one possible implementation, the method further includes: after sending the configuration parameters of the data processing task to the first storage space and sending the original data of the data processing task to the second storage space, based on the host side, sending a first notification message to the control module; based on the control module, responding to the first notification message, sending a configuration instruction to the register configuration module.

[0123] In one possible implementation, the register configuration module includes: an address register, a byte register, a control register, and a status register; the method further includes: based on the register configuration module, responding to a configuration instruction, configuring the address register, byte register, control register, and status register; the address register is used to indicate data address information for data transmission to the data processing module; the byte register is used to indicate the data byte length for data transmission to the data processing module; the control register is used to control the interruption, start and stop of data transmission to the data processing module, and indicate the status judgment interval and status query number of the data transmission process; the status register is used to indicate the working status of data transmission to the data processing module.

[0124] In one possible implementation, the register configuration module includes: a reading unit, a cache unit, a parsing unit, and a control unit; the method also includes: based on the reading unit, reading any data entry from the first storage space, and sending the data entry to the cache unit; based on the parsing unit, parsing the data entry stored in the cache unit, and determining the instruction type of the data entry based on the instruction field of the data entry; based on the control unit, performing register configuration or status query on the data processing module based on the instruction type of the data entry.

[0125] In one possible implementation, the method further includes: when the instruction type of the data entry is a configuration instruction, based on the control unit, sending the configuration parameters indicated by the data field of the data entry to the corresponding register in the data processing module according to the index field and address field of the data entry.

[0126] In one possible implementation, the method also includes: when the instruction type of the data entry is a status query instruction, based on the control unit, according to the index field and address field of the data entry, according to the status judgment interval and number of status queries indicated by the control register, reading the configuration parameters from the corresponding registers in the data processing module, and comparing whether the read configuration parameters are consistent with the configuration parameters indicated by the data field of the data entry to obtain the status query result.

[0127] In one possible implementation, the method also includes: after executing the data processing task, based on the data processing module, sending a second notification message to the control module; based on the control module, responding to the second notification message, sending a third notification message to the host end; based on the host end, responding to the third notification message, reading the target data of the data processing task from the third storage space.

[0128] In a possible implementation, when there are multiple data processing modules in an idle state, different data processing tasks are dynamically allocated among the multiple data processing modules in an idle state based on the control module.

[0129] In a possible implementation, the host side and the device side communicate based on MailBox; the host side and the device side transmit data based on PCIE.

[0130] In some embodiments, the functions or modules included in the device provided by the embodiments of the present disclosure can be used to execute the method described in the above method embodiments. The specific implementation can refer to the description of the above method embodiments. For the sake of brevity, it will not be repeated here.

[0131] An embodiment of the present disclosure further provides an electronic device, including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the above method.

[0132] An embodiment of the present disclosure further provides a non-volatile computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the steps of the above method when executed by a processor.

[0133] An embodiment of the present disclosure further provides a computer program product, including a computer program, or a non-volatile computer-readable storage medium carrying the computer program, wherein the computer program implements the steps of the above method when executed by a processor.

[0134] Figure 8 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. Figure 8 , the apparatus 1900 can be provided as a server or a terminal device. Figure 8 The apparatus 1900 includes a processing component 1922, which further includes one or more processors, and a memory resource represented by a memory 1932 for storing instructions, such as an application, that can be executed by the processing component 1922. The application stored in the memory 1932 may include one or more modules, each corresponding to a set of instructions. In addition, the processing component 1922 is configured to execute the instructions to perform the above-described method.

[0135] The device 1900 may also include a power supply component 1926 configured to perform power management of the device 1900, a wired or wireless network interface 1950 configured to connect the device 1900 to a network, and an input / output interface 1958 (I / O interface). The device 1900 may operate based on an operating system stored in the memory 1932, such as Windows Server 2003. TM , MacOS X TM , Unix TM , Linux TM , FreeBSD TM or similar.

[0136] In an exemplary embodiment, a non-volatile computer-readable storage medium is also provided, such as a memory 1932 including computer program instructions that can be executed by the processing component 1922 of the apparatus 1900 to perform the above-described method.

[0137] A computer-readable storage medium can be a tangible device that can hold and store programs / instructions used by an instruction execution device. A computer-readable storage medium can be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include: a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, such as a punch card or raised structure within a groove on which instructions are stored, and any suitable combination thereof. As used herein, a computer-readable storage medium is not to be construed as a transient signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., a light pulse through a fiber optic cable), or an electrical signal transmitted via wires.

[0138] The computer programs (or computer-readable program instructions) described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage medium in the respective computing / processing device for storage.

[0139] The computer program (or computer program instructions) used to perform the operations of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages such as Smalltalk, C++, and conventional procedural programming languages such as "C" or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, the state information of the computer-readable program instructions is used to personalize an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), so that the electronic circuit can execute the computer-readable program instructions, thereby implementing various aspects of the present disclosure.

[0140] Various aspects of the present disclosure are described herein with reference to flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present disclosure. It should be understood that each block of the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer-readable program instructions.

[0141] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device is generated that implements the functions / actions specified in one or more blocks in the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium, where these instructions cause the computer, programmable data processing device, and / or other device to operate in a specific manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing various aspects of the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0142] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operational steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0143] The flow charts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the systems, methods and computer program products according to multiple embodiments of the present disclosure. In this regard, each box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and the part of the module, program segment or instruction contains one or more executable instructions for realizing the prescribed logical function. In some alternative implementations, the functions marked in the box can also occur in a sequence different from that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented by a dedicated hardware-based system that performs the prescribed function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0144] While various embodiments of the present disclosure have been described above, the foregoing description is intended to be illustrative, non-exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, their practical applications, or technological improvements in the marketplace, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A data processing system, characterized in that: include: A host side and a device side, wherein the device side includes: a control module, a register configuration module, a data processing module, and a storage module; The host end is used to send the configuration parameters of the data processing task to the first storage space in the storage module, wherein the first storage space is allocated by the control module for the configuration parameters of the data processing task; The control module is configured to send a configuration instruction to the register configuration module, wherein the configuration instruction is used to instruct the register configuration module to start register configuration of the data processing module; The register configuration module is configured to transmit the configuration parameters of the data processing task from the first storage space to corresponding registers in the data processing module in response to the configuration instruction; The data processing module is used to execute the data processing task according to the configuration parameters of the data processing task.

2. The system according to claim 1, wherein: The host is configured to package the configuration parameters of the data processing task according to a target data format to obtain a plurality of data entries in the target data format, and send the plurality of data entries to the first storage space; Any data entry includes: an instruction field, an index field, an address field, and a data field, wherein the instruction field is used to indicate the instruction type of the data entry, the index field is used to indicate the identifier of the data processing module, the address field is used to indicate the register address within the data processing module, and the data field is used to indicate the configuration parameters of the data entry.

3. The system according to claim 1, wherein: The control module is further configured to allocate a second storage space in the storage module for the original data of the data processing task, and allocate a third storage space for the target data of the data processing task, wherein the target data of the data processing task is obtained by performing a data processing operation on the original data of the data processing task, and the configuration parameters of the data processing task include address information of the third storage space; The host side is used to send the original data of the data processing task to the second storage space.

4. The system according to claim 3, characterized in that The host side sends a first notification message to the control module after sending the configuration parameters of the data processing task to the first storage space and sending the original data of the data processing task to the second storage space; The control module is configured to send the configuration instruction to the register configuration module in response to the first notification message.

5. The system according to claim 1 or 4, characterized in that The register configuration module includes: an address register, a byte register, a control register, and a status register; The register configuration module is configured to configure the address register, the byte register, the control register, and the status register in response to the configuration instruction; The address register is used to indicate data address information for data transmission to the data processing module; The byte register is used to indicate the byte length of data transmitted to the data processing module; The control register is used to control the interruption, start and stop of data transmission to the data processing module, and to indicate the status judgment interval and status query number of the data transmission process; The status register is used to indicate the working status of data transmission to the data processing module.

6. The system according to claim 2, wherein: The register configuration module includes: a reading unit, a cache unit, a parsing unit, and a control unit; The reading unit is configured to read any data entry from the first storage space and send the data entry to the cache unit; The parsing unit is configured to parse the data entry stored in the cache unit and determine the instruction type of the data entry based on the instruction field of the data entry; The control unit is used to perform register configuration or status query on the data processing module according to the instruction type of the data entry.

7. The system according to claim 6, characterized in that The control unit is used to send the configuration parameters indicated by the data field of the data entry to the corresponding register in the data processing module according to the index field and address field of the data entry when the instruction type of the data entry is a configuration instruction.

8. The system according to claim 6, wherein: The control unit is used to read configuration parameters from the corresponding registers in the data processing module according to the index field and address field of the data entry, the status judgment interval and the number of status queries indicated by the control register, when the instruction type of the data entry is a status query instruction, and compare whether the read configuration parameters are consistent with the configuration parameters indicated by the data field of the data entry to obtain the status query result.

9. The system according to claim 3, wherein: The data processing module is configured to send a second notification message to the control module after executing the data processing task; The control module is configured to send a third notification message to the host end in response to the second notification message; The host end is used to respond to the third notification message and read the target data of the data processing task from the third storage space.

10. The system according to claim 1, wherein: The control module is used to dynamically allocate different data processing tasks among the data processing modules in the idle state when there are multiple data processing modules in the idle state.

11. The system according to claim 1, wherein: The host side and the device side communicate with each other based on MailBox; Data transmission between the host end and the device end is based on PCIE.

12. A data processing method, characterized in that: The method is applied to a data processing system, which includes a host side and a device side, wherein the device side includes a control module, a register configuration module, a data processing module, and a storage module; the method includes: Based on the host side, the configuration parameters of the data processing task are sent to a first storage space in the storage module, wherein the first storage space is allocated by the control module for the configuration parameters of the data processing task; Based on the control module, sending a configuration instruction to the register configuration module, wherein the configuration instruction is used to instruct the register configuration module to start register configuration of the data processing module; transferring the configuration parameters of the data processing task from the first storage space to corresponding registers in the data processing module based on the register configuration module responding to the configuration instruction; Based on the data processing module, the data processing task is executed according to the configuration parameters of the data processing task.

13. An electronic device comprising a memory, a processor, and a computer program stored in the memory, wherein: The processor executes the computer program to implement the steps of the method of claim 12.

14. A non-volatile computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to claim 12 are implemented.

15. A computer program product comprising a computer program, or a non-volatile computer-readable storage medium carrying a computer program, characterized in that: When the computer program is executed by a processor, the steps of the method according to claim 12 are implemented.

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