Signal relay device, data processing device, system and electronic equipment

Abstract

The embodiment of the invention relates to a signal relay device, a data processing device, a data processing system and electronic equipment, and relates to the technical field of electronics. The signal relay device comprises a peripheral end and a plurality of transmission ends, the plurality of transmission ends are used for being coupled with a plurality of ports in the data processing device in a one-to-one correspondence mode, and the plurality of transmission ends comprise a first transmission end and a second transmission end; the signal relay device is used for establishing a signal transmission path between a peripheral end and a first transmission end; performing data signal interaction with a corresponding first port in a data processing device based on the first transmission end; and in response to the unavailability of the signal transmission path between the first port and the first transmission end, establishing a signal transmission path between the peripheral end and the second transmission end, and performing data signal interaction with a corresponding second port in the data processing device based on the second transmission end. Therefore, the problem that the whole chip cannot be used due to the fact that the chip port is not available is solved, and the chip yield is improved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of electronic technology, and in particular to a signal relay device, a data processing device, a system, and an electronic device. Background Art

[0002] As technology advances, chips are becoming larger and larger, and production process device density is increasing. Chip ports are coupled to external devices, and chips communicate with these devices through these ports. If a chip port is unavailable, the chip cannot transmit signals for communication, rendering the entire chip unusable and resulting in low chip yield. Summary of the Invention

[0003] The embodiments of the present application provide a signal relay device, a data processing device, a system, and an electronic device, which solve the problem that the entire chip cannot be used due to the unavailability of the chip port, thereby improving the chip yield.

[0004] To achieve the above objectives, the present invention adopts the following technical solutions:

[0005] In a first aspect, a signal relay device is provided, comprising a peripheral terminal and multiple transmission terminals, the multiple transmission terminals being configured to couple one-to-one with multiple ports in a data processing device, the multiple transmission terminals including a first transmission terminal and a second transmission terminal. The signal relay device is configured to: establish a signal transmission path between the peripheral terminal and the first transmission terminal; exchange data signals between the first transmission terminal and a corresponding first port in the data processing device; and, in response to the signal transmission path between the first port and the first transmission terminal being unavailable, establish a signal transmission path between the peripheral terminal and the second transmission terminal; and exchange data signals between the second transmission terminal and a corresponding second port in the data processing device.

[0006] In the above technical solution, the data processing device is provided with multiple ports as backups. If one port is broken, another port can be used, which can improve the yield. In addition, when the signal transmission path between the first port and the first transmission end is unavailable, the signal relay device switches the signal transmission path between the first transmission end and the peripheral end to the signal transmission path between the second transmission end and the peripheral end. Regardless of whether the data processing device uses the first port for data signal transmission or the second port for data signal transmission, the signal relay device transmits the data signal through the peripheral end. Even if the data processing device includes multiple ports and it is unknown which of the multiple ports is unavailable, the circuit board only needs to set one outlet end to couple with the peripheral end in the signal relay device, and there is no need to set multiple outlet ends to couple with multiple ports in the data processing device. Therefore, it is possible to reduce the waste of hardware resources, save the cost of circuit boards and the entire machine, and reduce the complexity of hardware.

[0007] In a possible implementation of the first aspect, the signal relay device is specifically configured to: before the signal transmission path between the first port and the first transmission end becomes unavailable, receive a data signal from the first port of the data processing device through the first transmission end, and send the data signal through the peripheral end; after the signal transmission path between the first port and the first transmission end becomes unavailable, receive a data signal from the second port of the data processing device through the second transmission end, and send the data signal through the peripheral end. In the above possible implementation, on the transmitting link of the data processing device and on the receiving link of the signal relay device, only one peripheral end needs to be coupled with one output end of the circuit board, which can reduce the waste of hardware resources on the transmitting link of the data processing device and on the receiving link of the signal relay device, save the cost of the circuit board and the entire machine, and reduce the hardware complexity.

[0008] In one possible implementation of the first aspect, the signal interruption device includes multiple verification circuits. The multiple verification circuits are coupled to the multiple transmission terminals in a one-to-one correspondence. Each of the multiple verification circuits is configured to determine, based on a data signal input from the corresponding transmission terminal, whether a signal transmission path between the corresponding transmission terminal and the port is available. In this possible implementation, the verification circuit is provided in the signal relay device. The verification circuit in the signal relay device determines, based on the data signal, whether a signal transmission path for transmitting the data signal is available, thereby providing a basis for switching the signal transmission path.

[0009] In one possible implementation of the first aspect, the data signal carries coded verification information. Each verification circuit is specifically configured to determine that the signal transmission path between the corresponding transmission end and the port is unavailable when the bit error rate of the corresponding coded verification information is greater than a preset threshold. In this possible implementation, the verification circuit in the signal relay device can determine that the signal transmission path between the first port and the first transmission end is unavailable based on the coded verification information carried by the data signal, thereby providing a basis for switching the signal transmission path, reducing the bit error rate of the data signal, and improving the accuracy of the data signal.

[0010] In a possible implementation of the first aspect, the signal interruption device further includes a switching circuit, and the plurality of verification circuits and peripheral terminals are coupled to the switching circuit. The switching circuit is configured to: after the signal transmission path between the first port and the first transmission terminal becomes unavailable, send a first indication signal to the data processing device, the first indication signal being used to instruct the data signal to be sent to the second transmission terminal based on the second port. In the above possible implementation, a switching circuit is provided in the signal relay device, and the switching circuit in the signal relay device sends the first indication signal to the data processing device, so that the data processing device determines that the signal transmission path between the first port and the first transmission terminal is unavailable, and sends the data signal to the second transmission terminal through the second port, thereby providing a basis for switching the signal transmission path.

[0011] In a possible implementation of the first aspect, the signal relay device is specifically configured to: before the signal transmission path between the first port and the first transmission end becomes unavailable, receive the data signal through the peripheral end, and send the data signal to the first port of the data processing device through the first transmission end; after the signal transmission path between the first port and the first transmission end becomes unavailable, receive the data signal through the peripheral end, and send the data signal to the second port of the data processing device through the second transmission end. In the above possible implementation, only one peripheral end is required to couple with one output end of the circuit board on the receiving link of the data processing device and on the sending link of the signal relay device, which can reduce the waste of hardware resources on the receiving link of the data processing device and on the sending link of the signal relay device, save the cost of the circuit board and the entire machine, and reduce the hardware complexity.

[0012] In one possible implementation of the first aspect, the signal relay device is specifically configured to: receive a second instruction signal from a data processing device, the second instruction signal being used to instruct the second transmission end to transmit a data signal to the second port; and determine, based on the second instruction signal, that the signal transmission path between the first port and the first transmission end is unavailable. In this possible implementation, the signal relay device determines, based on the second instruction signal from the data processing device, that the signal transmission path between the first port and the first transmission end is unavailable, and transmits the data signal to the second port via the second transmission end, thereby providing a basis for switching the signal transmission path.

[0013] In one possible implementation of the first aspect, the first transmission end and the second transmission end are fixed as transmission ends, or the first transmission end and the second transmission end are fixed as reception ends. In the above possible implementation, the first transmission end and the second transmission end are fixed as reception ends, or the first transmission end and the second transmission end are fixed as reception ends, thereby distinguishing ports on a transmission link from ports on a reception link in the data processing device. Even if the reception port is damaged, it will not affect the transmission port, or even if the transmission port is damaged, it will not affect the reception port, thereby improving fault tolerance.

[0014] In one possible implementation of the first aspect, the signal relay device is a channel equalization and compensation chip, and further includes an equalization and compensation circuit. The equalization and compensation circuit is configured to perform data integrity equalization and compensation processing on the data signal. In this possible implementation, the signal relay device is a channel equalization and compensation chip, which can avoid data signal loss during transmission and improve data integrity.

[0015] In a second aspect, a data processing device is provided, comprising a plurality of ports for coupling one-to-one with a plurality of transmission terminals in a signal relay device, the plurality of ports including a first port and a second port. The data processing device is configured to: establish a signal transmission path between the first port, a corresponding first transmission terminal in the signal relay device, and a peripheral terminal in the signal relay device; and, in response to the signal transmission path between the first port and the first transmission terminal being unavailable, establish a signal transmission path between the second port, a corresponding second transmission terminal in the signal relay device, and the peripheral terminal in the signal relay device.

[0016] In the above technical solution, the data processing device is provided with multiple ports as backup. If one port is broken, another port can be used, which can improve the yield. In addition, when the signal transmission path between the first port and the first transmission end is unavailable, the data processing device switches the signal transmission path between the first port, the first transmission end and the peripheral end to the signal transmission path between the second port, the second transmission end and the peripheral end. Regardless of whether the data processing device uses the first port for data signal transmission or the second port for data signal transmission, the data signal is transmitted through the peripheral end. Even if the data processing device includes multiple ports and it is unknown which of the multiple ports is unavailable, the circuit board only needs to set up one outlet port to couple with the peripheral end, and there is no need to set up multiple outlet ports to couple with multiple ports in the data processing device. Therefore, it is possible to reduce the waste of hardware resources, save the cost of the circuit board and the entire machine, and reduce the hardware complexity.

[0017] In one possible implementation of the second aspect, the data processing device is specifically configured to: before the signal transmission path between the first port and the first transmission end becomes unavailable, send a data signal to the first transmission end of the signal relay device via the first port; and after the signal transmission path between the first port and the first transmission end becomes unavailable, send the data signal to the second transmission end of the signal relay device via the second port. In this possible implementation, before the signal transmission path between the first port and the first transmission end becomes unavailable, the data processing device sends the data signal to the first transmission end via the first port, and the signal relay device sends the data signal via the peripheral device. After the signal transmission path between the first port and the first transmission end becomes unavailable, the data processing device sends the data signal to the second transmission end via the second port, and the signal relay device sends the data signal via the first peripheral device. On both the data processing device's transmission link and the signal relay device's reception link, only one peripheral device needs to be coupled to one output end of the circuit board. This can reduce hardware resource waste on both the data processing device's transmission link and the signal relay device's reception link, save circuit board and overall device costs, and reduce hardware complexity.

[0018] In one possible implementation of the second aspect, the data processing device is specifically configured to: receive a first indication signal from a signal relay device, the first indication signal being used to instruct the transmission of a data signal to the second transmission end based on the second port; and determine, based on the first indication signal, that the signal transmission path between the first port and the first transmission end is unavailable. In this possible implementation, the data processing device determines, based on the first indication signal from the signal relay device, that the signal transmission path between the first port and the first transmission end is unavailable, and transmits the data signal to the second transmission end through the second port, thereby providing a basis for switching the signal transmission path.

[0019] In one possible implementation of the second aspect, the data processing device is specifically configured to: receive a data signal from the first transmission end of the signal relay device via the first port before the signal transmission path between the first port and the first transmission end becomes unavailable; and receive a data signal from the second transmission end of the signal relay device via the second port after the signal transmission path between the first port and the first transmission end becomes unavailable. In this possible implementation, before the signal transmission path between the first port and the first transmission end becomes unavailable, the signal relay device receives the data signal via the peripheral device, and the data processing device receives the data signal from the first transmission end of the signal relay device via the first port. After the signal transmission path between the first port and the first transmission end becomes unavailable, the signal relay device receives the data signal via the peripheral device, and the data processing device receives the data signal from the second transmission end of the signal relay device via the second port. On both the data processing device's receiving link and the signal relay device's transmitting link, only one peripheral device needs to be coupled to one output end of the circuit board. This can reduce hardware resource waste on both the data processing device's receiving link and the signal relay device's transmitting link, saving the cost of the circuit board and the entire device, and reducing hardware complexity.

[0020] In one possible implementation of the second aspect, a data processing device includes multiple verification circuits. The multiple verification circuits are coupled to the multiple ports in a one-to-one correspondence. Each of the multiple verification circuits is configured to determine, based on a data signal inputted by the corresponding port, whether a signal transmission path between the corresponding port and a transmission end is available. In this possible implementation, a verification circuit is provided in the data processing device. The verification circuit in the data processing device determines, based on a data signal, whether a signal transmission path for transmitting the data signal is available, thereby providing a basis for switching the signal transmission path.

[0021] In one possible implementation of the second aspect, the data signal carries coding verification information. Each verification circuit is specifically configured to determine that the signal transmission path between the corresponding port and the transmission end is unavailable when the bit error rate of the corresponding coding verification information is greater than a preset threshold. In this possible implementation, the verification circuit in the data processing device can determine that the signal transmission path between the first port and the first transmission end is unavailable based on the coding verification information carried by the data signal, providing a basis for switching the signal transmission path, thereby reducing the bit error rate of the data signal and improving the accuracy of the data signal.

[0022] In a possible implementation of the second aspect, the data processing device further includes a switching circuit. Multiple verification circuits are coupled to the switching circuit. The switching circuit is configured to: after the signal transmission path between the first port and the first transmission end is unavailable, send a second indication signal to the signal relay device, the second indication signal being used to instruct the second port to be sent based on the second transmission end. In the above possible implementation, by providing a switching circuit in the data processing device, the switching circuit in the data processing device sends the second indication signal to the signal relay device, so that the signal relay device determines that the signal transmission path between the first port and the first transmission end is unavailable, and sends the data signal to the second port through the second transmission end, thereby providing a basis for switching the signal transmission path.

[0023] In a possible implementation of the second aspect, the first port and the second port are fixed as receiving ports, or the first port and the second port are fixed as sending ports. In the above possible implementation, fixing the first port and the second port as receiving ports, or fixing the first port and the second port as sending ports, distinguishes ports on a sending link from ports on a receiving link in the data processing device. Even if the receiving port is damaged, the sending port will not be affected, or even if the sending port is damaged, the receiving port will not be affected, thereby improving fault tolerance.

[0024] In a possible implementation of the second aspect, the data processing device is a network protocol chip. In the above possible implementation, the data processing device is a network protocol chip. This implementation can be applied to the field of network protocols to save hardware resources for multi-port network protocol devices.

[0025] In a third aspect, a data processing system is provided, comprising a signal relay device and a data processing device, the signal relay device comprising a peripheral terminal and multiple transmission terminals, the data processing device comprising multiple ports, the multiple transmission terminals being coupled to the multiple ports in a one-to-one correspondence, the multiple transmission terminals comprising a first transmission terminal and a second transmission terminal, the multiple ports comprising a first port and a second port, the first transmission terminal being coupled to the first port, and the second transmission terminal being coupled to the second port. The data processing system is configured to: establish a signal transmission path between the first port, the first transmission terminal, and the peripheral terminal; and, in response to the signal transmission path between the first port and the first transmission terminal being unavailable, establish a signal transmission path between the second port, the second transmission terminal, and the peripheral terminal.

[0026] In a fourth aspect, an electronic device is provided, comprising a circuit board and the data processing system provided in the third aspect. A signal relay device in the data processing system comprises a peripheral terminal, the circuit board comprises an output terminal, and the peripheral terminal of the signal relay device is coupled to the output terminal of the circuit board.

[0027] It can be understood that any of the data processing systems and electronic devices provided above can apply the signal relay device and data processing device provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects of the corresponding devices provided above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A schematic diagram of a chip provided in an embodiment of the present application;

[0029] Figure 2 A schematic diagram of an electronic device provided in an embodiment of the present application;

[0030] Figure 3 A schematic diagram of a processing device provided in an embodiment of the present application;

[0031] Figure 4 A schematic diagram of a data processing device provided in an embodiment of the present application Figure 1 ;

[0032] Figure 5 A schematic diagram of a signal relay device provided in an embodiment of the present application;

[0033] Figure 6 A schematic diagram of a data processing device provided in an embodiment of the present application Figure 2 ;

[0034] Figure 7 A schematic diagram of a data processing device provided in an embodiment of the present application Figure 3 ;

[0035] Figure 8A schematic diagram of a data processing device provided in an embodiment of the present application Figure 4 ;

[0036] Figure 9 A schematic diagram of a data processing device provided in an embodiment of the present application Figure 5 ;

[0037] Figure 10 A schematic diagram of a data processing system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] It should be noted that the terms "first", "second", etc. involved in the embodiments of the present application are only used to distinguish features of the same type and cannot be understood as indicating relative importance, quantity, order, etc.

[0039] The terms "exemplary" or "for example" in the embodiments of this application are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary" or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0040] The terms "coupling" and "connection" involved in the embodiments of this application should be understood in a broad sense. For example, they may refer to a physical direct connection, or an indirect connection achieved through electronic devices, such as a connection achieved through resistors, inductors, capacitors or other electronic devices.

[0041] First, the application scenarios of the embodiments of the present application are introduced.

[0042] The embodiments of the present application can be applied to electronic devices, which can be devices with communication functions, including but not limited to: switches, mobile phones, tablet computers, computers, laptops, cameras, cameras, wearable devices, vehicle-mounted devices or terminal devices. The electronic device may include a chip for performing communication functions, and the port of the chip has a great influence on the chip yield. Figure 1 As shown, the port of chip 1 is coupled with the port of chip 2, and chip 1 and chip 2 communicate through the two ports. If the port of chip 1 is unavailable, chip 1 cannot transmit signals normally, cannot communicate with chip 2, and chip 1 cannot be used.

[0043] The present application embodiment provides an electronic device, such as Figure 2As shown, electronic device 1000 includes a circuit board 100 and a device 200, wherein the device 200 includes a port 20, and the circuit board 100 includes an outlet port 10. The device 200 can be disposed on the circuit board 100, and the port 20 of the device 200 is coupled to the outlet port 10 of the circuit board 100. The outlet port 10 of the circuit board 100 can be coupled to another circuit board. The device 200 can communicate with a device (e.g., a chip) disposed on the other circuit board via the port 20 and the outlet port 10 of the circuit board 100. For example, the device 200 can be a chip, such as a switch chip. For example, the device 200 can also be a circuit not packaged in a chip, such as a processor.

[0044] In some possible implementations, the device 200 in the electronic device 1000 may be provided with multiple ports 20 as backups. When one port 20 is unavailable, the device 200 may communicate through other available ports 20 .

[0045] In some examples, the apparatus 200 may be as follows Figure 3 The processing device 200A shown in FIG. The processing device 200A includes a first processing port 210A and a second processing port 220A, and the circuit board 100A includes a first outlet port 110A and a second outlet port 120A. The first processing port 210A is coupled to the first outlet port 110A, and the second processing port 220A is coupled to the second outlet port 120A. When the first processing port 210A is unavailable, the processing device 200A can communicate with a device on another circuit board 100A via the second processing port 220A and the second outlet port 120A of the circuit board 100A. However, in this manner, which processing port of the processing device 200A is unavailable is not fixed, and the circuit board 100A cannot be customized for each processing device 200A. Therefore, the circuit board 100A needs to be provided with multiple outlet ports, such as the first outlet port 110A and the second outlet port 120A. Even if the first processing port 210A coupled to the first outlet port 110A is unavailable, the first outlet port 110A still needs to be provided on the circuit board 100A and the first processing port 210A needs to be connected to the first outlet port 110A. This wastes hardware resources, increases the cost of the processing device 200A and the circuit board 100A, and increases the hardware complexity.

[0046] In some possible implementations, the device 200 in the electronic device 1000 may be provided with multiple ports 20 as backup. The electronic device 1000 further includes a signal relay device, and the multiple ports 20 are coupled to an outlet port 10 of the circuit board 100 via the signal relay device.

[0047] In some examples, the apparatus 200 may be as follows Figure 4The data processing device 200B shown in FIG. 2 includes a plurality of ports, for example, the plurality of ports include a first port 210B and a second port 220B. Figure 5 As shown, the signal relay device 300B may include an external device terminal 330B and multiple transmission terminals, for example, the multiple transmission terminals include a first transmission terminal 310B and a second transmission terminal 320B. The coupling relationship between the data processing device 200B, the signal relay device 300B and the circuit board can be as follows: Figure 6 As shown, the circuit board 100B includes a peripheral device outlet port 130B, and multiple ports of the data processing device 200B are coupled to multiple transmission ports of the signal relay device 300B in a one-to-one correspondence. For example, the first port 210B is coupled to the first transmission port 310B, and the second port 220B is coupled to the second transmission port 320B. The peripheral device port 330B of the signal relay device 300B is coupled to the peripheral device outlet port 130B of the circuit board 100B. The signal relay device 300B is used to establish a signal transmission path between the peripheral device port 330B and the first transmission port 310B, and to exchange data signals between the first transmission port 310B and the first port 210B. The data processing device 200B is used to exchange data signals with the first transmission port 310B based on the first port 210B, thereby establishing a signal transmission path between the first port 210B, the first transmission port 310B, and the peripheral device port 330B. The signal relay device 300B is configured to, in response to the signal transmission path between the first port 210B and the first transmission end 310B being unavailable, establish a signal transmission path between the peripheral end 330B and the second transmission end 320B, and exchange data signals between the second transmission end 320B and the second port 220B. The data processing device 200B is configured to, in response to the signal transmission path between the first port 210B and the first transmission end 310B being unavailable, exchange data signals between the second port 220B and the second transmission end 320B, thereby establishing a signal transmission path between the second port 220B, the second transmission end 320B, and the peripheral end 330B.

[0048] Exemplarily, the signal transmission path between the first port 210B and the first transmission end 310B is unavailable, which may be: the first port 210B is unavailable, or the first transmission end 310B is unavailable, or the wiring between the first port 210B and the first transmission end 310B is unavailable.

[0049] In this embodiment, the data processing device 200B is provided with multiple ports as backup. If one port is broken, another port can be used, which can improve the yield. In addition, when the signal transmission path between the first port 210B and the first transmission end 310B is unavailable, the signal relay device 300B switches the signal transmission path between the first transmission end 310B and the peripheral end 330B to the signal transmission path between the second transmission end 320B and the peripheral end 330B. Regardless of whether the data processing device 200B uses the first port 210B for data signal transmission or the second port 220B for data signal transmission, the signal relay device 300B transmits the data signal through the peripheral end 330B. Even if the data processing device 200B includes multiple ports and it is unknown which of the multiple ports is unavailable, the circuit board 100B only needs to set up one peripheral outlet end 130B to couple with the peripheral end 330B in the signal relay device 300B, without setting up multiple peripheral outlet ends 130B to couple with multiple ports in the data processing device 200B. Therefore, the waste of hardware resources can be reduced, the cost of the circuit board 100B and the entire machine can be saved, and the hardware complexity can be reduced.

[0050] In some possible implementations, the port on the sending link in the data processing device 200B is different from the port on the receiving link.

[0051] In some examples, the first port 210B and the second port 220B are fixed as transmitting ports, and the first transmission end 310B and the second transmission end 320B are fixed as receiving ends. Figure 7As shown, the first port 210B may be the first transmitting port 211B, the second port 220B may be the second transmitting port 221B, the first transmission terminal 310B may be the first input terminal 311B, the second transmission terminal 320B may be the second input terminal 321B, the peripheral terminal 330B may be the first peripheral terminal 331B, and the peripheral outlet terminal 130B may be the third outlet terminal 131B. The data processing device 200B is specifically configured to: before the signal transmission path between the first transmitting port 211B and the first input terminal 311B becomes unavailable, send a data signal to the first input terminal 311B via the first transmitting port 211B. The signal relay device 300B is specifically configured to: before the signal transmission path between the first transmitting port 211B and the first input terminal 311B becomes unavailable, receive a data signal from the first transmitting port 211B via the first input terminal 311B and send the data signal via the first peripheral terminal 331B. The data processing device 200B is specifically configured to: after the signal transmission path between the first transmission port 211B and the first input terminal 311B becomes unavailable, transmit a data signal to the second input terminal 321B via the second transmission port 221B. The signal relay device 300B is specifically configured to: after the signal transmission path between the first transmission port 211B and the first input terminal 311B becomes unavailable, receive a data signal from the second transmission port 221B via the second input terminal 321B and transmit the data signal via the first peripheral terminal 331B.

[0052] In this embodiment, on the one hand, the first port 210B is fixed as the transmitting port, and the first transmission end 310B and the second transmission end 320B are fixed as the receiving ends, thereby distinguishing the ports on the transmitting link from the ports on the receiving link in the data processing device 200B. Even if the receiving port is damaged, it will not affect the transmitting port, which can improve the fault tolerance rate. On the other hand, before the signal transmission path between the first transmitting port 211B and the first input end 311B becomes unavailable, the data processing device 200B transmits a data signal to the first input end 311B of the signal relay device 300B via the first transmitting port 211B, and the signal relay device 300B transmits the data signal via the first peripheral end 331B. After the signal transmission path between the first transmitting port 211B and the first input end 311B becomes unavailable, the data processing device 200B transmits a data signal to the second input end 321B of the signal relay device 300B via the second transmitting port 221B, and the signal relay device 300B transmits the data signal via the first peripheral end 331B. On the sending link of the data processing device 200B and on the receiving link of the signal relay device 300B, only the first peripheral terminal 331B needs to be coupled with the third outlet terminal 131B of the circuit board 100B. This can reduce the waste of hardware resources on the sending link of the data processing device 200B and on the receiving link of the signal relay device 300B, save the cost of the circuit board 100B and the entire machine, and reduce hardware complexity.

[0053] In some possible implementations, a verification circuit is provided in the signal relay device 300B. The verification circuit in the signal relay device 300B can be used to determine whether the signal transmission path between the first sending port 211B and the first input end 311B is available.

[0054] In some examples, such as Figure 8 As shown, the signal interruption device includes multiple verification circuits. The multiple verification circuits in the signal relay device 300B are coupled to the multiple input terminals in a one-to-one correspondence. For example, the multiple verification circuits include a first verification circuit 341B and a second verification circuit 342B. The first verification circuit 341B is coupled to the first input terminal 311B, and the second verification circuit 342B is coupled to the second input terminal 321B. Each of the multiple verification circuits is configured to determine whether the signal transmission path between the corresponding input terminal and the transmitting port is available based on the data signal input from the corresponding input terminal.

[0055] For example, if the signal transmission path between the first transmission port 211B and the first input terminal 311B is unavailable, the signal transmission path can still transmit data signals, but the data signal will have an error. The first verification circuit 341B can verify the error, thereby determining that the signal transmission path between the first transmission port 211B and the first input terminal 311B is unavailable. Optionally, multiple verification circuits are coupled to the first peripheral terminal 331B, and the multiple verification circuits can be used to transmit data signals.

[0056] In this embodiment, a verification circuit is provided in the signal relay device 300B. The verification circuit in the signal relay device 300B determines whether the signal transmission path for transmitting the data signal is available based on the data signal, providing a basis for switching the signal transmission path.

[0057] In some possible implementations, the data signal carries coding verification information. Each verification circuit in the signal relay device 300B is specifically configured to: determine that the signal transmission path between the corresponding input terminal and the transmission port is unavailable when the bit error rate of the corresponding coding verification information is greater than a preset threshold.

[0058] For example, the data processing device 200B may include a first verification circuit, such as a cyclic redundancy check circuit, that verifies the data signal to add coding verification information to the data signal. Each verification circuit in the signal relay device 300B may obtain the coding verification information in the data signal, determine the bit error rate of the coding verification information, and determine that the signal transmission path between the first transmission port 211B and the first input port 311B is unavailable when the bit error rate is too high.

[0059] In some possible implementations, each verification circuit in the signal relay device 300B is specifically configured to determine that a signal transmission path between a corresponding input end and a transmitting port is unavailable when a clock of a corresponding data signal cannot be recovered.

[0060] Under these embodiments, the verification circuit in the signal relay device 300B can determine that the signal transmission path between the first sending port 211B and the first input terminal 311B is unavailable based on the encoded verification information carried by the data signal, or based on the clock of the data signal, thereby providing a basis for switching the signal transmission path, so that the bit error rate of the data signal is low and the clock is correct, thereby improving the accuracy of the data signal.

[0061] In some possible implementations, a lane swap (LS) circuit is provided in the signal relay device 300B. The switching circuit in the signal relay device 300B is used to control the data processing device 200B to send a data signal to the second input terminal 321B through the second sending port 221B when the signal transmission path between the first sending port 211B and the first input terminal 311B is unavailable.

[0062] For example, Figure 9 As shown, the switching circuit in the signal relay device 300B can be a first switching circuit 350B, and the multiple verification circuits (such as the first verification circuit 341B and the second verification circuit 342B) and the peripheral terminal 330B in the signal relay device 300B are all coupled to the first switching circuit 350B. The first switching circuit 350B is configured to: after the signal transmission path between the first transmission port 211B and the first input terminal 311B is unavailable, send a first indication signal to the data processing device 200B, the first indication signal being used to instruct the data signal to be sent to the second input terminal 321B based on the second transmission port 221B. The data processing device 200B is specifically configured to: receive the first indication signal from the signal relay device 300B, the first indication signal being used to instruct the data signal to be sent to the second input terminal 321B based on the second transmission port 221B, and determine, based on the first indication signal, that the signal transmission path between the first transmission port 211B and the first input terminal 311B is unavailable. Exemplarily, the first switching circuit 350B is also used to: in response to the signal transmission path between the first sending port 211B and the first input terminal 311B being unavailable, disconnect the signal transmission path between the first peripheral terminal 331B and the first input terminal 311B, and establish a signal transmission path between the first peripheral terminal 331B and the second input terminal 321B.

[0063] In this embodiment, a switching circuit is provided in the signal relay device 300B, and the switching circuit in the signal relay device 300B sends a first indication signal to the data processing device 200B, so that the data processing device 200B determines that the signal transmission path between the first sending port 211B and the first input terminal 311B is unavailable, and sends a data signal to the second input terminal 321B through the second sending port 221B, providing a basis for switching the signal transmission path.

[0064] In some possible implementations, such as Figure 9 As shown, each verification circuit in the signal relay device 300B is coupled to the first switching circuit 350B, and a data path and a control path are set between each verification circuit in the signal relay device 300B and the first switching circuit 350B.

[0065] Exemplarily, the first verification circuit 341B inputs a data signal from the first input terminal 311B. If the first verification circuit 341B determines, based on the data signal, that the signal transmission path between the first transmission port 211B and the first input terminal 311B is available, the first verification circuit 341B transmits the data signal to the first switching circuit 350B via the data path, and the first switching circuit 350B transmits the data signal to the first peripheral terminal 331B. If the first verification circuit 341B determines, based on the data signal, that the signal transmission path between the first transmission port 211B and the first input terminal 311B is unavailable, the first verification circuit 341B transmits a first notification signal to the first switching circuit 350B via the control path, indicating that the signal transmission path between the first transmission port 211B and the first input terminal 311B is unavailable.

[0066] In some possible implementations, the first switching circuit 350B can be configured to: when the signal transmission path between the first transmitting port 211B and the first input port 311B is unavailable, send the first instruction signal to the first receiving port of the data processing device 200B via the first output port. Alternatively, another path can be provided between the first switching circuit 350B and the data processing device 200B, and the first switching circuit 350B sends the first instruction signal to the data processing device 200B via the other path.

[0067] In some possible implementations, the first switching circuit 350B may also be configured to notify the data processing device 200B, through a timeout control method, that the signal transmission path between the first transmitting port 211B and the first input terminal 311B is unavailable. For example, the data processing device 200B and the signal relay device 300B may agree that the data processing device 200B transmits a data signal to the first input terminal 311B via the first transmitting port 211B. After the signal relay device 300B receives the data signal via the first input terminal 311B, if the signal transmission path between the first transmitting port 211B and the first input terminal 311B is available, the first switching circuit 350B transmits a response signal to the data processing device 200B within a preset time, indicating that the signal transmission path between the first transmitting port 211B and the first input terminal 311B is available. If the data processing device 200B does not receive the response signal after the preset time, the data processing device 200B determines that the signal transmission path between the first transmitting port 211B and the first input terminal 311B is unavailable. The data processing device 200B and the signal relay device 300B can also agree on the priorities of multiple sending ports. When the signal transmission path between the first sending port 211B and the first input terminal 311B is unavailable, the data processing device 200B sends a data signal to the second input terminal 321B through the second sending port 221B.

[0068] In some possible implementations, the first port 210B and the second port 220B are fixed as receiving ports, and the first transmission port 310B and the second transmission port 320B are fixed as transmitting ports. Figure 7 As shown, the first port 210B may be a first receiving port 212B, the second port 220B may be a second receiving port 222B, the first transmission port 310B may be a first output port 312B, the second transmission port 320B may be a second output port 322B, the peripheral device port 330B may be a second peripheral device port 332B, and the peripheral device output port 130B may be a fourth output port 132B. The signal relay device 300B is specifically configured to: before the signal transmission path between the first receiving port 212B and the first output port 312B becomes unavailable, receive a data signal via the second peripheral device port 332B, and send the data signal to the first receiving port 212B of the data processing device 200B via the first output port 312B. The data processing device 200B is specifically configured to: before the signal transmission path between the first receiving port 212B and the first output port 312B becomes unavailable, receive a data signal from the first output port 312B of the signal relay device 300B via the first receiving port 212B. The data processing device 200B is specifically configured to: after the signal transmission path between the first receiving port 212B and the first output port 312B becomes unavailable, receive a data signal from the second output port 322B of the signal relay device 300B via the second receiving port 222B. The signal relay device 300B is specifically configured to: after the signal transmission path between the first receiving port 212B and the first output port 312B becomes unavailable, receive a data signal via the second peripheral device port 332B, and transmit the data signal to the second receiving port 222B of the data processing device 200B via the second output port 322B.

[0069] In this embodiment, on the one hand, the first port 210B is fixed as a receiving port, and the first transmission port 310B and the second transmission port 320B are fixed as transmitting ports. This distinguishes the ports on the transmitting link from the ports on the receiving link in the data processing device 200B. Even if the transmitting port is damaged, it will not affect the receiving port, which can improve fault tolerance. On the other hand, before the signal transmission path between the first receiving port 212B and the first output port 312B becomes unavailable, the signal relay device 300B receives the data signal through the second peripheral terminal 332B and transmits the data signal to the first receiving port 212B of the data processing device 200B through the first output port 312B. After the signal transmission path between the first receiving port 212B and the first output port 312B becomes unavailable, the signal relay device 300B receives the data signal through the second peripheral terminal 332B and transmits the data signal to the second receiving port 222B of the data processing device 200B through the second output port 322B. On the receiving link of the data processing device 200B and on the sending link of the signal relay device 300B, only the second peripheral terminal 332B needs to be coupled with the fourth outlet terminal 132B of the circuit board 100B. This can reduce the waste of hardware resources on the receiving link of the data processing device 200B and on the sending link of the signal relay device 300B, save the cost of the circuit board 100B and the entire machine, and reduce hardware complexity.

[0070] In some possible implementations, a verification circuit is provided in the data processing device 200B. The verification circuit in the data processing device 200B may be used to determine whether the signal transmission path between the first receiving port 212B and the first output port 312B is available.

[0071] In some examples, such as Figure 8 As shown, data processing device 200B includes multiple verification circuits, each of which is coupled to a plurality of receiving ports in a one-to-one correspondence. For example, the multiple verification circuits include a third verification circuit 343B and a fourth verification circuit 344B. Third verification circuit 343B is coupled to first receiving port 212B, and fourth verification circuit 344B is coupled to second receiving port 222B. Each of the multiple verification circuits is configured to determine, based on a data signal input from the corresponding receiving port, whether a signal transmission path between the corresponding receiving port and the output port is available.

[0072] For example, when the signal transmission path between the first receiving port 212B and the first output terminal 312B is unavailable, the signal transmission path can still transmit the data signal, but the data signal will have an error. The third verification circuit 343B can verify the error, thereby determining that the signal transmission path between the first receiving port 212B and the first output terminal 312B is unavailable.

[0073] In this embodiment, a verification circuit is provided in the data processing device 200B. The verification circuit in the data processing device 200B determines whether the signal transmission path for transmitting the data signal is available based on the data signal, thereby providing a basis for switching the signal transmission path.

[0074] In some possible implementations, the data signal carries coding verification information. Each verification circuit in the data processing device 200B is specifically configured to: determine that the signal transmission path between the corresponding receiving port and the output end is unavailable when the bit error rate of the corresponding coding verification information is greater than a preset threshold.

[0075] In some possible implementations, each verification circuit in the data processing device 200B is specifically configured to determine that a signal transmission path between a corresponding receiving port and an output end is unavailable when a clock of a corresponding data signal cannot be recovered.

[0076] Under these embodiments, the verification circuit in the data processing device 200B can determine that the signal transmission path between the first receiving port 212B and the first output port 312B is unavailable based on the encoded verification information carried by the data signal, or based on the clock of the data signal, providing a basis for switching the signal transmission path, so that the bit error rate of the data signal is low and the clock is correct, thereby improving the accuracy of the data signal.

[0077] In some possible implementations, a switching circuit is provided in the data processing device 200B. The switching circuit in the data processing device 200B is used to control the signal relay device 300B to send a data signal to the second receiving port 222B through the second output port 322B when the signal transmission path between the first receiving port 212B and the first output port 312B is unavailable.

[0078] For example, Figure 9As shown, the switching circuit in the data processing device 200B may be a second switching circuit 240B, and multiple verification circuits in the data processing device 200B (such as the third verification circuit 343B and the fourth verification circuit 344B) are coupled to the second switching circuit 240B. The second switching circuit 240B is configured to, after the signal transmission path between the first receiving port 212B and the first output port 312B becomes unavailable, send a second indication signal to the signal relay device 300B, the second indication signal being used to instruct the second output port 322B to transmit a data signal to the second receiving port 222B. The signal relay device 300B is specifically configured to receive the second indication signal from the data processing device 200B, the second indication signal being used to instruct the second output port 322B to transmit a data signal to the second receiving port 222B, and determine, based on the second indication signal, that the signal transmission path between the first receiving port 212B and the first output port 312B becomes unavailable.

[0079] In this embodiment, a switching circuit is provided in the data processing device 200B, and the switching circuit in the data processing device 200B sends a second indication signal to the signal relay device 300B, so that the signal relay device 300B determines that the signal transmission path between the first receiving port 212B and the first output terminal 312B is unavailable, and sends a data signal to the second receiving port 222B through the second output terminal 322B, providing a basis for switching the signal transmission path.

[0080] In some possible implementations, each verification circuit in the data processing device 200B is coupled to the second switching circuit 240B, and a data path and a control path are provided between each verification circuit in the data processing device 200B and the second switching circuit 240B. Each verification circuit in the data processing device 200B can notify the second switching circuit 240B via a second notification signal that the signal transmission path between the first receiving port 212B and the first output port 312B is unavailable. For details, refer to the details of each verification circuit in the signal relay device 300B notifying the first switching circuit 350B via the first notification signal, and this embodiment of the present application will not be further described here.

[0081] In some possible implementations, the second switching circuit 240B can be configured to: when the signal transmission path between the first receiving port 212B and the first output port 312B is unavailable, send a second instruction signal to the first input port 311B of the signal relay device 300B via the first transmitting port 211B. Alternatively, another path can be provided between the second switching circuit 240B and the signal relay device 300B, and the second switching circuit 240B sends the second instruction signal to the signal relay device 300B via the other path.

[0082] In some possible implementations, the second switching circuit 240B may also be configured to notify the signal relay device 300B through timeout control that the signal transmission path between the first receiving port 212B and the first output port 312B is unavailable. For details, refer to the first switching circuit 350B notifying the data processing device 200B through timeout control, and this embodiment of the present application will not be further described.

[0083] In some possible implementations, the signal relay device 300B is a channel equalization compensation (retimer) chip, and the signal relay device 300B further includes an equalization compensation circuit, wherein the equalization compensation circuit is configured to perform data integrity equalization compensation processing on the data signal.

[0084] In some possible implementations, the data processing device 200B is a network protocol chip, such as a switch chip.

[0085] The present application also provides a data processing system. Figure 10 As shown, the data processing system 1100B may include Figure 4 、 Figures 6 to 9 Any of the data processing devices 200B shown, and may include Figures 5 to 9 Any of the signal relay devices 300B shown.

[0086] The working process and functions of the above-mentioned data processing system 1100B provided in the embodiment of the present application can refer to the working process and functions of the signal relay device 300B and the data processing device 200B. Since the signal relay device 300B and the data processing device 200B have been described in detail in the embodiment of the aforementioned electronic device 1000, they will not be repeated here.

[0087] In the several embodiments provided in this application, it should be understood that the disclosed devices, systems and equipment can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the device is only a logical function division. In actual implementation, there may be other division methods, such as multiple devices or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interface, indirect coupling or communication connection of devices or apparatuses, which can be electrical, mechanical or other forms.

[0088] The modules described as separate components may or may not be physically separate, that is, they may be located in one device or distributed across multiple devices. Some or all of the modules may be selected to achieve the purpose of the present embodiment according to actual needs.

[0089] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A signal relay device, characterized in that: The signal relay device includes an external device end and multiple transmission ends, wherein the multiple transmission ends are used to couple with multiple ports in the data processing device in a one-to-one correspondence, and the multiple transmission ends include a first transmission end and a second transmission end; wherein the signal relay device is used to: Establishing a signal transmission path between the peripheral device and the first transmission end; and performing data signal interaction between the first transmission end and the corresponding first port in the data processing device; In response to the signal transmission path between the first port and the first transmission end being unavailable, a signal transmission path is established between the peripheral end and the second transmission end, and the data signal interaction is performed based on the second transmission end and the corresponding second port in the data processing device.

2. The device according to claim 1, characterized in that The signal relay device is specifically used for: Before the signal transmission path between the first port and the first transmission end is unavailable, receiving the data signal from the first port of the data processing device through the first transmission end, and sending the data signal through the peripheral device end; After the signal transmission path between the first port and the first transmission end is unavailable, the data signal is received from the second port of the data processing device through the second transmission end, and the data signal is sent through the peripheral end.

3. The device according to claim 2, characterized in that The signal interruption device includes a plurality of verification circuits; the plurality of verification circuits are coupled to the plurality of transmission ends in a one-to-one correspondence; wherein each of the plurality of verification circuits is configured to: According to a data signal input from a corresponding transmission end, it is determined whether a signal transmission path between the corresponding transmission end and the port is available.

4. The device according to claim 3, characterized in that The data signal carries coded verification information; each verification circuit is specifically configured to: When the bit error rate of the corresponding coding verification information is greater than a preset threshold, it is determined that the corresponding signal transmission path between the transmission end and the port is unavailable.

5. The device according to any one of claims 2 to 4, characterized in that: The signal interruption device further includes a switching circuit; the plurality of verification circuits and the peripheral terminal are coupled to the switching circuit; wherein the switching circuit is configured to: After the signal transmission path between the first port and the first transmission end is unavailable, a first indication signal is sent to the data processing device, where the first indication signal is used to instruct the data signal to be sent to the second transmission end based on the second port.

6. The device according to claim 1, characterized in that The signal relay device is specifically used for: Before the signal transmission path between the first port and the first transmission end is unavailable, receiving the data signal through the peripheral device end, and sending the data signal to the first port of the data processing device through the first transmission end; After the signal transmission path between the first port and the first transmission end is unavailable, the data signal is received through the peripheral end, and the data signal is sent to the second port of the data processing device through the second transmission end.

7. The device according to claim 6, characterized in that The signal relay device is specifically used for: receiving a second instruction signal from the data processing device, where the second instruction signal is used to instruct the data signal to be sent to the second port based on the second transmission end; It is determined that a signal transmission path between the first port and the first transmission end is unavailable according to the second indication signal.

8. The device according to any one of claims 1 to 7, characterized in that The first transmission end and the second transmission end are fixed as transmitting ends, or the first transmission end and the second transmission end are fixed as receiving ends.

9. The device according to any one of claims 1 to 8, characterized in that The signal relay device is a channel equalization compensation chip, and the signal relay device further includes an equalization compensation circuit; wherein: the equalization compensation circuit is used to: Performing data integrity equalization compensation processing on the data signal.

10. A data processing device, characterized in that: The data processing device includes a plurality of ports, the plurality of ports being coupled to a plurality of transmission ports in the signal relay device in a one-to-one correspondence, the plurality of ports including a first port and a second port; wherein the data processing device is configured to: Establishing a signal transmission path between the first port, the corresponding first transmission end in the signal relay device, and the peripheral end in the signal relay device; In response to the signal transmission path between the first port and the first transmission end being unavailable, a signal transmission path is established between the second port, the corresponding second transmission end in the signal relay device, and the peripheral end in the signal relay device.

11. The device according to claim 10, characterized in that The data processing device is specifically used for: Before the signal transmission path between the first port and the first transmission end becomes unavailable, sending a data signal to the first transmission end of the signal relay device through the first port; After the signal transmission path between the first port and the first transmission end is unavailable, the data signal is sent to the second transmission end of the signal relay device through the second port.

12. The device according to claim 11, characterized in that The data processing device is specifically used for: receiving a first instruction signal from the signal relay device, where the first instruction signal is used to instruct sending the data signal to the second transmission end based on the second port; It is determined that a signal transmission path between the first port and the first transmission end is unavailable according to the first indication signal.

13. The device according to claim 10, characterized in that The data processing device is specifically used for: Before the signal transmission path between the first port and the first transmission end is unavailable, receiving a data signal from the first transmission end of the signal relay device through the first port; After the signal transmission path between the first port and the first transmission end is unavailable, the data signal is received from the second transmission end of the signal relay device through the second port.

14. The device according to claim 13, characterized in that The data processing device includes a plurality of verification circuits; the plurality of verification circuits are coupled to the plurality of ports in a one-to-one correspondence; wherein each of the plurality of verification circuits is configured to: According to the data signal input from the corresponding port, it is determined whether the signal transmission path between the corresponding port and the transmission end is available.

15. The device according to claim 14, characterized in that The data signal carries coded verification information; each verification circuit is specifically configured to: When the bit error rate of the corresponding coding verification information is greater than a preset threshold, it is determined that the signal transmission path between the corresponding port and the transmission end is unavailable.

16. The device according to any one of claims 13 to 15, characterized in that The data processing device further includes a switching circuit; the plurality of verification circuits are all coupled to the switching circuit; wherein the switching circuit is configured to: After the signal transmission path between the first port and the first transmission end is unavailable, a second instruction signal is sent to the signal relay device, where the second instruction signal is used to instruct the data signal to be sent to the second port based on the second transmission end.

17. The device according to any one of claims 10 to 16, characterized in that The first port and the second port are fixed as receiving ports, or the first port and the second port are fixed as sending ports.

18. The device according to any one of claims 10 to 17, characterized in that The data processing device is a network protocol chip.

19. A data processing system, characterized in that: The data processing system includes a signal relay device and a data processing device, the signal relay device includes a peripheral terminal and multiple transmission terminals, the data processing device includes multiple ports, the multiple transmission terminals are coupled to the multiple ports in a one-to-one correspondence, the multiple transmission terminals include a first transmission terminal and a second transmission terminal, the multiple ports include a first port and a second port, the first transmission terminal is coupled to the first port, and the second transmission terminal is coupled to the second port; wherein the data processing system is configured to: Establishing a signal transmission path among the first port, the first transmission end and the peripheral end; In response to the signal transmission path between the first port and the first transmission end being unavailable, a signal transmission path is established among the second port, the second transmission end, and the peripheral device end.

20. An electronic device, characterized in that: The electronic device comprises a circuit board and a data processing system according to claim 19; The signal relay device in the data processing system includes a peripheral terminal, the circuit board includes an outlet terminal, and the peripheral terminal of the signal relay device is coupled to the outlet terminal of the circuit board.

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