Decomposition method, device and equipment for controlled phase shifting door and medium

Abstract

The invention relates to a decomposition method, device and equipment for a controlled phase sliding door and a medium. The method comprises the steps that the controlled phase sliding door to be decomposed is obtained; the quantum bit q < 0 > is decomposed into a plurality of single quantum bit PS gates and a plurality of double quantum bit CNOT gates which are applied to a quantum circuit, and the decomposition comprises the following steps: applying a single quantum bit PS gate to the quantum bit q < 0 >; 2i single quantum bit PS gates and 2i double quantum bit CNOT gates are alternately applied on a quantum bit qi, i belongs to {1, 2,..., n}, target bits of the 2i double quantum bit CNOT gates are all arranged on the quantum bit qi, and control bits of the 2i double quantum bit CNOT gates are arranged on quantum bits q0, q1,..., q-1 in a recursive mode. According to the invention, controlled quantum phase shift gates of any number of control bits can be decomposed, and the number of decomposed quantum gates and the complexity of a quantum circuit are effectively reduced.

Description

Technical Field

[0001] The present application relates to the field of quantum computing technology, and in particular to a decomposition method, apparatus, device, and medium for a controlled phase-shift gate. Background Art

[0002] In quantum computing, quantum algorithms used to implement computational tasks are typically described using quantum circuits. A quantum circuit consists of qubits and a series of quantum logic gates (quantum gates). Unlike classical circuits, which transmit signals via metal wires, quantum circuits connect quantum gates through time evolution, with the state of the qubits changing as they pass through quantum gates. Quantum gate operations are essentially the effects of unitary matrices on qubits, so the entire quantum circuit can be viewed as a complex unitary matrix composed of multiple unitary matrices. Through quantum circuits, complex quantum operations are decomposed into a series of simpler operations, making them easier to implement in quantum computers.

[0003] However, for a multi-controllable quantum gate with multiple control bits, the number of quantum gates and circuit depth required to decompose the result increases rapidly. For example, decomposing a multi-controllable quantum gate with 4 control bits requires 213 quantum gates with a circuit depth of 149; while decomposing a multi-controllable quantum gate with 5 control bits requires 1429 quantum gates with a circuit depth of 959. This exponential resource consumption makes the implementation of multi-controllable quantum gates in noisy intermediate-scale quantum (NISQ) computers extremely complex, becoming a major technical bottleneck on the road to practical quantum computing.

[0004] Therefore, effectively decomposing multi-controlled quantum gates to reduce hardware resource requirements while improving the efficiency of quantum computing has become an important research topic in quantum computing. This research not only promotes the practical application of quantum computing but also lays the foundation for its application in more fields. Summary of the Invention

[0005] In response to the technical problems existing in the prior art, this application proposes a decomposition method, device, equipment and medium for controlled phase-shift gates, which can decompose controlled quantum phase-shift gates with any number of control bits, effectively reducing the number of quantum gates after decomposition and the complexity of quantum circuits.

[0006] In order to solve the above technical problem, according to one aspect of the present application, the present application provides a decomposition method for a controlled phase-shift gate, the method comprising the following steps: Obtain a controlled phase-shift gate to be decomposed, wherein the controlled phase-shift gate has n control bits and 1 target bit; decompose the controlled phase-shift gate into a plurality of single-qubit PS gates and a plurality of double-qubit CNOT gates applied to a quantum circuit, wherein the quantum circuit has n+1 qubits q0, q1, ..., q n, and quantum bits q0, q1, ..., q n-1 The n control bits of the controlled phase-shift gate correspond to the quantum bit q n Corresponding to the target bit of the controlled phase-shift gate, the decomposition includes: applying a single-qubit PS gate on the qubit q0; applying a single-qubit PS gate on the qubit q i On, i∈{1,2,……,n}, alternately apply 2 i single-qubit PS gates and 2 i A two-qubit CNOT gate, where the 2 i The phase parameters of the single-qubit PS gate are set alternately positive and negative. i The target bits of the two-qubit CNOT gate are placed on the qubit q i Above, 2 i The control bits of the two-qubit CNOT gate are recursively arranged on the qubits q0, q1, ..., q i-1 superior.

[0007] As described above, the decomposition method i The control bits of the two-qubit CNOT gate are recursively arranged on the qubits q0, q1, ..., q i-1 When i=1, the 2 1 The control bits of the two-qubit CNOT gate are all placed on qubit q0; when i ≥ 2, the .... i 2 applied on i The control bits of the two-qubit CNOT gates are sequentially arranged on the qubits included in Sequence (i) determined based on the following formula: Sequence(i) = Insert(q i-1 , Sequence(i-1)); Among them, Sequence(i-1) represents the sequence of the quantum bit q. i-1 2 applied on i-1 The control bits of the two-qubit CNOT gates are arranged in sequence. Sequence(i) represents the sequence of qubits in qubit q. i 2 applied on i Insert is used to insert a quantum bit q before each quantum bit included in the sequence represented by Sequence(i-1). i-1 To determine the quantum bits included in the sequence represented by Sequence(i).

[0008] The decomposition method as described above further includes: configuring the phase parameter of each single-qubit PS gate to θ / 2 n , where θ is the phase parameter of the controlled phase-shift gate.

[0009] According to another aspect of the present application, a decomposition device for a controlled phase-shift gate is proposed, comprising: a controlled phase-shift gate acquisition unit, configured to acquire a controlled phase-shift gate to be decomposed, wherein the controlled phase-shift gate has n control bits and 1 target bit; a controlled phase-shift gate decomposition unit, configured to decompose the controlled phase-shift gate into a plurality of single-qubit PS gates and a plurality of two-qubit CNOT gates applied to a quantum circuit, wherein the quantum circuit has n+1 qubits q0, q1, ..., q n , and quantum bits q0, q1, ..., q n-1 The n control bits of the controlled phase-shift gate correspond to the quantum bit q n Corresponding to the target bit of the controlled phase-shift gate, the controlled phase-shift gate decomposition unit includes: a first decomposition unit configured to apply a single-qubit PS gate on the qubit q0; a second decomposition unit configured to apply a single-qubit PS gate on the qubit q i On, i∈{1,2,……,n}, alternately apply 2 i single-qubit PS gates and 2 i A two-qubit CNOT gate, where the 2 i The phase parameters of the single-qubit PS gate are set alternately positive and negative. i The target bits of the two-qubit CNOT gate are placed on the qubit q i Above, 2 i The control bits of the two-qubit CNOT gate are recursively arranged on the qubits q0, q1, ..., q i-1 superior.

[0010] The decomposition device as described above, the second decomposition unit includes: an initial arrangement unit, configured to apply 2 on the quantum bit q1 when i=1 1 The control bits of the two-qubit CNOT gates are all arranged on qubit q0; the recursive arrangement unit is configured to be when i ≥ 2, on qubit q i 2 applied on i The control bits of the two-qubit CNOT gates are sequentially arranged on the qubits included in Sequence (i) determined based on the following formula: Sequence(i) = Insert(q i-1 , Sequence(i-1)); Among them, Sequence(i-1) represents the sequence of the quantum bit q. i-12 applied on i-1 The control bits of the two-qubit CNOT gates are arranged in sequence. Sequence(i) represents the sequence of qubits in qubit q. i 2 applied on i Insert is used to insert a quantum bit q before each quantum bit included in the sequence represented by Sequence(i-1). i-1 To determine the quantum bits included in the sequence represented by Sequence(i).

[0011] The decomposition device as described above, the controlled phase shift gate decomposition unit further includes: a phase parameter configuration unit configured to configure the phase parameter of each single quantum bit PS gate to θ / 2 n , where θ is the phase parameter of the controlled phase-shift gate.

[0012] According to another aspect of the present application, the present application further provides a computing device, including: a processor and a memory, wherein the memory stores a computer program, and when the computer program is executed by the processor, the aforementioned decomposition method for a controlled phase-shift gate is implemented.

[0013] According to another aspect of the present application, the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, and when the computer instructions are executed by a processor, the aforementioned decomposition method for a controlled phase-shift gate is implemented.

[0014] This application can convert any n control bits of C n The PS gate is decomposed into a combination of a single-qubit PS gate and a CNOT gate. The decomposed quantum circuit can completely implement C n The function of PS gate; since the decomposed quantum circuit only contains single-qubit PS gate and CNOT gate, the quantum gate contained in the quantum circuit is closer to the basic quantum gate set supported by existing quantum computers, and is easier to realize physically, thus facilitating the operation of C gates on quantum computers. n Quantum algorithm for PS gates; compared with other decomposition methods of controlled quantum phase-shift gates in the prior art, this application reduces the number of quantum gates and circuit depth in the quantum circuit, thereby effectively reducing the complexity of the decomposed quantum circuit and improving the execution efficiency of the quantum circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Below, the preferred embodiments of the present application will be further described in detail with reference to the accompanying drawings, wherein: Figure 1 is a flow chart of a decomposition method for a controlled quantum phase-shift gate according to one embodiment of the present application; Figure 2 This is a decomposed quantum circuit diagram for a controlled quantum phase-shift gate according to one embodiment of the present application; Figure 3 According to one embodiment of the present application Schematic diagram of the decomposed quantum circuit; Figure 4 is Figure 3 The quantum circuit shown is based on Schematic diagram of the quantum circuit in the |0> state; Figure 5 is Figure 3 The quantum circuit shown is based on Schematic diagram of the quantum circuit in the |1> state; Figure 6 is Figure 3 The quantum circuit shown is based on Schematic diagram of the simplified quantum circuit in the |1> state; Figure 7 is Figure 3 The quantum circuit shown is based on Schematic diagram of the simplified quantum circuit in the |0> state; Figure 8 is Figure 3 The quantum circuit shown is based on Schematic diagram of the simplified quantum circuit in the |1> state; Figure 9 This is a flow chart of a method for constructing a controlled quantum phase-shift gate quantum circuit according to one embodiment of the present invention; Figure 10 This is a schematic diagram of a decomposed quantum circuit constructed according to an application embodiment of the present application; Figure 11 This is a principle block diagram of a decomposition device for a controlled quantum phase-shift gate according to one embodiment of the present application; Figure 12 is a principle block diagram of a decomposition device for a controlled quantum phase-shift gate according to another embodiment of the present application; Figure 13 It is a block diagram of the structural principles of a computing device according to an embodiment of the present application. DETAILED DESCRIPTION

[0016] To make the purpose, technical solutions, and advantages of the embodiments of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0017] In the detailed description that follows, reference may be made to the various drawings that form part of this application and illustrate specific embodiments of the present application. In the drawings, similar reference numerals describe substantially similar components in different figures. Each specific embodiment of the present application is described below in sufficient detail to enable a person of ordinary skill in the art to implement the technical solutions of the present application. It should be understood that other embodiments may be utilized or that structural, logical, or electrical changes may be made to the embodiments of the present application.

[0018] Controlled Quantum Phase Shift Gate (C n PS gate (n represents the number of control bits) is a controlled quantum gate commonly used in many quantum algorithms. For example, the exact Grover algorithm requires the use of C n PS gates are used to implement precise searches in unordered databases. n The PS gate contains n control bits and a target bit. If and only if all control bits are |1>, a PS gate is applied to the target bit. Otherwise, C n The PS gate does not work. The PS gate is a phase-shift gate that acts on a single quantum bit and contains a phase angle θ (0≤θ<2π). The corresponding two-dimensional matrix is shown in the following equation (1-1): (1-1) However, in actual quantum computers, implementing certain complex quantum gates may present significant hardware challenges. Therefore, current quantum computers only support certain types of quantum gates, called basic gate sets. Therefore, before running quantum algorithms, quantum computers need to replace the quantum gates that are not supported in the quantum algorithm, such as C n The PS gate is decomposed into a sequence of basic quantum gates (such as single-qubit gates and two-qubit gates) that it can support.

[0019] Controlled quantum phase shift gate (in the following description, the controlled quantum phase shift gate is abbreviated as C when the phase shift angle is involved) n PS(θ) gate, abbreviated as C when the phase shift angle is not involved nThe PS gate is a very common and important n+1 qubit gate in quantum algorithms. It has n control bits and one target bit. There are 2 n The ground states are |00…0>, |00…1>, …, |11…0>, |11…1>, corresponding to 0~2 n -1 binary string. n When the n control bits of the PS gate (assuming they are all valid when |1>) are in |00…0>,|00…1>,…,|11…0>, C n The PS gate has no effect and does not cause any change in the quantum state. It is equivalent to an identity I gate (the matrix of the I gate is the unit matrix, so it does not cause any change in the quantum state and can be omitted directly); only when the control bit is in |11…1>, a phase shift gate (abbreviated as PS gate) is applied to the target bit.

[0020] Figure 1 FIG. 1 is a flow chart of a decomposition method for a controlled quantum phase-shift gate according to an embodiment of the present application. Figure 1 As shown, the method includes: Step S110, obtaining a controlled phase-shift gate to be decomposed, wherein the controlled phase-shift gate has n control bits and 1 target bit; Step S120: decompose the controlled phase-shift gate into a plurality of single-qubit PS gates and a plurality of double-qubit CNOT gates applied to a quantum circuit, wherein the quantum circuit has n+1 qubits q0, q1, ..., q n , and quantum bits q0, q1, ..., q n-1 The n control bits of the controlled phase-shift gate correspond to the quantum bit q n Corresponding to the target bit of the controlled phase-shift gate, the decomposing step further comprises: Step S1201, applying a single-qubit PS gate to qubit q0; Step S1202, in the quantum bit q i On, i∈{1,2,……,n}, alternately apply 2 i single-qubit PS gates and 2 i A two-qubit CNOT gate, where the 2 i The phase parameters of the single-qubit PS gate are set alternately positive and negative. i The target bits of the two-qubit CNOT gate are placed on the qubit q i Above, 2 i The control bits of the two-qubit CNOT gate are recursively arranged on the qubits q0, q1, ..., q i-1 superior.

[0021] From the above method, it can be seen that the present application will C of n control bits n The PS gate is decomposed into multiple single-qubit PS gates and multiple two-qubit CNOT gates. The decomposition method provided by this application can convert any n control bits of the CNOT gate into a single-qubit PS gate. n The PS gate is decomposed into a combination of a single-qubit PS gate and a CNOT gate. The decomposed quantum circuit can completely implement C n The function of PS gate is closer to the quantum gate set supported by existing quantum computers, making it easier to run C on quantum computers. n The quantum algorithm of the PS gate is proposed. In addition, the decomposition method provided by the present application not only ensures the accuracy of the decomposition, but also simplifies the structure of the quantum circuit after decomposition, that is, reduces the number of quantum gates and the circuit depth, reduces the complexity of the quantum circuit, and improves the execution efficiency of the quantum circuit.

[0022] In one embodiment of the present application, 2 i The control bits of the two-qubit CNOT gate are recursively arranged on the qubits q0, q1, ..., q i-1 Above, including: When i=1, the 2 applied to the quantum bit q1 1 The control bits of each two-qubit CNOT gate are placed on qubit q0; When i≥2, in the quantum bit q i 2 applied on i The control bits of the two-qubit CNOT gates are sequentially arranged on the qubits included in Sequence (i) determined based on the following formula: Sequence(i) = Insert(q i-1 , Sequence(i-1)); Among them, Sequence(i-1) represents the sequence of the quantum bit q. i-1 2 applied on i-1 The control bits of the two-qubit CNOT gates are arranged in sequence. Sequence(i) represents the sequence of qubits in qubit q. i 2 applied on i Insert is used to insert a quantum bit q before each quantum bit included in the sequence represented by Sequence(i-1). i-1 To determine the quantum bits included in the sequence represented by Sequence(i).

[0023] For example, if i = 2, then: Sequence(1) = [q0,q0]; Sequence(2) = Insert(q1, Sequence(1)) = [q1, q0, q1, q0]; That is, in The control bits of the four CNOT gates applied are: q1, q0, q1, q0.

[0024] Through this nested insertion recursive construction method, it can be ensured that The control bit of the CNOT gate applied above introduces a new control bit on the basis of maintaining the interference effect on the control structure of the previous quantum bit, thereby realizing the correct expansion of the overall logic of the controlled phase-shift gate.

[0025] It should be noted that, although the above embodiment shows the i The control bits of the two-qubit CNOT gate are recursively arranged on the qubits q0, q1, ..., q i-1 The specific implementation process of the above recursive construction is described above, but the present application is not limited thereto. For example, in another embodiment of the present application, Insert can also be used to insert a quantum bit q after each quantum bit included in the sequence represented by Sequence(i-1). i-1 To determine the quantum bits included in the sequence represented by Sequence(i).

[0026] In addition, in the embodiment of the present application, the phase parameter of each single-qubit PS gate can be configured to be θ / 2 n , where θ is the phase parameter of the controlled phase-shift gate.

[0027] Figure 2 This is a decomposed quantum circuit diagram for a controlled quantum phase shift gate according to one embodiment of the present application. Figure 2 As shown, according to Figure 1 The decomposition method of the controlled quantum phase-shift gate C n PS(θ) is decomposed into multiple single-qubit PS gates and multiple two-qubit CNOT gates.

[0028] The solid black dots in the figure are "The symbol composed of " represents the CNOT gate, and the quantum bit where the solid black dot is located represents the control bit," The qubit where the symbol " is located represents the target bit. When the control bit is in the |0> state, the CNOT gate does not work and can be directly omitted. When the control bit is in the |1> state, an I gate is applied to the target bit. The "+" in the PS(+) gate in the figure represents the main value of the phase shift angle. In one embodiment, the main value of the phase shift angle is θ / 2 n The "-" in the PS(-) gate indicates that the principal value of the argument is -θ / 2n θ is C n PS(θ) is the principal value of the phase shift angle of the gate.

[0029] See also Figure 2 , a phase shift gate PS(+) is configured on the 0th quantum bit.

[0030] On quantum bit q1, there are 2 1 = 2 single-qubit PS gates and 2 1 =2 two-qubit CNOT gates, where the phase parameters of the two single-qubit PS gates are set alternately positive and negative, and each is followed by a CNOT gate; the target bit of each PS(+) gate, PS(-) gate and each CNOT gate is configured on the first qubit, and the control bit of each CNOT gate is stepped on the qubit q0.

[0031] On quantum bit q2, there are 2 2 = 4 single-qubit PS gates and 2 2 = 4 two-qubit CNOT gates, where the phase parameters of the four single-qubit PS gates are alternately set to positive and negative, and each is followed by a CNOT gate; the target bit of each PS(+) gate, PS(-) gate, and each CNOT gate is configured on the second qubit, and the control bit of each CNOT gate is recursively arranged on qubits q0 and q1. Specifically, the control bits of the four two-qubit CNOT gates applied to qubit q2 are sequentially arranged on the qubits included in Sequence (2) determined based on the following formula: Sequence(2) = Insert(q1, Sequence(1)); From Sequence(1)=[q0,q0], we can see that Sequence(2) = Insert(q1, Sequence(1)) = [q1, q0, q1, q0].

[0032] From the above, we can see that the control bits of the four two-qubit CNOT gates are arranged on the q1, q0, q1 and q0 qubits respectively.

[0033] On quantum bit q3, there are 2 3 = 8 single-qubit PS gates and 2 3= 8 two-qubit CNOT gates, where the phase parameters of the 8 single-qubit PS gates are alternately set to positive and negative, and each is followed by a CNOT gate; the target bit of each PS(+) gate, PS(-) gate, and each CNOT gate is configured on the third qubit, and the control bit of each CNOT gate is recursively arranged on qubits q0, q1, and q3. Specifically, the control bits of the 8 two-qubit CNOT gates applied to qubit q3 are sequentially arranged on the qubits included in Sequence (3) determined based on the following formula: Sequence(3) = Insert(q2, Sequence(2)); From Sequence(2)=[q1,q0,q1,q0], we can see that Sequence(3) = Insert(q2, Sequence(2)) = [q2, q1, q2, q0, q2, q1, q2, q0].

[0034] From the above, it can be seen that the control bits of the 8 two-qubit CNOT gates are arranged on the q2, q1, q2, q0, q2, q1, q2 and q0 qubits respectively.

[0035] By analogy, in the quantum bit q i There are 2 i single-qubit PS gates and 2 i Two-qubit CNOT gates, where 2 i The phase parameters of the single-qubit PS gates are set alternately positive and negative, and each is followed by a CNOT gate; the target bit of each PS(+) gate, PS(-) gate and each CNOT gate is configured on the i-th qubit, and the control bit of each CNOT gate is recursively arranged on the qubits q0, q1, ..., q i-1 Specifically, in the quantum bit q i 2 applied on i The control bits of the two-qubit CNOT gates are sequentially arranged on the qubits included in Sequence (i) determined based on the following formula: Sequence(i) = Insert(q i-1 , Sequence(i-1)).

[0036] From the above description, we can see that for C n PS gate, which acts on n+1 quantum bits q 0 ,q 1 ,……,q nOn, the control bit is q 0 ,q 1 ,……,q n-1 , the target position is q n The quantum circuit after decomposition of such a controlled phase-shift gate contains 2 n+2 -3 quantum gates, 2 n+1 -1 PS door and 2 n+1 -2 CNOT gates. In order of action: 2 0 =1 target position PS gate, 2 2 =4 target positions q 1 PS gate and CNOT gate, 2 3 =8 target positions q 2 PS gate and CNOT gate, ..., 2 n +1 The target position is q n PS gate and CNOT gate.

[0037] The target position is q 0 The main value of the phase shift angle of the PS gate is θ / 2 n .

[0038] The target position is q 1 The PS gate and CNOT gate are applied alternately, including 2 1 =2 PS gates, the main values of the phase shift angle are θ / 2 n , -θ / 2 n , including 2 1 =2 CNOT gates, control bits are q 0 .

[0039] The target position is q 2 The PS gate and CNOT gate are applied alternately, including 2 2 =4 PS gates, the main values of the phase shift angle are θ / 2 n , -θ / 2 n ,θ / 2 n , -θ / 2 n , alternating positive and negative; including 2 2 =4 CNOT gates, the control bits are q 1 、 q 0 、q 1 、 q 0 .

[0040] By analogy, the target position is q n The PS gate and CNOT gate are applied alternately, including 2 n PS gates, the main values of the phase shift angle are θ / 2 n , -θ / 2 n ,θ / 2 n , -θ / 2 n ...alternating positive and negative; including 2 n CNOT gates, the control bit of the last CNOT gate is q 0 Among the remaining CNOT gates, the control bit of the CNOT gate in the middle is q 0 , the CNOT gate is to divide the remaining CNOT gates into the first left part and the first right part. The CNOT gate configuration positions of the first left part and the first right part are exactly the same. In the first left part, the control bit of the CNOT gate arranged in the middle is q 1 , the CNOT gate divides the remaining CNOT gates into the second left part and the second right part. The arrangement rules of the CNOT gates in the second left part and the second right part are exactly the same, ..., and so on, until the target position is q n 2 n All CNOT gates are arranged.

[0041] This application mainly utilizes the following relevant properties of quantum gates, making the decomposed quantum circuit equivalent to a controlled quantum phase-shift gate: Property 1: Two adjacent I gates can cancel each other and can be directly omitted in quantum circuits; Property 2: Two adjacent CNOT gates with the same control bits and target bits can cancel each other out and can be directly omitted in quantum circuits; Property 3: The parameters (i.e., the principal values of the phase shift angles) are mutually inverse and two adjacent PS gates can cancel each other out, so they can be omitted in quantum circuits. Property 4: Two adjacent PS gates can be merged into one PS gate. At the same time, the parameters of the merged PS gate are equal to the sum of the parameters of the two PS gates before the merger, as shown in the following formula (2-1): PS(θ1)•PS(θ2)=PS(θ1+θ2) (2-1) Property 5: Two global phase gates with opposite parameters at any position on any qubit The gates can cancel each other out and can be directly omitted in quantum circuits, where The gate contains a phase angle θ (0≤θ<2π), and the corresponding two-dimensional matrix is shown in the following formula (2-2): (2-2) Property 6: Two global phase gates at any position on any qubit Doors can be combined into one Gate, at the same time, the merged The gate parameter is equal to the combined first two The sum of the gate parameters is shown in the following formula (2-3): (θ1)• (θ2)= (θ1+θ2) (2-3) Property 7: Global Phase Gate The effect of the gate acting on any position on any quantum bit is equivalent; Property 8: The PS gate does not cause any change in the ground state |0> of a single quantum bit and can be omitted directly. Acting on the |1> state is equivalent to a global phase gate. The gate is shown in equations (2-4) and (2-5): PS(θ)•|0>=|0> (2-4) PS(θ)•|1>= (θ)•|1> (2-5) Property 9: A set of adjacent I gates, PS gates, and I gates can be simplified into a global phase gate Gate and a PS gate, at the same time, the simplified The gate parameters remain unchanged, and the parameters of the PS gate are negative, as shown in the following formula (2-6): X•PS(θ)•X= (θ)•PS(-θ) (2-6) This application cleverly alternates the arrangement of PS gates and CNOT gates on all qubits, ultimately making it possible for all quantum gates in the circuit to cancel each other out when the current n control bits are in any state among |00…0>, |00…1>, …, |11…0>, which is equivalent to an identity I gate. Only when the current n control bits are in |11…1>, all quantum gates on the first n qubits (except q 0 The effects of all quantum gates on the n+1th target bit and q 0The combined effect of the PS gates on the n+1th target bit is equivalent to applying a PS gate on the n+1th target bit. Therefore, the quantum circuit only uses PS gates and CNOT gates to equivalently realize C n The effect of PS door.

[0042] C 2 Taking PS(θ) gate as an example, it is explained that the quantum circuit decomposed by this application is related to C 2 PS(θ) gate equivalent.

[0043] See also Figure 3 , Figure 3 According to one embodiment of the present application, 2 Schematic diagram of quantum circuit after decomposition of PS(θ) gate. Figure 3 In the equation, “+” represents the parameter value θ / 2 2 , “-” indicates the parameter value -θ / 2 2 .

[0044] The following targets q 0 The two states |0> and |1> are explained in different cases Figure 3 The effect of the quantum circuit shown.

[0045] (1) When q 0 When in the |0> state, according to Property 8, q 0 The first PS(+) gate on the q 0 The change of the quantum state can be omitted; according to the effect of the CNOT gate, q 0 The four CNOT gates for the control bits are inactive and can be omitted. At this time, we get Figure 4 The quantum circuit shown. Figure 4 is Figure 3 The quantum circuit shown is based on q 0 Schematic diagram of a quantum circuit in the |0> state.

[0046] Obviously, in q 1 Applying property 3, q 2 Applying properties 3, 2, and 3 in turn, we can Figure 3 All 8 quantum gates in are omitted, which means that when q 0 In the |0> state, regardless of q 1 q 2 In what state,q 0 q 1 q 2 The quantum state of C 2 The effect of the PS(θ) gate is the same.

[0047] (2) When q 0 When in the |1> state, according to properties 8 and 7, q 0 The first PS(+) gate on the q 1 The previous one (+) door, q 0 Still in the |1> state; According to the effect of the CNOT gate, q 0 The four CNOT gates of the control bit are all active and can be simplified into I gates on the corresponding target bit; at this time, we get Figure 5 quantum circuits. Figure 5 is Figure 3 The quantum circuit shown is based on q 0 Schematic diagram of a quantum circuit in the |1> state.

[0048] Obviously, in q 1 Applying properties 9, 5, and 4 above in turn, we can q 1 Simplify the five quantum gates on Figure 6 quantum circuits. Figure 6 is Figure 3 The quantum circuit shown is based on q 0 Schematic diagram of the simplified quantum circuit in the |1> state.

[0049] exist Figure 6 In the example, “2+” means twice the parameter value θ / 2 2 , that is θ / 2.

[0050] At this time, for q 1 The two states |0> and |1> are discussed separately.

[0051] (1) When q 1 When in the |0> state, according to Property 8, q 1The first PS(2+) gate can be omitted; according to the effect of the CNOT gate, q 1 The two CNOT gates for the control bit are ineffective and can be omitted; at this time, we get Figure 7 quantum circuits. Figure 7 is Figure 3 The quantum circuit shown is based on q 1 Schematic diagram of the simplified quantum circuit in the |0> state.

[0052] Obviously, in q 2 Applying properties 3 and 1 in turn, we can Figure 7 All 6 quantum gates in are omitted, which means that when q 0 In the |1> state, q 1 In the |0> state, regardless of q 2 In what state, q 0 q 1 q 2 The quantum state of C 2 The effect of PS(θ) is consistent.

[0053] (2) When q 1 When in the |1> state, according to Property 8, q 1 The first PS(2+) gate on the q 1 The previous one (2+) doors, q 1 Still in the |1> state; According to the effect of the CNOT gate, q 1 The two CNOT gates of the control bit are both effective and can be simplified into I gates on the corresponding target bit; at this time, we get Figure 8 quantum circuits. Figure 8 is Figure 3 The quantum circuit shown is based on q 1 Schematic diagram of the simplified quantum circuit in the |1> state.

[0054] Obviously, in q 2 Applying properties 9, 7, 6, 5 and 4 in turn, we can Figure 8The 9 quantum gates in are simplified, and only q 2 A PS(θ) gate on the top (i.e., PS(4+) gate, “4+” means 4 times the parameter value θ / 2 2 , i.e. θ), which means that when q 0 and q 1 When both are in the |1> state, regardless of q 2 In what state, q 2 Apply a PS(θ) gate to the 2 The effect of PS(θ) is consistent.

[0055] In summary, q 0 q 1 q 2 In any state, Figure 3 C 2 PS(θ) gate decomposition circuits can equivalently realize C 2 The effect of the PS(θ) gate.

[0056] Figure 9 The flowchart of the method for constructing a controlled quantum phase-shift gate quantum circuit according to one embodiment of the present invention is as follows. The method for constructing a controlled quantum phase-shift gate quantum circuit comprises the following steps: Step S1: Initialize the construction parameters to the minimum value, wherein the construction parameters include: the sequence number i of the quantum bit where the PS gate configuration bit is located, 1≤i≤n, n is the sequence number of the last quantum bit, 2≤n; the number j of phase shift gates configured on each quantum bit, 0≤j≤2 i -1; CNOT gate control bit parameter k, 1≤k≤i. After initialization, i=1, j=0, k=1.

[0057] Step S2: Configure a PS gate on the 0th quantum bit, and configure the principal value of the phase shift angle to be phase (θ / 2 n ).

[0058] Step S3: Determine whether i is less than or equal to n. If i is less than or equal to n, execute step S4; if i is not less than or equal to n, end. The PS gate configuration bit number i points to the action bit q to be applied to the PS gate. i , and also points to the target position of the CNOT gate to be applied q i The initial value of parameter i is 1, which means that the quantum bit is about to be q 1Apply a quantum gate. Determine whether i is less than or equal to n, that is, determine the quantum bit corresponding to the PS gate action position to be applied. q i Beyond quantum bits q 0 ,q 1 ,……,q n range.

[0059] Step S4: Determine whether j is less than or equal to 2 i -1; if j is less than or equal to 2 i -1, go to step S5; if j is not less than 2 i -1, execute step S10. Wherein, parameter j (0≤j≤2 i -1) indicates that it has been applied to q i The number of PS gates on the target bit is also the number of PS gates applied. q i The number of CNOT gates, the initial value of parameter j is 0, indicating that the quantum bit q i No quantum gate is applied yet. If j≤2 i -1, indicating that it has been applied to the quantum bit q i The PS gate on the , and the applied, target position is q i The number of CNOT gates does not exceed 2 i -1. When j is not less than 2 i -1, indicating that in the quantum bit q i The total number of PS gates and CNOT gates applied has reached 2 i , then the PS gate and CNOT gate cannot be applied. In step S10, the parameter i is increased by 1, and the quantum gate is applied to the next quantum bit.

[0060] Step S5: Determine whether k is less than or equal to i; if k is less than or equal to i, execute step S6; if k is not less than or equal to i, execute step S10. The parameter k (1≤k≤i) is used to calculate the quantum bit q i The control bit number of the j+1th CNOT gate on the quartz crystal is ik, and the initial value of k is 1.

[0061] If k≤i, the quantum bit being checked q i-k Not beyond quantum bits q 0 ,q 1 ,……,qn range, then check the qubit in step 6 q i-k Is it a quantum bit? The control bit of the j+1th CNOT gate on .

[0062] Step S6: Determine whether equation (3-1) holds. Substitute the current values of i, j, and k into equation (3-1). If equation (3-1) holds, proceed to step S7. If equation (3-1) does not hold, proceed to step S9.

[0063] (3-1) Among them, “|” represents integer division operation, and “%” represents remainder operation.

[0064] Step 6 is used to check the qubits q i-1 Is it the control bit of the CNOT gate? The basis for checking is to judge the quantum bit q i The serial number i, the number of quantum gates to be applied, the serial number j, and the quantum bit being checked q i-k Whether the relationship between the three items k is established (3-1), if so, execute step S7.

[0065] Step S7: Configure the phase shift gate and CNOT gate. Specifically, configure a PS gate on the i-th quantum bit with a phase shift angle of , a CNOT gate is configured on the i-th qubit and the ik-th qubit, the i-th qubit is the target bit of the CNOT gate, and the ik-th qubit is the control bit of the CNOT gate.

[0066] Step S8: Set j=j+1 and return to step S4.

[0067] Step S9: Set k=k+1 and return to step S5.

[0068] Step 10: Set i=i+1 and return to step S3.

[0069] Through the above, a quantum circuit of a controlled phase-shift gate with n control bits is constructed. Figure 2 .

[0070] The decomposition method provided by this application can realize C with any n (n=1,2,3,...) control bits. n The decomposition operation of the PS gate, the decomposed quantum circuit only contains the single-qubit PS gate and the two-qubit CNOT gate. nThe PS gate is closer to the quantum gate set supported by quantum computers and is easier to implement on quantum computers. n Compared with the method of decomposing the PS gate into a CPS gate (a PS gate with a control bit) and a combination of CNOT gates, since most quantum computers currently do not directly support CPS gates, they still need to be further decomposed. In the end, C n PS gate decomposes into 3•2 n+1 -7 PS gates and CNOT gates. The decomposition method provided by this application can be used to n PS gate decomposed into 2 n+2 - A combination of 3 PS gates and CNOT gates, which reduces 2 compared to the above method n+1 -4 quantum gates, achieving exponential optimization of the number of quantum gates.

[0071] Application Examples The exact Grover algorithm is a quantum algorithm that solves the problem of searching unordered databases. It can efficiently achieve accurate and fast searches. Its search efficiency has a quadratic acceleration effect compared to classical algorithms. It is often used to solve problems such as minimum value search, string matching, and quantum dynamic programming. The exact Grover algorithm mainly has specific implementation methods such as three-dimensional rotation, large step and small step, and conjugate rotation. In the three-dimensional rotation method, C is used multiple times. n PS gates are used to construct precise search operators, which in turn form the quantum circuits of the algorithm. This often results in the quantum computer being unable to directly run the corresponding quantum circuits of the algorithm.

[0072] The method proposed by the present invention is used to transform all the quantum circuits of the three-dimensional rotation method into The gate is decomposed into a combination of PS gates and CNOT gates, so that the decomposed circuit is completely composed of single-qubit gates and CNOT gates, which is closer to the quantum gate set supported by quantum computers and is more conducive to executing the precise Grover algorithm based on three-dimensional rotation on quantum computers.

[0073] In the exact Grover algorithm based on three-dimensional rotation, if the unordered database contains 2 4 data, and search for 2 target data among them, then the quantum circuit constructed by the algorithm will contain 4 quantum bits, which are recorded as q 0 ,q 1 ,q 2 ,q 3 ; The line will use several C 3 PS(θ) gate (the phase angle can be calculated according to the three-dimensional rotation method ), the target bit of this type of gate is the same qubit, and the remaining three qubits are control bits. q 0 ,q 1 ,q 2 This is the control bit of this type of door. q 3 The method proposed by the present invention is used to 3 The PS(θ) gate is decomposed. For specific steps, refer to Figure 9 For this application embodiment, first, in step S1, the initial value of parameter i is set to 1 and the maximum value is set to 3, that is, 1≤i≤3. Parameter i points to the action position of the PS gate to be applied. q i , and also points to the target position of the CNOT gate to be applied q i The initial value of parameter j is 0, 0≤j≤7, that is, 2 3 -1=7, parameter j indicates that it has been applied q i The number of PS gates on the target bit is also indicated. q i The number of CNOT gates; the initial value of parameter k is 1, 1≤k≤3, parameter k is used to calculate q i Then in step S2, the control bit ik of the j+1th CNOT gate is q 0 Apply a PS (θ / 2 3 )Door.

[0074] Loop through steps 3 to 10, traversing the cases of i=1, 2, and 3 respectively, that is, the quantum bits are sequentially q 1 ,q 2 ,q 3 Apply a quantum gate on i; traverse j = 0, 1, ..., 2 for each value of i i -1, that is, the total number of quantum bits q i Apply 2 i PS gates and 2 i CNOT gates; in each case of j, it traverses the case of k = 1, 2, ..., i, that is, it checks the quantum bits in turn q i-1 ,q i-2 ,……,q 0Whether it is the control bit of the corresponding CNOT gate, and judging the application status of the PS gate and the CNOT gate according to the relational expression 3-1 in step S6.

[0075] In this application embodiment, the initial values i=1, j=0, and k=1 are set. The changes of i, j, and k during the entire traversal process, the establishment of the relationship (3-1), and the application of the PS gate and the CNOT gate are shown in the following Table 1 (the table omits the cases where the regular equation does not hold, that is, the cases where the PS gate and the CNOT gate do not need to be added): Table 1:

[0076] According to the data in Table 1 and Figure 9 The complete decomposition circuit obtained by the construction method process shown is as follows Figure 10 As shown, Figure 10 This is a schematic diagram of a decomposed quantum circuit constructed according to an application embodiment of the present application. Figure 10 In the equation, “+” represents the parameter value θ / 2 3 , “-” indicates the parameter value -θ / 2 3 .

[0077] This method successfully converted a C 3 The PS(θ) gate is decomposed into 2 3+2 -3=29 combinations of PS gates and CNOT gates. If all C 3 If the PS(θ) gates are decomposed as above, the decomposed circuits will consist only of single-qubit gates and CNOT gates, making them easier to run on quantum computers. This will help promote the use of quantum computers in solving practical application problems such as disordered database search.

[0078] In another aspect, the present invention also provides a decomposition device for a controlled phase shift gate, see Figure 11 , Figure 11 This is a principle block diagram of a decomposition device for a controlled phase-shift gate according to an embodiment of the present application. The decomposition device for a controlled phase-shift gate provided in this embodiment (hereinafter referred to as the decomposition device) 100 includes a controlled phase-shift gate acquisition unit 110 and a controlled phase-shift gate decomposition unit 120. The controlled phase-shift gate acquisition unit 110 is configured to acquire a controlled phase-shift gate to be decomposed, wherein the controlled phase-shift gate has n control bits and 1 target bit; the controlled phase-shift gate decomposition unit 120 is configured to decompose the controlled phase-shift gate into a plurality of single-qubit PS gates and a plurality of two-qubit CNOT gates applied to a quantum circuit, wherein the quantum circuit has n+1 qubits q0, q1, ..., q n , and quantum bits q0, q1, ..., q n-1The n control bits of the controlled phase-shift gate correspond to the quantum bit q n Corresponding to the target bit of the controlled phase shift gate.

[0079] Figure 12 This is a block diagram of the principle of a controlled phase shift gate decomposition unit according to an embodiment of the present application. The controlled phase shift gate decomposition unit 120 provided in this embodiment includes: a first decomposition unit 121, a second decomposition unit 122, and a phase parameter configuration unit 123. The first decomposition unit 121 is configured to apply a single-qubit PS gate on the qubit q0; the second decomposition unit 122 is configured to apply a single-qubit PS gate on the qubit q0; i On, i∈{1,2,……,n}, alternately apply 2 i single-qubit PS gates and 2 i A two-qubit CNOT gate, where the 2 i The phase parameters of the single-qubit PS gate are set alternately positive and negative. i The target bits of the two-qubit CNOT gate are placed on the qubit q i Above, 2 i The control bits of the two-qubit CNOT gate are recursively arranged on the qubits q0, q1, ..., q i-1 The phase parameter configuration unit 123 is configured to configure the phase parameter of each single-qubit PS gate to θ / 2 n , where θ is the phase parameter of the controlled phase-shift gate.

[0080] The second decomposition unit 122 includes an initial arrangement unit 1221 and a recursive arrangement unit 1222. The initial arrangement unit 1221 is configured to apply 2 1 The control bits of the two-qubit CNOT gates are all arranged on qubit q0; the recursive arrangement unit 1222 is configured to, when i ≥ 2, i 2 applied on i The control bits of the two-qubit CNOT gates are sequentially arranged on the qubits included in Sequence (i) determined based on the following formula: Sequence(i) = Insert(q i-1 , Sequence(i-1)); Among them, Sequence(i-1) represents the sequence of the quantum bit q. i-1 2 applied on i-1 The control bits of the two-qubit CNOT gates are arranged in sequence. Sequence(i) represents the sequence of qubits in qubit q. i 2 applied on iInsert is used to insert a quantum bit q before each quantum bit included in the sequence represented by Sequence(i-1). i-1 To determine the quantum bits included in the sequence represented by Sequence(i).

[0081] The controlled quantum phase-shift gate decomposition method and device provided in the present application can be applied to controlled phase-shift gates with any number of control bits. There is no need to perform different decomposition steps for different numbers of control bits, which simplifies the decomposition complexity during application and is easier to physically implement.

[0082] The final decomposition result only contains single-qubit gates and CNOT gates. No secondary decomposition is required during the actual operation of the quantum computer, making it easier to implement the gates on the quantum computer. Quantum algorithms for gates.

[0083] In the existing decomposition method, C n The PS gate is decomposed into a combination of a CPS gate (a PS gate with a control bit) and a CNOT gate. However, quantum computers often do not directly support CPS gates, so they still need to be further decomposed. Finally, the CPS gate will be n PS gate decomposes into 3•2 n+1 -7 PS gates and CNOT gates. This application will use the same C n PS gate decomposed into 2 n+2 - A combination of 3 PS gates and CNOT gates, which reduces the number of gates by 2 compared to the existing methods. n+1 -4 quantum gates, achieving exponential optimization of the number of quantum gates.

[0084] In another aspect, the present application also provides a computing device, see Figure 13 , Figure 13 This is a block diagram of the structural principle of a computing device according to an embodiment of the present application. Figure 13 As shown, the computing device includes a processor 601 and a memory 602 storing computer program instructions; when the processor 601 executes the computer program instructions, the decomposition method for the controlled quantum phase-shift gate in the above embodiment is implemented.

[0085] Specifically, processor 601 may include a central processing unit (CPU) or a graphics processing unit (GPU), or an application-specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application. Memory 602 may include storage for data or instructions. For example, memory 602 may be at least one of the following: a hard disk drive (HDD), read-only memory (ROM), random access memory (RAM), a floppy disk drive, flash memory, an optical disk, a magneto-optical disk, a magnetic tape, a universal serial bus (USB) drive, or other physical / tangible memory storage device. For another example, memory 602 may include removable or non-removable (or fixed) media. For another example, memory 602 may be internal or external to the integrated gateway disaster recovery device. Memory 602 may be non-volatile solid-state memory. In other words, the memory 602 typically includes a tangible (non-transitory) computer-readable storage medium (such as a memory device) encoded with executable instructions, wherein when the stored executable instructions are executed by the processor 601 (such as executed by one or more processors), the decomposition method for the controlled quantum phase-shift gate in the embodiment of the present application can be implemented.

[0086] In one example, Figure 13 The electronic device shown may also include a communication interface 603 and a bus 610. The processor 601, memory 602, and communication interface 603 are connected and communicate with each other via the bus 610. The communication interface 603 is primarily used to enable communication between modules, devices, units, and / or devices in the electronic device.

[0087] Bus 610, which includes hardware, software, or both, couples the components of the online data traffic metering device to one another. For example, the bus may include at least one of the following: an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industrial Standard Architecture (EISA) bus, a Front Side Bus (FSB), a HyperTransport (HT) interconnect, an Industrial Standard Architecture (ISA) bus, an InfiniBand interconnect, a Low Pin Count (LPC) bus, a memory bus, a Micro Channel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Eipress (PCI-I) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local Area Network (VLB) bus, or other suitable bus. Bus 610 may include one or more buses. Although the present embodiments describe or illustrate specific buses, the present embodiments contemplate any suitable bus or interconnection.

[0088] In another aspect, embodiments of the present application further provide a computer-readable storage medium storing computer program instructions that, when executed by a processor, implement the aforementioned decomposition method for a controlled quantum phase-shift gate. The computer-readable storage medium may be, for example, a classical computer-readable storage medium, such as a read-only memory (ROM), random access memory (RAM), a disk storage medium device, an optical storage medium device, a flash memory device, or an electrical, optical, or other physical / tangible memory storage device. It may also be a storage medium for storing quantum information and readable by a quantum computer, such as quantum random access memory (QRAM). QRAM can be considered a quantum version of RAM in classical computers. QRAM can create quantum superposition states containing information. Compared to RAM, which requires reading data individually, QRAM can read superimposed data using superimposed addresses. QRAM can be implemented in physical forms such as optics, semiconductor quantum dots, superconducting circuits, and ion traps.

[0089] The flowcharts and / or block diagrams of the methods and systems of the embodiments of the present application are described above by way of example, and various aspects thereof are described. It should be understood that each box in the flowchart and / or block diagram, or a combination thereof, can be implemented by computer program instructions, or by dedicated hardware that performs a specified function or action, or by a combination of dedicated hardware and computer instructions. For example, these computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to form a machine that enables these instructions executed by such a processor to enable the implementation of the functions / actions specified in each box in the flowchart and / or block diagram, or a combination thereof. Such a processor can be a general-purpose processor, a special-purpose processor, a special application processor, or a field programmable logic circuit.

[0090] The functional blocks shown in the structural block diagrams of the embodiments of the present application can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, they can be, for example, electronic circuits, application-specific integrated circuits (ASICs), appropriate firmware, plug-ins, function cards, etc.; when implemented in software, they are programs or code segments used to perform the required tasks. The programs or code segments can be stored in a memory or transmitted over a transmission medium or communication link via a data signal carried in a carrier wave. The code segments can be downloaded via a computer network such as the Internet or an intranet.

[0091] The above embodiments are only used to illustrate the present application and are not intended to limit the present application. Ordinary technicians in the relevant technical field can make various changes and modifications without departing from the scope of the present application. Therefore, all equivalent technical solutions should also fall within the scope disclosed in the present application.

Claims

1. A decomposition method for a controlled phase-shift gate, characterized in that: include: Obtaining a controlled phase-shift gate to be decomposed, wherein the controlled phase-shift gate has n control bits and 1 target bit; The controlled phase-shift gate is decomposed into a plurality of single-qubit PS gates and a plurality of double-qubit CNOT gates applied to a quantum circuit, wherein the quantum circuit has n+1 qubits q0, q1, ..., q n , and quantum bits q0, q1, ..., q n-1 The n control bits of the controlled phase-shift gate correspond to the quantum bit q n Corresponding to the target bit of the controlled phase-shift gate, wherein the decomposition includes: On quantum bit q0, a single-qubit PS gate is applied; In the quantum bit q i On, i∈{1,2,……,n}, alternately apply 2 i single-qubit PS gates and 2 i A two-qubit CNOT gate, where the 2 i The phase parameters of the single-qubit PS gate are set alternately positive and negative. i The target bits of the two-qubit CNOT gate are placed on the qubit q i Above, 2 i The control bits of the two-qubit CNOT gate are recursively arranged on the qubits q0, q1, ..., q i-1 superior.

2. The decomposition method according to claim 1, characterized in that Said 2 i The control bits of the two-qubit CNOT gate are recursively arranged on the qubits q0, q1, ..., q i-1 Above, including: When i=1, the 2 applied to the quantum bit q1 1 The control bits of each two-qubit CNOT gate are placed on qubit q0; When i≥2, in the quantum bit q i 2 applied on i The control bits of the two-qubit CNOT gates are sequentially arranged on the qubits included in Sequence (i) determined based on the following formula: Sequence(i) = Insert(q i-1 , Sequence(i-1)); Among them, Sequence(i-1) represents the sequence of the quantum bit q. i-1 2 applied on i-1 The control bits of the two-qubit CNOT gates are arranged in sequence. Sequence(i) represents the sequence of qubits in qubit q. i 2 applied on i Insert is used to insert a quantum bit q before each quantum bit included in the sequence represented by Sequence(i-1). i-1 To determine the quantum bits included in the sequence represented by Sequence(i).

3. The decomposition method according to claim 1, characterized in that The decomposition also includes: The phase parameter of each single-qubit PS gate is configured to be θ / 2 n , where θ is the phase parameter of the controlled phase-shift gate.

4. A decomposition device for a controlled phase-shift gate, characterized in that: include: a controlled phase-shift gate acquisition unit, configured to acquire a controlled phase-shift gate to be decomposed, wherein the controlled phase-shift gate has n control bits and 1 target bit; A controlled phase-shift gate decomposition unit is configured to decompose the controlled phase-shift gate into a plurality of single-qubit PS gates and a plurality of double-qubit CNOT gates applied to a quantum circuit, wherein the quantum circuit has n+1 qubits q0, q1, ..., q n , and quantum bits q0, q1, ..., q n-1 The n control bits of the controlled phase-shift gate correspond to the quantum bit q n Corresponding to the target position of the controlled phase shift gate, wherein the controlled phase shift gate decomposition unit includes: A first decomposition unit is configured to apply a single-qubit PS gate on qubit q0; The second decomposition unit is configured to i On, i∈{1,2,……,n}, alternately apply 2 i single-qubit PS gates and 2 i A two-qubit CNOT gate, where the 2 i The phase parameters of the single-qubit PS gate are set alternately positive and negative. i The target bits of the two-qubit CNOT gate are placed on the qubit q i Above, 2 i The control bits of the two-qubit CNOT gate are recursively arranged on the qubits q0, q1, ..., q i-1 superior.

5. The disassembly device according to claim 4, characterized in that: The second decomposition unit includes: The initial arrangement unit is configured to apply 2 on the quantum bit q1 when i=1 1 The control bits of each two-qubit CNOT gate are placed on qubit q0; The recursive arrangement unit is configured to be in the quantum bit q when i ≥ 2 i 2 applied on i The control bits of the two-qubit CNOT gates are sequentially arranged on the qubits included in Sequence (i) determined based on the following formula: Sequence(i) = Insert(q i-1 , Sequence(i-1)); Among them, Sequence(i-1) represents the sequence of the quantum bit q. i-1 2 applied on i-1 The control bits of the two-qubit CNOT gates are arranged in sequence. Sequence(i) represents the sequence of qubits in qubit q. i 2 applied on i Insert is used to insert a quantum bit q before each quantum bit included in the sequence represented by Sequence(i-1). i-1 To determine the quantum bits included in the sequence represented by Sequence(i).

6. The disassembly device according to claim 4, characterized in that: The controlled phase-shift gate decomposition unit further includes: A phase parameter configuration unit configured to configure the phase parameter of each single-qubit PS gate to θ / 2 n , where θ is the phase parameter of the controlled phase-shift gate.

7. A computing device, characterized in that include: processor; A memory storing a computer program, wherein when the computer program is executed by a processor, the decomposition method for a controlled phase-shift gate according to any one of claims 1 to 3 is implemented.

8. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and when the computer instructions are executed by a processor, the decomposition method for a controlled phase-shift gate according to any one of claims 1 to 3 is implemented.

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