A circuit board detection method and system based on machine vision

Abstract

The application provides a circuit board detection method and system based on machine vision, which comprises the following steps: obtaining an original visual data set of a circuit board to be detected, performing visual information optimization processing on the original visual data set to obtain a standardized image set with uniform illumination intensity and contrast, calling a pre-trained defect discrimination model to perform key feature recognition processing on the standardized image set to generate a potential defect feature set of the circuit board in the image, determining the defect type existing in the circuit board to be detected and the position distribution feature information of the defect in the image picture according to the potential defect feature set, generating a detection result report containing defect positioning coordinates based on the defect type and the position distribution feature information, and outputting the detection result report to a target display terminal to complete the detection process. The application improves the accuracy of defect recognition, and ensures the reliability of defect positioning by combining position marking information, thereby effectively improving the overall quality of the circuit board detection result.

Description

Technical Field

[0001] This invention relates to the fields of machine vision and defect detection technology, and in particular to a method and system for circuit board inspection based on machine vision. Background Technology

[0002] With the development of machine vision technology, machine vision-based circuit board inspection technology has been proposed. This technology utilizes image acquisition and analysis to identify potential defects (such as open circuits, short circuits, and cold solder joints) during circuit board manufacturing. Its core lies in achieving automatic defect detection through visual data processing and feature analysis, replacing traditional manual visual inspection or simple algorithm detection, thus improving inspection efficiency and reliability. Currently, common machine vision circuit board inspection methods typically use single-view image acquisition to obtain visual data of the circuit board. After simple preprocessing of the acquired images, defect identification is performed based on manually designed fixed features (such as edge detection and threshold segmentation), ultimately generating a detection result containing the defect location. However, this single-view data acquisition method easily misses defect information in complex circuit board structures (such as the front and back sides and edge areas). Simple preprocessing cannot eliminate differences in image lighting and contrast caused by different devices or angles. Manually designed feature methods struggle to capture deep defect features such as abnormal pad textures and broken traces, resulting in insufficient accuracy in defect identification and reliability in defect location, making it difficult to meet the inspection requirements of high-precision circuit board manufacturing. Summary of the Invention

[0003] In view of this, embodiments of the present invention provide a circuit board inspection method and system based on machine vision. The technical solution of the present invention is implemented as follows:

[0004] On one hand, embodiments of the present invention provide a circuit board inspection method based on machine vision, the method comprising:

[0005] Obtain the original visual data set of the circuit board to be inspected, which includes multiple sets of images with position markers acquired from multiple angles;

[0006] The original visual data set is subjected to visual information optimization processing to obtain a standardized image set with uniform illumination intensity and contrast.

[0007] The pre-trained defect discrimination model is invoked to perform key feature recognition processing on the standardized image set to generate a set of potential defect features of the circuit board in the image;

[0008] The types of defects present in the circuit board to be inspected and the location distribution characteristics of the defects in the image are determined based on the set of potential defect features.

[0009] Based on the defect type and the location distribution feature information, a detection result report containing the defect location coordinates is generated, and the detection result report is output to the target display terminal to complete the detection process.

[0010] On the other hand, the present invention provides a circuit board inspection system, including a memory and a processor, wherein the memory stores a computer program that can run on the processor, and the processor executes the program to implement the steps in the method described above.

[0011] This invention provides a machine vision-based circuit board inspection method. By acquiring raw visual data with location markers from multiple angles, it can cover the complex structure of the circuit board and avoid missing defect areas that may be missed by single-view acquisition. Visual information optimization processing of the raw data generates standardized images, eliminating image inconsistencies caused by differences in lighting and equipment parameters in multi-view acquisition, providing a stable input foundation for subsequent defect identification. A pre-trained defect discrimination model is invoked to identify key features of the standardized images, automatically extracting deep features related to defects using the model's self-learning capability, avoiding the limitations of traditional methods that rely on manually designed features. Based on the identified potential defect features, the defect type and location distribution characteristics are determined, and combined with the location marker information from the multi-view images, ensuring the accuracy of defect localization. An inspection result report containing location coordinates is generated based on the defect type and location distribution, structurally integrating the inspection information for easy subsequent analysis and processing. Through the synergistic effect of the above steps, this method utilizes the comprehensiveness of multi-view data during the inspection process, improves the accuracy of defect identification through optimization processing and model recognition, and ensures the reliability of defect localization by combining location marker information, thereby effectively improving the overall quality of circuit board inspection results.

[0012] It should be understood that the above general description and the following detailed description are merely exemplary and explanatory, and are not intended to limit the technical solutions of the present invention. Attached Figure Description

[0013] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present invention and, together with the specification, serve to explain the technical solutions of the present invention.

[0014] Figure 1 This is a schematic diagram illustrating the implementation process of a circuit board inspection method based on machine vision, provided in an embodiment of the present invention.

[0015] Figure 2 This is a schematic diagram of the hardware entity of a circuit board testing system provided in an embodiment of the present invention. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. The described embodiments should not be regarded as limitations on the present invention. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0017] This invention provides a machine vision-based circuit board inspection method, which can be executed by the processor of a circuit board inspection system. The circuit board inspection system can refer to a computer system on a production line or a back-end server in a smart factory, or other equipment with data processing capabilities.

[0018] Figure 1 This is a schematic diagram illustrating the implementation process of a machine vision-based circuit board inspection method according to an embodiment of the present invention, as shown below. Figure 1 As shown, the method includes:

[0019] Step S100: Obtain the original visual data set of the circuit board to be inspected. The original visual data set contains multiple sets of images with position markers acquired from multiple angles.

[0020] Multi-angle acquisition means capturing images of the circuit board from different perspectives. This allows for comprehensive information acquisition of all parts of the circuit board, avoiding potential occlusion or information loss issues caused by a single perspective. Position marking assigns positional information to each set of acquired images. This positional information can include the camera's pose parameters and optical distortion parameters during image acquisition. These parameters help accurately determine the physical location of each part in the image on the actual circuit board during subsequent image analysis and processing. For example, in practical applications, multiple cameras can be distributed at different angles of the circuit board to simultaneously acquire images. Each camera records its own position and pose information, such as camera coordinates and rotation angle, while acquiring images. This information is saved as position markers along with the acquired images, forming multiple sets of images with position markers, collectively constituting the original visual data set.

[0021] Step S200: Perform visual information optimization processing on the original visual data set to obtain a standardized image set with uniform illumination intensity and contrast.

[0022] Visual information optimization aims to eliminate various interference factors arising from different acquisition conditions in the original visual dataset, ensuring consistency in image brightness, contrast, and other aspects. This facilitates subsequent feature recognition and defect detection. Unified illumination intensity avoids the impact of uneven illumination caused by acquisition from different angles, resulting in more uniform brightness across different areas of the image. Unified contrast enhances the difference between the circuit board outline and the background, highlighting key features of the circuit board. A standardized image set, after optimization, possesses uniform illumination intensity and contrast. These images are more stable and consistent in quality and feature representation, improving the accuracy and reliability of subsequent detection.

[0023] As one implementation method, step S200 involves performing visual information optimization processing on the original visual data set to obtain a standardized image set with uniform illumination intensity and contrast. Specifically, this can be achieved through the following steps S210~S250:

[0024] Step S210: Perform illumination deviation correction processing on each group of images in the original visual data set. By adjusting the brightness value of the image pixels, the uneven illumination caused by different angle acquisition is eliminated, and an intermediate image set after illumination correction is obtained.

[0025] The purpose of illumination deviation correction is to address the uneven illumination caused by multi-angle acquisition in the original image. Images acquired from different angles may exhibit varying light directions and intensities, resulting in some areas being overexposed (overbright) and others underexposed (underexposed), which can affect the accurate identification of circuit board features. By adjusting the brightness values ​​of image pixels, the overall illumination intensity of the image can be made more uniform. The intermediate image set after illumination deviation correction is the set of images obtained after illumination deviation correction. These images have undergone preliminary optimization in terms of illumination, but further processing such as contrast enhancement and noise suppression is still needed. For example, in practice, for a set of circuit board images acquired from different angles, the upper left corner of one image may be overly bright due to direct sunlight, while the lower right corner may be underly dark due to being in shadow. Illumination deviation correction can appropriately reduce the pixel brightness in overly bright areas and appropriately increase the pixel brightness in underly dark areas, making the illumination of the entire image more uniform.

[0026] As one implementation method, step S210 involves performing illumination deviation correction processing on each group of images in the original visual data set. This process eliminates uneven illumination caused by different angle acquisition by adjusting the brightness values ​​of the image pixels, resulting in an intermediate image set after illumination correction. Specifically, this can be implemented through the following steps S211~S215:

[0027] Step S211: Calculate the global average value of pixel brightness values ​​in the image as the reference illumination intensity of the current image.

[0028] The global average pixel brightness value in an image is obtained by summing the brightness values ​​of all pixels in the image and then dividing by the total number of pixels. This average value can be used as the reference illumination intensity for the current image, used to determine whether different areas of the image are overexposed or underexposed. For example, for a 100×100 resolution circuit board image, the brightness value of each pixel ranges from 0 to 255. Summing the brightness values ​​of these 10,000 pixels and then dividing by 10,000 gives the reference illumination intensity of the image.

[0029] Step S212: Extract overexposed areas in the image where the brightness value is higher than the reference light intensity and underexposed areas where the brightness value is lower than the reference light intensity.

[0030] Overexposed areas are regions in an image whose brightness values ​​exceed the reference light intensity. These areas typically suffer from lost image information and unclear details due to excessive light. Underexposed areas, on the other hand, are regions whose brightness values ​​are below the reference light intensity. These areas may appear too dark due to insufficient light, similarly affecting the recognition of features in the image. Extracting overexposed and underexposed areas provides a basis for subsequent brightness adjustments. For example, for a circuit board image with a calculated reference light intensity of 120, we can iterate through each pixel of the image, marking pixels with brightness values ​​greater than 120 as overexposed pixels and pixels with brightness values ​​less than 120 as underexposed pixels. This process can be achieved using image processing algorithms (such as thresholding algorithms), which divide the image into overexposed and underexposed areas by setting the reference light intensity as a threshold.

[0031] Step S213: Perform linear attenuation processing on the pixel brightness values ​​of the overexposed areas to adjust the brightness values ​​to the preset range of the reference illumination intensity.

[0032] Linear attenuation processing linearly reduces the brightness value of pixels in overexposed areas, gradually bringing their brightness closer to the reference illumination intensity. The preset range refers to a reasonable range set near the reference illumination intensity, such as ±10 from the reference illumination intensity. Adjusting the brightness value of pixels in overexposed areas to this preset range avoids excessive brightness in those areas while maintaining overall image brightness balance. For example, for a pixel with a brightness value of 200 in an overexposed area, assuming a reference illumination intensity of 120, the preset range is 110-130. The linear attenuation formula can be used: New brightness value = Reference illumination intensity + (Original brightness value - Reference illumination intensity) × Attenuation coefficient, where the attenuation coefficient can be adjusted according to the actual situation, allowing the pixel's brightness value to gradually decrease to the preset range.

[0033] Step S214: Perform linear enhancement processing on the pixel brightness values ​​of the underexposed areas to increase the brightness values ​​to the preset range of the reference illumination intensity.

[0034] Linear enhancement, similar to linear attenuation, linearly increases the brightness value of pixels in underexposed areas, gradually bringing their brightness closer to the reference illumination intensity. By increasing the brightness value of pixels in underexposed areas to a preset range, image information in these areas can be enhanced, making details more visible. For example, for a pixel with a brightness value of 50 in an underexposed area, assuming a reference illumination intensity of 120 and a preset range of 110-130, the linear enhancement formula can be used: New brightness value = Reference illumination intensity - (Reference illumination intensity - Original brightness value) × Enhancement coefficient, where the enhancement coefficient is adjusted according to the actual situation to gradually increase the brightness value of the pixel to the preset range.

[0035] Step S215: Perform brightness smoothing on the processed image to eliminate the brightness abrupt boundary between overexposed and underexposed areas, and generate an intermediate image set after illumination correction.

[0036] Brightness smoothing is used to avoid abrupt brightness changes between overexposed and underexposed areas during brightness adjustment. Such abrupt changes can negatively impact the overall visual quality of the image and subsequent feature recognition. Brightness smoothing makes the brightness transitions in an image more natural and continuous. For example, Gaussian filtering can be used to smooth the processed image. Gaussian filtering is a linear smoothing filter that smooths the image by weighted averaging of each pixel and its neighboring pixels. In practical applications, by selecting an appropriate Gaussian kernel size and standard deviation, filtering is applied to the brightness-adjusted image to eliminate brightness abrupt changes and generate an intermediate image set after illumination correction.

[0037] Step S220: Perform contrast enhancement processing on the intermediate image set after illumination correction. Based on the dynamic range expansion technology of the image grayscale histogram, improve the contrast difference between the circuit board outline and the background area in the image to obtain a transition image set with enhanced contrast.

[0038] Contrast enhancement is used to highlight the outline and key features of a circuit board in an image, making them more distinct from the background. An image grayscale histogram is a statistical chart representing the distribution of gray levels in an image, showing the number of pixels at each gray level. Dynamic range expansion (DLA) technology adjusts the image grayscale histogram to expand the range of gray values, thereby enhancing image contrast. A contrast-enhanced transition image set is a set of images obtained after contrast enhancement processing. These images show a significant improvement in contrast, providing a better foundation for subsequent noise suppression and feature recognition. For example, for a set of illumination-corrected circuit board images, the grayscale histogram might show gray values ​​concentrated in a narrow range, resulting in low image contrast. DLA expands the grayscale range from this narrow range to a wider range, making the grayscale difference between the circuit board outline and the background more pronounced. DLA can be implemented using histogram equalization algorithms, which redistribute the image's grayscale histogram to make the number of pixels at each gray level more uniform, thus enhancing image contrast.

[0039] Step S230: Perform noise suppression processing on the contrast-enhanced transition image set. Use a non-local mean filtering algorithm to reduce random noise interference in the image, preserve the edge detail information of the key structure of the circuit board, and obtain an optimized image set with noise suppression.

[0040] Noise suppression aims to remove random noise interference from images. This noise may be caused by factors such as camera sensor noise and ambient light interference, affecting the accurate identification of circuit board features. Nonlocal mean filtering (NMR) is a patch-based filtering algorithm that removes noise by finding other pixel patches similar to the current pixel patch and then averaging the pixel values ​​of these similar patches. The advantage of this algorithm is that it can better preserve edge details while removing noise, avoiding edge blurring problems that may occur with traditional filtering algorithms. The optimized image set for noise suppression is the set of images obtained after noise suppression processing. The noise in these images is effectively reduced, while the edge details of key circuit board structures are preserved, providing clearer image data for subsequent feature recognition and defect detection. For example, a contrast-enhanced circuit board image may contain some random salt-and-pepper noise. Using NMR, an appropriate search window and matching window size are first selected. Then, other pixel patches similar to the current pixel patch are found within the search window, their similarity is calculated, and a weighted average is performed to obtain the new value of the pixel. By performing this process on each pixel of the image, noise in the image is removed, resulting in an optimized image set with noise suppression.

[0041] Step S240: Perform size normalization processing on the optimized image set for noise suppression, adjust images from different acquisition angles to the same pixel size, ensure the spatial dimension consistency of subsequent feature recognition, and obtain a standard image set with normalized size.

[0042] Size normalization is used to eliminate pixel size differences between images acquired from different angles, ensuring all images have the same spatial dimension. Since images acquired from different angles may have different resolutions and sizes, this can complicate subsequent feature recognition. Size normalization adjusts all images to the same pixel size, guaranteeing that features from different images have the same spatial dimension during feature recognition, facilitating comparison and analysis. A standard image set for size normalization is a set of images obtained after size normalization, exhibiting consistent pixel size and providing unified input data for subsequent feature recognition and defect detection. For example, consider a set of circuit board images acquired from different angles, one with a resolution of 800×600 and another with a resolution of 1000×800. A unified target size, such as 900×700, can be chosen, and image scaling algorithms (such as bilinear interpolation) can be used to resize both images to 900×700.

[0043] Step S250: Input the size-normalized standard image set into the color space conversion module for color correction processing, unify the color representation space of the image, eliminate color deviation caused by device acquisition, and generate a standardized image set with uniform illumination intensity and contrast.

[0044] Color correction is performed to eliminate color deviations that may occur when images are captured by different devices, ensuring consistency in color representation across all images. The color space conversion module is a tool for implementing color correction, converting images from one color space to another and adjusting their colors according to a preset standard. A unified color representation space ensures comparability between different images, preventing color deviations from affecting the identification of circuit board color features. A standardized image set with uniform illumination intensity and contrast is the final image set obtained after color correction. These images are consistent in illumination intensity, contrast, and color representation, providing high-quality image data for subsequent defect identification and classification. For example, different cameras may capture circuit board images with color deviations due to differences in sensors, white balance settings, and other factors. The color space conversion module converts the size-normalized standard image set from the current color space (such as RGB) to a unified color space and adjusts the colors according to a preset standard color chart, eliminating color deviations.

[0045] In one implementation method, step S250 involves inputting a set of size-normalized standard images into a color space conversion module for color correction processing. This unifies the color representation space of the images, eliminates color deviations caused by device acquisition, and generates a standardized image set with uniform illumination intensity and contrast. Specifically, this can be achieved through the following steps S251~S256:

[0046] Step S251: Extract the color features of a preset reference region from a set of standard images with normalized dimensions. The reference region is a fixed marker point of known color on the circuit board.

[0047] A preset reference region refers to a fixed marker with a known color pre-defined on a circuit board. These markers can be patterns, markings, etc., on the board. Extracting the color features of the preset reference region is to determine the actual color of that region in the image, allowing for comparison and correction with a standard color chart. Color features can include information such as the RGB values, chromaticity, and brightness of the color. For example, a circular marker on the circuit board can be selected as the preset reference region. The color of this marker is known in the design (e.g., red, with an RGB value of 255,0,0). Using image processing algorithms, this circular marker is located in a set of size-normalized standard images, and its color features are extracted. Image segmentation algorithms can be used to segment this reference region from the image, and then the average RGB values ​​of all pixels within that region are calculated as the color feature of the reference region.

[0048] Step S252: Call the reference color card matching unit of the color space conversion module to obtain the standard color card sample corresponding to the color characteristics of the reference area. The standard color card sample contains reference color values ​​that are consistent with the colors of the fixed marking points on the circuit board.

[0049] The reference color chart matching unit is a crucial component of the color space conversion module, used to store and match standard color chart samples. A standard color chart sample is a series of samples with known colors, containing reference color values ​​consistent with the colors of fixed marking points on the circuit board. By invoking the reference color chart matching unit, the extracted reference region color features are compared with the standard color chart samples to find the best-matching sample. For example, for an extracted reference region color feature (RGB value 252,3,2), the reference color chart matching unit will search its stored standard color chart samples for the closest match. Assuming a standard color chart sample with a reference color value of 255,0,0 is found, this sample corresponds to the reference region color feature. In practical implementation, a color distance calculation algorithm (such as the Euclidean distance algorithm) can be used to measure the similarity between the reference region color feature and the reference color value of the standard color chart sample, selecting the sample with the smallest distance as the matching result.

[0050] Step S253: Calculate the color difference vector between the color features of the reference region in the standard image set and the reference color value of the standard color card sample. The color difference vector includes the brightness difference and chromaticity difference of the RGB three channels.

[0051] A color difference vector is a vector used to describe the difference between the color characteristics of a reference area and the reference color values ​​of a standard color chart sample. It contains the luminance difference and chrominance difference of the RGB three channels. The luminance difference reflects the difference in brightness between two colors, while the chrominance difference reflects the difference in hue and saturation. Calculating the color difference vector can provide a basis for subsequent color adjustments. The chrominance difference can be obtained by converting RGB values ​​to other color spaces (such as the HSV color space) and then calculating the difference in hue and saturation. In actual calculations, color space conversion formulas can be used to convert RGB values ​​to HSV values ​​and then calculate the corresponding differences.

[0052] Step S254: Perform linear adjustment processing on the full-image color of the standard image set based on the color difference vector, subtract the brightness difference of the corresponding channel from the RGB value of each pixel and correct the chromaticity difference, so that the color features of the reference area are consistent with the reference color values ​​of the standard color card sample.

[0053] Linear adjustment processing adjusts the RGB values ​​of each pixel in a standard image set based on the calculated color difference vector to eliminate color deviation. Subtracting the corresponding channel's brightness difference from the RGB value of each pixel makes the overall brightness of the image closer to the brightness of the standard color chart sample. Correcting the chromaticity difference makes the image's colors more accurate in hue and saturation. For example, for a pixel in the standard image set with RGB values ​​of (200, 100, 50), and RGB channel brightness differences of -3, 3, and 2 respectively, the adjusted RGB value is (200 - (-3), 100 - 3, 50 - 2) = (203, 97, 48). Simultaneously, the color of this pixel is further corrected based on the chromaticity difference to make it closer to the color of the standard color chart sample. In practical adjustment, a linear transformation formula can be used to calculate the RGB value of each pixel, combined with color space conversion and interpolation algorithms to correct the chromaticity difference.

[0054] Step S255: Perform color consistency verification processing on the adjusted image set, extract the color features of the same reference area in multiple sets of images, calculate the average difference between it and the reference color value of the standard color card sample, and if the average difference exceeds the preset tolerance, re-execute the color adjustment processing until the color consistency requirements are met.

[0055] Color consistency verification is a crucial step in ensuring color consistency across a set of color-adjusted images. By extracting color features from the same baseline regions across multiple image sets, the actual color state of these key areas after adjustment can be revealed. Calculating the average difference between this value and the reference color value of a standard color chart allows for a quantitative assessment of the color deviation across the entire image set. A preset tolerance is a pre-defined threshold used to determine if color consistency requirements have been met. If the average difference exceeds this threshold, the color adjustment has not yet achieved the desired effect, and the color adjustment process needs to be repeated to further eliminate color deviation. For example, for a set of color-adjusted circuit board images, select the same baseline region (such as a marker on the circuit board) and extract its color features. Compare these color features with the reference color value of a standard color chart, calculate the difference between the color features of each baseline region and the reference color value, and then average all differences to obtain the average difference. If the average difference exceeds a preset tolerance (e.g., 5%), the image set needs to be re-adjusted based on the color difference vector, and color consistency verification needs to be performed again until the average difference meets the preset tolerance requirement. In actual calculation of the average difference, color distance calculation methods (such as Euclidean distance) can be used to measure the difference between the color characteristics of each reference area and the reference color value of the standard color card sample. Then, all the difference values ​​are added together and divided by the number of reference areas to obtain the average difference.

[0056] Step S256: Output the set of images that have passed the color consistency verification as a standardized set of images with uniform illumination intensity and contrast.

[0057] When the average difference of the image set meets the preset tolerance requirement after color consistency verification, it indicates that the image set has achieved color consistency. Furthermore, since the illumination intensity and contrast have already been optimized, the image set now possesses a unified illumination intensity, contrast, and color representation space. Outputting this as a standardized image set with unified illumination intensity and contrast provides high-quality, consistent image data for subsequent defect identification and classification. For example, after completing color consistency verification and confirming that the average difference between the baseline color of each image in the set and the reference color value of the standard color chart sample is within the preset tolerance range, the image set is saved in a specified file format (such as JPEG, PNG, etc.) and marked as a standardized image set for use in subsequent steps.

[0058] Step S300: Call the pre-trained defect discrimination model to perform key feature recognition processing on the standardized image set to generate a set of potential defect features of the circuit board in the image.

[0059] The pre-trained defect discrimination model is a model trained on a large amount of training data, capable of identifying potential defect features on circuit boards from images. Key feature recognition processing is the model's main function; it analyzes and processes a standardized image set to identify key features related to circuit board defects. The potential defect feature set is a collection of features identified by the model that may indicate defects. These features require further analysis and verification to determine if they are genuine defects. For example, in practical applications, a convolutional neural network (CNN) can be used as the pre-trained defect discrimination model. This model is trained using a large number of circuit board images containing various defect types, learning the feature patterns corresponding to different defect types. When a standardized image set is input into the model, it performs convolution, pooling, and other operations to extract image features, then classifies and discriminates them through fully connected layers to identify potentially defective regions and generate the potential defect feature set.

[0060] As one implementation method, step S300 involves calling a pre-trained defect discrimination model to perform key feature recognition processing on the standardized image set, generating a set of potential defect features of the circuit board in the image. Specifically, this can be implemented as follows: steps S310~S350:

[0061] Step S310: Input the standardized image set into the feature extraction layer of the defect discrimination model, and perform hierarchical abstraction processing on the pixel information of the image through a convolutional neural network to generate a basic feature set containing circuit board texture features and structural features.

[0062] The feature extraction layer is a crucial component of defect detection models, its primary function being to extract useful feature information from the input image. Convolutional Neural Networks (CNNs) are deep learning models specifically designed for processing image data. They perform hierarchical abstraction of pixel information through operations such as convolutional layers and pooling layers. Hierarchical abstraction refers to starting from the raw pixel information of the image and progressively extracting higher-level, more abstract features. The basic feature set is the feature set obtained after processing by the feature extraction layer, containing both texture and structural features of the circuit board. Texture features reflect the surface texture of the circuit board, such as the thickness and spacing of lines; structural features reflect the overall structure and layout of the circuit board, such as the location of solder pads and the direction of traces. For example, in a CNN-based defect detection model, the feature extraction layer contains multiple convolutional and pooling layers. When a standardized image set is input into this layer, the first convolutional layer uses a set of kernels to perform convolution operations with the image, extracting low-level features such as edges and corners. Then, the pooling layer downsamples these features, reducing the number of features and the computational cost. Subsequent convolutional layers will further extract higher-level features based on the lower-level features, ultimately generating a basic feature set that includes circuit board texture features and structural features.

[0063] Step S320: Use the attention mechanism module of the defect discrimination model to evaluate the importance of the basic feature set, focus on the feature information of key areas such as circuit board pads and traces, suppress redundant features in the background area, and obtain an attention-enhanced key feature set.

[0064] The attention mechanism module is designed to enhance the model's focus on features in key regions. In circuit board images, areas such as pads and traces are critical regions prone to defects, while background features contribute less to defect identification and are considered redundant. Importance assessment is performed by the attention mechanism module to evaluate each feature in the basic feature set, determining its importance for defect identification. Focusing on the features of key regions allows the model to pay more attention to these potentially defective areas, improving defect identification accuracy. Suppressing redundant features in the background reduces unnecessary computation and interference, improving model efficiency. The attention-enhanced key feature set is the feature set obtained after processing by the attention mechanism module, where the feature information of key regions is enhanced, and redundant features in the background are suppressed. For example, in a defect discrimination model, the attention mechanism module can employ an attention weight-based method. First, an attention weight is calculated for each feature in the basic feature set, representing the feature's importance for defect identification. Then, the attention weights are multiplied element-wise with the basic feature set, enhancing the response of important features and suppressing the response of unimportant features. Finally, the attention-enhanced key feature set is obtained.

[0065] As one implementation method, step S320 utilizes the attention mechanism module of the defect discrimination model to perform importance assessment processing on the basic feature set, focusing on the feature information of key areas such as circuit board pads and traces, suppressing redundant features in the background area, and obtaining an attention-enhanced key feature set. Specifically, this can be implemented as the following steps S321~S325:

[0066] Step S321: Calculate the feature activation values ​​for the texture features and structural features in the basic feature set respectively. The feature activation value represents the degree of contribution of the feature to defect identification.

[0067] Feature activation values ​​are metrics used to measure the importance of each feature in defect identification. Calculating the activation values ​​of texture and structural features in the basic feature set separately allows for a more accurate assessment of each feature's contribution. For example, for texture features, the activation value can be determined by calculating their similarity to known defect texture features. Higher similarity indicates a greater contribution to defect identification, resulting in a higher activation value. For structural features, activation values ​​can be calculated based on their location and shape in critical areas of the circuit board (such as pads and traces). Structural features located in critical areas and exhibiting unusual shapes tend to have higher activation values. In practical calculations, machine learning algorithms (such as support vector machines and logistic regression) can be used to classify and evaluate features, obtaining the activation value for each feature.

[0068] Step S322: Generate a feature importance weight map based on the feature activation values. The high activation value regions in the weight map correspond to the feature positions of the key structures of the circuit board.

[0069] Feature importance weighting maps are visualization tools that represent the importance of each feature using color or grayscale values. Regions with high activation values ​​are represented by darker colors or higher grayscale values ​​in the weighting map; these regions correspond to key structural features on the circuit board, such as pads and traces. Generating feature importance weighting maps based on feature activation values ​​visually demonstrates which regions are more important for defect identification. For example, calculated feature activation values ​​can be normalized to the range of 0-1, and then used as the pixel values ​​for the corresponding positions in the weighting map. Thus, features with high activation values ​​will appear as brighter areas in the weighting map, while features with low activation values ​​will appear as darker areas. By observing the weighting map, the location of key structural features on the circuit board can be quickly determined.

[0070] Step S323: Multiply the feature importance weight map element-wise with the basic feature set to enhance the feature response of high activation value regions and suppress the feature response of low activation value regions.

[0071] Multiplying the feature importance weight map element-wise with the basic feature set allows for adjustment of the basic feature set based on feature importance. Features in high-activation regions, which have larger weights in the weight map, will have their feature responses enhanced after multiplication; conversely, features in low-activation regions, with smaller weights, will have their feature responses suppressed. This highlights the feature information of key regions and reduces interference from redundant features in the background. For example, multiplying a feature matrix from the basic feature set with the feature importance weight map at corresponding positions yields the adjusted feature matrix. In this process, the feature values ​​of key regions increase, while the feature values ​​of background regions decrease, thus achieving feature enhancement and suppression.

[0072] Step S324: Normalize the processed feature set to ensure that the distribution range of the feature values ​​is consistent with the model input requirements.

[0073] Normalization is a process that distributes the feature values ​​of the processed feature set within a suitable range to meet the requirements of the model input. Different models have different requirements for the range of input feature values. If the distribution range of feature values ​​is inconsistent, it may affect the model's performance and training effectiveness. Normalization unifies the feature values ​​to a standard range, such as 0-1 or -1-1. For example, the min-max normalization method can be used. For each feature in the processed feature set, its minimum and maximum values ​​are calculated. Then, each feature value is subtracted from the minimum value, and divided by the difference between the maximum and minimum values ​​to obtain the normalized feature value. This ensures that the distribution range of the feature values ​​is consistent with the model input requirements, improving the model's stability and accuracy.

[0074] Step S325: Output the normalized feature set as the key feature set for attention enhancement.

[0075] Following the previous steps, the basic feature set has undergone feature activation value calculation, feature importance weight map generation, feature response adjustment, and normalization, resulting in a new feature set. In this new feature set, the feature information of key regions is enhanced, redundant features in background regions are suppressed, and the distribution range of feature values ​​is consistent with the model input requirements. This new feature set is used as the key feature set output for attention enhancement, providing more focused and effective feature data for subsequent defect detection and classification. For example, the normalized feature set can be saved in a specific data format (such as a NumPy array) and passed to subsequent modules of the model for further processing.

[0076] Step S330: Perform spatial location correlation analysis on the key feature set of attention enhancement through the feature correlation layer of the defect discrimination model, establish the feature correspondence relationship of the same circuit board area in different images, and generate a spatially consistent correlation feature set.

[0077] The feature association layer is a module in the defect discrimination model used to handle feature associations between different images. Spatial location association analysis is performed by analyzing the attention-enhanced key feature set to find the correspondence between features of the same circuit board area in different images. Since in actual inspection, images of the circuit board may be acquired from multiple angles, the features of the same circuit board area in these images may differ. By establishing feature correspondences, these features from different angles can be associated and fused to generate a spatially consistent associated feature set. A spatially consistent associated feature set can more accurately reflect the actual situation of the circuit board and improve the accuracy of defect detection. For example, in a system that uses multiple cameras to acquire circuit board images from different angles, the images acquired by each camera have undergone the previous processing to obtain an attention-enhanced key feature set. The feature association layer analyzes these feature sets to find the correspondence between features of the same circuit board area (such as a solder pad) in different images, and then fuses these features to generate a spatially consistent associated feature set.

[0078] As one implementation method, step S330 involves performing spatial location correlation analysis on the key feature set of attention enhancement through the feature correlation layer of the defect discrimination model, establishing feature correspondences for the same circuit board region in different images, and generating a spatially consistent correlation feature set. Specifically, this can be implemented as follows: steps S331~S336:

[0079] Step S331: Extract the key feature points of each image from the key feature set for attention enhancement. The key feature points are feature locations with unique spatial identifiers, such as pad edges and trace intersections on the circuit board.

[0080] Key feature points are points on a circuit board with unique spatial locations and characteristics, such as pad edges and trace intersections. These points can serve as reference points for feature correlation between different images. By extracting these key feature points, the location of the same circuit board region in different images can be determined. For example, for a circuit board image in an attention-enhanced key feature set, feature detection algorithms (such as SIFT and SURF) are used to extract key feature points from the image. These algorithms analyze local features of the image to identify points with unique characteristics, such as edges and corners. In circuit board images, pad edges and trace intersections usually have obvious features and are easily detected. These detected key feature points are recorded as key feature points of the image.

[0081] Step S332: Perform coordinate matching processing on the feature key points of different images, and establish a spatial transformation matrix for multi-view images based on the location marker information of image acquisition. The spatial transformation matrix is ​​used to convert the feature key point coordinates of any image into a unified global coordinate system coordinate.

[0082] Coordinate matching is used to find the correspondence between key feature points of the same circuit board region in different images. Based on the location marker information from image acquisition (such as camera pose parameters and optical distortion parameters), a spatial transformation matrix for multi-view images can be established. This matrix can convert the coordinates of key feature points in different images into a unified global coordinate system, allowing key feature points in different images to be compared and correlated in the same coordinate system. For example, for two circuit board images acquired from different perspectives, the correspondence between key feature points in the two images is first found using a feature matching algorithm (such as a descriptor-based matching algorithm). Then, based on the camera pose parameters and optical distortion parameters recorded during image acquisition, computer vision algorithms (such as perspective transformation and affine transformation) are used to calculate the spatial transformation matrix. This matrix can convert the coordinates of key feature points in one image into the corresponding global coordinate system coordinates in the other image.

[0083] Step S333: Use the spatial transformation matrix to map the coordinates of the feature key points of each image to the global coordinate system, and generate a global coordinate set containing feature key points from multiple perspectives.

[0084] By using a spatial transformation matrix to map the coordinates of key feature points in each image to the global coordinate system, key feature points from different perspectives can be unified under a single coordinate system, facilitating subsequent feature association and analysis. The global coordinate set containing key feature points from multiple perspectives is the coordinate set obtained after mapping the coordinates of key feature points from all images to the global coordinate system, containing key feature point information from circuit board images acquired from multiple perspectives. For example, for the key feature point coordinates of each image, a coordinate transformation is performed using the calculated spatial transformation matrix, converting them to coordinates in the global coordinate system. The transformed key feature point coordinates of all images are then combined to generate the global coordinate set containing key feature points from multiple perspectives.

[0085] Step S334: Perform similarity measurement processing on the feature key points in the global coordinate set, and calculate the cosine similarity of feature descriptors at the same global coordinate position in different images. The feature descriptor contains the texture gradient and structural orientation information of the feature key points.

[0086] Similarity measurement is used to evaluate the similarity between keypoints at the same global coordinate location in different images. Cosine similarity is a commonly used similarity metric, which measures the similarity between two vectors by calculating the cosine of the angle between them. Feature descriptors contain texture gradients and structural orientation information of keypoints, providing a more comprehensive description of their features. By calculating the cosine similarity of feature descriptors at the same global coordinate location in different images, it can be determined whether these keypoints belong to the same circuit board region. For example, for each global coordinate location in the global coordinate set, feature descriptors of the keypoints at that location are extracted from different images, and then the cosine similarity between these feature descriptors is calculated. The higher the cosine similarity, the more similar the keypoints are, and the more likely they are to belong to the same circuit board region.

[0087] Step S335: Mark the feature key points whose cosine similarity exceeds the preset matching threshold as the corresponding feature points of the same circuit board area, and establish a feature correspondence table between multi-view images.

[0088] The preset matching threshold is a pre-defined similarity threshold used to determine whether two key feature points belong to the same circuit board region. When the cosine similarity of two key feature points exceeds the preset matching threshold, they are considered to belong to the same circuit board region. Establishing a feature correspondence table between multi-view images can record the correspondence between key feature points of the same circuit board region in different images, providing a basis for subsequent feature fusion. For example, for the calculated cosine similarity, key feature points exceeding the preset matching threshold (e.g., 0.8) are marked as corresponding key feature points of the same circuit board region, and these correspondences are recorded in a table. Each row of the table records the coordinates of the key feature points of the same circuit board region in the two images and the corresponding image number.

[0089] Step S336: Based on the feature correspondence table, perform weighted fusion processing on the key feature sets of each image, and take the similarity weighted average of the multi-view features of the same circuit board area to generate a spatially consistent set of associated features.

[0090] Weighted fusion processing involves fusing multi-view features of the same circuit board region from different images based on a feature correspondence table. The multi-view features of the same circuit board region are averaged using a similarity-weighted average; that is, the weight of each feature is determined by the cosine similarity between keypoints, with higher similarity features having greater weights. This method effectively fuses features from different perspectives, generating a spatially consistent set of associated features. For example, for multi-view features of the same circuit board region recorded in the feature correspondence table, the weight of each feature is calculated based on their cosine similarity. These features are then multiplied by their corresponding weights and summed to obtain the fused features for that circuit board region. This fusion process is performed on features from all circuit board regions, ultimately generating a spatially consistent set of associated features.

[0091] Step S340: Call the anomaly detection sub-model of the defect discrimination model to perform defect probability assessment on the associated feature set, identify regions that are significantly different from the features of the standard circuit board, and obtain a preliminary defect candidate feature set.

[0092] The anomaly detection sub-model is a module within the defect discrimination model specifically designed to detect anomalous features. Defect probability assessment involves analyzing the associated feature set to identify regions that significantly differ from standard circuit board features. Standard circuit board features refer to the characteristic patterns of a normal circuit board. By comparing the associated feature set with these standard features, potentially defective regions can be identified. The preliminary defect candidate feature set is the set of features potentially indicating defects obtained after detection by the anomaly detection sub-model. These features require further filtering and verification to determine if they are genuine defects. For example, in the anomaly detection sub-model, statistical methods (such as Gaussian distribution models, kernel density estimation, etc.) can be used to build a model of the standard circuit board features. Then, each feature in the associated feature set is compared with the standard model, calculating its degree of difference. Regions with a difference exceeding a preset threshold are considered potentially defective regions, and the features of these regions are output as the preliminary defect candidate feature set.

[0093] Step S350: Perform false detection filtering on the preliminary defect candidate feature set, and exclude false defect features caused by image noise or normal structural variations based on the preset feature similarity threshold to generate a potential defect feature set of the circuit board in the image.

[0094] False positive filtering removes potentially false defect features from the initial candidate feature set. Image noise or normal structural variations may cause some features to appear different from standard circuit board features, but they are not actually defects. A preset feature similarity threshold is used to determine whether a feature is a false defect feature. When the similarity between a feature and a normal circuit board feature exceeds the preset threshold, the feature is considered a false defect feature and is excluded from the initial candidate feature set. The generated potential defect feature set of the circuit board in the image is the feature set obtained after false positive filtering. These features are more likely to be true defect features, providing more accurate feature data for subsequent defect type identification and location. For example, for each feature in the initial candidate feature set, its similarity to normal circuit board features (such as cosine similarity, Euclidean distance, etc.) is calculated. Features with similarity exceeding a preset feature similarity threshold (e.g., 0.9) are excluded as false defect features, and the remaining features are output as the potential defect feature set.

[0095] Step S400: Determine the types of defects present in the circuit board to be inspected and the location and distribution characteristics of the defects in the image based on the potential defect feature set.

[0096] The potential defect feature set contains characteristic information about possible defects on the circuit board. Based on this information, the type and location distribution of defects can be determined. Defect types can include open circuit defects, short circuit defects, and poor solder joint defects, each with different characteristic manifestations. The location distribution characteristics of defects in the image can help locate the actual position of defects on the circuit board, providing a basis for subsequent repair and processing. For example, by analyzing the degree of feature differences and feature identification information in the potential defect feature set, the type of defect can be determined. Based on the pixel coordinates of the defect area in the image and the location marker information of the image acquisition, the physical location of the defect on the actual circuit board can be determined, and its location distribution characteristics, such as defect distribution density and cluster boundaries, can be analyzed.

[0097] As one implementation method, step S400, determining the type of defects present in the circuit board to be inspected and the location distribution characteristics of the defects in the image based on the potential defect feature set, can be specifically implemented as the following steps S410~S450:

[0098] Step S410: Analyze the degree of feature difference in the potential defect feature set, and extract the feature identification information corresponding to different defect types. The feature identification information includes open circuit defect identifier, short circuit defect identifier and cold solder joint defect identifier.

[0099] Analyzing the degree of feature difference in the potential defect feature set aims to identify features that significantly differ from those of a normal circuit board. These differences may be associated with different defect types. Extracting feature identification information corresponding to different defect types is based on these differences to determine the defect type. Open circuit defect identifiers, short circuit defect identifiers, and cold solder joint defect identifiers are predefined feature identifiers used to identify different defect types, which can be obtained through analysis and summarization of a large number of defect samples. For example, for each feature in the potential defect feature set, its degree of difference from normal circuit board features (such as cosine similarity, Euclidean distance, etc.) is calculated. Features with a degree of difference exceeding a preset threshold are further analyzed to extract their feature identification information corresponding to different defect types. For open circuit defects, possible feature identification information includes circuit interruption, abnormally increased resistance, etc.; for short circuit defects, possible feature identification information includes abnormal connectivity between circuits, abnormally increased current, etc.; for cold solder joint defects, possible feature identification information includes abnormal solder joint shape, insufficient solder joint connection strength, etc.

[0100] Step S420: Perform coordinate localization processing on the defect area in the potential defect feature set, record the pixel coordinate position of the defect in the image, and establish a mapping relationship between the defect position and the actual physical position of the circuit board by combining the position marking information acquired from the image.

[0101] Coordinate localization processing is used to determine the specific location of the defect region in an image. By recording the pixel coordinates of the defect in the image, its position within the image frame can be accurately located. Establishing a mapping relationship between the defect location and the actual physical location of the circuit board, based on the location marker information acquired from image acquisition, is to convert the defect's position in the image into its actual physical location on the circuit board. The location marker information acquired from image acquisition can include camera pose parameters, optical distortion parameters, etc. These parameters help correct coordinate deviations in the image, achieving accurate position mapping. For example, for each defect region in the potential defect feature set, image processing algorithms (such as edge detection, contour extraction, etc.) are used to determine its pixel coordinates in the image. Then, based on the camera pose parameters and optical distortion parameters recorded during image acquisition, computer vision algorithms (such as perspective transformation, affine transformation, etc.) are used to establish the mapping relationship between the defect location and the actual physical location of the circuit board.

[0102] As one implementation method, in step S420, the mapping relationship between the defect location and the actual physical location of the circuit board is established by combining the location marker information acquired from the image acquisition. Specifically, this can be achieved through the following steps S421~S426:

[0103] Step S421: Extract the position marker information of the image where the pixel coordinates of the defect area are located. The position marker information includes the camera pose parameters and optical distortion parameters at the time of image acquisition.

[0104] The image location markers for the pixel coordinates of the defect area are crucial for establishing the mapping between the defect location and the actual physical location of the circuit board. Camera pose parameters, including camera coordinates and rotation angles, determine the camera's position and orientation during image acquisition. Optical distortion parameters, such as lens distortion coefficients, are used to correct distortion errors in the image. For example, in an image acquisition system, each image records its corresponding camera pose and optical distortion parameters. Once the pixel coordinates of the defect area are determined, its location marker information is extracted from the corresponding image record.

[0105] Step S422: Call the pre-stored 3D model data of the circuit board and obtain the theoretical projection coordinates of the circuit board area corresponding to the image in the 3D model. The theoretical projection coordinates are calculated by inputting the vertex coordinates of the 3D model into the camera projection model.

[0106] The pre-stored 3D model data of the circuit board is a pre-built 3D model of the circuit board, containing all structural and dimensional information. Obtaining the theoretical projection coordinates of the circuit board region corresponding to the image in the 3D model is calculated by inputting the vertex coordinates of the 3D model into the camera projection model. The camera projection model is a mathematical model used to project points in 3D space onto a 2D image plane, and it can calculate the projection coordinates based on the camera's pose parameters and optical distortion parameters. For example, for an image with known camera pose and optical distortion parameters, the vertex coordinates of the pre-stored 3D model of the circuit board are input into the camera projection model to calculate the theoretical projection coordinates of the circuit board region corresponding to the image in the 3D model.

[0107] Step S423: Calculate the coordinate offset between the pixel coordinate position of the defect area and the theoretical projection coordinate. The coordinate offset includes the pixel offset values ​​in the x-axis and y-axis directions.

[0108] Calculating the coordinate offset between the pixel coordinates of the defect region and its theoretical projected coordinates determines the difference between the actual and theoretical positions of the defect region in the image. The coordinate offset includes pixel offset values ​​along the x and y axes, reflecting the positional deviation of the defect region in the image. For example, given the pixel coordinates (x1, y1) of the defect region and its theoretical projected coordinates (x2, y2), the coordinate offset is calculated as (Δx = x1 - x2, Δy = y1 - y2). This coordinate offset can be used for subsequent distortion correction and position mapping.

[0109] Step S424: Perform distortion correction on the coordinate offset based on the camera pose parameters and optical distortion parameters to eliminate the coordinate offset error caused by lens distortion and obtain the corrected coordinate offset.

[0110] Lens distortion is an error that may occur when a camera acquires an image, causing a shift in the coordinate position within the image. Correcting this coordinate shift based on camera pose parameters and optical distortion parameters can eliminate this error, resulting in a more accurate coordinate shift. For example, an optical distortion model of the camera (such as a radial distortion model or a tangential distortion model) can be used to correct the coordinate shift. By transforming the coordinate shift according to the camera's optical distortion parameters, the coordinate shift error caused by lens distortion is eliminated, yielding the corrected coordinate shift.

[0111] Step S425: Convert the corrected coordinate offset into the actual physical size. Convert the pixel offset value into a millimeter-level physical offset value by using the ratio coefficient between the pixel size and the actual physical size.

[0112] Converting the corrected coordinate offset to actual physical dimensions is to convert the positional deviation of the defect area from pixel units to actual physical units (such as millimeters). This conversion can be achieved using a scaling factor between pixel size and actual physical size. For example, given the pixel size of the image and its corresponding actual physical size, the scaling factor can be calculated. Multiplying the corrected coordinate offset (Δx, Δy) by the scaling factor yields the millimeter-level physical offset value (ΔX, ΔY).

[0113] Step S426: Add the 3D model position corresponding to the theoretical projection coordinates to the physical offset value to generate the positioning coordinates of the defect area in the actual physical space of the circuit board, thus completing the mapping relationship between the defect position and the actual physical position of the circuit board.

[0114] By adding the 3D model position corresponding to the theoretical projection coordinates to the physical offset value, the accurate location of the defect area in the actual physical space of the circuit board can be obtained. In this way, the mapping relationship between the defect location and the actual physical location of the circuit board is established. For example, given the 3D model position (X0, Y0, Z0) corresponding to the theoretical projection coordinates and the physical offset value (ΔX, ΔY), the positioning coordinates of the defect area in the actual physical space of the circuit board are generated (X=X0+ΔX, Y=Y0+ΔY, Z=Z0).

[0115] Step S430: Analyze the geometric morphological characteristics of the defect area, including the area size, shape regularity and edge clarity of the defect area, and generate defect morphological description parameters.

[0116] Analyzing the geometric morphological features of defective regions can help further understand the nature and severity of defects. The size of the defective region reflects its scale; a larger area may indicate a more severe defect. Shape regularity determines whether the defect's shape is regular; irregular shapes may indicate a more complex cause. Edge sharpness reflects whether the defect's boundaries are clear; sharp edges may indicate a more stable formation process. Generating defect morphological description parameters involves quantifying and integrating these geometric features to form a set of parameters describing the defect's morphology. For example, for a defective region, image processing algorithms (such as area calculation algorithms, shape analysis algorithms, and edge detection algorithms) are used to calculate its area, shape regularity, and edge sharpness. These calculation results are then combined into a vector as the defect morphological description parameters.

[0117] As one implementation method, step S430 involves analyzing the geometric morphological characteristics of the defect region, including the area size, shape regularity, and edge sharpness of the defect region, and generating defect morphological description parameters. Specifically, this can be implemented as follows: steps S431~S435.

[0118] Step S431: Perform connected component analysis on the pixel coordinates of the defect region to determine the set of boundary pixels of the defect region.

[0119] Connected component analysis (CBI) is an algorithm used to divide interconnected pixels in an image into different regions. Performing CBI on the pixel coordinates of a defect region can identify the set of boundary pixels for that region. This set of boundary pixels forms the boundary between the defect region and the background region, containing shape information about the defect. For example, given the set of pixel coordinates for a defect region, a connected component analysis algorithm (such as one based on depth-first search or breadth-first search) can be used to divide it into different connected regions. Then, the boundary pixels of each connected region are identified, forming the set of boundary pixels for the defect region.

[0120] Step S432: Calculate the area size of the defect region based on the set of boundary pixels. The area size is obtained by counting the total number of pixels within the area enclosed by the boundary pixels.

[0121] Calculating the area of ​​a defect region based on the set of boundary pixels involves counting the total number of pixels within the area enclosed by the boundary pixels, allowing for accurate calculation of the defect region's area. For example, for the set of boundary pixels of a defect region, a scanline filling algorithm is used to fill the area enclosed by the boundary pixels, and then the total number of pixels within the filled area is counted to obtain the area of ​​the defect region.

[0122] Step S433: Extract the coordinate sequence of the boundary pixel set and calculate the angular change rate between adjacent boundary pixels as the shape regularity index of the defect area.

[0123] Extracting the coordinate sequence of the boundary pixel set yields the boundary shape information of the defect region. Calculating the rate of change of angle between adjacent boundary pixels measures the regularity of the defect region's shape. A smaller rate of change indicates a more regular shape, while a larger rate indicates a more irregular shape. For example, for the coordinate sequence of the boundary pixel set, the vectors between adjacent boundary pixels are calculated sequentially, and then the angle between these vectors is calculated. The rate of change of this angle is used as an indicator of the shape regularity of the defect region.

[0124] Step S434: Perform edge sharpness detection on the set of boundary pixels, calculate the average grayscale difference between boundary pixels and non-boundary pixels, and use it as an indicator of edge clarity of the defect area.

[0125] Edge sharpness detection on a set of boundary pixels can assess the clarity of the boundary of a defective region. Calculating the mean grayscale difference between boundary pixels and non-boundary pixels quantifies edge sharpness. A larger mean grayscale difference indicates a sharper boundary; a smaller mean grayscale difference indicates a blurrier boundary. For example, for a set of boundary pixels, identify its neighboring non-boundary pixels and calculate the grayscale difference between the boundary pixels and non-boundary pixels. Then, calculate the mean of these grayscale differences as an indicator of the edge sharpness of the defective region.

[0126] Step S435: Combine the area size, shape regularity index and edge clarity index to generate defect morphology description parameters.

[0127] Combining area size, shape regularity, and edge sharpness indices to generate defect morphology description parameters integrates and quantifies the geometric features of the defect region, forming a comprehensive description parameter. This parameter can be used for subsequent defect classification and evaluation. For example, the area size, shape regularity, and edge sharpness indices can be arranged in a specific order to form a vector, which serves as the defect morphology description parameter.

[0128] Step S440: Based on the feature identification information and defect morphology description parameters, match the preset defect type classification rules to determine the specific defect type corresponding to the defect area.

[0129] The pre-defined defect type classification rules, based on matching feature identification information and defect morphology description parameters, aim to determine the specific defect type according to the characteristics and morphology of the defect. These pre-defined rules are a series of rules that classify different defect types based on their feature identification information and morphological features. For example, for a defect area, its feature identification information suggests it might be an open circuit defect, while its defect morphology description parameters indicate a small area, regular shape, and clear edges. According to the pre-defined defect type classification rules, the specific defect type corresponding to this defect area is determined to be an open circuit defect.

[0130] Step S450: Perform spatial statistical analysis on the pixel coordinates of the defect area to generate location distribution feature information including defect distribution density and cluster boundary.

[0131] Spatial statistical analysis of the pixel coordinates of defective regions can reveal the distribution of defects within an image. Generating locational distribution feature information that includes defect distribution density and cluster boundaries can visually demonstrate the distribution patterns of defects. Defect distribution density reflects the density of defects in the image, while cluster boundaries determine the areas where defects are concentrated. For example, for the pixel coordinates of defective regions, spatial statistical analysis methods (such as kernel density estimation and cluster analysis) are used to calculate the defect distribution density. Then, clustering algorithms (such as the DBSCAN algorithm) are used to identify defect clusters and determine their boundaries. The defect distribution density and cluster boundary information are then combined to form locational distribution feature information.

[0132] Step S500: Generate a detection result report containing defect location coordinates based on defect type and location distribution feature information, and output the detection result report to the target display terminal to complete the detection process.

[0133] Generating a detection result report containing defect location coordinates based on defect type and location distribution characteristics involves organizing and summarizing the detected defect information into a detailed report. The report includes information such as defect type, location distribution characteristics, and defect location coordinates, helping users quickly understand the circuit board's defect status. Outputting the report to a target display terminal to complete the detection process involves presenting the report to the user, allowing them to intuitively view the results. For example, defect type, location distribution characteristics, and defect location coordinates are filled into a preset report template to generate the report. Then, the report is sent in a suitable format (such as PDF, HTML, etc.) to the target display terminal (such as a computer monitor, mobile phone screen, etc.) for display.

[0134] As one implementation method, step S500, generating a detection result report containing defect location coordinates based on defect type and location distribution feature information, can be specifically implemented as the following steps S510~S550:

[0135] Step S510: Extract the preset report template corresponding to the defect type. The report template includes a defect type description field, a location label field, and a morphological description field.

[0136] Extracting the pre-defined report templates corresponding to different defect types is for generating appropriate reports based on those types. These pre-designed report templates contain essential information such as defect type description fields, location label fields, and morphological description fields. These fields can be used to fill in specific information about the defect, making the report more standardized and detailed. For example, for an open-circuit defect, the pre-defined report template for that defect includes fields for filling in the open-circuit defect description, defect location label, and defect morphological description.

[0137] Step S520: Fill the specific name of the defect type into the defect type description field to complete the structured record of defect type information.

[0138] Filling the defect type description field with the specific name of the defect type clearly defines the type of defect described in the report. Structured recording of defect type information makes the report clearer and easier to understand. For example, for a detected open-circuit defect, the specific name "Open-Circuit Defect" is filled into the defect type description field, along with detailed information about the open-circuit defect, such as possible causes and impacts.

[0139] Step S530: Based on the defect distribution density and cluster boundary in the location distribution feature information, draw the outline of the defect area in the location annotation field and annotate the actual physical location coordinates of the defect.

[0140] Based on the defect distribution density and cluster boundaries in the location distribution feature information, drawing the outline of the defect area in the location annotation field can visually demonstrate the distribution of defects. Annotating the actual physical coordinates of the defects allows for accurate location of the defects on the circuit board. For example, for the defect distribution density and cluster boundaries recorded in the location distribution feature information, a plotting tool (such as Python's Matplotlib library) can be used to draw the outline of the defect area in the location annotation field. Simultaneously, annotating the actual physical coordinates of the defects on the graph allows report users to quickly locate the defects.

[0141] Step S540: Fill the area size, shape regularity and edge clarity in the defect morphology description parameters into the morphology description field to complete the quantitative recording of defect morphology information.

[0142] Filling the area size, shape regularity, and edge sharpness parameters from the defect morphology description parameters into the morphology description field allows for a detailed description of the defect's morphological characteristics. Quantifying and recording defect morphology information makes reports more objective and accurate. For example, for a defect's morphology description parameters, its area size, shape regularity, and edge sharpness values ​​can be filled into the morphology description field, along with explanations and analyses of these parameters, to help report users better understand the defect's morphology.

[0143] Step S550: Perform logical verification on each field information in the report template to ensure consistency between the defect type and morphological description and the correspondence between the location coordinates and the actual physical location, and generate a detection result report containing the defect location coordinates.

[0144] Logical validation of each field in the report template is a crucial step in ensuring the accuracy and reliability of the report content. Consistency between defect type and morphological description means that the defect type described in the report should match the morphological characteristics of the defect. For example, an open-circuit defect may have specific morphological characteristics such as a circuit interruption. If the report describes the defect type as an open-circuit defect, but the morphological description matches the characteristics of a short-circuit defect, then there is a logical inconsistency. Correspondence between location coordinates and actual physical location means that the defect location coordinates marked in the report should accurately correspond to the actual physical location on the circuit board, without any coordinate deviations or errors. Logical validation allows for the timely detection and correction of errors in the report, generating accurate and reliable inspection result reports containing defect location coordinates. For example, for the defect type description and morphological description fields in the report template, check whether the typical morphological characteristics corresponding to the defect type match the content in the morphological description field. For the coordinate information in the location label field, again combine the location marker information from image acquisition with the previously established mapping relationship to verify whether the coordinates accurately correspond to the actual physical location. If logical inconsistencies or correspondence errors are found, appropriate corrections and adjustments are made until all field information meets the logical requirements.

[0145] As one implementation method, step S550 involves logically validating the information in each field of the report template to ensure consistency between the defect type and morphological description, and correspondence between the location coordinates and the actual physical location, thereby generating a detection result report containing the defect location coordinates. Specifically, this can be achieved through the following steps S551~S555:

[0146] Step S551: Verify the matching between the defect type in the defect type description field and the feature identification information to ensure that the defect type name is consistent with the defect identifier in the feature identification information.

[0147] Verifying the match between the defect type in the defect type description field and the feature identification information is a crucial step in logical verification. Feature identification information, extracted from the potential defect feature set in previous steps, corresponds to different defect types and reflects the essential characteristics of the defect. The defect type name should accurately correspond to the defect identifier in the feature identification information to ensure the accuracy of the defect type description in the report. For example, if the feature identification information reveals an open-circuit defect identifier, such as a line interruption or abnormally increased resistance, then the defect type name in the defect type description field should be "open-circuit defect," not any other unrelated defect type. Consistency is ensured by comparing the defect type name with the defect identifier in the feature identification information one by one. If a mismatch is found, the defect type determination process needs to be reviewed again, and the defect type accurately determined based on the feature identification information, and the defect type description field in the report corrected accordingly.

[0148] Step S552: Verify the overlap between the defect contour graphic in the location annotation field and the boundary of the clustered area in the location distribution feature information to ensure that the contour graphic accurately reflects the spatial distribution of the defect.

[0149] Verifying the overlap between the defect outline in the location labeling field and the boundary of the clustered region in the location distribution feature information is crucial to ensuring the accurate spatial distribution of defects in the report. The boundary of the clustered region in the location distribution feature information is obtained through spatial statistical analysis of the pixel coordinates of the defect area and represents the actual distribution range of the defects. The defect outline should highly overlap with this clustered region boundary to accurately show the spatial distribution of defects to report users. For example, image processing and geometric calculations can be used to calculate the overlap ratio between the defect outline and the clustered region boundary. If the overlap ratio is lower than a preset threshold (e.g., 90%), it indicates that the outline may be inaccurately drawn or the location labeling may be incorrect. In this case, the defect outline needs to be redrawn based on the clustered region boundary in the location distribution feature information to ensure it accurately reflects the spatial distribution of defects.

[0150] Step S553: ​​Verify the consistency between the area size in the morphology description field and the actual total number of pixels in the defect area to ensure that the morphology description parameters match the geometric features of the defect area.

[0151] Verifying the consistency between the area size in the morphological description field and the actual total number of pixels in the defect area is a crucial check for the accuracy of the defect morphological description. In the previous steps, the actual area size of the defect area was obtained by counting the total number of pixels within the region enclosed by the boundary pixels, and the area size in the morphological description field should match this. If they are inconsistent, it indicates a potential error in the area calculation or morphological description entry process. For example, recalculate the defect area using the same area calculation method (such as the scan-line fill algorithm to count the total number of pixels) and compare it with the area size in the morphological description field. If the difference exceeds a certain error range (e.g., 5%), the area calculation process and the morphological description entry need to be re-examined and corrected to ensure that the morphological description parameters match the geometric features of the defect area.

[0152] Step S554: Backtrack and correct the information of the fields that fail the verification, and re-extract or calculate the information of the corresponding fields until the verification passes.

[0153] When certain fields are found to be non-compliant during logical verification, backtracking correction is required. Backtracking correction means returning to the relevant previous steps and re-extracting or recalculating the corresponding field information. For example, if a mismatch is found when verifying the matching of defect type and feature identification information, it is necessary to return to step S410, re-analyze the feature differences in the potential defect feature set, accurately extract the feature identification information corresponding to different defect types, and then determine the defect type and correct the defect type description field based on the correct feature identification information. If a problem is found when verifying the overlap between the defect outline graphic and the boundary of the clustered area in the location annotation field, it is necessary to return to step S450, re-perform spatial statistical analysis of the pixel coordinates of the defect area, determine the accurate boundary of the clustered area, and then redraw the defect outline graphic. This backtracking correction continues until all field information passes the logical verification.

[0154] Step S555: Integrate the format of the fields that have passed the verification to generate a detection result report containing the defect location coordinates.

[0155] The format integration of the validated field information involves organizing and formatting the logically validated and corrected field information according to a pre-defined report template to generate the final inspection result report containing defect location coordinates. Format integration includes adjusting the font, size, color, and alignment of each field to make the report more standardized and aesthetically pleasing. Simultaneously, the overall report structure needs to be optimized, adding necessary titles, page numbers, and chart descriptions to improve readability. For example, the defect type description field, location label field, and morphological description field are arranged according to the report template layout, with clear titles added next to each field. The defect outline graphics and related statistical charts are appropriately scaled and adjusted to ensure clear display within the report. Finally, all information is saved in a suitable file format (such as PDF, DOCX, etc.) to generate a complete inspection result report containing defect location coordinates.

[0156] In one implementation method, step S500 involves outputting the detection result report to the target display terminal to complete the detection process. Specifically, this can be achieved through the following steps S560~S5100:

[0157] Step S560: Convert the detection result report into an image format supported by the target display terminal. The image format includes bitmap format and vector graphics format.

[0158] Converting the test result report to an image format supported by the target display terminal is crucial to ensure proper display. Different target display terminals may support different image formats. Common bitmap formats include JPEG and PNG, while vector graphics formats include SVG. Bitmap formats are suitable for displaying images with rich colors and details, while vector graphics formats offer the advantage of unlimited scaling without loss of quality, making them suitable for displaying graphics and charts requiring precise drawing. For example, if the target display terminal is a standard computer monitor, it may support various common image formats. In this case, the test result report can be converted to JPEG format, which offers high compression ratios and broad compatibility. If the target display terminal requires precise scaling and editing of graphics in the report, such as with professional design software, the report can be converted to SVG format. Use image processing software or relevant file conversion tools to convert the test result report to a suitable image format according to the requirements of the target display terminal.

[0159] Step S570: Overlay the original image of the circuit board as the background layer in the image of the inspection result report, and display the outline of the defect location coordinates as the foreground layer in a semi-transparent overlay.

[0160] Overlaying the original circuit board image as a background layer and the defect location coordinates outline as a foreground layer in the inspection report provides a more intuitive display of defect locations for report users. The original circuit board image allows users to understand the overall structure and layout of the circuit board, while the defect location coordinates outline highlights the location of the defect. The semi-transparent overlay ensures that both the circuit board information in the background layer and the defect outline in the foreground layer are clearly visible, facilitating comparison between the defect location and the normal structure of the circuit board. For example, image processing software (such as Adobe Photoshop, GIMP, etc.) can be used to overlay the original circuit board image and an image containing the defect location coordinates outline. The defect location coordinates outline is set to a semi-transparent state (e.g., 50% transparency) and then placed in the corresponding position on the original circuit board image, allowing the two to be superimposed. By adjusting the degree of semi-transparency and the position of the foreground layer, the superimposed image is ensured to be clear, aesthetically pleasing, and accurately conveys the defect location information.

[0161] Step S580: Add dynamic annotation labels to the contour graphic of the defect location coordinates. The annotation labels contain a brief description of the defect type name and morphological description parameters.

[0162] Adding dynamic annotations to the outline of defect location coordinates can further enhance the information delivery of reports. The annotations, containing the defect type name and a brief description of the morphological parameters, allow report users to quickly understand the basic characteristics of each defect without having to read the full text. Dynamic annotations can appear or disappear based on user actions (such as mouse hovering or clicking) during report presentation, increasing interactivity. For example, using interactive image processing or document editing software (such as Adobe Acrobat Pro, HTML5 + JavaScript) can add dynamic annotations to the outline of defect location coordinates. When a user hovers the mouse over a defect outline, an annotation pops up, displaying the defect type name (e.g., "open circuit defect") and a brief description of the morphological parameters (e.g., "small area, irregular shape, relatively clear edges"). By setting appropriate fonts, colors, and styles, the annotations can be made clear, easy to read, and consistent with the overall report style.

[0163] Step S590: Set up the interactive display function of the inspection result report, supporting viewing detailed morphological description information of defects by hovering the mouse and jumping to view the original image of the corresponding defect area by clicking.

[0164] Adding interactive features to the inspection results report can improve efficiency and user experience. Hovering the mouse over a defect to view detailed morphological descriptions allows users to access comprehensive information without consuming excessive report space. Clicking to view the original image of the corresponding defect area provides further insight into the defect's details, allowing users to compare the original image with the defect outline in the report. For example, interactive features can be added to the inspection results report using web development technologies (such as HTML, CSS, and JavaScript) or professional document editing software (such as Adobe InDesign). For each defect's location coordinate outline, mouse hover and click events are bound. When the mouse hovers over the outline, detailed morphological descriptions, such as the defect's area size, shape regularity, and edge sharpness, are dynamically displayed via JavaScript code. When the outline is clicked, a link or script navigates to the original image page of the corresponding defect area, allowing users to view a high-resolution original image. Furthermore, to ensure the smoothness and stability of the interactive features, thorough testing and optimization are conducted to guarantee proper functionality across different devices and browsers.

[0165] Step S5100: Send the configured test result report to the target display terminal for visual display, thus completing the test process.

[0166] Sending the configured test result report to the target display terminal for visualization is the final step in the entire circuit board inspection process. By sending the report to the target display terminal, such as a computer monitor, mobile phone screen, or large display screen, relevant personnel can intuitively view the test results and make corresponding decisions. Different sending methods can be used depending on the target display terminal. If the target display terminal is a local computer or device, the report file can be directly copied to the appropriate storage location and opened for display. If the target display terminal is a remote device, the report can be sent via network transmission, such as email, FTP, or cloud storage. For example, the configured test result report can be saved as a PDF and sent to relevant quality inspection personnel or engineers via email. After receiving the email, they can open the attached report file, visualize it on their own computer or mobile device, view detailed information such as the type, location, and morphology of defects, and perform subsequent repairs and improvements based on the report results, thus completing the entire circuit board inspection process.

[0167] It is understood that the various algorithms involved in the above descriptions of the embodiments of the present invention, such as cosine distance algorithms, clustering algorithms, interpolation algorithms, etc., can all be obtained from relevant content in the prior art. To save space, they will not be elaborated on in the embodiments of the present invention. In addition, those skilled in the art can supplement the details based on common knowledge in the art when implementing the solutions of the present invention. For example, they can use normalization to eliminate dimensional conflicts before feature fusion, use interpolation to eliminate dimensional differences, reasonably set thresholds based on historical data, experience or business scenario requirements, train the model based on a general model training method, set the number of layers in the model structure based on actual needs, select activation functions, etc. The present invention will not provide redundant descriptions of overly detailed implementation processes here.

[0168] Figure 2 This is a schematic diagram of the hardware entity of a circuit board testing system provided in an embodiment of the present invention, such as... Figure 2 As shown, the hardware entity of the circuit board inspection system 1000 includes a processor 1001 and a memory 1002, wherein the memory 1002 stores a computer program that can run on the processor 1001, and the processor 1001 executes the program to implement the steps in the method of any of the above embodiments.

[0169] The memory 1002 stores computer programs that can run on the processor. The memory 1002 is configured to store instructions and applications that can be executed by the processor 1001. It can also cache data to be processed or already processed (e.g., image data, audio data, voice communication data, and video communication data) in the processor 1001 and the various modules in the circuit board inspection system 1000. It can be implemented by flash memory or random access memory (RAM).

[0170] When the processor 1001 executes the program, it implements the steps of any of the above-mentioned machine vision-based circuit board inspection methods. The processor 1001 typically controls the overall operation of the circuit board inspection system 1000.

[0171] The above description is merely an embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A circuit board inspection method based on machine vision, characterized in that, The method includes: Obtain the original visual data set of the circuit board to be inspected, which includes multiple sets of images with position markers acquired from multiple angles; The original visual data set is subjected to visual information optimization processing to obtain a standardized image set with uniform illumination intensity and contrast. The pre-trained defect discrimination model is invoked to perform key feature recognition processing on the standardized image set to generate a set of potential defect features of the circuit board in the image; Determining the defect types and their location distribution features in the image based on the potential defect feature set includes: analyzing the degree of feature difference in the potential defect feature set and extracting feature identification information corresponding to different defect types, including open circuit defect identification, short circuit defect identification, and cold solder joint defect identification; performing coordinate positioning processing on the defect areas in the potential defect feature set, recording the pixel coordinate positions of the defects in the image, and extracting the position marker information of the image where the pixel coordinate positions of the defect areas are located, including camera pose parameters and optical distortion parameters during image acquisition; calling pre-stored 3D model data of the circuit board to obtain the theoretical projection coordinates of the circuit board area corresponding to the image in the 3D model, which are calculated by inputting the vertex coordinates of the 3D model into the camera projection model; and calculating the coordinate offset between the pixel coordinate positions of the defect areas and the theoretical projection coordinates, including the pixel offset in the x-axis and y-axis directions. Offset value; Based on the camera pose parameters and optical distortion parameters, the coordinate offset is distorted to eliminate the coordinate offset error caused by lens distortion, resulting in a corrected coordinate offset; The corrected coordinate offset is converted into an actual physical size, and the pixel offset value is converted into a millimeter-level physical offset value using a ratio coefficient between pixel size and actual physical size; The 3D model position corresponding to the theoretical projection coordinates is added to the physical offset value to generate the positioning coordinates of the defect area in the actual physical space of the circuit board, thus establishing the mapping relationship between the defect position and the actual physical position of the circuit board; The geometric morphological features of the defect area are analyzed, including the area size, shape regularity, and edge sharpness, to generate defect morphology description parameters; Based on the feature identification information and defect morphology description parameters, a preset defect type classification rule is matched to determine the specific defect type corresponding to the defect area; Spatial statistical analysis is performed on the pixel coordinate positions of the defect area to generate positional distribution feature information including defect distribution density and cluster boundary; Based on the defect type and the location distribution feature information, a detection result report containing the defect location coordinates is generated, and the detection result report is output to the target display terminal to complete the detection process.

2. The circuit board inspection method based on machine vision according to claim 1, characterized in that, The step of performing visual information optimization processing on the original visual data set to obtain a standardized image set with uniform illumination intensity and contrast includes: Each set of images in the original visual data set is subjected to illumination deviation correction processing. The uneven illumination caused by different angle acquisition is eliminated by adjusting the brightness value of the image pixels, and an intermediate image set after illumination correction is obtained. The intermediate image set after illumination correction is subjected to contrast enhancement processing. Based on the dynamic range expansion technology of image grayscale histogram, the contrast difference between the circuit board outline and the background area in the image is improved, resulting in a transition image set with enhanced contrast. The contrast-enhanced transition image set is subjected to noise suppression processing. A non-local mean filtering algorithm is used to reduce random noise interference in the image while preserving edge detail information of key circuit board structures, resulting in an optimized image set with noise suppression. The optimized image set for noise suppression is subjected to size normalization processing, adjusting images from different acquisition angles to the same pixel size to ensure the spatial dimension consistency of subsequent feature recognition, thus obtaining a size-normalized standard image set. The standardized image set with normalized dimensions is input into the color space conversion module for color correction processing, which unifies the color representation space of the images, eliminates color deviations caused by device acquisition, and generates a standardized image set with uniform illumination intensity and contrast.

3. The circuit board inspection method based on machine vision according to claim 2, characterized in that, The step of calling a pre-trained defect discrimination model to perform key feature recognition processing on the standardized image set, generating a set of potential defect features of the circuit board in the images, includes: The standardized image set is input into the feature extraction layer of the defect discrimination model, and the pixel information of the image is abstracted hierarchically through a convolutional neural network to generate a basic feature set containing circuit board texture features and structural features. The attention mechanism module of the defect discrimination model is used to evaluate the importance of the basic feature set, focusing on the feature information of key areas such as circuit board pads and traces, and suppressing redundant features in the background area to obtain an attention-enhanced key feature set. The feature association layer of the defect discrimination model performs spatial location association analysis on the key feature set of attention enhancement, establishes feature correspondences for the same circuit board region in different images, and generates a spatially consistent set of associated features. The anomaly detection sub-model of the defect discrimination model is invoked to perform defect probability assessment on the associated feature set, identify regions that are significantly different from the features of the standard circuit board, and obtain a preliminary defect candidate feature set. The preliminary defect candidate feature set is subjected to false detection filtering. Based on a preset feature similarity threshold, false defect features caused by image noise or normal structural variations are excluded to generate a potential defect feature set of the circuit board in the image.

4. The circuit board inspection method based on machine vision according to claim 1, characterized in that, The generation of a detection result report containing defect location coordinates based on the defect type and the location distribution feature information includes: Extract the preset report template corresponding to the defect type. The report template includes a defect type description field, a location annotation field, and a morphological description field. Fill the specific name of the defect type into the defect type description field to complete the structured recording of defect type information; Based on the defect distribution density and cluster area boundary in the location distribution feature information, draw the outline of the defect area in the location annotation field and annotate the actual physical location coordinates of the defect; The area size, shape regularity, and edge clarity from the defect morphology description parameters are filled into the morphology description field to complete the quantitative recording of defect morphology information. Logical validation is performed on each field in the report template to ensure consistency between the defect type and morphological description and the correspondence between the location coordinates and the actual physical location, thereby generating a detection result report containing the defect location coordinates.

5. The circuit board inspection method based on machine vision according to claim 3, characterized in that, The step of performing illumination deviation correction processing on each group of images in the original visual data set, by adjusting the brightness values ​​of image pixels to eliminate the uneven illumination caused by different angle acquisition, yields an intermediate image set after illumination correction, including: Calculate the global average value of pixel brightness values ​​in the image, and use it as the reference illumination intensity for the current image; Extract the overexposed areas in the image whose brightness values ​​are higher than the reference light intensity and the underexposed areas whose brightness values ​​are lower than the reference light intensity; The pixel brightness values ​​of the overexposed areas are linearly attenuated to adjust the brightness values ​​to a preset range of the reference illumination intensity. The pixel brightness values ​​of the underexposed areas are linearly enhanced to bring them up to a preset range of the reference illumination intensity. The processed image is then subjected to brightness smoothing to eliminate the brightness abrupt boundary between overexposed and underexposed areas, generating a set of intermediate images after illumination correction. The attention mechanism module of the defect discrimination model performs importance evaluation on the basic feature set, focusing on the feature information of key areas such as circuit board pads and traces, suppressing redundant features in the background area, and obtaining an attention-enhanced key feature set, including: Calculate feature activation values ​​for texture features and structural features in the basic feature set, whereby the feature activation value represents the degree of contribution of the feature to defect identification. A feature importance weight map is generated based on the feature activation values, and the high activation value regions in the weight map correspond to the feature positions of key structures on the circuit board. The feature importance weight map is multiplied element-wise with the basic feature set to enhance the feature response in high activation value regions and suppress the feature response in low activation value regions. The processed feature set is normalized to ensure that the distribution range of the feature values ​​is consistent with the model input requirements; The normalized feature set is output as the key feature set for attention enhancement.

6. The circuit board inspection method based on machine vision according to claim 1, characterized in that, The analysis of the geometric morphological features of the defect region, including the area size, shape regularity, and edge sharpness of the defect region, generates defect morphological description parameters, including: Perform connected component analysis on the pixel coordinates of the defective region to determine the set of boundary pixels of the defective region; The area of ​​the defect region is calculated based on the set of boundary pixels, and the area is obtained by counting the total number of pixels within the area enclosed by the boundary pixels. Extract the coordinate sequence of the boundary pixel set and calculate the angular change rate between adjacent boundary pixels as the shape regularity index of the defect region; Edge sharpness detection is performed on the set of boundary pixels, and the average grayscale difference between boundary pixels and non-boundary pixels is calculated as an indicator of the edge clarity of the defect area. The area size, shape regularity index, and edge clarity index are combined to generate defect morphology description parameters.

7. The circuit board inspection method based on machine vision according to claim 4, characterized in that, The logical validation of each field in the report template to ensure consistency between the defect type and morphological description and the correspondence between the location coordinates and the actual physical location, generating a detection result report containing the defect location coordinates, includes: Verify the match between the defect type in the defect type description field and the feature identification information to ensure that the defect type name is consistent with the defect identifier in the feature identification information; Verify the overlap between the defect contour graphic in the location annotation field and the boundary of the clustered area in the location distribution feature information to ensure that the contour graphic accurately reflects the spatial distribution of the defect; Verify the consistency between the area size in the morphological description field and the actual total number of pixels in the defect area to ensure that the morphological description parameters match the geometric features of the defect area; For fields that fail validation, backtrack and correct them, re-extract or recalculate the information of the corresponding fields until validation passes; The information from each field that has passed verification is formatted and integrated to generate a detection result report that includes the coordinates of the defect location.

8. The circuit board inspection method based on machine vision according to claim 1, characterized in that, The step of outputting the test result report to the target display terminal to complete the test process includes: The detection result report is converted into an image format supported by the target display terminal, including bitmap format and vector graphics format; The original image of the circuit board is overlaid as a background layer in the image of the test result report, and the outline of the defect location coordinates is used as a foreground layer for semi-transparent overlay display. Add dynamic annotation labels to the contour graphic of the defect location coordinates. The annotation labels include a brief description of the defect type name and morphological description parameters. The test result report is set to display interactive functions, which support viewing detailed morphological description information of defects by hovering the mouse and viewing the original image of the corresponding defect area by clicking; The configured test result report is sent to the target display terminal for visual display, thus completing the test process.

9. A circuit board inspection system, comprising a memory and a processor, wherein the memory stores a computer program executable on the processor, characterized in that, When the processor executes the program, it implements the steps of the method according to any one of claims 1 to 8.

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