PCB schematic diagram component information extraction method based on text recognition and graph algorithm

Abstract

The invention relates to the technical field of electronic design automation, and provides a PCB schematic diagram component information extraction method based on text recognition and a graph algorithm. The method aims at solving the problem that component models in a complex PCB schematic diagram are extracted inaccurately, and the method mainly comprises the steps that preprocessing of binaryzation, denoising and text area enhancement is conducted on the PCB schematic diagram, and an optimized image is generated; performing character direction detection and rotation processing on the obtained optimized image, inputting the fine-tuned OCR model to perform multi-scale character recognition, and outputting a recognition result containing character content, coordinates and confidence; constructing a graph model containing MCU position nodes and character block nodes, and establishing associated edges through a weight calculation module; performing global optimal matching on the graph model based on a Hungary algorithm, and screening associated pairs of the MCU and the character blocks; and performing editing distance calculation on a matching result and a preset MCU model template library, correcting character confusion errors through a multi-stage verification mechanism, and outputting final component information.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic design automation (EDA), and provides a method for extracting component information from a PCB schematic diagram based on text recognition and graph algorithms. Background Art

[0002] In the field of electronic design automation (EDA), PCB schematics serve as the core vehicle for describing circuit designs, carrying key information such as component models, connection relationships, and function definitions. Accurately extracting component information from schematics and generating engineering files or netlists is a crucial step in automating the circuit design process. However, existing technologies have significant limitations when processing complex PCB schematics, as exemplified by the following:

[0003] 1. Limitations of Existing Technologies

[0004] The current mainstream component recognition methods mainly include manual recognition, traditional OCR technology and template matching methods, but they all have obvious defects:

[0005] 1.1 Manual Identification:

[0006] Engineers manually check the PCB schematics and verify component models, connection relationships, and other information one by one. The main problems with this approach are as follows:

[0007] Inefficiency: Manual identification consumes a lot of time and manpower costs, especially in complex designs where schematics may contain thousands of components, making manual processing extremely inefficient.

[0008] Error-prone: Due to the complex and information-intensive schematic layout, manual identification is prone to omissions or misjudgments, seriously affecting the accuracy of downstream designs.

[0009] Difficult to trace: Manual identification lacks repeatability and procedural management, and cannot meet the needs of modern electronic design for efficient automation.

[0010] 1.2 Traditional OCR technology:

[0011] Optical character recognition (OCR) tools are widely used for extracting text from images. For component recognition on PCB schematics, OCR tools attempt to directly convert textual information into digitized text. However, the unique characteristics of PCB schematics lead to the following problems with traditional OCR technology:

[0012] Complex layout interference: The PCB schematic contains components, connection lines, annotations and other information at the same time. Text and other graphic elements intersect, which interferes with OCR text area positioning.

[0013] Difficulty in recognizing vertical text: Component models in some PCB schematics are arranged vertically. Traditional OCR models are generally weak in processing vertical text, and recognition results are often incomplete or erroneous.

[0014] Character confusion: Component models contain a large number of easily confused characters, such as "1" and "I", "0" and "o", etc. The OCR recognition accuracy in this case is low.

[0015] Special characters are not supported: Component models may contain special characters (such as "-" and "."). OCR may ignore or misrecognize these characters, resulting in loss of model information.

[0016] 1.3 Template Matching Method

[0017] Some EDA tools use template matching to extract component information from fixed-format schematics. This method relies on the standardized format of schematics and parses component locations and models using predefined rules. However, its limitations include:

[0018] Lack of flexibility: When the schematic format changes (for example, different design tools generate different schematic formats), the template matching method needs to readjust the rules or templates, which makes it difficult to adapt to diverse schematic designs.

[0019] Complexity limitations: Template matching methods generally have difficulty handling complex schematics, especially those with dense components and diverse layouts.

[0020] 2. Analysis of technical difficulties

[0021] 2.1 Complex background and interference

[0022] A PCB schematic typically contains the following elements:

[0023] Components: including MCU, resistors, capacitors, diodes, etc. Various components are arranged closely, making area segmentation difficult.

[0024] Connection lines: The connections between components are complex and may cover or interfere with the positioning of text labels.

[0025] Other annotations: such as annotation text, test point marks, etc., further increase the complexity of image processing.

[0026] Especially for core components such as MCU, there may be multiple interfering elements (such as resistors and capacitors) around them, which makes it significantly more difficult to identify their models.

[0027] 2.2 Limitations of Text Recognition

[0028] Vertical text recognition issues: Component models in PCB schematics may be arranged vertically. Traditional OCR models are usually optimized for horizontal text and have poor support for vertical text, which can easily cause character misalignment or missing.

[0029] Character confusion problem: Common character confusion in component models (such as "1" and "I", "0" and "o") seriously interferes with OCR recognition results.

[0030] Special character processing: Component models may contain special characters (such as "-" and "."). The OCR model often misidentifies these characters as other symbols or directly ignores them, resulting in incomplete model information.

[0031] 2.3 Difficulty in Matching MCU and Text

[0032] Even if OCR can extract text information, how to associate the text with specific components (such as MCU) remains a technical difficulty:

[0033] Uncertainty in position matching: The location of the text label may not be in the same area as the MCU body, and an accurate matching relationship cannot be established based solely on simple spatial proximity.

[0034] Influence of interference factors: Other components around the MCU (such as resistors and capacitors) may be closer to the text labels and easily be misassociated.

[0035] 3. Shortcomings of existing solutions

[0036] In response to the above problems, the existing improvement solutions still have significant defects:

[0037] Semi-automated manual verification: Although it can correct some OCR errors, it is inefficient and the results rely on subjective experience, making it difficult to ensure consistency.

[0038] Deep learning end-to-end model: Although it improves recognition rate, it has disadvantages such as black box unexplainability, strong data dependence, and unresolved character confusion problems.

[0039] Image segmentation and matching method: It is easily affected by image quality and background interference, and it is difficult to achieve high-precision positioning and matching.

[0040] In summary, existing technologies struggle to achieve a balanced balance of efficiency, accuracy, and robustness in extracting component information from PCB schematics. In particular, there is a lack of systematic solutions for handling vertical text, character confusion, and complex spatial relationships. Therefore, an innovative approach integrating multimodal optimization, global matching, and error correction mechanisms is urgently needed to overcome technical bottlenecks in complex scenarios and provide reliable support for intelligent EDA tools. Summary of the Invention

[0041] This invention aims to solve the problem of inaccurate component (such as MCU) model extraction in complex PCB schematics due to layout interference, difficulty in vertical text recognition, and character confusion. By integrating OCR optimization, graph algorithm matching, and template library error correction, efficient and accurate component information extraction can be achieved.

[0042] In order to solve the above problems, the present invention provides the following technical solutions:

[0043] The present invention provides a method for extracting component information from a PCB schematic diagram based on text recognition and graph algorithm, comprising the following steps:

[0044] Step 1: Pre-process the PCB schematic diagram by binarization, denoising, and text area enhancement to generate an optimized image;

[0045] Step 2: Perform text orientation detection and rotation processing on the optimized image obtained in step 1, input the fine-tuned OCR model for multi-scale text recognition, and output the recognition result including text content, coordinates and confidence level;

[0046] Step 3: Build a graph model containing MCU location nodes and text block nodes, and establish associated edges through the weight calculation module;

[0047] Step 4: Perform global optimal matching on the graph model based on the Hungarian algorithm to select the association pairs between MCU and text blocks;

[0048] Step 5: Calculate the edit distance between the matching results and the preset MCU model template library, correct character confusion errors through a multi-level verification mechanism, and output the final component information.

[0049] In the above scheme, step 1 includes the following steps:

[0050] Step 1.1: Binarize the original PCB schematic diagram and convert the image into a black and white binary image using an adaptive threshold segmentation method, where the threshold is dynamically adjusted based on the local pixel brightness.

[0051] Step 1.2: De-noise the binary image obtained in step 1.1 by performing median filtering to eliminate discrete noise points and removing connecting lines and grid background interference through morphological opening and closing operations;

[0052] Step 1.3: Perform text area enhancement on the denoised image, including:

[0053] Locate candidate text areas based on the Canny edge detection algorithm;

[0054] Frequency domain filtering is performed on the candidate area to eliminate periodic noise, and local histogram equalization is used to improve the contrast between text and background;

[0055] Step 1.4: Output the optimized image, wherein the pixel continuity and edge clarity of the text area in the image meet the OCR recognition requirements.

[0056] In the above scheme, step 2 includes the following steps:

[0057] Step 2.1, performing text direction detection on the optimized image, and determining whether the text block is in horizontal or vertical format using a direction classifier;

[0058] Step 2.2: rotating the text block determined to be vertical in step 2.1 by 180 degrees to generate a standardized horizontal text image;

[0059] Step 2.3: Input the rotated image into the fine-tuned OCR model. The OCR model detects text regions of different sizes using a multi-scale sliding window and enhances the recognition results by combining contextual information.

[0060] Step 2.4: Output structured data including text content, coordinates, and confidence level, wherein the OCR model is fine-tuned based on the PCB scenario, specifically including:

[0061] Custom character set training, covering letters, numbers and special symbols in MCU models;

[0062] Data augmentation processing, generating training samples by adding noise, blurring, and simulating vertical text;

[0063] Transfer learning optimization, using the PCB schematic dataset to fine-tune the parameters of the pre-trained model.

[0064] In the above scheme, step 3 includes the following steps:

[0065] Step 3.1: Define the MCU location node and text block node, where:

[0066] MCU node attributes include geometric center coordinates and area information;

[0067] The text block node attributes include text content, coordinates, text length and confidence score;

[0068] Step 3.2: Construct edge weights based on spatial relationships and text features, specifically including:

[0069] Calculate the Euclidean distance d between the MCU node and the text block node ij ;

[0070] According to the length of the text block L j , character abnormality penalty item P ij And weight parameters a, β, γ, according to the formula

[0071]

[0072] Generate association weights;

[0073] The P ij The value of is: When the text block contains the preset illegal characters P j =1, otherwise P j =0;

[0074] Step 3.3: Based on the weight calculation results of step 3.2, generate a directed weighted graph model of MCU nodes and text block nodes.

[0075] In the above scheme, step 4 includes the following steps:

[0076] Step 4.1: Based on the weight calculation result of the graph model, sort the text block nodes associated with each MCU node in descending order of weight value, and select the top N candidate text blocks with the highest weight value, where N≥1;

[0077] Step 4.2: Use the maximum weight matching algorithm to prioritize the edge with the highest weight value for association matching, specifically including:

[0078] Construct a bipartite graph, with the MCU nodes and the candidate text block nodes as two groups of vertices respectively;

[0079] With the weight value as the priority, the unmatched edge with the highest current weight is selected in turn for association. If both ends of the edge are not matched, an association pair is established;

[0080] Step 4.3: Perform conflict check on the matching results:

[0081] If the same text block is matched by multiple MCU nodes, only the association pair with the highest weight value is retained;

[0082] If the same MCU node matches multiple text blocks, only the association pair with the highest weight value is retained;

[0083] Step 4.4: Recalculate the weights of unmatched MCU nodes and text block nodes, and iterate steps 4.1-4.3 until all associated pairs are screened.

[0084] In the above scheme, step 5 includes the following steps:

[0085] Step 5.1: Build the MCU model template library:

[0086] Extract standard MCU models from component database and actual project files to generate basic template sets;

[0087] Perform character variant expansion on the basic template, replace easily confused characters with equivalents to generate an extended template, including establishing a mapping relationship between "1" and "I", and "0" and "o";

[0088] Step 5.2: Calculate the edit distance of the text in the matching result:

[0089] Perform similarity matching between the OCR recognition results and the models in the template library, and calculate the minimum edit distance;

[0090] Define a character replacement cost function where the cost is 0 if the character belongs to an equivalent variant and 1 otherwise;

[0091] Step 5.3: Implement a multi-level verification mechanism:

[0092] First-level verification: select candidate models with edit distance ≤ 2 and generate a candidate list in descending order of similarity;

[0093] Second-level verification: Combines the spatial location characteristics of the associated MCU nodes and eliminates models from the candidate list that do not match the MCU's physical dimensions.

[0094] Step 5.4: Perform automatic error correction and feedback:

[0095] Replace confusing characters in OCR recognition results with the preferred model based on the candidate list;

[0096] The corrected model is compared with the template library. If there is a valid model that is not included, it is automatically added to the template library and the variant mapping rules are updated.

[0097] By integrating multimodal image processing, text recognition optimization, and intelligent association matching algorithms, this paper achieves the following significant advantages in the field of PCB schematic information extraction:

[0098] 1. Improve the robustness of text recognition under complex layouts

[0099] Through binarization preprocessing and adaptive text area enhancement technology, the impact of interfering elements such as connecting lines and grid backgrounds on OCR recognition is effectively suppressed. Combining a rotation correction mechanism with a multi-scale detection strategy, it achieves compatibility with both horizontal and vertical text, avoiding the missing or misplaced characters that can occur with traditional OCR due to abnormal text orientation.

[0100] 2. Establish a high-precision component-text association model

[0101] The graph-based algorithm-based dynamic weight calculation and global optimization matching mechanism integrates spatial proximity, text semantic features and component context information into a fusion model, significantly reducing the risk of mismatching due to overlapping positions or dense layouts, and ensuring the accurate association between MCUs and model labels.

[0102] 3. Enhance character confusion tolerance

[0103] By building an extensible MCU model template library and a multi-level edit distance verification mechanism, automatic error correction and variant matching are performed on easily confused characters (such as "1 / I", "0 / o"), solving the problem of model misjudgment caused by traditional OCR relying on a single recognition result, and improving the semantic consistency of information extraction.

[0104] 4. Optimize algorithm interpretability and engineering applicability

[0105] A modular design separates image processing, OCR recognition, image matching, and error correction processes, making it easier to adjust parameter weights for different scenarios. Compared to deep learning black-box models, this invention offers transparent decision logic at each stage, supports manual verification and rule optimization, and is more suitable for industrial-grade high-reliability scenarios.

[0106] 5. Expand the processing capabilities of multiple types of components

[0107] By adjusting the graph model weight parameters and the template library content, the method can quickly adapt to the feature extraction requirements of other components such as resistors and capacitors, providing a general technical framework for the automatic analysis of all elements of PCB schematics.

[0108] In summary, this invention improves recognition accuracy and reduces manual intervention costs while also balancing processing efficiency and system maintainability, providing core technical support for the intelligent upgrade of the electronic design automation tool chain. BRIEF DESCRIPTION OF THE DRAWINGS

[0109] Figure 1 Flowchart of the present invention;

[0110] Figure 2 A typical PCB schematic is shown, which contains multiple MCUs and their model identifications. The complexity of the schematic is reflected in the following aspects:

[0111] Different components are densely arranged, and there may be interference elements such as resistors and capacitors around the MCU.

[0112] The components are connected by connecting lines, which increases the complexity of the image background.

[0113] Model text may be in horizontal or vertical format, and may vary in font size, color, and clarity. The attached diagram illustrates:

[0114] Location distribution of MCUs.

[0115] The spatial relationship between text and components.

[0116] The influence of text direction and arrangement on recognition. DETAILED DESCRIPTION

[0117] The following is a detailed description of the embodiments of the present invention. Although the present invention will be described and illustrated in conjunction with certain specific embodiments, it should be noted that the present invention is not limited to these embodiments. On the contrary, modifications or equivalent substitutions of the present invention are intended to fall within the scope of the claims of the present invention.

[0118] In addition, in order to better illustrate the present invention, numerous specific details are given in the following detailed description. It will be understood by those skilled in the art that the present invention can also be implemented without these specific details.

[0119] This paper proposes an intelligent recognition method that combines text recognition optimization, graph algorithm matching, and library matching error correction mechanisms. This method aims to address the technical challenges of identifying MCU models in complex PCB schematics and provide accurate data support for the subsequent generation of engineering files or netlists. The technical solution of this invention encompasses the complete process from text recognition optimization to precise matching and error correction. It boasts high accuracy, strong robustness, and interpretability, significantly improving the automation and intelligence of PCB schematic processing. Specific innovations and technical details are as follows:

[0120] 1. Text recognition optimization

[0121] To address the problems of complex text layout in PCB schematics, difficulty in recognizing vertical text, and severe character confusion, this paper optimizes OCR technology in a targeted manner, adopts paddleOCR combined with a fine-tuning strategy, and designs innovative rotation processing and model fine-tuning processes.

[0122] 1.1 Unified processing of horizontal and vertical text

[0123] Component models in PCB schematics may be displayed in horizontal or vertical format. Vertical text, in particular, is poorly recognized by traditional OCR models. Therefore, the following strategies are proposed:

[0124] Vertical text rotation processing: Rotate vertical text 180° to align it with the OCR model input format, effectively preventing traditional OCR models from misidentifying vertical text as meaningless characters.

[0125] Text direction detection: Automatically detect the direction of text blocks using a pre-set direction classifier to determine whether they are horizontal or vertical, and dynamically apply rotation processing.

[0126] 1.2 Model Fine-tuning

[0127] To adapt to the specific character distribution characteristics in PCB schematics, the present invention makes fine adjustments based on the paddleOCR model, specifically including:

[0128] Custom character set: Build a custom character set for common characters (such as letters, numbers, and special symbols) in MCU models to enhance the model's ability to recognize these characters.

[0129] Data enhancement: Data enhancement is performed using actual character samples from PCB schematics, including blurring, adding noise, and simulating vertical text, to improve the model's adaptability to complex backgrounds and low-quality images.

[0130] Optimization for specific scenarios: Through transfer learning, the model's pre-trained weights on the standard OCR dataset are transferred to the PCB schematic scenario and fine-tuned to make it more accurate in identifying component models.

[0131] 1.3 Multi-scale Text Detection

[0132] Since the text in the PCB schematic may have inconsistent font sizes, this invention implements enhanced detection of text of different sizes:

[0133] Multi-scale sliding window: During the text detection process, multi-scale sliding window technology is used to ensure that even small-font model text can be accurately detected.

[0134] Context enhancement: Combines the image context information around the components to pre-position possible text areas and reduce background interference.

[0135] 2. Graph Algorithm for MCU and Text Matching

[0136] After text recognition is complete, associating text information with a specific MCU is a key step in extracting component information. This paper proposes a matching mechanism based on a graph algorithm that combines spatial relationships and text features to accurately establish a matching relationship between MCUs and text labels.

[0137] 2.1 Node Definition

[0138] MCU node: The center position of the MCU (obtained by image segmentation or manual annotation) is used as a node in the graph.

[0139] Text node: The center position of the text block recognized by OCR is used as another node.

[0140] Node attributes: Each node contains location information (such as coordinates), text block length, text content and other features.

[0141] 2.2 Edge Weight Calculation

[0142] In the process of building a graph, the degree of association is expressed by calculating the weights between nodes. The specific formula is as follows:

[0143]

[0144] W ij : The weight between node i (MCU) and node j (text block).

[0145] d ij : Euclidean distance between nodes.

[0146] L i : The length of the text block i. Long text is more likely to be a complete model.

[0147] P ij : Whether it contains a penalty item for impossible characters (if the recognized text block contains characters that cannot appear in the model, then P ij =1, otherwise 0).

[0148] α, β, γ: represent the weight parameters of distance, text length, and character exclusion respectively, and can be adjusted according to the actual scenario.

[0149] 2.3 Matching Strategy

[0150] Matching is performed using the maximum weight matching algorithm:

[0151] Candidate text screening: For each MCU node, several text blocks with the largest weight are selected as candidate texts to avoid the negative impact of incorrect associations.

[0152] Globally optimized matching: Based on the Hungarian algorithm, global optimal matching is achieved to ensure that the text label association relationship of all MCU nodes is optimal overall.

[0153] 2.4 Feature Fusion

[0154] Combine spatial features (positional relationships) and content features (text similarity) to further optimize matching results. For example, by comparing text content with feature templates of common MCU models, clearly inconsistent matching pairs can be eliminated.

[0155] 3. Library matching error correction mechanism

[0156] In order to solve the character confusion problem in OCR recognition and further improve the recognition accuracy, the present invention introduces a library matching error correction mechanism, and performs secondary verification and optimization of the recognition results by constructing an MCU model template library.

[0157] 3.1 Template library construction

[0158] Data source: Common MCU models are crawled from public component databases, manufacturer manuals, and actual engineering documents to build a model template library.

[0159] Variant expansion: character variant expansion is performed on common models, for example, "1", "I", "I" are treated as equivalent characters, and "0" and "o" are treated as equivalent characters.

[0160] 3.2 Edit distance error correction

[0161] The OCR recognition results are matched with the models in the template library, and the similarity is calculated using the edit distance algorithm:

[0162]

[0163] D(i, j): The edit distance between strings i and j.

[0164] cost(i, j): the cost of character replacement, which is 0 if the characters are the same, otherwise 1.

[0165] 3.3 Multi-level verification mechanism

[0166] First-level verification: The OCR results are directly matched with the template library to select the candidate models with the highest similarity.

[0167] Second-level verification: Combined with the graph matching results of the MCU and text, the candidate models are screened again to ensure that the final matching results are consistent with the spatial relationship of the MCU nodes.

[0168] 3.4 Automatic Error Correction and Feedback

[0169] Error correction mechanism: Automatically corrects any confusing characters that may exist in the recognition results, for example, correcting "AMSII17-3.3" to "AMS1117-3.3".

[0170] Feedback mechanism: The final recognition result is compared with the original template library. If there is a new correct model recognition result, it will be added to the template library to continuously optimize the error correction capability.

[0171] 4.Technical advantages

[0172] 4.1 High Accuracy

[0173] Combining text recognition optimization, graph algorithm matching, and library matching error correction mechanisms, the accuracy of MCU model recognition in PCB schematics has been significantly improved, especially in complex scenarios.

[0174] 4.2 Strong Robustness

[0175] It has good adaptability to problems such as vertical text, character confusion, and complex backgrounds, and does not need to rely on fixed-format schematic templates.

[0176] 4.3 Controllability and Explainability

[0177] Compared with the deep learning black box model, the algorithm of the present invention has a clear process, controllable logic, is easy to debug and expand, and is suitable for application in industrial production environments.

[0178] 4.4 Scalability

[0179] This technology is not only applicable to MCU model identification, but can also be extended to the extraction of information of other components (such as resistors and capacitors), providing comprehensive technical support for generating engineering files or netlists from PCB schematics.

[0180] Experimental example:

[0181] In order to verify the effectiveness and reliability of the present invention in identifying MCU models in complex PCB schematic scenarios, a systematic experimental process was designed, covering the specific steps of dataset preparation, performance evaluation index definition, and experimental implementation.

[0182] 1. Dataset

[0183] Data source and construction

[0184] The 1.1 dataset contains 500 actual PCB schematics. These schematics are from files generated by various electronic design tools (such as Altium Designer, KiCad, Eagle, etc.), covering different design styles and formats.

[0185] 1.2 Schematic diagrams vary in complexity and include the following categories:

[0186] 1.2.1 Simple scenario: Schematics with a small number of components, clear layout, and less interference account for about 30%.

[0187] 1.2.2 Complex scenarios: Schematics with dense components, complex layouts, and many connecting lines account for about 50%.

[0188] 1.2.3 Mixed scenarios: Schematics that contain both horizontal and vertical text and a lot of interference, accounting for about 20%.

[0189] Component types and distribution

[0190] 1. The dataset contains approximately 5,000 component models, including common components such as MCUs, resistors, capacitors, and diodes.

[0191] 2. MCU models account for about 30%, and the rest are ordinary components. This distribution is consistent with the proportion of components used in actual projects.

[0192] 3. The character length of the component model varies, with the shortest being 3 characters (such as "IC1") and the longest being 15 characters (such as "STM32F407VGT6").

[0193] Data quality and interference factors

[0194] 1. The dataset contains common interference factors in real-world scenarios, such as:

[0195] 2. Blurred text area.

[0196] 3. The connecting line covers part of the text.

[0197] 4. Some component labels overlap with the MCU label.

[0198] 5. Vertical and horizontal text are mixed.

[0199] Annotation and Verification

[0200] 1. All component models in the dataset are manually labeled by professional engineers and undergo two rounds of manual verification to ensure the accuracy of the labeling results.

[0201] 2. The component positions, label content, and matching relationships of each schematic are clearly marked, providing high-quality "ground truth" for model verification.

[0202] 2. Evaluation indicators

[0203] In order to comprehensively evaluate the performance of the solution of the present invention, the following key evaluation indicators are defined:

[0204] Precision

[0205] Accuracy refers to the ratio of correctly identified component models to the total number of identified components, and is used to measure the accuracy of the system's recognition results.

[0206] Recall

[0207] The recall rate refers to the ratio of correctly identified component models to the total number of actual components, and is used to measure the coverage capability of the system.

[0208] F1-Score

[0209] There may be a certain trade-off between precision and recall, so the F1-Score is used to comprehensively evaluate the two.

[0210] 3. Experimental Implementation Process

[0211] Experimental Preparation

[0212] The 500 PCB schematics were divided into training set (70%), validation set (15%) and test set (15%) according to their complexity.

[0213] The training set is used to fine-tune the OCR model and optimize the parameters of the library matching error correction mechanism.

[0214] Experimental procedures

[0215] Text recognition: Preprocess each schematic in the test set and use the optimized OCR model to extract text blocks and their content.

[0216] Graph algorithm matching: Establish a matching relationship between text blocks and MCU nodes to generate preliminary component labels.

[0217] Library matching error correction: Compare the preliminary results with the template library, correct possible recognition errors, and output the final model results.

[0218] Results recording and analysis

[0219] Record the recognition results of each schematic diagram, including the number of components recognized, accuracy, and recall rate.

[0220] Perform error analysis on misidentified and unidentified components, and classify and count the error types (such as character confusion, position mismatch, etc.).

[0221] Comparative experiment

[0222] The solution of the present invention is compared with traditional OCR technology and deep learning end-to-end processing methods to evaluate its performance advantages.

[0223] IV. Experimental Objectives

[0224] Verify the application effect of the present invention in complex PCB schematic scenarios to ensure that it is superior to existing technologies in terms of accuracy, recall rate and efficiency.

[0225] Analyze the robustness of the system under different interference conditions to provide data support for subsequent improvements.

[0226] Evaluate the error correction capability of the template library and verify its effectiveness in handling character confusion issues.

[0227] 5. Experimental Results

[0228] method Accuracy Recall Average recognition time Traditional OCR 85.30％ 82.10％ 2.5 seconds per frame Deep Learning 90.20％ 89.50％ 3.1 seconds per frame Solution of the present invention 98.50％ 98.20％ 0.8 seconds per frame

[0229] 6. Results Analysis

[0230] Accuracy and recall: The solution of the present invention maintains a high recognition rate under complex backgrounds, especially in the problems of vertical text and character confusion.

[0231] Efficiency: The average recognition time is significantly lower than other methods, making it suitable for large-scale applications.

Claims

1. A method for extracting component information from a PCB schematic diagram based on text recognition and graph algorithm, characterized in that: The following steps are involved: Step 1: Pre-process the PCB schematic diagram by binarization, denoising, and text area enhancement to generate an optimized image; Step 2: Perform text orientation detection and rotation processing on the optimized image obtained in step 1, input the fine-tuned OCR model for multi-scale text recognition, and output the recognition result including text content, coordinates and confidence level; Step 3: Build a graph model containing MCU location nodes and text block nodes, and establish associated edges through the weight calculation module; Step 4: Perform global optimal matching on the graph model based on the Hungarian algorithm to select the association pairs between MCU and text blocks; Step 5: Calculate the edit distance between the matching results and the preset MCU model template library, correct character confusion errors through a multi-level verification mechanism, and output the final component information.

2. The method according to claim 1, characterized in that The step 1 comprises the following steps: Step 1.1: Binarize the original PCB schematic diagram and convert the image into a black and white binary image using an adaptive threshold segmentation method, where the threshold is dynamically adjusted based on the local pixel brightness. Step 1.2: De-noise the binary image obtained in step 1.1 by performing median filtering to eliminate discrete noise points and removing connecting lines and grid background interference through morphological opening and closing operations; Step 1.3: Perform text area enhancement on the denoised image, including: Locate candidate text areas based on the canny edge detection algorithm; Frequency domain filtering is performed on the candidate area to eliminate periodic noise, and local histogram equalization is used to improve the contrast between text and background; Step 1.4: Output the optimized image, wherein the pixel continuity and edge clarity of the text area in the image meet the OCR recognition requirements.

3. The method according to claim 1, characterized in that The step 2 comprises the following steps: Step 2.1, performing text direction detection on the optimized image, and determining whether the text block is in horizontal or vertical format using a direction classifier; Step 2.2: rotating the text block determined to be vertical in step 2.1 by 180 degrees to generate a standardized horizontal text image; In step 2.3, the rotated image is fed into an OCR model fine-tuned for PCB scenarios (we selected several of the most popular OCR models, including EasyOCR, PaddleOCR, and GoogleOCR). The model first normalizes and preprocesses the image. It then uses a multi-scale sliding window approach to traverse the image with windows of varying sizes, detecting potential text regions containing characters of varying sizes. The candidate regions in each window are encoded using a feature extraction network (such as a CNN) and fed into a sequence recognition module (such as a CRNN or Transformer) to recognize the character sequence. During recognition, the model incorporates contextual information processing mechanisms, such as bidirectional LSTMs or self-attention mechanisms, to model and fuse the contextual relationships between adjacent windows and characters, automatically correcting misidentifications of isolated characters and improving the recognition accuracy of long character strings. Finally, the model outputs the recognition results for each text region, while also fusing and deduplicating overlapping regions based on their confidence levels. This generates structured text content, location coordinates, and confidence information, providing high-quality foundational data for subsequent data output and applications. Step 2.4: Output structured data including text content, coordinates, and confidence level, wherein the OCR model is fine-tuned based on the PCB scenario, specifically including: Custom character set training, covering letters, numbers and special symbols in MCU models, making it easier to fine-tune existing models; Data augmentation processing, which expands the training data by adding noise, blurring, and simulating vertical text to generate training samples to reduce overfitting; Transfer learning optimization uses the PCB schematic dataset to fine-tune some or all parameters of the pre-trained model (depending on the effect and accuracy requirements).

4. The method according to claim 1, wherein The step 3 comprises the following steps: Step 3.1: Define the MCU location node and text block node, where: MCU node attributes include geometric center coordinates and area information; The text block node attributes include text content, coordinates, text length and confidence score; Step 3.2: Construct edge weights based on spatial relationships and text features, specifically including: Calculate the Euclidean distance d between the MCU node and the text block node ij ; According to the length of the text block L j , character abnormality penalty item P ij And weight parameters a, β, γ, according to the formula Generate association weights; The P ij The value of is: When the text block contains the preset illegal characters P j =1, otherwise P j =0; Step 3.3: Based on the weight calculation results of step 3.2, generate a directed weighted graph model of MCU nodes and text block nodes.

5. The method according to claim 1, wherein The step 4 comprises the following steps: Step 4.1: Based on the weight calculation result of the graph model, sort the text block nodes associated with each MCU node in descending order of weight value, and select the top N candidate text blocks with the highest weight value, where N≥1; Step 4.2: Use the maximum weight matching algorithm to prioritize the edge with the highest weight value for association matching, specifically including: Construct a bipartite graph, with the MCU nodes and the candidate text block nodes as two groups of vertices respectively; With the weight value as the priority, the unmatched edge with the highest current weight is selected in turn for association. If both ends of the edge are not matched, an association pair is established; Step 4.3: Perform conflict check on the matching results: If the same text block is matched by multiple MCU nodes, only the association pair with the highest weight value is retained; If the same MCU node matches multiple text blocks, only the association pair with the highest weight value is retained; Step 4.4: Recalculate the weights of unmatched MCU nodes and text block nodes, and iterate steps 4.1-4.3 until all associated pairs are screened.

6. The method according to claim 1, characterized in that The step 5 comprises the following steps: Step 5.1: Build the MCU model template library: Extract standard MCU models from component database and actual project files to generate basic template sets; Perform character variant expansion on the basic template, replace easily confused characters with equivalents to generate an extended template, including establishing a mapping relationship between "1" and "I", and "0" and "o"; Step 5.2: Calculate the edit distance of the text in the matching result: Perform similarity matching between the OCR recognition results and the models in the template library, and calculate the minimum edit distance; Define a character replacement cost function where the cost is 0 if the character belongs to an equivalent variant and 1 otherwise; Step 5.3: Implement a multi-level verification mechanism: First-level verification: select candidate models with edit distance ≤ 2 and generate a candidate list in descending order of similarity; Second-level verification: Combines the spatial location characteristics of the associated MCU nodes and eliminates models from the candidate list that do not match the MCU's physical dimensions. Step 5.4: Perform automatic error correction and feedback: Replace confusing characters in OCR recognition results with the preferred model based on the candidate list; The corrected model is compared with the template library. If there is a valid model that is not included, it is automatically added to the template library and the variant mapping rules are updated.

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