Preparation method and system of integrated circuit chip and integrated circuit chip
By covering the insulating flexible layer in the target area of the integrated circuit chip, the deformation problem caused by external forces during testing is solved, the consistency of chip functions and the life span are achieved, and the stability of electrical performance is improved.
Patent Information
- Application Number
- CN202510639666.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-19
- Publication Date
- 2025-08-08
AI Technical Summary
During testing of integrated circuit chips, the external force applied causes deformation of specific areas of the chip, affecting functional consistency and reliability.
The insulating flexible layer is covered in the target area of the integrated circuit chip, and the insulating flexible layer structure is formed by glue to avoid rigid contact between the plastic seal material and the target area, and the insulating flexible layer is used to offset the stress caused by external forces.
The functional consistency of the front and rear chips of plastic seals is maintained, and deformation and functional fluctuations caused by external forces are prevented, the life of the chip is extended, and the stability of electrical performance is improved.
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Figure CN120453172A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of integrated circuit technology, and in particular to a method and system for preparing an integrated circuit chip, and the integrated circuit chip. Background Art
[0002] Traditional integrated circuit chips encapsulated using epoxy resin encapsulation are directly encapsulated with encapsulant after the wire bonding process is complete. This creates a rigid contact between the encapsulant and the chip. However, when testing this chip, external force must be applied to the encapsulant to force the pins on the chip into contact with the test socket to ensure connectivity. Consequently, the applied force can cause deformation in specific areas of the chip, potentially leading to functional fluctuations. Consequently, methods for preparing integrated circuit chips still require improvement. Summary of the Invention
[0003] The technical problem to be solved by the present disclosure is to overcome the defect in the prior art that, when testing an integrated circuit chip, the external force applied will cause deformation of a specific area on the integrated circuit chip, thereby causing the function of the integrated circuit chip to fluctuate, and to provide a method, system and integrated circuit chip for preparing an integrated circuit chip.
[0004] The present disclosure solves the above technical problems through the following technical solutions:
[0005] In a first aspect, a method for preparing an integrated circuit chip is provided, wherein the method is applied to an integrated circuit chip that is plastic-encapsulated using an epoxy resin encapsulation process; the method comprises:
[0006] In response to completing wire bonding on the initial integrated circuit chip, determining a target area on the initial integrated circuit chip;
[0007] covering the target area with an insulating flexible layer;
[0008] After the operation of covering the insulating flexible layer is completed, a plastic encapsulation operation is performed until the target integrated circuit chip is prepared.
[0009] Optionally, the insulating flexible layer is a layer structure formed based on glue.
[0010] Optionally, the step of covering the target area with an insulating flexible layer includes:
[0011] In response to coating the glue on the target area, the glue is baked to form the insulating flexible layer, so that the insulating flexible layer covers the target area.
[0012] Optionally, the amount of glue used is positively correlated with the area of the target region.
[0013] Optionally, the step of covering the target area with an insulating flexible layer comprises:
[0014] The insulating flexible layer completely covers the target area.
[0015] Optionally, the step of completely covering the target area with the insulating flexible layer includes:
[0016] Acquiring an image of the current coating state of the glue on the target area using a preset image recognition method;
[0017] In response to the target area in the coating state image being coated with the glue, it is determined that the insulating flexible layer completely covers the target area.
[0018] Optionally, the step of completely covering the target area with the insulating flexible layer includes:
[0019] acquiring a coverage state image of the insulating flexible layer on the target area;
[0020] The coverage status image is input into an image recognition model to determine whether the insulating flexible layer completely covers the target area.
[0021] Optionally, the step of determining the target area on the initial integrated circuit chip includes:
[0022] Obtaining a chip type of the initial integrated circuit chip and a pre-established first correspondence relationship; wherein the first correspondence relationship is a correspondence relationship between the chip type of the integrated circuit chip and an area on the integrated circuit chip;
[0023] The target area is acquired based on the first corresponding relationship and the chip type of the initial integrated circuit chip.
[0024] In a second aspect, a system for preparing an integrated circuit chip is provided. The system is applied to an integrated circuit chip that is encapsulated using an epoxy resin encapsulation process. The system comprises:
[0025] a response module, in response to completing wire bonding on the initial integrated circuit chip, determining a target area on the initial integrated circuit chip;
[0026] a covering module, configured to cover the target area with an insulating flexible layer;
[0027] The preparation module is used to perform a plastic packaging operation after completing the operation of covering the insulating flexible layer until a target integrated circuit chip is prepared.
[0028] Optionally, the insulating flexible layer is a layer structure formed based on glue.
[0029] Optionally, the coverage module includes:
[0030] The first response unit bakes the glue to form the insulating flexible layer in response to coating the glue on the target area, so that the insulating flexible layer covers the target area.
[0031] Optionally, the amount of glue used is positively correlated with the area of the target region.
[0032] Optionally, the covering module is further configured to completely cover the target area with the insulating flexible layer.
[0033] Optionally, the coverage module further includes:
[0034] A first acquisition unit acquires an image of the current coating state of the glue on the target area using a preset image recognition method;
[0035] In a second response, the target area in the coating state image is coated with the glue, and it is determined that the insulating flexible layer completely covers the target area.
[0036] Optionally, the coverage module further includes:
[0037] a second acquiring unit, configured to acquire a coverage state image of the insulating flexible layer on the target area;
[0038] A determination unit is configured to input the coverage status image into an image recognition model to determine whether the insulating flexible layer completely covers the target area.
[0039] Optionally, the responding modules include:
[0040] a third acquiring unit, configured to acquire a chip type of the initial integrated circuit chip and a pre-established first correspondence relationship; wherein the first correspondence relationship is a correspondence relationship between the chip type of the integrated circuit chip and an area on the integrated circuit chip;
[0041] A fourth acquiring unit acquires the target area based on the first corresponding relationship and the chip type of the initial integrated circuit chip.
[0042] In a third aspect, an integrated circuit chip is provided, wherein the integrated circuit chip is prepared by the integrated circuit chip preparation method described above.
[0043] On the basis of conforming to the common sense in this field, the above-mentioned preferred conditions can be arbitrarily combined to obtain the preferred embodiments of the present disclosure.
[0044] The positive and progressive effect of the present disclosure lies in that covering the target area of the initial integrated circuit chip with an insulating flexible layer can prevent rigid contact between the molding compound and the target area after the molding operation. Thus, when testing the initial integrated circuit chip covered with the insulating flexible layer, the insulating flexible layer offsets the stress transmitted by the molding compound due to deformation caused by external forces, thereby preventing the stress generated by the molding compound from affecting the target area. This prevents functional fluctuations in the target integrated circuit chip obtained after the test, thereby maintaining functional consistency between the initial integrated circuit chip before the molding test and the target integrated circuit chip obtained after the molding test. BRIEF DESCRIPTION OF THE DRAWINGS
[0045] Figure 1 This is a flow chart of the production process of an integrated circuit chip in a method for preparing an integrated circuit chip provided in Example 1 of the present disclosure.
[0046] Figure 2a This is a schematic diagram of the first step of the plastic encapsulation process in the method for preparing an integrated circuit chip provided in Example 1 of the present disclosure.
[0047] Figure 2b This is a schematic diagram of the second step of the plastic encapsulation process in the method for preparing an integrated circuit chip provided in Example 1 of the present disclosure.
[0048] Figure 2c This is a schematic diagram of the third step of the plastic encapsulation process in the method for preparing an integrated circuit chip provided in Example 1 of the present disclosure.
[0049] Figure 2d This is a schematic diagram of the fourth step of the plastic encapsulation process in the method for preparing an integrated circuit chip provided in Example 1 of the present disclosure.
[0050] Figure 3 This is a flow chart of a method for preparing an integrated circuit chip provided in Example 1 of the present disclosure.
[0051] Figure 4 This is a schematic diagram of the insulating flexible layer before baking in the method for preparing an integrated circuit chip provided in Example 1 of the present disclosure.
[0052] Figure 5 This is a schematic diagram of the insulating flexible layer after baking in the method for preparing an integrated circuit chip provided in Example 1 of the present disclosure.
[0053] Figure 6 This is a flow chart of another method for preparing an integrated circuit chip provided in Example 1 of the present disclosure.
[0054] Figure 7 A schematic diagram of a module of an integrated circuit chip manufacturing system provided in Example 2 of the present disclosure. DETAILED DESCRIPTION
[0055] The present disclosure is further illustrated below by way of examples, but the present disclosure is not limited to the scope of the examples.
[0056] In the embodiments of the present disclosure, prefixes such as "first" and "second" are used only to distinguish different description objects and have no limiting effect on the position, order, priority, quantity or content of the described objects. In the embodiments of the present disclosure, the use of prefixes such as ordinal numbers to distinguish description objects does not constitute a restriction on the described objects. For the statement of the described objects, please refer to the description in the context of the embodiments, and the use of such prefixes should not constitute an unnecessary restriction. In addition, in the description of this embodiment, unless otherwise specified, the meaning of "plurality" is two or more.
[0057] Example 1
[0058] Before describing the contents of this disclosure in detail, Figure 1 The current production process of integrated circuit chips is first described.
[0059] The current integrated circuit chip production process can generally be divided into four stages: circuit design, wafer manufacturing, wafer testing, and packaging testing.
[0060] Circuit design refers to the process of converting system, logic, and performance design requirements into specific physical layouts with the help of computer-aided software, mainly including logic design, circuit design, and graphic design.
[0061] Wafer manufacturing refers to the use of single crystal silicon, gallium nitride, silicon carbide and other basic raw materials, using a series of complex processes such as diffusion, lithography, etching, ion implantation, thin film growth, polishing and metallization in a lithography machine to produce wafers that can achieve the expected design functions.
[0062] Wafer testing refers to the use of a testing machine to test the functionality of the chip, distinguishing good from defective chips to save packaging costs.
[0063] Packaging testing refers to electrically connecting the contacts on a single chip to external pins and installing a shell on the outside of the chip to fix, seal, and protect the chip. The chip is then subjected to a final performance test to screen out good products that can be supplied to customers.
[0064] Specifically, the process of the above packaging test is shown in Table 1:
[0065] Table 1
[0066]
[0067] Among them, the plastic sealing process in Table 1 is combined with Figure 2a to Figure 2d illustrate.
[0068] S1: placing the initial integrated circuit chip 1 after wire bonding directly on a corresponding position inside the plastic packaging mold, and placing a block of plastic packaging material 2 in the hole of the plastic packaging mold.
[0069] S2: Under high temperature, the block-shaped plastic packaging material 2 melts and flows into the interior of the plastic packaging mold along the track of the plastic packaging mold.
[0070] S3: The liquid molding compound 2 starts from the bottom of the initial integrated circuit chip 1 and gradually covers the initial integrated circuit chip 1 .
[0071] S4: After the initial integrated circuit chip 1 is completely covered and wrapped, the plastic encapsulation and curing in Table 1 are performed.
[0072] While the aforementioned plastic encapsulation process is mature, provides excellent chip protection, and is relatively low-cost, the plastic encapsulation compound and the initial integrated circuit chip are in rigid contact. This rigid contact can cause external forces to slightly deform the encapsulation compound during testing, leading to deformation of the initial integrated circuit chip. This can cause performance fluctuations in the initial integrated circuit chip under different test environments, significantly impacting the consistency of initial integrated circuit chip testing and making it difficult to accurately screen out defective initial integrated circuit chips.
[0073] Therefore, in order to prevent the chip inside the integrated circuit chip from being deformed due to external force applied during testing of the integrated circuit chip, an embodiment of the present disclosure provides a method for preparing an integrated circuit chip. Figure 3 This is a flow chart of a method for preparing an integrated circuit chip provided in Example 1 of the present disclosure. The method is applied to an integrated circuit chip that is encapsulated using an epoxy resin encapsulation process; preferably, the method is applied to a high-precision digital-to-analog conversion circuit product that is encapsulated using an epoxy resin encapsulation process. The method comprises the following steps:
[0074] Step 101 : In response to completing wire bonding on an initial integrated circuit chip, determine a target area on the initial integrated circuit chip.
[0075] The initial integrated circuit chip is a good chip obtained after the above-mentioned wafer testing.
[0076] Step 102: Cover the target area with an insulating flexible layer.
[0077] Step 103: After the insulating flexible layer is covered, a plastic encapsulation operation is performed until the target integrated circuit chip is obtained.
[0078] The target integrated circuit chip is a good chip obtained after the above-mentioned packaging (plastic sealing) test packaging.
[0079] In this embodiment, covering the target area of the initial integrated circuit chip with an insulating flexible layer prevents rigid contact between the molding compound and the target area after the molding operation. Thus, when testing the initial integrated circuit chip covered with the insulating flexible layer, the insulating flexible layer offsets the stress transmitted by the molding compound due to deformation caused by external forces, thereby preventing the stress generated by the molding compound from affecting the target area. This prevents functional fluctuations in the target integrated circuit chip obtained after the test, thereby maintaining functional consistency between the initial integrated circuit chip before the molding test and the target integrated circuit chip obtained after the molding test. Furthermore, covering the target area with the insulating flexible layer prevents external mechanical impacts, friction, and the like from directly affecting the target area and potentially damaging its function, thereby extending the lifespan of the target integrated circuit chip.
[0080] In one embodiment, the insulating flexible layer is a glue-based layer structure.
[0081] Preferably, the glue can be coating glue.
[0082] In this embodiment, due to the excellent insulating properties of the glue, the insulating flexible layer formed by the glue can effectively isolate the different electrodes and circuits in the target area. This not only prevents leakage, but also prevents short circuits in the target area caused by tiny conductive particles or impurities, thereby ensuring the stable electrical performance of the target integrated circuit chip.
[0083] In one embodiment, the step of covering the target area with an insulating flexible layer comprises:
[0084] In response to coating the glue on the target area, the glue is baked to form an insulating flexible layer, so that the insulating flexible layer covers the target area.
[0085] Among them, see Figure 4 and Figure 5 , Figure 4 This is the state of the insulating flexible layer before baking. Figure 5 This is the state of the insulating flexible layer after baking.
[0086] In this embodiment, the glue applied on the target area is baked so that the insulating flexible layer formed after baking can be more tightly bonded to the initial integrated circuit chip, thereby reducing the risk of separation between the insulating flexible layer and the initial integrated circuit chip.
[0087] In one embodiment, the amount of glue used is directly proportional to the size of the target area.
[0088] In this embodiment, the amount of glue used is positively correlated with the target area, which can not only avoid glue waste caused by excessive glue use, but also avoid the phenomenon of the target area not being covered due to insufficient glue use.
[0089] In one embodiment, the correspondence between the amount of glue used and the area of the target area can also be established by relevant personnel after conducting a large number of experiments. In this way, the amount of glue used can be found more quickly in the correspondence based on the area of the target area, thereby greatly saving the search time.
[0090] In one embodiment, the step of covering the target area with an insulating flexible layer comprises:
[0091] Completely cover the target area with the insulating flexible layer.
[0092] In this embodiment, when the insulating flexible layer completely covers the target area, the target area of the initial integrated circuit chip is completely isolated from the molding compound. Consequently, when the molding compound experiences stress and deformation due to external forces, the insulating flexible layer effectively offsets the stress transmitted by the molding compound, thereby preventing the stress transmitted by the molding compound from affecting the target area. This effectively prevents deformation of the target area during post-molding testing. Furthermore, molding the target area after the insulating flexible layer completely covers the target area effectively prevents external mechanical impacts, friction, and the like from directly affecting the target area, thereby extending the life of the target integrated chip.
[0093] In one embodiment, the step of completely covering the target area with the insulating flexible layer includes:
[0094] S1: Using a preset image recognition method to obtain an image of the current coating state of the glue in the target area.
[0095] S2: In response to the target area in the coating state image being coated with glue, determining whether the insulating flexible layer completely covers the target area.
[0096] Specifically, the preset image recognition method can be used to use an image acquisition device to obtain the current coating status image of the glue in the target area, and then compare it with the historical coating status image. If the similarity exceeds a preset threshold, it can be determined that the target area is coated with glue.
[0097] In this embodiment, a preset image recognition method is used to analyze the current glue coating status in the target area, allowing for highly accurate identification of whether the target area is fully coated. Compared to traditional manual visual inspection, analyzing the current coating status image using the preset image recognition method can avoid inaccurate results caused by human factors (such as fatigue and subjective judgment). Furthermore, analyzing the current coating status image using the preset image recognition method enables automated recognition, significantly improving recognition efficiency.
[0098] In one embodiment, the step of completely covering the target area with the insulating flexible layer includes:
[0099] S1: Acquire a coverage state image of the insulating flexible layer on the target area.
[0100] Preferably, an image of the covering state of the insulating flexible layer in the target area is acquired under a microscope.
[0101] S2: Input the coverage status image into the image recognition model to determine whether the insulating flexible layer completely covers the target area.
[0102] It should be noted that the image recognition model is trained using a large number of initial integrated circuit chips and images of the insulating flexible layer covering their corresponding areas as training samples. The specific implementation of how the image recognition model is trained using these training samples is described in the related technical description and is not detailed here. Alternatively, personnel can determine whether the insulating flexible layer covers the target area by observing an image of the insulating flexible layer covering the target area under a microscope.
[0103] In this embodiment, by acquiring an image of the coverage status of the insulating flexible layer on the target area and analyzing it using an image recognition model, it is possible to accurately detect whether the insulating flexible layer completely covers the target area. Compared to traditional manual visual inspection, analyzing the coverage status image using an image recognition model can avoid inaccurate results caused by human factors (such as fatigue and subjective judgment). Furthermore, analyzing the coverage status image using an image recognition model enables automated recognition, significantly improving recognition efficiency.
[0104] In one embodiment, the step of obtaining and determining a target area on an initial integrated circuit chip is:
[0105] S1: Obtaining a chip type of an initial integrated circuit chip and a pre-established first correspondence relationship; wherein the first correspondence relationship is a correspondence relationship between the chip type of the integrated circuit chip and an area on the integrated circuit chip.
[0106] It should be noted that the pre-established first correspondence is established by relevant personnel after a large number of experiments. Therefore, the pre-established first correspondence can accurately characterize the correspondence between the chip type of the integrated circuit chip and the area on the integrated circuit chip.
[0107] S2: Acquire a target area based on the first corresponding relationship and the chip type of the initial integrated circuit chip.
[0108] In this embodiment, the pre-established first correspondence is equivalent to a clear index, which can directly associate the chip type of the integrated circuit chip with the area on the integrated circuit chip, so that during the acquisition process, the corresponding area can be found in the first correspondence only according to the chip type of the initial integrated circuit chip, thereby greatly saving the search time.
[0109] In one embodiment, Figure 6 This is a flow chart of another method for preparing an integrated circuit chip provided in Example 1 of the present disclosure. Figure 6 The preparation of the target integrated circuit chip is described.
[0110] S1: Thinning the back of the initial integrated circuit chip, applying film to the back, dicing, mounting and wire bonding.
[0111] S2: Drop coating glue on the target area of the initial integrated circuit chip, wait until the coating glue completely covers the target area and then bake.
[0112] It should be noted that coating glue is a type of insulating flexible layer. Specifically, the glue is applied using a dedicated fixture onto the target area of the initial integrated circuit chip. As the coating glue flows, it slowly covers the entire target area. It is then baked in a dedicated oven. After baking, the coating glue becomes a soft solid that adheres tightly to the initial integrated circuit chip.
[0113] S3: The initial integrated circuit chip with the target area completely covered by the coating glue is plastic-sealed, plastic-sealed and cured, electroplated, printed, cut, tested and packaged to obtain the target integrated circuit chip.
[0114] In one embodiment, experiments demonstrated that for a high-precision DAC chip, the BL1080 (a target integrated circuit chip), the performance requirement required functional fluctuations to be controlled within 1‰. Using plastic encapsulation adhesive without an insulating flexible layer resulted in functional fluctuations of approximately 1%, exceeding the design requirement. Adding an insulating flexible layer reduced the functional fluctuations to within 1‰. Therefore, this disclosure addresses the impact of packaging stress on chip functionality, thereby improving the consistency of chip functionality before and after packaging.
[0115] Example 2
[0116] Corresponding to the aforementioned embodiment of the method for preparing an integrated circuit chip, the present disclosure also provides an embodiment of a system for preparing an integrated circuit chip. Figure 7 This is a schematic diagram of a module of a system for preparing an integrated circuit chip provided in Example 2 of the present disclosure. The system is applied to an integrated circuit chip that is encapsulated using an epoxy resin encapsulation process. The system includes:
[0117] A response module 71 , in response to completing wire bonding on the initial integrated circuit chip, determines a target area on the initial integrated circuit chip;
[0118] a covering module 72 for covering the target area with an insulating flexible layer;
[0119] The preparation module 73 is used to perform a plastic packaging operation after completing the operation of covering the insulating flexible layer until the target integrated circuit chip is prepared.
[0120] In one embodiment, the insulating flexible layer is a glue-based layer structure.
[0121] In one embodiment, the coverage module 72 includes:
[0122] The first response unit bakes the glue to form an insulating flexible layer in response to coating the glue on the target area, so that the insulating flexible layer covers the target area.
[0123] In one embodiment, the amount of glue used is directly proportional to the size of the target area.
[0124] In one embodiment, the covering module 72 is further configured to completely cover the target area with the insulating flexible layer.
[0125] In one embodiment, the coverage module 72 further includes:
[0126] The first acquisition unit acquires an image of the current coating state of the glue in the target area using a preset image recognition method;
[0127] In a second response, the target area in the coating state image is coated with glue, and it is determined that the insulating flexible layer completely covers the target area.
[0128] In one embodiment, the coverage module 72 further includes:
[0129] a second acquiring unit, configured to acquire a coverage state image of the insulating flexible layer on the target area;
[0130] The determination unit is used to input the coverage status image into the image recognition model to determine whether the insulating flexible layer completely covers the target area.
[0131] In one embodiment, the responding module 71 includes:
[0132] a third acquiring unit, configured to acquire a chip type of the initial integrated circuit chip and a pre-established first correspondence relationship; wherein the first correspondence relationship is a correspondence relationship between the chip type of the integrated circuit chip and an area on the integrated circuit chip;
[0133] The fourth acquiring unit acquires the target area based on the first corresponding relationship and the chip type of the initial integrated circuit chip.
[0134] Since the system embodiments generally correspond to the method embodiments, reference will be made to the description of the method embodiments for relevant details. The system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components of the units may or may not be physical units, i.e., they may be located in one place or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of the disclosed solution.
[0135] Example 3
[0136] The present disclosure also provides an embodiment of an integrated circuit chip, which is manufactured by the above-mentioned method for manufacturing an integrated circuit chip.
[0137] While specific embodiments of the present disclosure have been described above, those skilled in the art will appreciate that these are merely illustrative and that the scope of protection of the present disclosure is defined by the appended claims. Those skilled in the art may make various changes or modifications to these embodiments without departing from the principles and essence of the present disclosure, and such changes and modifications are intended to fall within the scope of protection of the present disclosure.
Claims
1. A method for preparing an integrated circuit chip, characterized in that: The preparation method is applied to an integrated circuit chip that is plastic-sealed using an epoxy resin encapsulation process; the preparation method comprises: In response to completing wire bonding on the initial integrated circuit chip, determining a target area on the initial integrated circuit chip; covering the target area with an insulating flexible layer; After the operation of covering the insulating flexible layer is completed, a plastic encapsulation operation is performed until the target integrated circuit chip is prepared.
2. The preparation method according to claim 1, wherein The insulating flexible layer is a layer structure formed based on glue.
3. The preparation method according to claim 2, wherein The step of covering the target area with an insulating flexible layer comprises: In response to coating the glue on the target area, the glue is baked to form the insulating flexible layer, so that the insulating flexible layer covers the target area.
4. The preparation method according to claim 2, wherein The amount of glue used is positively correlated with the area of the target area.
5. The preparation method according to claim 2, wherein The step of covering the target area with an insulating flexible layer comprises: The insulating flexible layer completely covers the target area.
6. The preparation method according to claim 5, wherein The step of completely covering the target area with the insulating flexible layer comprises: Acquiring an image of the current coating state of the glue on the target area using a preset image recognition method; In response to the target area in the coating state image being coated with the glue, it is determined that the insulating flexible layer completely covers the target area.
7. The preparation method according to claim 5, wherein The step of completely covering the target area with the insulating flexible layer comprises: acquiring a coverage state image of the insulating flexible layer on the target area; The coverage status image is input into an image recognition model to determine whether the insulating flexible layer completely covers the target area.
8. The preparation method according to any one of claims 1 to 7, characterized in that The step of determining the target area on the initial integrated circuit chip comprises: Obtaining a chip type of the initial integrated circuit chip and a pre-established first correspondence relationship; wherein the first correspondence relationship is a correspondence relationship between the chip type of the integrated circuit chip and an area on the integrated circuit chip; The target area is acquired based on the first corresponding relationship and the chip type of the initial integrated circuit chip.
9. A system for preparing an integrated circuit chip, characterized in that: The preparation system is applied to integrated circuit chips that are plastic-encapsulated using an epoxy resin encapsulation process, and the preparation system includes: a response module, in response to completing wire bonding on the initial integrated circuit chip, determining a target area on the initial integrated circuit chip; a covering module, configured to cover the target area with an insulating flexible layer; The preparation module is used to perform a plastic packaging operation after completing the operation of covering the insulating flexible layer until a target integrated circuit chip is prepared.
10. An integrated circuit chip, characterized in that: The integrated circuit chip is prepared by the method for preparing an integrated circuit chip according to any one of claims 1 to 8.