Detector circuit with current conversion mechanism of power converter

Abstract

The invention discloses a detector circuit with a current conversion mechanism of a power converter. The output end of the power converter is connected with the first end of the inductor. The detector circuit detects a current flowing through an inductor, converts the detected current as a detection current into a detection voltage, and compares the detection voltage with a reference voltage to generate a comparison signal. The detector circuit counts a count value each time the level of the comparison signal reaches a reference level.

Description

Technical Field

[0001] The present invention relates to a power converter, and in particular to a detector circuit having a current conversion mechanism of the power converter. Background Art

[0002] Power converters are essential for electronic devices, used to condition and supply power to the devices. The high-bridge and low-bridge switches of a power converter must switch based on voltage or current data from the converter's circuit components to enable the converter to supply power to the load. However, conventional control circuits for power converters fail to accurately detect the current in the inductor connected to the converter's output terminal, making it impossible to precisely control the on-time and off-time of the high-bridge and low-bridge switches. This results in low power converter efficiency. Summary of the Invention

[0003] To address the shortcomings of the prior art, the present invention provides a detector circuit with a current conversion mechanism for a power converter. The detector circuit of the present invention is applicable to a power converter. The power converter includes a high-bridge switch, a low-bridge switch, and a drive circuit. The drive circuit is connected to the control terminal of the high-bridge switch and the control terminal of the low-bridge switch. The first terminal of the high-bridge switch is coupled to an input voltage. The second terminal of the high-bridge switch is connected to the first terminal of the low-bridge switch. The second terminal of the low-bridge switch is grounded. The node between the second terminal of the high-bridge switch and the first terminal of the low-bridge switch is connected to the first terminal of an inductor. The second terminal of the inductor is connected to a load. The detector circuit of the present invention with a current conversion mechanism for a power converter includes a current sensing circuit, a first resistor, a comparator, and a counting circuit. The current sensing circuit is connected to the first terminal of the inductor. The current sensing circuit is configured to sense the current at the first terminal of the inductor and to amplify the sensed current at the first terminal of the inductor as a detection current. The first terminal of the first resistor is connected to the first terminal of the inductor. The second terminal of the first resistor is grounded. The detection current flows through the first terminal of the first resistor. The first input terminal of the comparator is connected to the first terminal of the first resistor. The second input terminal of the comparator is coupled to a reference voltage. The comparator is configured to compare the voltage at the first terminal of the first resistor with the reference voltage to output a comparison signal. The counting circuit is connected to the output terminal of the comparator. The counting circuit is configured to count a count value each time the level of the comparison signal reaches a reference level.

[0004] As described above, the present invention provides a detector circuit having a current conversion mechanism for a power converter. The detector circuit having a current conversion mechanism for a power converter of the present invention can accurately detect the current flowing through an inductor connected to a node between the second terminal of a high-bridge switch and the first terminal of a low-bridge switch of the power converter, and convert the detected current to output a detection signal (which is a voltage signal). This detection signal can be supplied to other circuits for use, such as to compensate for an error amplified signal output by the output terminal of an error amplifier within the power converter.

[0005] To further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are only for reference and illustration and are not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 FIG2 is a block diagram of a detector circuit with a current conversion mechanism of a power converter according to first to fourth embodiments of the present invention applied to a power converter.

[0007] Figure 2 1 and 2 are circuit diagrams of a detector circuit with a current conversion mechanism of a power converter according to first to fourth embodiments of the present invention, applied to compensate a signal of a power converter.

[0008] Figure 3 A circuit diagram of a detector circuit with a current conversion mechanism of a power converter connected to a low-bridge switch of a power converter according to a first embodiment of the present invention.

[0009] Figure 4 FIG. 1 is a circuit diagram of a lower-side current sensing amplifier of a detector circuit with a current conversion mechanism of a power converter according to a second embodiment of the present invention.

[0010] Figure 5 A circuit diagram of a detector circuit with a current conversion mechanism of a power converter connected to a high-bridge switch of a power converter according to a third embodiment of the present invention.

[0011] Figure 6 FIG. 4 is a circuit diagram of a high-side current sensing amplifier of a detector circuit with a current conversion mechanism of a power converter according to a fourth embodiment of the present invention. DETAILED DESCRIPTION

[0012] The following is an explanation of the embodiments of the present invention through specific embodiments. Those skilled in the art can understand the advantages and effects of the present invention from the contents disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of the present invention. In addition, the drawings of the present invention are only simple schematic illustrations and are not depicted according to actual dimensions. It is stated in advance. The following embodiments will further explain the relevant technical content of the present invention in detail, but the disclosed contents are not intended to limit the scope of protection of the present invention. In addition, the term "or" used herein may include any one or more combinations of the associated listed items depending on the actual situation.

[0013] See also Figure 1 and Figure 2 ,in Figure 1 FIG1 is a block diagram of a detector circuit having a current conversion mechanism of a power converter according to the first to fourth embodiments of the present invention applied to a power converter. Figure 2 1 and 2 are circuit diagrams of a detector circuit with a current conversion mechanism of a power converter according to first to fourth embodiments of the present invention, applied to compensate a signal of a power converter.

[0014] like Figure 1 As shown, the detector circuit CURM of the present invention is suitable for detecting the current flowing from the power converter PWCR to the inductor L, and can also detect the current flowing from the inductor L to the power converter PWCR, and convert the detected current into a voltage signal.

[0015] If necessary, the detector circuit CURM of the present invention can be Figure 2 The converted voltage signal is used as a detection signal and output to the compensation control circuit SACT.

[0016] The compensation control circuit SACT can output a compensation control signal to one or more circuit components of the power converter PWCR based on a detection signal received from the detector circuit CURM of the present invention, so that the one or more circuit components inside the power converter PWCR compensate the output signals of other circuit components inside the power converter PWCR based on this compensation control signal.

[0017] Specifically, the power converter PWCR detected by the detector circuit CURM of the present invention at least includes a high-bridge switch HG, a low-bridge switch LG, and a drive circuit DRV. In practice, the power converter PWCR may also include other circuit components.

[0018] A first terminal of the high-bridge switch HG is coupled to the input voltage VIN. A second terminal of the high-bridge switch HG is connected to a first terminal of the low-bridge switch LG. The second terminal of the low-bridge switch LG is grounded. A node LX between the second terminal of the high-bridge switch HG and the first terminal of the low-bridge switch LG is connected to a first terminal of an inductor L. A second terminal of the inductor L is connected to a load. The voltage at the second terminal of the inductor L is as follows: Figure 1 The output voltage Vout is shown.

[0019] The driving circuit DRV is connected to the control terminal of the high-bridge switch HG and the control terminal of the low-bridge switch LG. The driving circuit DRV is configured to drive the high-bridge switch HG and the low-bridge switch LG.

[0020] like Figure 2 As shown, the detector circuit CURM of the present invention is connected to a first end of an inductor L and a second end of a low-bridge switch LG. The detector circuit CURM of the present invention can detect a current flowing from the inductor L to the low-bridge switch LG within the power converter PWCR, or detect a current flowing from the low-bridge switch LG within the power converter PWCR to the inductor L.

[0021] For example, if Figure 2 As shown, the power converter PWCR may further include an error amplifier ERR and a compensation circuit SAT, wherein the compensation circuit SAT may include a compensation resistor Rs and a compensation capacitor Cs. The above is only an example and the present invention is not limited thereto.

[0022] A first input terminal, such as a non-inverting input terminal, of the error amplifier ERR of the power converter PWCR may be connected to the second terminal of the inductor L (via a voltage divider circuit) to receive the voltage Vout (or a divided voltage thereof) at the second terminal of the inductor L as a feedback voltage VFB. A second input terminal, such as an inverting input terminal, of the error amplifier ERR of the power converter PWCR may be coupled to a feedback reference voltage VERFFB.

[0023] The error amplifier ERR may multiply a difference between a feedback voltage VFB and a feedback reference voltage VERFFB by a gain to output an error amplified signal.

[0024] The resistance value of the compensation resistor Rs, the capacitance value of the compensation capacitor Cs, or both of the compensation resistors Rs and Cs of the compensation circuit SAT of the power converter PWCR can be adjusted according to a compensation control signal received from the compensation control circuit SACT.

[0025] An error amplifier ERR of power converter PWCR outputs an amplified error signal that is transmitted to compensation circuit SAT. After compensation by compensation circuit SAT, the signal is transmitted to driver circuit DRV. Based on the compensated amplified error signal, driver circuit DRV outputs a high-bridge drive signal to the control terminal of high-bridge switch HG of power converter PWCR and a low-bridge drive signal to the control terminal of low-bridge switch LG of power converter PWCR.

[0026] That is, the detector circuit CURM of the present invention detects the current of the inductor L connected to the output terminal of the power converter PWCR and converts it into a voltage signal. The voltage signal can be used to compensate signals of other circuits, such as the power converter PWCR, for example, to compensate the error amplification signal, thereby adjusting the operation of the high-bridge switch HG and the low-bridge switch LG of the power converter PWCR.

[0027] It is worth noting that Figure 1 and Figure 2 The detector circuit CURM of the present invention can have the following features: Figure 3 The detector circuit CURML shown in FIG. Figure 4 The detector circuit shown is CURMH or two completely or partially identical circuit component configurations.

[0028] See also Figure 3 , which is a circuit diagram of a detector circuit with a current conversion mechanism of a power converter connected to a lower bridge switch of a power converter according to a first embodiment of the present invention.

[0029] like Figure 1 and Figure 2 The detector circuit CURM of the present invention can have the following features: Figure 3 The detector circuit CURML shown is configured with completely or partially the same circuit components. Figure 3 As shown, the detector circuit CURML of the present invention is suitable for detecting a power converter PWCR.

[0030] The detector circuit CURML of the present invention mainly includes a current sensing circuit, a first resistor R1, a comparator CMP and a counting circuit CONT.

[0031] like Figure 3 As shown, the current sensing circuit of the detector circuit CURML of the present invention may include a low-side current sensing amplifier CSAL.

[0032] The low-side current sense amplifier CSAL is a current sense amplifier. A first input terminal of the low-side current sense amplifier CSAL is connected to the first terminal of the inductor L (or the first terminal of the low-bridge switch LG) of the power converter PWCR. A second input terminal of the low-side current sense amplifier CSAL is connected to the second terminal of the low-bridge switch LG of the power converter PWCR.

[0033] A first end of the first resistor R1 is connected to a first end of the inductor L and an output end of the lower current sensing amplifier CSAL. A second end of the first resistor R1 is grounded.

[0034] The low-side current sense amplifier CSAL can detect the current flowing from the inductor L to the low-side switch LG, or the current flowing from the low-side switch LG to the inductor L as a sense current. The low-side current sense amplifier CSAL can then output the sense current directly or multiply the sense current by a gain value to output a low-side sense amplified current.

[0035] A detection current output by the low-side current sensing amplifier CSAL or a low-side sensing amplified current flows through the first end of the first resistor R1 , or in practice flows through the internal resistance of the comparator CMP.

[0036] A first input terminal, such as a non-inverting input terminal, of the comparator CMP may be connected to a first terminal of the first resistor R1 , and a second input terminal, such as an inverting input terminal, of the comparator CMP may be coupled to a reference voltage VREF.

[0037] If necessary, the detector circuit CURML of the present invention may further include a reference current supply circuit REFMD and an input capacitor Cin for supplying a reference voltage VREF to the comparator CMP.

[0038] The reference current supply circuit REFMD is connected to a first terminal of an input capacitor Cin. The first terminal of the input capacitor Cin is connected to a second input terminal, such as an inverting input terminal, of the comparator CMP.

[0039] The reference current supply circuit REFMD can supply a reference current to the input capacitor Cin to charge the input capacitor Cin. The voltage of the input capacitor Cin serves as a reference voltage VREF and is input to a second input terminal, such as an inverting input terminal, of the comparator CMP.

[0040] For example, the reference current supply circuit REFMD may include a first reference current source CUREF1 , a second reference current source CUREF2 , and a reference power switching element SWref.

[0041] A first terminal of a first reference current source CUREF1 is connected to a first terminal of a reference power switching component SWref. A second terminal of the reference power switching component SWref is connected to a first terminal of a second reference current source CUREF2 and a first terminal of an input capacitor Cin. A first terminal of the input capacitor Cin is connected to a second input terminal, such as an inverting input terminal, of the comparator CMP. A second terminal of the input capacitor Cin is grounded.

[0042] The comparator CMP uses the voltage at the first input terminal of the comparator CMP (i.e., a sense current output by the lower current sense amplifier CSAL or the voltage across the first terminal of the first resistor R1 through which the lower sense amplified current flows or the internal resistance of the comparator CMP) as a sense voltage and compares it with a reference voltage VREF to output a comparison signal.

[0043] Whenever the detection voltage is higher than the reference voltage VREF, the output terminal of the comparator CMP may output a comparison signal of a first level, such as a high level. Conversely, whenever the detection voltage is not higher than the reference voltage VREF, the output terminal of the comparator CMP may output a comparison signal of a second level, such as a low level.

[0044] The counting circuit CONT is connected to the output terminal of the comparator CMP. Each time the level of the comparison signal reaches a reference level, such as a high level, the counting circuit CONT counts up once to increase the count value, or counts down once to decrease the count value, thereby outputting a counting signal.

[0045] The counting signal finally generated by the counting circuit CONT may have one or more waveforms, and the rising band and the falling band of the one or more waveforms may be as follows: Figure 3 Shown with multiple steps.

[0046] If the input capacitor Cin is a variable capacitor, the counting circuit CONT can output a counting signal to the control terminal of the input capacitor Cin to control the capacitance of the input capacitor Cin to change with the count value of the counting signal, thereby adjusting the slope of the voltage signal of the input capacitor Cin.

[0047] Additionally or alternatively, if the first reference current source CUREF1, the second reference current source CUREF2, or both are variable current sources, the counting circuit CONT may output a counting signal to the control end of the first reference current source CUREF1, the control end of the second reference current source CUREF2, or both, to adjust the first current output by the first reference current source CUREF1, the second current output by the second reference current source CUREF2, or both, to change in accordance with the count value of the counting signal output by the counting circuit CONT.

[0048] If necessary, the detector circuit CURML of the present invention may further include a detection operational amplifier OPAD and a voltage switching element SWc.

[0049] The detection operational amplifier OPAD is an operational amplifier. A first input terminal, such as a non-inverting input terminal, of the detection operational amplifier OPAD is connected to a first input terminal, such as a non-inverting input terminal, of the comparator CMP.

[0050] A second input terminal, such as the inverting input terminal, of the detection operational amplifier OPAD is connected to a first terminal of a voltage switching element SWc and an output terminal of the detection operational amplifier OPAD. A second terminal of the voltage switching element SWc is connected to a second input terminal, such as the inverting input terminal, of the comparator CMP and a first terminal of the input capacitor Cin. The voltage switching element SWc is a switching element.

[0051] After the low-bridge switch LG is turned on for a period of time, the second terminal of the voltage-switching element SWc can be switched to connect to the second input terminal, such as the inverting input terminal, of the comparator CMP. At this point, the sensing operational amplifier OPAD pulls the voltage at the second input terminal, such as the inverting input terminal, of the comparator CMP to the voltage at the first input terminal, such as the non-inverting input terminal, of the comparator CMP.

[0052] See also Figure 4 , which is a circuit diagram of a lower-side current sensing amplifier of a detector circuit with a current conversion mechanism of a power converter according to a second embodiment of the present invention.

[0053] For example, if Figure 3 The lower current sensing amplifier CSAL shown can be Figure 4 The circuit shown includes a first low-side sensing transistor TL1 , a second low-side sensing transistor TL2 , a third low-side sensing transistor TL3 , a fourth low-side sensing transistor TL4 , a low-side sensing current mirror ML1 , and a low-side sensing operational amplifier OPASL.

[0054] The bottom sensing transistor TL1 , the second bottom sensing transistor TL2 , the third bottom sensing transistor TL3 , and the fourth bottom sensing transistor TL4 may be transistors of any appropriate form, and the present invention is not limited thereto.

[0055] like Figure 4 As shown, a first terminal of the first low-side sensing transistor TL1 is connected to a first terminal of the inductor L and a first terminal of the low-bridge switch LG. A control terminal of the first low-side sensing transistor TL1 is coupled to a first low-side sensing driving voltage, or is connected to a sensing driving circuit (not shown) to receive a first low-side sensing driving signal having the first low-side sensing driving voltage from the sensing driving circuit.

[0056] The low-side sensing operational amplifier OPASL is an operational amplifier. A first input terminal, for example, an inverting input terminal, of the low-side sensing operational amplifier OPASL is connected to the second terminal of the first low-side sensing transistor TL1.

[0057] A first terminal of the second low-side sense transistor TL2 is connected to the second terminal of the low-bridge switch LG. A control terminal of the second low-side sense transistor TL2 is coupled to a second low-side sense drive voltage, or is connected to a sense drive circuit to receive a second low-side sense drive signal having the second low-side sense drive voltage from the sense drive circuit. A second terminal of the second low-side sense transistor TL2 is connected to a second input terminal, such as a non-inverting input terminal, of the low-side sense operational amplifier OPASL.

[0058] A first terminal of the third low-side sense transistor TL3 is connected to the second terminal of the first low-side sense transistor TL1 and the first input terminal of the low-side sense operational amplifier OPASL. A control terminal of the third low-side sense transistor TL3 is coupled to a third low-side sense drive voltage or is connected to a sense drive circuit to receive a third low-side sense drive signal having the third low-side sense drive voltage from the sense drive circuit. A second terminal of the third low-side sense transistor TL3 is grounded.

[0059] A second terminal of the fourth bottom sensing transistor TL4 is connected to a first input terminal, such as an inverting input terminal, of the bottom sensing operational amplifier OPASL, and a control terminal of the fourth bottom sensing transistor TL4 is connected to an output terminal of the bottom sensing operational amplifier OPASL.

[0060] The low-side sensing current mirror ML1 is a current mirror and may include a fifth low-side sensing transistor TL5 and a sixth low-side sensing transistor TL6 .

[0061] A first terminal of the fifth low-side sensing transistor TL5 is coupled to the common voltage VCC, and a second terminal of the fifth low-side sensing transistor TL5 serves as an input terminal of the low-side sensing current mirror ML1 and is connected to a first terminal of the fourth low-side sensing transistor TL4 and a control terminal of the fifth low-side sensing transistor TL5.

[0062] A first terminal of the sixth low-side sensing transistor TL6 is coupled to the common voltage VCC, and a control terminal of the sixth low-side sensing transistor TL6 is connected to the control terminal of the fifth low-side sensing transistor TL5.

[0063] The second terminal of the sixth low-side sensing transistor TL6 serves as the output terminal of the low-side sensing current mirror ML1 and is connected to the first terminal of the first resistor R1 and the first input terminal CMP of the comparator CMP, for example, the non-inverting input terminal. The current flowing through the second terminal of the sixth low-side sensing transistor TL6 flows through the first terminal of the first resistor R1 (or the internal resistance of the comparator CMP).

[0064] See also Figure 5 , which is a circuit diagram of a detector circuit with a current conversion mechanism of a power converter connected to an upper bridge switch of a power converter according to a third embodiment of the present invention.

[0065] like Figure 1and Figure 2 The detector circuit CURM of the present invention can have the following features: Figure 5 The detector circuit CURMH shown is configured with completely or partially the same circuit components. Figure 3 As shown, the detector circuit CURML of the present invention is suitable for detecting a power converter PWCR.

[0066] like Figure 3 The detector circuit CURML shown is similar to Figure 5 The detector circuit CURMH shown is similar and will not be described in detail below.

[0067] like Figure 3 The detector circuit CURML shown is similar to Figure 5 The difference between the detector circuit CURMH shown is that, as Figure 3 The current sensing circuit of the detector circuit CURML shown includes a lower current sensing amplifier CSAL, and Figure 5 The current sensing circuit of the illustrated detector circuit CURMH includes a high-side current sense amplifier CSAH.

[0068] In practice, the current sensing circuit of the detector circuit of the present invention may include a high-side current sensing amplifier CSAH and a low-side current sensing amplifier CSAL.

[0069] The high-side current sense amplifier CSAH is a current sense amplifier.

[0070] like Figure 5 As shown, the upper current sense amplifier CSAH is connected to a first end of the upper bridge switch HG of the power converter PWCR and to a second end of the upper bridge switch HG or a first end of the inductor L.

[0071] The high-side current sense amplifier CSAH of the detector circuit of the present invention can be used to detect the current flowing from the high-side switch HG of the power converter PWCR to the inductor L as a sense current. The low-side current sense amplifier CSAL can then output the sense current directly or multiply it by a gain value to output a high-side sense amplified current.

[0072] A detection current output by the low-side current sensing amplifier CSAL or a low-side sensing amplified current flows through the first end of the first resistor R1 , or in practice flows through the internal resistance of the comparator CMP.

[0073] The comparator CMP uses the voltage at the first input terminal of the comparator CMP (i.e., a sense current output by the lower current sense amplifier CSAL or a voltage across the first terminal of the first resistor R1 through which the upper sense amplified current flows, or the internal resistance of the comparator CMP) as a sense voltage and compares it with a reference voltage VREF to output a comparison signal.

[0074] The counting circuit CONT counts a count value each time the level of the comparison signal reaches a reference level, such as a high level, to output a counting signal.

[0075] See also Figure 6 , which is a circuit diagram of a high-side current sensing amplifier of a detector circuit with a current conversion mechanism of a power converter according to a fourth embodiment of the present invention.

[0076] For example, if Figure 3 The upper current sense amplifier CSAH shown can be Figure 5 The circuit shown includes a first high-side sensing transistor TH1 , a second high-side sensing transistor TH2 , a third high-side sensing transistor TH3 , a high-side sensing operational amplifier OPASH , a fourth high-side sensing transistor TH4 , a first high-side sensing current mirror MH1 , and a second high-side sensing current mirror MH2 .

[0077] A first terminal of the first high-side sensing transistor TH1 is coupled to the input voltage VIN. A control terminal of the first high-side sensing transistor TH1 is coupled to the first high-side sensing driving voltage, or is connected to a sensing driving circuit (not shown) to receive a first high-side sensing driving signal having the first high-side sensing driving voltage.

[0078] A first terminal of the second top sensing transistor TH2 is connected to the second terminal of the first top sensing transistor TH1 , and a second terminal of the second top sensing transistor TH2 is connected to the first terminal of the inductor L and to the second terminal of the high bridge switch HG and the node LX between the low bridge switch LG.

[0079] The control terminal of the second high-side sensing transistor TH2 is coupled to the second high-side sensing driving voltage, or is connected to a sensing driving circuit (not shown) to receive a second high-side sensing driving signal having the second high-side sensing driving voltage from the sensing driving circuit.

[0080] A first terminal of the third high-side sensing transistor TH3 is connected to a first terminal of the high-side switch HG. A control terminal of the third high-side sensing transistor TH3 is coupled to a third high-side sensing driving voltage, or is connected to a sensing driving circuit (not shown) to receive a third high-side sensing driving signal having the third high-side sensing driving voltage from the sensing driving circuit.

[0081] The high-side sensing operational amplifier OPASH is an operational amplifier. A first input terminal, such as an inverting input terminal, of the high-side sensing operational amplifier OPASH is connected to the second terminal of the third high-side sensing transistor TH3. A second input terminal, such as a non-inverting input terminal, of the high-side sensing operational amplifier OPASH is connected to the first terminal of the second high-side sensing transistor TH2.

[0082] A first terminal of the fourth upper sensing transistor TH4 is connected to a first input terminal, such as an inverting input terminal, of the upper sensing operational amplifier OPASH, a control terminal of the fourth upper sensing transistor TH4 is connected to an output terminal of the upper sensing operational amplifier OPASH, and a second terminal of the fourth upper sensing transistor TH4 is grounded.

[0083] The first high-side sensing current mirror MH1 is a current mirror including a fifth high-side sensing transistor TH5 and a sixth high-side sensing transistor TH6 . The second high-side sensing current mirror MH2 is a current mirror including a seventh high-side sensing transistor TH7 and an eighth high-side sensing transistor TH8 .

[0084] The first top sensing transistor TH1, the second top sensing transistor TH2, the third top sensing transistor TH3, the fourth top sensing transistor TH4, the fifth top sensing transistor TH5, the sixth top sensing transistor TH6, the seventh top sensing transistor TH7 and the eighth top sensing transistor TH8 can be transistors of any appropriate form, and the present invention is not limited thereto.

[0085] A first terminal of the fifth top sensing transistor TH5 serves as an input terminal of the first top sensing current mirror MH1 and is connected to a second terminal of the fourth top sensing transistor TH4 and a control terminal of the fifth top sensing transistor TH5 . A second terminal of the fifth top sensing transistor TH5 is grounded.

[0086] A control terminal of the sixth top-side sensing transistor TH6 is connected to the control terminal of the fifth top-side sensing transistor TH5 , and a second terminal of the sixth top-side sensing transistor TH6 is grounded.

[0087] The first terminal of the seventh upper sensing transistor TH7 is connected to the common voltage VCC. The second terminal of the seventh upper sensing transistor TH7 serves as the input terminal of the second upper sensing current mirror MH2 and is connected to the first terminal of the sixth upper sensing transistor TH6 and the control terminal of the seventh upper sensing transistor TH7.

[0088] A first terminal of the eighth top sensing transistor TH8 is connected to the common voltage VCC, and a control terminal of the eighth top sensing transistor TH8 is connected to the control terminal of the seventh top sensing transistor TH7.

[0089] The second terminal of the eighth high-side sensing transistor TH8 serves as the output terminal of the high-side current sensing amplifier CSAH and is connected to the first terminal of the first resistor R1 and the first input terminal CMP, e.g., the non-inverting input terminal, of the comparator CMP. The current flowing through the second terminal of the eighth high-side sensing transistor TH8 flows through the first terminal of the first resistor R1 (or the internal resistance of the comparator CMP).

[0090] The contents disclosed above are only preferred feasible embodiments of the present invention and are not intended to limit the claims of the present invention. Therefore, all equivalent technical changes made using the description and drawings of the present invention are included in the claims of the present invention.

Claims

1. A detector circuit having a current conversion mechanism for a power converter, suitable for a power converter, the power converter comprising an upper bridge switch, a lower bridge switch, and a drive circuit, the drive circuit connected to a control terminal of the upper bridge switch and a control terminal of the lower bridge switch, a first terminal of the upper bridge switch coupled to an input voltage, a second terminal of the upper bridge switch connected to a first terminal of the lower bridge switch, a second terminal of the lower bridge switch connected to ground, a node between the second terminal of the upper bridge switch and the first terminal of the lower bridge switch connected to a first terminal of an inductor, and a second terminal of the inductor connected to a load, characterized in that: The detector circuit with the current conversion mechanism of the power converter includes: a current sensing circuit connected to the first end of the inductor and configured to sense the current at the first end of the inductor, or amplify the sensed current at the first end of the inductor, as a detection current; a first resistor, a first end of the first resistor being the current sensing circuit, a second end of the first resistor being grounded, and the detection current flowing through the first end of the first resistor; a comparator, wherein a first input terminal of the comparator is connected to the first end of the first resistor, a second input terminal of the comparator is coupled to a reference voltage, and the comparator is configured to compare the voltage of the first end of the first resistor with the reference voltage to output a comparison signal; as well as The counting circuit is connected to the output terminal of the comparator and is configured to count a count value each time the level of the comparison signal reaches a reference level.

2. The detector circuit with a current conversion mechanism of a power converter according to claim 1, wherein: The current sensing circuit comprises: The lower current sensing amplifier is a current sensing amplifier, wherein the first input terminal of the lower current sensing amplifier is connected to the first terminal of the lower bridge switch, the second input terminal of the lower current sensing amplifier is connected to the second terminal of the lower bridge switch, and the output terminal of the lower current sensing amplifier is connected to the first input terminal of the comparator.

3. The detector circuit with a current conversion mechanism of a power converter according to claim 2, wherein: The lower current sensing amplifier comprises: a first bottom-side sensing transistor, wherein a first terminal of the first bottom-side sensing transistor is connected to the first terminal of the inductor, and a control terminal of the first bottom-side sensing transistor is coupled to a first bottom-side sensing driving voltage; a bottom-side sensing operational amplifier, which is an operational amplifier, wherein a first input terminal of the bottom-side sensing operational amplifier is connected to the second terminal of the first bottom-side sensing transistor; a second bottom-side sensing transistor, wherein a first terminal of the second bottom-side sensing transistor is connected to the second terminal of the bottom-bridge switch, a control terminal of the second bottom-side sensing transistor is coupled to a second bottom-side sensing driving voltage, and a second terminal of the second bottom-side sensing transistor is connected to the second input terminal of the bottom-side sensing operational amplifier; a third bottom sensing transistor, wherein a first terminal of the third bottom sensing transistor is connected to the second terminal of the first bottom sensing transistor and the first input terminal of the bottom sensing operational amplifier, a control terminal of the third bottom sensing transistor is coupled to a third bottom sensing driving voltage, and a second terminal of the third bottom sensing transistor is grounded; and a fourth bottom-side sensing transistor, wherein a first terminal of the fourth bottom-side sensing transistor is coupled to a common voltage, a second terminal of the fourth bottom-side sensing transistor is connected to a first input terminal of the bottom-side sensing operational amplifier, and a control terminal of the fourth bottom-side sensing transistor is connected to an output terminal of the bottom-side sensing operational amplifier, wherein the first terminal of the fourth bottom-side sensing transistor serves as an output terminal of the bottom-side current sensing amplifier.

4. The detector circuit with a current conversion mechanism of a power converter according to claim 3, wherein: The lower current sensing amplifier further comprises: A lower sensing current mirror, wherein an input end of the lower sensing current mirror is connected to the first end of the fourth lower sensing transistor, and an output end of the lower sensing current mirror serves as an output end of the lower current sensing amplifier.

5. The detector circuit with a current conversion mechanism of a power converter according to claim 4, wherein: The lower sensing current mirror comprises: a fifth low-side sensing transistor, wherein a first terminal of the fifth low-side sensing transistor is coupled to the common voltage, and a second terminal of the fifth low-side sensing transistor serves as an input terminal of the low-side sensing current mirror and is connected to the first terminal of the fourth low-side sensing transistor and the control terminal of the fifth low-side sensing transistor; as well as a sixth low-side sensing transistor, wherein a first terminal of the sixth low-side sensing transistor is coupled to the common voltage, a control terminal of the sixth low-side sensing transistor is connected to the control terminal of the fifth low-side sensing transistor, and a second terminal of the sixth low-side sensing transistor serves as an output terminal of the low-side sensing current mirror.

6. The detector circuit with a current conversion mechanism of a power converter according to claim 1, wherein: The detector circuit with the current conversion mechanism of the power converter further comprises: an input capacitor, wherein a first end of the input capacitor is connected to the second input end of the comparator, and a second end of the input capacitor is grounded; as well as The reference current supply circuit is connected to the first end of the input capacitor and is configured to supply a reference current to the input capacitor.

7. The detector circuit with a current conversion mechanism of a power converter according to claim 6, wherein: The reference current supply circuit is connected to the counting circuit and configured to adjust the current value of the reference current according to the counting value received from the counting circuit.

8. The detector circuit with a current conversion mechanism of a power converter according to claim 6, wherein: The input capacitor is a variable capacitor. A control terminal of the input capacitor is connected to the counting circuit. The capacitance of the input capacitor is adjusted according to a change in the count value received by the counting circuit.

9. The detector circuit with a current conversion mechanism of a power converter according to claim 6, wherein: The detector circuit with the current conversion mechanism of the power converter further comprises: a detection operational amplifier, which is an operational amplifier, wherein a first input terminal of the detection operational amplifier is connected to a first input terminal of the comparator; and A voltage switching component, wherein a first end of the voltage switching component is connected to the second input end and the output end of the detection operational amplifier, and a second end of the voltage switching component is connected to the first end of the input capacitor.

10. The detector circuit with a current conversion mechanism of a power converter according to claim 6, wherein: The reference current supply circuit includes: A first reference current source is connected to a first end of the input capacitor.

11. The detector circuit with a current conversion mechanism of a power converter according to claim 10, wherein: The reference current supply circuit further comprises: A second reference current source, wherein a first end of the second reference current source is connected to the first end of the input capacitor, and a second end of the second reference current source is grounded.

12. The detector circuit with a current conversion mechanism of a power converter according to claim 11, wherein: The detector circuit with the current conversion mechanism of the power converter further comprises: A reference power switching component has a first terminal connected to the first reference current source, and a second terminal connected to a first terminal of the second reference current source and a second input terminal of the comparator.

13. The detector circuit with a current conversion mechanism of a power converter according to claim 1, wherein: The current sensing circuit comprises: The upper current sensing amplifier is a current sensing amplifier, the first input end of the upper current sensing amplifier is connected to the first end of the upper bridge switch, the second input end of the upper current sensing amplifier is connected to the second end of the upper bridge switch, and the output end of the upper current sensing amplifier is connected to the first input end of the comparator.

14. The detector circuit with a current conversion mechanism of a power converter according to claim 13, wherein: The upper current sensing amplifier comprises: a first upper sensing transistor, wherein a first terminal of the first upper sensing transistor is coupled to the input voltage, and a control terminal of the first upper sensing transistor is coupled to a first upper sensing driving voltage; a second upper sensing transistor, wherein a first terminal of the second upper sensing transistor is connected to the second terminal of the first upper sensing transistor, a second terminal of the second upper sensing transistor is connected to the first terminal of the inductor, and a control terminal of the second upper sensing transistor is coupled to a second upper sensing driving voltage; a third upper-side sensing transistor, wherein a first terminal of the third upper-side sensing transistor is connected to the first terminal of the upper-side switch, and a control terminal of the third upper-side sensing transistor is coupled to a third upper-side sensing driving voltage; a high-side sensing operational amplifier, which is an operational amplifier, wherein a first input terminal of the high-side sensing operational amplifier is connected to the second terminal of the third high-side sensing transistor, and a second input terminal of the high-side sensing operational amplifier is connected to the first terminal of the second high-side sensing transistor; and a fourth upper side sensing transistor, wherein a first end of the fourth upper side sensing transistor is connected to the first input end of the upper side sensing operational amplifier, a control end of the fourth upper side sensing transistor is connected to the output end of the upper side sensing operational amplifier, a second end of the fourth upper side sensing transistor is grounded, and a first end of the fourth upper side sensing transistor serves as the output end of the upper side current sensing amplifier.

15. The detector circuit with a current conversion mechanism of a power converter according to claim 14, wherein: The upper current sensing amplifier further comprises: A first upper sensing current mirror is provided, wherein an input end of the first upper sensing current mirror is connected to the second end of the fourth upper sensing transistor, and an output end of the first upper sensing current mirror serves as an output end of the upper current sensing amplifier.

16. The detector circuit with a current conversion mechanism of a power converter according to claim 15, wherein: The upper current sensing amplifier further comprises: A second upper sensing current mirror, wherein the input end of the second upper sensing current mirror is connected to the output end of the first upper sensing current mirror, and the output end of the second upper sensing current mirror serves as the output end of the upper current sensing amplifier.

17. The detector circuit with a current conversion mechanism of a power converter according to claim 16, wherein: The first upper sensing current mirror comprises: a fifth upper sensing transistor, a first terminal of the fifth upper sensing transistor being connected to the second terminal of the fourth upper sensing transistor and the control terminal of the fifth upper sensing transistor, and a second terminal of the fifth upper sensing transistor being grounded; and a sixth upper-side sensing transistor, wherein the control terminal of the sixth upper-side sensing transistor is connected to the control terminal of the fifth upper-side sensing transistor, the first terminal of the sixth upper-side sensing transistor is connected to the input terminal of the second upper-side sensing current mirror, and the second terminal of the sixth upper-side sensing transistor is grounded.

18. The detector circuit with a current conversion mechanism of a power converter according to claim 17, wherein: The second upper sensing current mirror comprises: a seventh upper sensing transistor, wherein a first terminal of the seventh upper sensing transistor is connected to a common voltage, and a second terminal of the seventh upper sensing transistor is connected to the first terminal of the sixth upper sensing transistor and the control terminal of the seventh upper sensing transistor; and an eighth upper side sensing transistor, wherein a first terminal of the eighth upper side sensing transistor is connected to the common voltage, a control terminal of the eighth upper side sensing transistor is connected to the control terminal of the seventh upper side sensing transistor, and a second terminal of the eighth upper side sensing transistor serves as an output terminal of the upper side current sensing amplifier.

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