Power conversion device

Abstract

The invention provides a power conversion device which comprises a direct current conversion circuit and a controller, and the direct current conversion circuit comprises a diode bridge arm, a switch tube bridge arm and a clamping capacitor. The diode bridge arm and the switch tube bridge arm are connected in series between the positive direct current bus and the negative direct current bus, and the clamping capacitor is connected between the midpoint of the diode bridge arm and the midpoint of the switch tube bridge arm. The switching period of the DC conversion circuit comprises continuous first to fourth time periods. The controller controls one switching tube in the switching tube bridge arm to be switched on and the other switching tube to be switched off in a first time period; in the second time period, the switching tube bridge arm is controlled to be switched on; in a third time period, one switching tube in the switching tube bridge arm is controlled to be switched off, and the other switching tube is controlled to be switched on; and in the fourth time period, the switching tube bridge arm is controlled to be switched off. The sum of the duration of the first time period and the duration of the third time period is larger than 0 and smaller than 50% of the switching period. And the capacitance value of the clamping capacitor can be effectively reduced.

Description

Technical Field

[0001] The present application relates to the field of power supply technology, and in particular to a power conversion device. Background Art

[0002] In order to ensure normal operation, the existing flying capacitor type three-level boost circuit usually requires that the voltage fluctuation of the flying capacitor is small, so it is necessary to ensure a certain flying capacitor capacity. When the current level of the circuit gradually increases, the capacity requirement of the flying capacitor also gradually increases. This means that the number of flying capacitors will increase, resulting in an increase in the volume of the flying capacitor type three-level boost circuit. In addition, after the number of flying capacitors increases, the circuit connection between multiple flying capacitors and semiconductor switching devices and diodes will also become difficult, which will cause the path length of the current flowing through the flying capacitor during circuit commutation to become longer, and the current sharing between multiple flying capacitors will become worse. Summary of the Invention

[0003] The present application provides a power conversion device that can effectively reduce the capacity requirements for the clamping capacitor. Thus, it can not only effectively reduce the volume and cost of the DC conversion circuit, which is conducive to the miniaturization design of the power conversion device, but also optimize the circuit connection between the clamping capacitor and the semiconductor switch and diode, and improve the current sharing effect of the clamping capacitor.

[0004] In a first aspect, the present application provides a power conversion device, which includes a DC conversion circuit, a positive DC bus, a negative DC bus, a positive bus capacitor, a negative bus capacitor, and a controller. The DC conversion circuit includes a diode bridge arm, a switch tube bridge arm, and a cross-over capacitor. The diode bridge arm and the switch tube bridge arm are connected in series between the positive DC bus and the negative DC bus, the clamping capacitor is connected between the midpoint of the diode bridge arm and the midpoint of the switch tube bridge arm, the positive bus capacitor and the negative bus capacitor are connected in series between the positive DC bus and the negative DC bus, respectively; the switch tube bridge arm includes a first switch tube and a second switch tube connected in series, and the conduction direction of the diode in the diode bridge arm is opposite to the conduction direction of the first switch tube. A switching cycle of the DC conversion circuit includes a continuous first period, a second period, a third period, and a fourth period. The controller is configured to control, during a first time period, one of the first and second switching transistors to be turned on and the other to be turned off; during a second time period, control both the first and second switching transistors to be turned on; during a third time period, control one of the switching transistors to be turned off and the other to be turned on; and during a fourth time period, control both the first and second switching transistors to be turned off. The sum of the duration of the first time period and the duration of the third time period is greater than 0 and less than 50% of the switching period.

[0005] In simple terms, based on the above-described periodic control of the DC converter circuit, it can be obtained that: during the first and third time periods, the clamping capacitor is in a discharge / charge state and a charge / discharge state, respectively, and during the second and fourth time periods, the clamping capacitor does not charge or discharge. Specifically, during the second and fourth time periods, the current does not flow through the clamping capacitor, but instead passes through the diode bridge arm or the switch bridge arm to form a current loop. Because the sum of the duration of the first time period and the duration of the third time period is greater than 0 and less than 50% of the switching period of the DC converter circuit, it can be obtained that the duration of the first time period and the duration of the third time period are both greater than 0 and less than 50% of the switching period of the DC converter circuit. That is, during the switching period of the DC converter circuit, the charging and discharging durations of the clamping capacitor are both relatively short, less than 1 / 2 of the switching period of the DC converter circuit. Since the capacitance value is positively correlated with the maximum of the charging and discharging times of the capacitor, the capacity requirement for the clamping capacitor is relatively low, which is lower than the capacity requirement for the clamping capacitor in the flying capacitor type three-level DC conversion circuit in the prior art. Therefore, it can not only effectively reduce the volume of the DC conversion circuit, but also optimize the circuit connection between the clamping capacitor and the semiconductor switch and diode, and improve the current sharing effect of the clamping capacitor.

[0006] In one possible implementation, the sum of the durations of the first time period and the third time period is greater than or equal to 5% of the switching period and less than 50% of the switching period. It is understood that the cost of the DC converter circuit is positively correlated not only with the capacitance of the clamping capacitor but also with the inductance of the inductor in the DC converter circuit, while the inductance of the inductor is negatively correlated with the capacitance of the clamping capacitor. Setting the minimum sum of the durations of the first time period and the third time period to 5% of the switching period not only allows the capacitance of the clamping capacitor to meet the small capacitance requirements of practical applications, but also reduces the inductance of the inductor, thereby reducing the cost of the DC converter circuit.

[0007] In one possible implementation, the duration of the first time period and the duration of the third time period are both greater than or equal to 5% and less than or equal to 25% of the switching period. That is, within the switching period of the DC converter circuit, the charging time and the discharging time of the clamping capacitor are both greater than or equal to 5% and less than or equal to 25% of the switching period, thereby shortening the charging time and the discharging time of the clamping capacitor. Therefore, the capacity requirement for the clamping capacitor is lowered. When a small-volume capacitor device is used, only one capacitor device may be required, thereby eliminating the current sharing problem or the problem of poor current sharing effect of the clamping capacitor.

[0008] In one possible implementation, the DC conversion circuit further includes an inductor and an input capacitor. One end of the inductor is connected to the junction of the diode bridge arm and the switch bridge arm, the other end of the inductor is connected to one end of the input capacitor, and the other end of the input capacitor is connected to the negative DC bus. The circuit loop formed by the DC conversion circuit during the first and third time periods is as follows:

[0009] When the first switch tube is turned on and the second switch tube is turned off, the inductor discharges the clamping capacitor through the first switch tube; when the first switch tube is turned off and the second switch tube is turned on, the inductor charges the clamping capacitor through the second switch tube.

[0010] In one embodiment, the DC conversion circuit further includes a first clamping diode and a second clamping diode, wherein the cathode of the first clamping diode is connected to the midpoint of the diode bridge arm, the anode of the first clamping diode is connected to the cathode of the second clamping diode and the midpoint of the bus, and the anode of the second clamping diode is connected to the midpoint of the switching tube bridge arm, where the midpoint of the bus is the junction of the positive bus capacitor and the negative bus capacitor. The controller is further configured to adjust the duration of the first time period and the duration of the third time period within a switching cycle so that the voltage of the clamping capacitor is greater than the voltage of the positive bus capacitor and greater than the voltage of the negative bus capacitor.

[0011] Implementation of this embodiment can avoid the first clamping diode and the second clamping diode from participating in operation, thereby simplifying the circuit design of the DC conversion circuit and optimizing the loss and heat dissipation design of the DC conversion circuit. The reason is as follows: when the DC conversion circuit also includes the above-mentioned two clamping diodes, the power conversion device controls the voltage of the clamping capacitor to be greater than the voltage of the positive bus capacitor and greater than the voltage of the negative bus capacitor, so that the clamping capacitor is in a discharge / charge state and a charge / discharge state in the first time period and the second time period, respectively, and the clamping capacitor is not charged or discharged in the third time period and the fourth time period. In other words, the operating state of the DC conversion circuit in a switching cycle when the DC conversion circuit includes the above-mentioned two clamping diodes is the same as the operating state of the DC conversion circuit in a switching cycle when the DC conversion circuit does not include the above-mentioned two clamping diodes. In other words, the current of the DC conversion circuit during operation does not flow through the above-mentioned two clamping diodes. Therefore, the above-mentioned effect of this embodiment can be achieved.

[0012] In one possible embodiment, the one switching transistor is a first switching transistor, and the other switching transistor is a second switching transistor. The controller is further configured to control the start time of the second time period to be later than the time when the voltage of the first switching transistor reaches zero. This ensures that the voltage across the first switching transistor has dropped to zero before the second switching transistor is turned on. During the first time period, only the first switching transistor is turned on, facilitating the design of the commutation circuit and ensuring that the voltage across the second switching transistor is effectively clamped to the difference between the bus voltage and the voltage of the clamping capacitor.

[0013] In one possible embodiment, the one switching transistor is a first switching transistor, and the other switching transistor is a second switching transistor. The controller is further configured to control the start time of the fourth time period to be later than the time when the voltage of the first switching transistor is clamped to the voltage of the clamping capacitor. This ensures that the voltage across the first switching transistor has risen and been clamped to the voltage of the clamping capacitor before the second switching transistor is turned off. During the third time period, only the first switching transistor is turned off, which facilitates the design of the commutation circuit and ensures that the voltage across the first switching transistor is effectively clamped to the voltage of the clamping capacitor.

[0014] In one possible embodiment, the one switching transistor is the second switching transistor, and the other switching transistor is the first switching transistor. The controller is further configured to control the start time of the second time period to be later than the time when the voltage of the second switching transistor reaches zero. This ensures that the voltage across the second switching transistor has dropped to zero before the first switching transistor is turned on. During the first time period, only the second switching transistor is turned on, which facilitates the design of the commutation circuit and ensures that the voltage across the first switching transistor is effectively clamped to the voltage of the clamping capacitor.

[0015] In one possible embodiment, the one switching tube is a second switching tube, and the other switching tube is a first switching tube. The controller is further configured to control the start time of the fourth time period to be later than the time at which the voltage of the second switching tube is clamped to the difference between the bus voltage and the voltage of the clamping capacitor, where the bus voltage is the voltage between the positive DC bus and the negative DC bus. Thus, before the first switching tube is turned off, it is ensured that the voltage across the second switching tube has risen and been clamped to the difference between the bus voltage and the voltage of the clamping capacitor. In this way, during the third time period, only the second switching tube is turned off, which facilitates the design of the commutation circuit and ensures that the voltage across the second switching tube is effectively clamped to the difference between the bus voltage and the voltage of the clamping capacitor.

[0016] In a second aspect, the present application provides a power conversion device, which includes a DC conversion circuit, a positive DC bus, a negative DC bus, a positive bus capacitor, a negative bus capacitor, and a controller. The DC conversion circuit includes a diode bridge arm, a switch bridge arm, a clamping capacitor, a first clamping diode, and a second clamping diode. The diode bridge arm and the switch bridge arm are connected in series between the positive DC bus and the negative DC bus, the clamping capacitor is connected between the midpoint of the diode bridge arm and the midpoint of the switch bridge arm, and the positive bus capacitor and the negative bus capacitor are connected in series between the positive DC bus and the negative DC bus, respectively. The switch bridge arm includes a first switch and a second switch connected in series, the first switch connected to the diode bridge arm, the conduction direction of the diode in the diode bridge arm being opposite to the conduction direction of the first switch; the first clamping diode and the second clamping diode are connected in series between the midpoint of the diode bridge arm and the midpoint of the switch bridge arm. A switching cycle of the DC conversion circuit includes a continuous first period, a second period, a third period, and a fourth period. The controller is configured to control the first switch to be turned on and the second switch to be turned off during a first time period; control the first switch to be turned on and the second switch to be turned off during a second time period; control the first switch to be turned on and the second switch to be turned off during a third time period; and control the first switch to be turned off and the second switch to be turned off during a fourth time period. The sum of the duration of the first time period and the duration of the third time period is greater than 0 and less than 50% of the switching period.

[0017] In simple terms, the control of the DC conversion circuit in one switching cycle in this embodiment can be understood as follows: in the first time period, when the voltage of the clamping capacitor is greater than the voltage of one bus capacitor among the positive bus capacitor and the negative bus capacitor, the clamping capacitor is in a discharging state, and after the voltage of the clamping capacitor is less than or equal to the voltage of the above bus capacitor, the clamping capacitor does not charge or discharge; in the second time period, when the voltage of the clamping capacitor is less than the voltage of the other bus capacitor among the positive bus capacitor and the negative bus capacitor except the above bus capacitor, the clamping capacitor is in a charging state, and in the clamping state, the clamping capacitor is in a discharging state. After the voltage of the clamped capacitor is greater than or equal to the voltage of the other bus capacitor, the clamped capacitor does not charge or discharge. During a third time period, when the voltage of the clamped capacitor is greater than the voltage of the one bus capacitor, the clamped capacitor is in a discharging state, and after the voltage of the clamped capacitor is less than or equal to the voltage of the one bus capacitor, the clamped capacitor does not charge or discharge. During a fourth time period, when the voltage of the clamped capacitor is less than the voltage of the one bus capacitor, the clamped capacitor is in a charging state, and after the voltage of the clamped capacitor is greater than or equal to the voltage of the one bus capacitor, the clamped capacitor does not charge or discharge. When the DC conversion circuit is in a step-up voltage mode, the one bus capacitor is a positive bus capacitor; when the DC conversion circuit is in a step-down voltage mode, the one bus capacitor is a negative bus capacitor.

[0018] Based on the control of this embodiment, it can be seen that during the switching cycle of the DC converter circuit, the sum of the charging time of the clamped capacitor is less than or equal to the sum of the discharging time of the clamped capacitor. The reason is as follows: the clamped capacitor is in a charging state during the second and fourth time periods, and the charging source of the clamped capacitor is the bus capacitor, or the bus capacitor and the inductor. When the charging source of the clamped capacitor is the bus capacitor, the large-capacity bus capacitor is connected in parallel with the small-capacity clamped capacitor, and the voltage of the clamped capacitor is quickly charged to the voltage of the positive bus capacitor or the negative bus capacitor and remains unchanged. Therefore, in this case, the sum of the charging time of the clamped capacitor in the second and fourth time periods is much less than the sum of the discharging time of the clamped capacitor in the first and third time periods. When the charging source of the clamped capacitor is the bus capacitor and the inductor, the inductor delays the current, so the charging current of the clamped capacitor is not large. In this case, the sum of the charging time of the clamped capacitor in the second and fourth time periods is close to the sum of the discharging time of the clamped capacitor in the first and third time periods.

[0019] Because the sum of the durations of the first time period and the third time period is greater than 0 and less than 50% of the switching cycle of the DC converter circuit, the sum of the durations of the two discharge time periods of the clamping capacitor within the switching cycle of the DC converter circuit is greater than 0 and less than 50% of the switching cycle of the DC converter circuit. Furthermore, because the capacitance value is positively correlated with the maximum duration of the capacitor's charging and discharging durations, and because the sum of the charging durations of the clamping capacitor within the switching cycle of the DC converter circuit is less than or equal to the sum of the discharging durations of the clamping capacitor, the capacity requirement for the clamping capacitor is relatively low, lower than the capacity requirement for the clamping capacitor in the flying capacitor-type three-level DC converter circuit in the prior art. Thus, not only can the volume and cost of the DC converter circuit be effectively reduced, thereby facilitating the miniaturized design of the power converter device, but the circuit connection between the clamping capacitor and the semiconductor switch and diode can also be optimized, and the current sharing effect of the clamping capacitor can be improved, thereby enhancing the circuit performance of the power converter device.

[0020] In one possible implementation, the sum of the durations of the first time period and the third time period is greater than or equal to 5% of the switching period and less than 50% of the switching period. It is understood that the cost of the DC converter circuit is positively correlated not only with the capacitance of the clamping capacitor but also with the inductance of the inductor in the DC converter circuit, while the inductance of the inductor is negatively correlated with the capacitance of the clamping capacitor. Setting the minimum sum of the durations of the first time period and the third time period to 5% of the switching period not only allows the capacitance of the clamping capacitor to meet the small capacitance requirements of practical applications, but also reduces the inductance of the inductor, thereby reducing the cost of the DC converter circuit.

[0021] In one possible implementation, the duration of the first time period and the duration of the third time period are both greater than or equal to 5% of the switching period and less than or equal to 25% of the switching period. Therefore, within the switching period of the DC conversion circuit, the duration of the two discharge time periods of the clamping capacitor are both greater than or equal to 5% of the switching period and less than or equal to 25% of the switching period, making the sum of the discharge time periods of the clamping capacitor shorter. Therefore, the capacity requirement for the clamping capacitor is lower, and when a small-volume capacitor device is used, only one capacitor device may be required, so that the clamping capacitor does not have the problem of current sharing or the problem of poor current sharing effect.

[0022] In one possible embodiment, the second switching tube is connected to the negative DC bus; the DC conversion circuit also includes an inductor and an input capacitor, one end of the inductor is connected to the junction of the diode bridge arm and the switching tube bridge arm, the other end of the inductor is connected to one end of the input capacitor, and the other end of the input capacitor is connected to the negative DC bus. In this embodiment, the DC conversion circuit is a boost circuit, and the circuit loop formed by it from the first period to the fourth period is as follows:

[0023] When the first switch tube is turned on and the second switch tube is turned off, when the voltage of the clamping capacitor is greater than the voltage of the positive bus capacitor, the inductor discharges the clamping capacitor through the first switch tube;

[0024] When both the first switch tube and the second switch tube are turned on, when the voltage of the clamping capacitor is less than the voltage of the negative bus capacitor, the input capacitor charges the inductor, and the negative bus capacitor charges the clamping capacitor through the first clamping diode;

[0025] When the first switching tube and the second switching tube are both turned off, and the voltage of the clamping capacitor is lower than the voltage of the positive bus capacitor, the inductor charges the clamping capacitor and the negative bus capacitor through the second clamping diode.

[0026] In one possible embodiment, the second switching tube is connected to the positive DC bus; the DC conversion circuit also includes an inductor and an input capacitor, one end of the inductor is connected to the junction of the diode bridge arm and the switching tube bridge arm, the other end of the inductor is connected to one end of the input capacitor, and the other end of the input capacitor is connected to the negative DC bus. In this embodiment, the DC conversion circuit is a step-down circuit, and the current loop formed in the first to fourth time periods is as follows:

[0027] When the first switch tube is turned on and the second switch tube is turned off, when the voltage of the clamping capacitor is greater than the voltage of the negative bus capacitor, the inductor discharges the clamping capacitor through the first switch tube;

[0028] When the first switch tube and the second switch tube are both turned on, when the voltage of the clamping capacitor is less than the voltage of the positive bus capacitor, the positive bus capacitor and the negative bus capacitor charge the inductor, and the positive bus capacitor charges the clamping capacitor through the second clamping diode;

[0029] When the first switching tube and the second switching tube are both turned off, and the voltage of the clamping capacitor is lower than the voltage of the negative bus capacitor, the inductor charges the clamping capacitor and the negative bus capacitor through the first clamping diode.

[0030] In one possible embodiment, the controller is further configured to control the start time of the second period to be later than the time when the voltage of the first switch reaches zero. This ensures that the voltage across the first switch has dropped to zero before the second switch turns on. During the first period, only the first switch is turned on, facilitating the design of the commutation circuit and ensuring that the voltage across the second switch is effectively clamped to the difference between the bus voltage and the voltage of the clamping capacitor.

[0031] In one possible embodiment, the controller is further configured to control the start time of the fourth time period to be later than the time at which the voltage of the second switch is clamped to the difference between the bus voltage and the voltage of the clamping capacitor, where the bus voltage is the voltage between the positive DC bus and the negative DC bus. This ensures that the voltage across the second switch has risen and been clamped to the difference between the bus voltage and the voltage of the clamping capacitor before the first switch is turned off. Consequently, during the third time period, only the second switch is turned off, facilitating the design of the commutation circuit while ensuring that the voltage across the second switch is effectively clamped to the difference between the bus voltage and the voltage of the clamping capacitor. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 This is a schematic diagram of an application scenario of the power conversion device provided by this application;

[0033] Figure 2 This is a schematic structural diagram of a power conversion device provided by the present application;

[0034] FIG3( a ) is a schematic diagram of a current loop of a power conversion device provided by the present application;

[0035] FIG3( b ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0036] FIG3( c ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0037] FIG3( d ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0038] Figure 4 is another structural schematic diagram of the power conversion device provided by this application;

[0039] Figure 5 This is a working waveform diagram of the power conversion device provided by this application;

[0040] FIG6( a ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0041] FIG6( b ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0042] FIG6( c ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0043] FIG6( d ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0044] Figure 7 is another structural schematic diagram of the power conversion device provided by this application;

[0045] FIG8( a ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0046] FIG8( b ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0047] FIG8( c ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0048] FIG8( d ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0049] Figure 9 This is another structural diagram of the power conversion device provided by the present application;

[0050] FIG10( a ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0051] FIG10( b ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0052] FIG10( c ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0053] FIG10( d ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0054] Figure 11 This is a control timing diagram of the power conversion device provided by this application;

[0055] FIG12( a ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0056] FIG12( b ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0057] FIG12( c ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0058] FIG13( a ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0059] FIG13( b ) is another current loop schematic diagram of the power conversion device provided by the present application;

[0060] FIG13( c ) is another current loop schematic diagram of the power conversion device provided in this application. DETAILED DESCRIPTION

[0061] See also Figure 1 , Figure 1 This is a schematic diagram of the application scenario of the power conversion device provided by this application. In the photovoltaic power supply scenario, the power conversion device provided by this application is Figure 1 The photovoltaic inverter or energy storage converter shown. The photovoltaic inverter is used to convert the direct current from the photovoltaic module into alternating current, and then send the alternating current to the box-type substation connected to the photovoltaic inverter for transformation. The box-type substation connected to the photovoltaic inverter can convert the low-voltage alternating current output by the photovoltaic inverter into medium-voltage alternating current, and then send the alternating current to the booster station for transmission to the grid or load. The energy storage converter is used to convert the direct current from the energy storage battery cluster into alternating current, and then send the alternating current to the box-type substation connected to the energy storage converter for transformation. The box-type substation connected to the energy storage converter can convert the low-voltage alternating current output by the energy storage converter into medium-voltage alternating current, and then send the alternating current to the booster station for transmission to the grid or load.

[0062] Figure 1 The boost circuit used in the photovoltaic inverter and energy storage converter shown is a flying capacitor-type three-level boost circuit. As the current level of the circuit gradually increases, the capacity requirements of the flying capacitor also gradually increase. This means that the number of capacitor components in the flying capacitor will increase, which will significantly increase the volume and cost of the flying capacitor-type three-level boost circuit. In addition, as the number of capacitor components in the flying capacitor increases, the circuit connection between multiple capacitor components and semiconductor switching devices and diodes will also become difficult, which will increase the path length and area covered by the current flowing through the flying capacitor during circuit commutation, and the current sharing between multiple capacitor components will become poor.

[0063] The power conversion device in this application provides two control methods for reducing the capacitance of the clamping capacitor. The first control method is to control the sum of the charging time and the discharging time of the clamping capacitor in the switching cycle of the DC conversion circuit to be shorter. The second control method is to control the clamping capacitor in the switching cycle of the DC conversion circuit to be in a discharging state in two non-adjacent time periods and the sum of the discharge time of the two non-adjacent time periods to be shorter. Figures 2 to 10(d) The circuit structure and working principle of the power conversion device under the first control mode provided by this application are described, and combined with Figure 4 、 Figure 9 、 Figures 11 to 13(c) The circuit structure and working principle of the power conversion device under the second control mode provided in this application are explained.

[0064] See also Figure 2 , Figure 2 This is a schematic diagram of the structure of the power conversion device provided by this application. Figure 2 As shown, the power conversion device 1 includes a DC conversion circuit 11, a positive DC bus BUS+, a negative DC bus BUS-, a positive bus capacitor C1, a negative bus capacitor C2, and a controller 12. The DC conversion circuit 11 is a boost circuit comprising a diode arm, a switch arm, an inductor L1, and a clamping capacitor C3. The diode arm and the switch arm are sequentially connected in series between the positive DC bus BUS+ and the negative DC bus BUS-. The switch arm includes a first switch T1 and a second switch T2 connected in series. The conduction direction of the diodes in the diode arm is opposite to that of the first switch T1. Specifically, the diode arm includes a diode D1 and a diode D2 connected in series. The cathode of diode D2 is connected to the positive DC bus BUS+, the anode of diode D2 is connected to the cathode of diode D1, and the anode of diode D1 is sequentially connected to the first switch T1 and the second switch T2, and then to the negative DC bus BUS-. One end of the inductor L1 is connected to the connection point O between the diode bridge arm and the switch tube bridge arm, and the other end of the inductor L1 is used to connect to the low-voltage end LV11 of the power conversion device 1. The positive end of the clamping capacitor C3 is connected to the midpoint a of the diode bridge arm (referred to as the middle node a), and the negative end of the clamping capacitor C3 is connected to the midpoint b of the switch tube bridge arm (referred to as the middle node b). The positive bus capacitor C1 and the negative bus capacitor C2 are connected in series between the positive DC bus BUS+ and the negative DC bus BUS-, respectively. The positive DC bus BUS+ is used to connect to the high-voltage end HV11 of the power conversion device 1, and the negative DC bus BUS- is used to connect to the low-voltage end LV12 and the high-voltage end HV12 of the power conversion device 1. In addition, the power conversion device 1 also includes an input capacitor C4, one end of the input capacitor C4 is connected to the other end of the inductor L1, and the other end of the input capacitor C4 is connected to the negative DC bus BUS-. It should be noted that in actual applications, in addition to being a capacitor, the input capacitor C4 can also be an input source, such as a power supply. Optionally, the power conversion device 1 may further include a DC / AC conversion circuit, which is provided between the DC bus and the output end of the power conversion device 1 .

[0065] In one embodiment, the power conversion device 1 can reduce the capacity of the clamping capacitor C3 by controlling the sum of the charging time and the discharging time of the clamping capacitor C3 to be shorter within one switching cycle of the DC conversion circuit 11. The specific implementation process is as follows:

[0066] A switching cycle of the DC converter circuit 11 includes a first period, a second period, a third period, and a fourth period. During the first period, the controller 12 controls one of the first and second switching transistors T1 and T2 to be on and the other to be off; during the second period, the controller 12 controls both the first and second switching transistors T1 and T2 to be on; during the third period, the controller controls one of the first and second switching transistors T1 and T2 to be off and the other to be on; and during the fourth period, the controller controls both the first and second switching transistors T1 and T2 to be off. The sum of the durations of the first and third periods is greater than 0 and less than 50% of the switching cycle. Optionally, considering that the inductance of the inductor L1 affects the cost of the DC converter circuit 11, in order to reduce the inductance of the inductor L1 and thereby reduce the cost of the DC converter circuit 11, the minimum sum of the durations of the first and third periods can be set to 5% of the switching cycle. Preferably, the durations of the first and third periods are both greater than or equal to 5% of the switching cycle and less than or equal to 25% of the switching cycle.

[0067] In short, based on the above-described periodic control of the DC converter circuit 11, it can be obtained that: during the first and third time periods, the clamping capacitor C3 is in a discharge / charge state and a charge / discharge state, respectively, and during the second and fourth time periods, the clamping capacitor C3 does not charge or discharge. Because the sum of the duration of the first time period and the duration of the third time period is greater than 0 and less than 50% of the switching period of the DC converter circuit, it can be obtained that during the switching period 11 of the DC converter circuit, the charging time and discharge time of the clamping capacitor C3 are both relatively short, less than 50% of the switching period of the DC converter circuit. Since the capacitance value is positively correlated with the maximum duration of the capacitor's charging time and discharge time, the capacity requirement for the clamping capacitor C3 is relatively low.

[0068] In one embodiment, the one switching transistor is a first switching transistor T1 , and the other switching transistor is a second switching transistor T2 .

[0069] Specifically, in the first period, the controller 12 controls the first switch tube T1 to be turned on and the second switch tube T2 to be turned off, so that the current loop shown in FIG3(a) is formed in the DC conversion circuit 11, and the clamping capacitor C3 is in a discharging state; in the second period, the controller 12 controls the first switch tube T1 and the second switch tube T2 to be turned on, so that the current loop shown in FIG3(b) is formed in the DC conversion circuit 11, and the clamping capacitor C3 does not charge or discharge, and the voltage V C3 remains unchanged; in the third period, the first switch tube T1 is controlled to be turned off and the second switch tube T2 is turned on, then the current loop shown in FIG3(c) is formed in the DC conversion circuit 11, and the clamping capacitor C3 is in a charging state; in the fourth period, the first switch tube T1 and the second switch tube T2 are controlled to be turned off, then the current loop shown in FIG3(d) is formed in the DC conversion circuit 11, and the clamping capacitor C3 is not charged or discharged, V C3Remain unchanged.

[0070] Optional, Figure 2 The DC conversion circuit 11 shown also includes two clamping diodes. Figure 4 .like Figure 4 As shown, the DC conversion circuit 11 also includes a first clamping diode D3 and a second clamping diode D4, the cathode of the first clamping diode D3 is connected to the intermediate node a, the anode of the first clamping diode D3 is connected to the cathode of the second clamping diode D4 and the connection point M (referred to as the bus midpoint M) between the positive bus capacitor C1 and the negative bus capacitor C2, and the anode of the second clamping diode D4 is connected to the intermediate node b.

[0071] It should be noted that when the boost circuit includes a first clamping diode and a second clamping diode, based on the above-mentioned periodic control of the boost circuit, C3 Greater than the voltage V of the positive bus capacitor C1 C1 And greater than the voltage V of the negative bus capacitor C2 C2 In the case of Figure 3(a) to Figure 3(d) The four working states shown are the same in sequence, such as Figure 6(a) to Figure 6(d) As shown; in V C3 Less than V C1 or V C2 In the case of Figure 6(a) to Figure 6(d) Based on the four operating states shown, other operating states occur in which the first clamping diode or the second clamping diode participates in the operation.

[0072] Based on this, in order to avoid the first clamping diode and the second clamping diode from participating in the work to optimize the loss and heat dissipation design of the boost circuit, that is, in order to make Figure 4 The DC converter circuit 11 shown in FIG6 is sequentially maintained in the four working states shown in FIG6(a), FIG6(b), FIG6(c) and FIG6(d). In addition to controlling the operation of the first switch tube T1 and the second switch tube T2 according to the description of the first to fourth time periods within a switching cycle of the DC converter circuit 11, the controller 12 also adjusts the duration of the first time period (the discharge duration of the clamping capacitor C3) and the duration of the third time period (the charging duration of the clamping capacitor C3) within a switching cycle of the DC converter circuit 11 so that V C3 Greater than V C1 and is greater than V C2 .

[0073] For ease of understanding, the following Figure 5 、 Figure 6(a) to Figure 6(d) , in this embodiment Figure 4 The working principle of the power conversion device 1 shown is introduced.

[0074] Specifically, if Figure 5 As shown, during the period from t1 to t2 (i.e., the first period), the controller 12 controls the driving signal of the first switch tube T1 to be a high-level signal, and the driving signal of the second switch tube T2 to be a low-level signal, so as to control the first switch tube T1 to be turned on and the second switch tube T2 to be turned off. Correspondingly, from time t1 onwards, the voltage V across the first switch tube T1 is T1 Gradually decreases from high to zero. T1 When V C3 Greater than V C1 Therefore, the diode D2 is turned on, and the current loop shown in FIG6(a) is formed in the DC conversion circuit 11; at the same time, the voltage V T2 The voltage clamped to the middle node b is V C1 +V C2 -V C3 Since the cathode voltage of the second clamping diode D4 is V C2 , greater than its anode voltage V C1 +V C2 -V C3 , so the second clamping diode D4 is cut off; similarly, diode D1 and the first clamping diode D3 are also in the cut-off state. In this working state, the current flows from the negative end to the positive end of the clamping capacitor C3, so the clamping capacitor C3 is discharged and V C3 Gradually decrease.

[0075] It should be noted that before time t2, V T1 It is necessary to ensure that it has dropped to zero, and the time t2 can be preferably set to V T1 The moment when the signal intensity drops to zero, so the time difference between time t2 and time t1 (ie, the duration of the first period) is very small.

[0076] During the period from t2 to t3 (i.e., the second period), the controller 12 controls the driving signals of the first switch tube T1 and the second switch tube T2 to be high level signals, so as to control the first switch tube T1 and the second switch tube T2 to be turned on. Correspondingly, from time t2, V T2 Gradually decreases from high to zero, when V T2 When V is zero, the second switch tube T2 is fully turned on, and the circuit loop shown in FIG6(b) is formed in the DC conversion circuit 11. C3 Greater than V C2 , that is, the cathode voltage V of the first clamping diode D3 C3 Greater than its anode voltage V C2 , so the first clamping diode D3 is cut off; similarly, diode D1, diode D2 and the second clamping diode D4 are also cut off. In this working state, the clamping capacitor C3 does not discharge or charge, so V C3Remains basically unchanged.

[0077] During the period from t3 to t4 (i.e., the third period), the controller 12 controls the driving signal of the first switch tube T1 to be a low level signal, and the driving signal of the second switch tube T2 to be a high level signal, so as to control the first switch tube T1 to be turned off and the second switch tube T2 to be turned on. Correspondingly, from time t3 onwards, V T1 It gradually rises from zero to high until the voltage at the reference terminal O is greater than the voltage V of the clamping capacitor C3. C3 , then diode D1 is turned on, V T1 The voltage V clamped to the clamp capacitor C3 C3 , the first switch tube T1 is completely turned off, and at the same time the circuit loop shown in FIG6(c) is formed in the DC conversion circuit 11. C3 Greater than V C2 , that is, the cathode voltage V of the first clamping diode D3 C3 Greater than its anode voltage V C2 , so the first clamping diode D3 is cut off; similarly, diode D2 and the second clamping diode D4 are also in the cut-off state. In this working state, the current flows from the positive end to the negative end of the clamping capacitor C3, so the clamping capacitor C3 is charged and V C3 Gradually rising.

[0078] It should be noted that before time t4, V T1 Make sure it has risen to V C3 , and time t4 can be preferably set to V T1 Rising to V C3 Therefore, the time difference between time t4 and time t3 (i.e., the duration of the third period) is very small.

[0079] During the period from t4 to T+t1 (i.e., the fourth period), the controller 12 controls the driving signal of the first switch tube T1 and the driving signal of the second switch tube T2 to be low level signals, so as to control the first switch tube T1 and the second switch tube T2 to be turned off. Correspondingly, from time t4 onwards, V T2 It gradually rises from zero to high until the voltage at the reference terminal O is greater than the voltage V C1 +V C2 , then the diode D2 is turned on, and the voltage V T2 Clamped to voltage V C1 +V C2 -V C3 , the second switch tube T2 is completely turned off, and at the same time, a current loop as shown in FIG6(d) is formed in the DC conversion circuit 11. C3 Greater than V C1 , then the cathode voltage of the second clamping diode D4 is V C2 , greater than its anode voltage VC1 +V C2 -V C3 , so the second clamping diode D4 is cut off; similarly, the first clamping diode D3 is also cut off. In this working state, the clamping capacitor C3 does not discharge or charge, so V C3 Remains basically unchanged.

[0080] Obviously, based on Figure 5 The control timing diagram shown in FIG. 1 shows the control of the first switch tube T1 and the second switch tube T2:

[0081] The controller 12 adjusts the duration of the first period and the duration of the third period so that V C3 Greater than V C1 and greater than V C2 , it can ensure that the power conversion device 1 keeps working in the four working states shown in Figures 6(a), 6(b), 6(c) and 6(d) in sequence, that is, the flying capacitor C3 is kept in the discharge state, the voltage constant state, the charging state and the voltage constant state in sequence, which can avoid the first clamping diode D3 and the second clamping diode D4 from participating in the work, simplify the circuit design of the DC conversion circuit 11, and optimize the loss and heat dissipation design of the DC conversion circuit 11. In addition, the controller 12 also controls the starting time (t2) of the second period to be later than V T1 is zero, thus ensuring that V T1 has dropped to zero, then during t1 to t2, only the first switch tube T1 is turned on, which is beneficial to the design of the commutation circuit and can ensure that the voltage of the second switch tube T2 is effectively clamped to V C1 +V C2 -V C3 The controller 12 also controls the start time of the fourth period (time t4) to be later than V T1 Clamped to V C3 At this moment, V T1 has risen and is clamped to V C3 , then during t3 to t4, only the first switch tube T1 is turned off, which is beneficial to the design of the commutation circuit and can ensure that the voltage of the first switch tube T1 is effectively clamped to V C3 Based on the above, the design of the duration of the first period and the duration of the third period can not only help optimize the circuit design of the DC conversion circuit 11, but also ensure the effective clamping of the first switch tube T1 and the second switch tube T2.

[0082] It should be noted that if the turn-on speed of the second switch tube T2 is slower than the turn-on speed of the first switch tube T1 due to differences in semiconductor switch devices and their drivers, then time t2 may coincide with time t1, and the drive signals of the second switch tube T2 and the first switch tube T1 change from low to high at the same time. However, since the turn-on speed of the second switch tube T2 is slower than the turn-on speed of the first switch tube T1, the voltage V across the first switch tube T1 is T1 First, the voltage V across the second switch tube T2 drops to zero. T2 6(a) . On the contrary, if the turn-on speed of the second switch tube T2 is faster than the turn-on speed of the first switch tube T1, the full turn-on moment of the first switch tube T1 can coincide with the full turn-on moment of the second switch tube T2. That is, the moment when the voltage of the first switch tube T1 drops to zero can coincide with the moment when the voltage of the second switch tube T2 drops to zero. At the same time, since the moment t1 is earlier than the moment t2, the power conversion device 1 also exists in the working state shown in FIG6(a) during the period when the first switch tube T1 has not yet been fully turned on and the second switch tube T2 is turned off. Similarly, if the disconnection speed of the second switch tube T2 is slower than the disconnection speed of the first switch tube T1, the time t4 can coincide with the time t3, and the power conversion device 1 also has the working state shown in Figure 6(c); conversely, if the disconnection speed of the second switch tube T2 is faster than the disconnection speed of the first switch tube T1, the time when the first switch tube T1 is completely turned off can coincide with the time when the second switch tube T2 is completely turned off, that is, the time when the voltage of the first switch tube T1 is clamped can coincide with the time when the voltage of the second switch tube T2 is clamped, and the power conversion device 1 also has the working state shown in Figure 6(c).

[0083] In another embodiment, the one switching tube is the second switching tube T2 , and the other switching tube is the first switching tube T1 .

[0084] This embodiment can be understood as a solution obtained by swapping the positions of the first time period and the third time period in the previous embodiment. For the specific implementation method and beneficial effects of this embodiment, please refer to the description of the corresponding part in the previous embodiment, which will not be expanded here.

[0085] In addition, the controller 12 also controls the start time of the second period to be later than V T2 The moment when V T2 Has dropped to zero, then during the first period, only the second switch tube T2 is turned on, which is beneficial to the design of the commutation circuit and can ensure that the voltage of the first switch tube T1 is effectively clamped to V C3 The controller 12 also controls the start time of the fourth period to be later than V T2 Clamped to V C1 +VC2 -V C3 At this moment, V T2 has risen and is clamped to V C1 +V C2 -V C3 , during the third period, only the second switch tube T2 is turned off, which is beneficial to the design of the commutation circuit and can ensure that the voltage of the second switch tube T2 is effectively clamped to V C1 +V C2 -V C3 .

[0086] The implementation method provided in this application of reducing the capacity of the clamping capacitor C3 by controlling the sum of the charging time and the discharging time of the clamping capacitor C3 to be shorter is also applicable to a power conversion device in which the DC conversion circuit 11 is a step-down circuit. Figure 7 , Figure 7 This is another schematic diagram of the structure of the power conversion device provided by this application. Figure 2 Compared with the power conversion device 1 shown, Figure 7 The DC conversion circuit 11 shown is a step-down circuit, in which the switch bridge arm and the diode bridge arm are sequentially connected in series between the positive DC bus BUS+ and the negative DC bus BUS-. Figure 7 As shown, the anode of diode D2 is connected to the negative DC bus BUS-, the cathode of diode D2 is connected to the anode of diode D1, and the cathode of diode D1 is connected to the first switching transistor T1 and the second switching transistor T2 in sequence, and then to the positive DC bus BUS+. The positive end of clamping capacitor C3 is connected to the intermediate node b, and the negative end is connected to the intermediate node a.

[0087] It should be noted that when the DC conversion circuit 11 is a step-down circuit, the energy flow direction of the power conversion device 1 is from the high-voltage end to the low-voltage end of the power conversion device 1, which is opposite to the energy flow direction of the power conversion device 1 when the DC conversion circuit 11 is a step-up circuit.

[0088] In one embodiment, the one switching transistor is a first switching transistor T1 , and the other switching transistor is a second switching transistor T2 .

[0089] Specifically, in the first period, the controller 12 controls the first switch tube T1 to be turned on and the second switch tube T2 to be turned off, so that the current loop shown in FIG8(a) is formed in the DC conversion circuit 11, and the clamping capacitor C3 is in a discharging state; in the second period, the controller 12 controls the first switch tube T1 and the second switch tube T2 to be turned on, so that the current loop shown in FIG8(b) is formed in the DC conversion circuit 11, and V C3remains unchanged; in the third period, the first switch tube T1 is controlled to be turned off and the second switch tube T2 is turned on, then the current loop shown in FIG8(c) is formed in the DC conversion circuit 11, and the clamping capacitor C3 is in a charging state; in the fourth period, the first switch tube T1 and the second switch tube T2 are controlled to be turned off, then the current loop shown in FIG8(d) is formed in the DC conversion circuit 11, V C3 Remain unchanged.

[0090] Optional, Figure 7 The DC conversion circuit 11 shown also includes two clamping diodes. Figure 9 .like Figure 9 As shown, the DC conversion circuit 11 also includes a first clamping diode D3 and a second clamping diode D4, the cathode of the first clamping diode D3 is connected to the intermediate node b, the anode of the first clamping diode D3 is connected to the cathode of the second clamping diode D4 and the bus midpoint M, and the anode of the second clamping diode D4 is connected to the intermediate node a.

[0091] It should be noted that when the buck circuit includes a first clamping diode and a second clamping diode, based on the above periodic control of the buck circuit, C3 Greater than V C1 and greater than V C2 In the case of Figure 8(a) to Figure 8(d) The four working states shown are the same in sequence, such as Figure 10(a) to Figure 10(d) As shown; in V C3 Less than V C1 or V C2 In the case of Figure 10(a) to Figure 10(d) Other operating states may arise based on the four operating states shown.

[0092] Based on this, in order to avoid the first clamping diode and the second clamping diode from participating in the operation, the controller 12 not only controls the operation of the first switch tube T1 and the second switch tube T2 according to the description of the first to fourth periods of this embodiment within a switching cycle of the DC conversion circuit 11, but also adjusts the duration of the first period (discharge duration of the clamping capacitor C3) and the duration of the third period (charge duration of the clamping capacitor C3) so that V C3 Greater than V C1 and is greater than V C2 .

[0093] For ease of understanding, the following Figure 5 、 Figure 10(a) to Figure 10(d) , in this embodiment Figure 9 The working principle of the power conversion device 1 shown is introduced.

[0094] Specifically, if Figure 5As shown, during the period from t1 to t2 (i.e., the first period), the controller 12 controls the first switch tube T1 to be turned on and the second switch tube T2 to be turned off. T1 When V C3 Greater than V C2 , therefore, diode D2 is turned on, and a current loop as shown in FIG10(a) is formed in the DC conversion circuit 11. In this working state, the current flows from the negative end to the positive end of the clamping capacitor C3, so the clamping capacitor C3 is discharged and V C3 Gradually decrease.

[0095] During the period from t2 to t3 (i.e., the second period), the controller 12 controls the first switch tube T1 and the second switch tube T2 to be turned on. T2 When the current is zero, a current loop as shown in FIG10( b) is formed in the DC conversion circuit 11. In this working state, the clamping capacitor C3 does not discharge or charge.

[0096] During the period from t3 to t4 (i.e., the third period), the controller 12 controls the first switch tube T1 to be turned off and the second switch tube T2 to be turned on. C1 +V C2 -V C3 When , diode D1 is turned on, and the current loop shown in FIG10(c) is formed in the DC conversion circuit 11. In this working state, the current flows from the positive end to the negative end of the clamping capacitor C3, so the clamping capacitor C3 is charged and V C3 Gradually rising.

[0097] During the period from t4 to T+t1 (i.e., the fourth period), controller 12 turns off both first and second switches T1 and T2. When the voltage at reference terminal O is less than zero, diode D2 conducts, forming the circuit loop shown in Figure 10(d) within DC converter circuit 11. In this operating state, clamping capacitor C3 does not discharge or charge.

[0098] Obviously, based on Figure 5 The control timing diagram shown in FIG. 1 shows the control of the first switch tube T1 and the second switch tube T2:

[0099] The controller 12 adjusts the duration of the first period and the duration of the third period so that V C3 Greater than V C1 and greater than V C2 , it can be guaranteed Figure 9The power conversion device 1 shown in FIG. 10( a ), FIG. 10( b ), FIG. 10( c ), and FIG. 10( d ) sequentially maintains the four operating states shown in FIG. 10( a ), FIG. 10( b ), FIG. 10( c ), and FIG. 10( d ), that is, the flying capacitor C3 is sequentially maintained in the discharge state, the voltage constant state, the charge state, and the voltage constant state, thereby avoiding the first clamping diode D3 and the second clamping diode D4 from participating in the operation, simplifying the circuit design of the DC conversion circuit 11, and optimizing the loss and heat dissipation design of the DC conversion circuit 11. In addition, before time t2, that is, before the second switch tube T2 is turned on, ensure that V T1 has dropped to zero, then during t1 to t2, only the first switch tube T1 is turned on, which is beneficial to the design of the commutation circuit and can ensure that the voltage of the second switch tube T2 is effectively clamped to V C1 +V C2 -V C3 Before time t4, that is, before the second switch tube T2 is turned off, ensure that V T1 has risen and is clamped to V C3 , then during t3 to t4, only the first switch tube T1 is turned off, which is beneficial to the design of the commutation circuit and can ensure that the voltage of the first switch tube T1 is effectively clamped to V C3 Based on the above, the design of the duration of the first period and the duration of the third period can not only help optimize the circuit design of the DC conversion circuit 11, but also ensure the effective clamping of the first switch tube T1 and the second switch tube T2.

[0100] It should be noted that Figure 4 In the embodiment shown, if the turn-on speed of the second switch tube T2 is slower than the turn-on speed of the first switch tube T1, the time t2 may coincide with the time t1. Figure 9 The power conversion device 1 shown in FIG10( a ) also has the working state shown in FIG10( a ); on the contrary, if the turn-on speed of the second switch tube T2 is faster than the turn-on speed of the first switch tube T1 , the fully turned-on time of the second switch tube T2 can coincide with the fully turned-on time of the first switch tube T1 . Figure 9 The power conversion device 1 shown in FIG10( a ) also has the working state shown in FIG10( a ). Similarly, if the disconnection speed of the second switch tube T2 is slower than the disconnection speed of the first switch tube T1 , then the time t4 can coincide with the time t3 . Figure 9 The power conversion device 1 shown in FIG10( c ) also has the working state shown in FIG10( c ); on the contrary, if the turning-off speed of the second switch tube T2 is faster than the turning-off speed of the first switch tube T1 , the fully turning-off time of the second switch tube T2 can coincide with the fully turning-off time of the first switch tube T1 . Figure 9 The power conversion device 1 shown also has the working state shown in FIG10( c ).

[0101] In another embodiment, the one switching tube is the second switching tube T2 , and the other switching tube is the first switching tube T1 .

[0102] This embodiment can be understood as a solution obtained by swapping the positions of the first time period and the third time period in the previous embodiment. For the specific implementation method and beneficial effects of this embodiment, please refer to the description of the corresponding part in the previous embodiment, which will not be expanded here.

[0103] In addition, the controller 12 also controls the start time of the second period to be later than V T2 The moment when V T2 Has dropped to zero, then during the first period, only the second switch tube T2 is turned on, which is beneficial to the design of the commutation circuit and can ensure that the voltage of the first switch tube T1 is effectively clamped to V C3 The controller 12 also controls the start time of the fourth period to be later than V T2 Clamped to V C1 +V C2 -V C3 At this moment, V T2 has risen and is clamped to V C1 +V C2 -V C3 , during the third period, only the second switch tube T2 is turned off, which is beneficial to the design of the commutation circuit and can ensure that the voltage of the second switch tube T2 is effectively clamped to V C1 +V C2 -V C3 .

[0104] In this embodiment, regardless of whether the DC converter circuit 11 is a step-up or step-down circuit, the power converter 1 can shorten both the charging and discharging times of the clamping capacitor C3 during the switching cycle of the DC converter circuit 11 by controlling the sum of the charging and discharging times of the clamping capacitor C3 during the switching cycle of the DC converter circuit 11 to be greater than 0 and less than 50% of the switching cycle of the DC converter circuit 11. Furthermore, since the capacitance value is positively correlated with the maximum of the charging and discharging times, the capacity requirements for the clamping capacitor C3 can be reduced. This not only effectively reduces the size of the DC converter circuit 11, but also optimizes the circuit connections between the clamping capacitor C3 and the semiconductor switch and diode, and improves the current sharing effect of the clamping capacitor C3. In addition, before both the first switch tube T1 and the second switch tube T2 are turned on, the voltage across the first switch tube that is turned on first has dropped to zero, and the voltage across the other switch tube is clamped; before both the first switch tube T1 and the second switch tube T2 are turned off, the voltage across the first switch tube that is turned off first has been clamped. Therefore, effective clamping protection can be achieved for both the first switch tube T1 and the second switch tube T2.

[0105] In another embodiment, see again Figure 4 The power conversion device 1 can also reduce the capacity of the clamping capacitor C3 by controlling the clamping capacitor C3 to be in a discharge state in both the first period and the third period within a switching cycle of the DC conversion circuit 11, and the sum of the discharge durations of the two periods is short. The specific implementation process is as follows:

[0106] A switching cycle of the DC converter circuit 11 includes a first period, a second period, a third period, and a fourth period. During the first period, the controller 12 controls the first switch T1 to be on and the second switch T2 to be off; during the second period, the controller 12 controls both the first and second switches T1 to be on; during the third period, the controller controls the first switch T1 to be on and the second switch T2 to be off; and during the fourth period, the controller controls both the first and second switches T1 to be off. The sum of the durations of the first and third periods is greater than 0 and less than 50% of the switching cycle. Optionally, considering that the inductance of the inductor L1 affects the cost of the DC converter circuit 11, in order to reduce the inductance of the inductor L1 and thereby reduce the cost of the DC converter circuit 11, the minimum sum of the durations of the first and third periods can be set to 5% of the switching cycle. Preferably, the durations of the first and third periods are both greater than or equal to 5% of the switching cycle and less than or equal to 25% of the switching cycle.

[0107] In simple terms, based on the above-mentioned periodic control of the DC conversion circuit 11, it can be obtained that: during the first and third time periods, the clamping capacitor C3 is in a discharging state, and during the second and fourth time periods, the clamping capacitor C3 is in a state of first charging and then the voltage remains unchanged. The sum of the charging time of the clamping capacitor C3 in the second and fourth time periods is less than or equal to the sum of the discharge time of the clamping capacitor C3 in the first and third time periods. Since the sum of the time length of the first time period and the time length of the third time period is greater than 0 and less than 50% of the switching cycle of the DC conversion circuit 11, the sum of the time lengths of the two discharge time periods of the clamping capacitor C3 during the switching cycle of the DC conversion circuit 11 is greater than 0 and less than 50% of the switching cycle of the DC conversion circuit 11. Since the capacitance value is positively correlated with the maximum time length of the charging time length and the discharging time length of the capacitor, the capacity requirement for the clamping capacitor C3 is relatively low.

[0108] For ease of understanding, the following Figure 11 right Figure 4 The working principle of the power conversion device 1 shown is introduced.

[0109] Specifically, if Figure 11 As shown, during the period from t1 to t2 (i.e., the first period), the controller 12 controls the first switch tube T1 to be turned on and the second switch tube T2 to be turned off. C3 Greater than V C1 In the case of , the power conversion device 1 is in the working state shown in FIG6 (a), the clamping capacitor C3 is discharged and V C3 Gradually decreases. C3 Less than or equal to V C1 After that, since the cathode voltage of the second clamping diode D4 is V C2 , less than or equal to its anode voltage V C1 +V C2 -V C3 , so the second clamping diode D4 is turned on; after the second clamping diode D4 is turned on, the cathode voltage of diode D2 is V C1 +V C2 , greater than or equal to its anode voltage V C3 +V C2 , so the diode D2 is cut off; the current loop shown in FIG12(a) is formed in the DC conversion circuit 11; at the same time, the voltage V T2 Clamped to V C2 In this working state, the current flows from the bus midpoint M through the negative bus capacitor C2 to the negative DC bus BUS-, so the negative bus capacitor C2 is charged and V C2 gradually increases; while the clamping capacitor C3 does not discharge or charge, so V C3 Remains basically unchanged.

[0110] It should be noted that, since the negative bus capacitor C2 includes a large-capacity electrolytic capacitor, the voltage rises slowly during charging, and the time difference between time t1 and time t2 is short, the power conversion device 1 will not switch between the two working states of Figure 6(a) and Figure 12(a) multiple times during a single time period from t1 to t2, thus avoiding the additional loss introduced by the diode D2 and the second clamping diode D4. In addition, before time t2, V T1 It is necessary to ensure that it has dropped to zero, and the time t2 can be preferably set to V T1 The moment when the signal intensity drops to zero, so the time difference between time t2 and time t1 (ie, the duration of the first period) is very small.

[0111] During the period from t2 to t3 (i.e., the second period), the controller 12 controls the first switch tube T1 and the second switch tube T2 to be turned on, and the power conversion device 1 includes the current loop shown in FIG6(b). C3 Less than V C2 In the case of the first clamping diode D3, the cathode voltage V C3 Less than or equal to its anode voltage V C2 , so the first clamping diode D3 is turned on, the power conversion device 1 also includes the current loop shown in Figure 12(b), the input capacitor C4 charges the inductor L1, and the negative bus capacitor C2 charges the clamping capacitor C3 through the first clamping diode D3; at V C3 Greater than or equal to V C2 After that, the first clamping diode D3 is turned off, and the power conversion device 1 switches to the working state with only one current loop as shown in FIG6(b), V C3 Remain unchanged.

[0112] During the period from t3 to t4 (i.e., the third period), the controller 12 controls the first switch tube T1 to be turned on and the second switch tube T2 to be turned off. C3 Greater than V C1 In the case of , the power conversion device 1 is in the working state shown in FIG6 (a), the clamping capacitor C3 is discharged and V C3 Gradually decreases; at V C3 Less than or equal to V C1 After that, the power conversion device 1 is in the working state shown in FIG12( a ), and the voltage of the clamping capacitor C3 remains unchanged.

[0113] It should be noted that before time t4, V T2 Make sure it has risen to V C1 +V C2 -V C3 , and time t4 can be preferably set to V T2 Rising to V C1 +V C2 -VC3 Therefore, the time difference between time t4 and time t3 (i.e., the duration of the third period) is very small.

[0114] During the period from t4 to T+t1 (i.e., the fourth period), the first switch tube T1 and the second switch tube T2 of the controller 12 are both turned off. C3 Less than V C1 In the case of the second clamping diode D4, the cathode voltage is V C2 , less than or equal to its anode voltage V C1 +V C2 -V C3 , so the second clamping diode D4 is turned on; since the cathode voltage of diode D2 is V C1 +V C2 , greater than or equal to its anode voltage V C2 +V C3 , so the diode D2 is cut off; the current loop shown in FIG12(c) is formed in the DC conversion circuit 11; at the same time, the voltage V T2 Clamped to V C2 In this working state, the inductor L1 charges the clamping capacitor C3 and the negative bus capacitor C2 through the second clamping diode D4. C3 Greater than or equal to V C1 After that, the power conversion device 1 switches to the working state shown in Figure 6 (d), V C3 Remain unchanged.

[0115] It should be noted that when the boost circuit is in steady-state operation, that is, when the input parameters and output parameters of the boost circuit are stable, the duration of the second period or the fourth period can ensure that the voltage V C3 Charge to V C1 or V C2 , the boost circuit can maintain its boost function. Furthermore, the power conversion device 1 may charge or discharge the negative bus capacitor C2 independently during both the second and fourth time periods. Therefore, the power conversion device 1 in this embodiment requires a half-bus voltage balancing circuit to balance the voltages of the positive bus capacitor C1 and the negative bus capacitor C2.

[0116] same Figure 4In the embodiment shown, if the turn-on speed of the second switch tube T2 is slower than the turn-on speed of the first switch tube T1, the moment t2 may coincide with the moment t1, and the power conversion device 1 is in the operating state shown in Figure 6(a) or Figure 12(a); conversely, if the turn-on speed of the second switch tube T2 is faster than the turn-on speed of the first switch tube T1, the fully turned-on moment of the second switch tube T2 may coincide with the fully turned-on moment of the first switch tube T1, and the power conversion device 1 is in the operating state shown in Figure 6(a) or Figure 12(a). If the disconnection speed of the first switch tube T1 is slower than the disconnection speed of the second switch tube T2, the time t4 can coincide with the time t3, and the power conversion device 1 is in the operating state shown in Figure 6(a) or Figure 12(a); conversely, if the disconnection speed of the first switch tube T1 is faster than the disconnection speed of the second switch tube T2, the complete shutdown time of the first switch tube T1 can coincide with the complete shutdown time of the second switch tube T2, and the power conversion device 1 is in the operating state shown in Figure 6(a) or Figure 12(a).

[0117] In this embodiment, the control of the boost circuit in one switching cycle can be understood as follows: in the first period, C3 Greater than V C1 In this case, the clamp capacitor C3 is in a discharged state and is C3 Less than or equal to V C1 After that, V C3 Remain unchanged; in the second period, at V C3 Less than V C2 In this case, the clamp capacitor C3 is in a charged state and C3 Greater than or equal to V C2 After that, V C3 Remain unchanged; in the third period, at V C3 Greater than V C1 In this case, the clamp capacitor C3 is in a discharged state and is C3 Less than or equal to V C1 After that, V C3 Remain unchanged; in the fourth period, at V C3 Less than V C1 In this case, the clamp capacitor C3 is in a charged state and C3 Greater than or equal to V C1 After that, V C3 Remain unchanged.

[0118] The present application provides a method for reducing the capacity of the clamping capacitor C3 by controlling the clamping capacitor C3 to be in a discharge state in both the first period and the third period and the sum of the discharge durations of the two periods is short. Figure 7 The DC conversion circuit 11 shown is a power conversion device of a step-down circuit.

[0119] For ease of understanding, let's combine Figure 11 right Figure 7 The working principle of the power conversion device 1 shown is introduced.

[0120] Specifically, if Figure 11 As shown, during the period from t1 to t2 (i.e., the first period), the controller 12 controls the first switch tube T1 to be turned on and the second switch tube T2 to be turned off. C3 Greater than V C2 In the case of , the power conversion device 1 is in the working state shown in FIG8 (a), the clamping capacitor C3 is discharged and V C3 Gradually decreases; at V C3 Less than or equal to V C2 After that, the first clamping diode D3 is turned on, and the power conversion device 1 switches to the working state shown in Figure 13 (a), the negative bus capacitor C2 is discharged and V C2 Gradually decreases, while the clamp capacitor C3 does not discharge or charge, V C3 Remain unchanged.

[0121] It should be noted that if V C2 drops to less than V C3 , the power conversion device 1 will switch to the working state shown in Figure 8(a). Since the negative bus capacitor C2 includes a large-capacity electrolytic capacitor, the voltage drops slowly during discharge, and the time difference between time t1 and time t2 is short, the power conversion device 1 will not switch between the two working states of Figure 8(a) and Figure 13(a) multiple times during a single time period from t1 to t2, which can avoid the additional loss introduced by the diode D2 and the first clamping diode D3. In addition, before time t2, V T1 It is necessary to ensure that it has dropped to zero, and the time t2 can be preferably set to V T1 The moment when the signal intensity drops to zero, so the time difference between time t2 and time t1 (ie, the duration of the first period) is very small.

[0122] During the period from t2 to t3 (i.e., the second period), the controller 12 controls the first switch tube T1 and the second switch tube T2 to be turned on, and the power conversion device 1 includes the current loop shown in FIG8(b). C3 Less than V C1 In the case of V, the second clamping diode D4 is turned on, and the power conversion device 1 further includes the current loop shown in FIG13( b ). At this time, the positive bus capacitor C1 and the negative bus capacitor C2 charge the inductor L1, and the positive bus capacitor C1 charges the clamping capacitor C3 through the second clamping diode D4. C3 Greater than or equal to V C1 After that, the second clamping diode D4 is turned off, and the power conversion device 1 switches to the working state with only one current loop as shown in FIG8(b), VC3 Remain unchanged.

[0123] During the period from t3 to t4 (i.e., the third period), the controller 12 controls the first switch tube T1 to be turned on and the second switch tube T2 to be turned off. C3 Greater than V C2 In the case of , the power conversion device 1 is in the working state shown in FIG8 (a), the clamping capacitor C3 is discharged and V C3 Gradually decreases; at V C3 Less than or equal to V C2 After that, the power conversion device 1 is in the working state shown in FIG13(a), V C3 Remain unchanged.

[0124] It should be noted that before time t4, V T2 Make sure it has risen to V C1 +V C2 -V C3 , and time t4 can be preferably set to V T2 Rising to V C1 +V C2 -V C3 Therefore, the time difference between time t4 and time t3 (i.e., the duration of the third period) is very small.

[0125] During the period from t4 to T+t1 (i.e., the fourth period), the first switch tube T1 and the second switch tube T2 of the controller 12 are both turned off. C3 Less than V C2 In the case of V C3 Greater than or equal to V C2 After that, the power conversion device 1 switches to the working state shown in FIG8(d), V C3 Remain unchanged.

[0126] It should be noted that when the step-down circuit is in steady-state operation, that is, when the input parameters and output parameters of the step-down circuit are stable, the duration of the second period or the fourth period can ensure that the voltage V C3 Charge to V C1 or V C2 , the step-down circuit can maintain its step-down function. Furthermore, the power conversion device 1 may discharge the positive bus capacitor C1 or the negative bus capacitor C2 during the second and fourth time periods. Therefore, the power conversion device 1 in this embodiment requires a half-bus voltage balancing circuit to balance the voltages of the positive bus capacitor C1 and the negative bus capacitor C2.

[0127] same Figure 4 In the embodiment shown, if the turn-on speed of the second switch tube T2 is slower than the turn-on speed of the first switch tube T1, the moment t2 may coincide with the moment t1, and the power conversion device 1 is in the operating state shown in Figure 8(a) or Figure 13(a); conversely, if the turn-on speed of the second switch tube T2 is faster than the turn-on speed of the first switch tube T1, the fully turned-on moment of the second switch tube T2 may coincide with the fully turned-on moment of the first switch tube T1, and the power conversion device 1 is in the operating state shown in Figure 8(a) or Figure 13(a). If the disconnection speed of the first switch tube T1 is slower than the disconnection speed of the second switch tube T2, the time t4 can coincide with the time t3, and the power conversion device 1 is in the operating state shown in Figure 8(a) or Figure 13(a); conversely, if the disconnection speed of the first switch tube T1 is faster than the disconnection speed of the second switch tube T2, the complete shutdown time of the second switch tube T2 can coincide with the complete shutdown time of the first switch tube T1, and the power conversion device 1 is in the operating state shown in Figure 8(a) or Figure 13(a).

[0128] In this embodiment, the control of the buck circuit in one switching cycle can be understood as follows: in the first period, C3 Greater than V C2 In this case, the clamp capacitor C3 is in a discharged state and is C3 Less than or equal to V C2 After that, V C3 Remain unchanged; in the second period, at V C3 Less than V C1 In this case, the clamp capacitor C3 is in a charged state and C3 Greater than V C1 After that, V C3 Remain unchanged; in the third period, at V C3 Greater than V C2 In this case, the clamp capacitor C3 is in a discharged state and is C3 Less than or equal to V C2 After that, V C3 Remain unchanged; in the fourth period, at V C3 Less than V C2 In this case, the clamp capacitor C3 is in a charged state and C3 Greater than or equal to V C2 After that, V C3 Remain unchanged.

[0129] In this embodiment, regardless of whether the DC converter circuit 11 is a boost circuit or a buck circuit, since the sum of the durations of the first time period and the third time period is greater than zero and less than 50% of the switching cycle of the DC converter circuit 11, the sum of the durations of the two discharge time periods of the clamping capacitor C3 within the switching cycle of the DC converter circuit 11 is greater than zero and less than 50% of the switching cycle of the DC converter circuit 11. Furthermore, since the sum of the charging time periods of the clamping capacitor C3 within the switching cycle of the DC converter circuit is less than or equal to the sum of the discharging time periods of the clamping capacitor, and the capacitance value is positively correlated with the maximum of the charging and discharging time periods of the capacitor, the capacity requirement for the clamping capacitor C3 is relatively low, lower than the capacity requirement for the clamping capacitor C3 in a three-level boost circuit in the prior art. This not only effectively reduces the size of the DC converter circuit 11, but also optimizes the circuit connection between the clamping capacitor C3 and the semiconductor switch and diode, and improves the current sharing effect of the clamping capacitor C3. In addition, since the voltage across the first switch tube T1 has dropped to zero before the first switch tube T1 and the second switch tube T2 are both turned on, and the voltage across the other switch tube is clamped; the voltage across the second switch tube T2 has been clamped before the first switch tube T1 and the second switch tube T2 are both turned off, the power conversion device 1 in this embodiment can also achieve effective clamping protection for the first switch tube T1 and the second switch tube T2.

[0130] The above are only specific embodiments of the present application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A power conversion device, characterized in that: The power conversion device includes a DC conversion circuit, a positive DC bus, a negative DC bus, a positive bus capacitor, a negative bus capacitor, and a controller. The DC conversion circuit includes a diode bridge arm, a switch tube bridge arm, and a clamping capacitor, wherein: The diode bridge arm and the switch tube bridge arm are connected in series between the positive DC bus and the negative DC bus; the clamping capacitor is connected between the midpoint of the diode bridge arm and the midpoint of the switch tube bridge arm; the positive bus capacitor and the negative bus capacitor are connected in series between the positive DC bus and the negative DC bus in sequence; the switch tube bridge arm includes a first switch tube and a second switch tube connected in series; the conduction direction of the diode in the diode bridge arm is opposite to the conduction direction of the first switch tube; A switching cycle of the DC conversion circuit includes a continuous first period, a second period, a third period and a fourth period; The controller is configured to control one of the first and second switching tubes to be turned on and the other to be turned off during the first time period; control both the first and second switching tubes to be turned on during the second time period; control the one switching tube to be turned off and the other switching tube to be turned on during the third time period; and control the first and second switching tubes to be turned off during the fourth time period; wherein the sum of the duration of the first time period and the duration of the third time period is greater than 0 and less than 50% of the switching cycle.

2. The power conversion device according to claim 1, characterized in that: The sum of the duration of the first period and the duration of the third period is greater than or equal to 5% of the switching cycle and less than 50% of the switching cycle.

3. The power conversion device according to claim 1 or 2, characterized in that: The duration of the first time period and the duration of the third time period are both greater than or equal to 5% of the switching cycle and less than or equal to 25% of the switching cycle.

4. The power conversion device according to any one of claims 1 to 3, characterized in that: The DC conversion circuit further includes an inductor and an input capacitor, one end of the inductor is connected to the connection between the diode bridge arm and the switch tube bridge arm, the other end of the inductor is connected to one end of the input capacitor, and the other end of the input capacitor is connected to the negative DC bus; When the first switch tube is turned on and the second switch tube is turned off, the inductor discharges the clamping capacitor through the first switch tube; When the first switch tube is turned off and the second switch tube is turned on, the inductor charges the clamping capacitor through the second switch tube.

5. The power conversion device according to claim 4, characterized in that: The DC conversion circuit further includes a first clamping diode and a second clamping diode, wherein the cathode of the first clamping diode is connected to the midpoint of the diode bridge arm, the anode of the first clamping diode is connected to the cathode of the second clamping diode and the bus midpoint, and the anode of the second clamping diode is connected to the midpoint of the switch tube bridge arm, and the bus midpoint is the connection point of the positive bus capacitor and the negative bus capacitor; The controller is further configured to adjust the duration of the first time period and the duration of the third time period within the one switching cycle so that the voltage of the clamping capacitor is greater than the voltage of the positive bus capacitor and greater than the voltage of the negative bus capacitor.

6. The power conversion device according to any one of claims 1 to 5, characterized in that: The one switching tube is the first switching tube, and the other switching tube is the second switching tube; The controller is further configured to control the start time of the second time period to be later than the time when the voltage of the first switch tube is zero.

7. The power conversion device according to any one of claims 1 to 6, characterized in that: The one switching tube is the first switching tube, and the other switching tube is the second switching tube; The controller is further configured to control the start time of the fourth time period to be later than the time when the voltage of the first switching tube is clamped to the voltage of the clamping capacitor.

8. The power conversion device according to any one of claims 1 to 5, characterized in that: The one switching tube is the second switching tube, and the other switching tube is the first switching tube; The controller is further configured to control the start time of the second time period to be later than the time when the voltage of the second switch tube is zero.

9. The power conversion device according to any one of claims 1 to 5 and 8, characterized in that: The one switching tube is the second switching tube, and the other switching tube is the first switching tube; The controller is further configured to control the start time of the fourth time period to be later than the time when the voltage of the second switching tube is clamped to the difference between the bus voltage and the voltage of the clamping capacitor, wherein the bus voltage is the voltage between the positive DC bus and the negative DC bus.

10. A power conversion device, characterized in that: The power conversion device includes a DC conversion circuit, a positive DC bus, a negative DC bus, a positive bus capacitor, a negative bus capacitor, and a controller. The DC conversion circuit includes a diode bridge arm, a switch tube bridge arm, a clamping capacitor, a first clamping diode, and a second clamping diode, wherein: The diode bridge arm and the switch tube bridge arm are connected in series between the positive DC bus and the negative DC bus, the clamping capacitor is connected between the midpoint of the diode bridge arm and the midpoint of the switch tube bridge arm, and the positive bus capacitor and the negative bus capacitor are connected in series between the positive DC bus and the negative DC bus in sequence; The switch tube bridge arm includes a first switch tube and a second switch tube connected in series, the first switch tube is connected to the diode bridge arm, and the conduction direction of the diode in the diode bridge arm is opposite to the conduction direction of the first switch tube; the first clamping diode and the second clamping diode are connected in series between the midpoint of the diode bridge arm and the midpoint of the switch tube bridge arm; A switching cycle of the DC conversion circuit includes a continuous first period, a second period, a third period and a fourth period; The controller is configured to control the first switch tube to be turned on and the second switch tube to be turned off during the first time period; control both the first switch tube and the second switch tube to be turned on during the second time period; control the first switch tube to be turned on and the second switch tube to be turned off during the third time period; and control both the first switch tube and the second switch tube to be turned off during the fourth time period; wherein the sum of the duration of the first time period and the duration of the third time period is greater than 0 and less than 50% of the switching cycle.

11. The power conversion device according to claim 10, characterized in that: The sum of the duration of the first period and the duration of the third period is greater than or equal to 5% of the switching cycle and less than 50% of the switching cycle.

12. The power conversion device according to claim 10 or 11, characterized in that: The duration of the first time period and the duration of the third time period are both greater than or equal to 5% of the switching cycle and less than or equal to 25% of the switching cycle.

13. The power conversion device according to any one of claims 10 to 12, characterized in that: The second switch tube is connected to the negative DC bus; the DC conversion circuit further includes an inductor and an input capacitor, one end of the inductor is connected to the connection between the diode bridge arm and the switch tube bridge arm, the other end of the inductor is connected to one end of the input capacitor, and the other end of the input capacitor is connected to the negative DC bus; When the first switch tube is turned on and the second switch tube is turned off, and the voltage of the clamping capacitor is greater than the voltage of the positive bus capacitor, the inductor discharges the clamping capacitor through the first switch tube; When both the first switching tube and the second switching tube are turned on, and the voltage of the clamping capacitor is less than the voltage of the negative bus capacitor, the input capacitor charges the inductor, and the negative bus capacitor charges the clamping capacitor through the first clamping diode; When both the first switching tube and the second switching tube are turned off, and the voltage of the clamping capacitor is lower than the voltage of the positive bus capacitor, the inductor charges the clamping capacitor and the negative bus capacitor through the second clamping diode.

14. The power conversion device according to any one of claims 10 to 12, characterized in that: The second switch tube is connected to the positive DC bus; the DC conversion circuit further includes an inductor and an input capacitor, one end of the inductor is connected to the connection between the diode bridge arm and the switch tube bridge arm, the other end of the inductor is connected to one end of the input capacitor, and the other end of the input capacitor is connected to the negative DC bus; When the first switch tube is turned on and the second switch tube is turned off, and the voltage of the clamping capacitor is greater than the voltage of the negative bus capacitor, the inductor discharges the clamping capacitor through the first switch tube; When both the first switching tube and the second switching tube are turned on, and the voltage of the clamping capacitor is less than the voltage of the positive bus capacitor, the positive bus capacitor and the negative bus capacitor charge the inductor, and the positive bus capacitor charges the clamping capacitor through the second clamping diode; When both the first switching tube and the second switching tube are turned off, and the voltage of the clamping capacitor is lower than the voltage of the negative bus capacitor, the inductor charges the clamping capacitor and the negative bus capacitor through the first clamping diode.

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