Double-path load point power supply packaging structure
By using vertical interconnection of printed circuit substrates, copper columns, capacitors, resistors, flip chips and inductors in the point-of-load power packaging structure, the problems of high-density integration and miniaturization in traditional package structures are solved, and the area reduction of the point-of-load power supply and the power density improvement of the point-of-load power supply are achieved.
Patent Information
- Application Number
- CN202510526238.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-25
- Publication Date
- 2025-08-08
AI Technical Summary
Traditional point-of-load power packaging structures are difficult to achieve high-density integration and performance improvement, and the existing packaging structures cannot meet the needs of high-density and miniaturization.
The dual-channel point-of-load power supply packaging structure is adopted, including printed circuit substrates, copper columns, capacitors, resistors, flip chips, inductors and plastic packaging materials. Through the vertical interconnection of the inductor, the copper columns and printed circuit substrates, a stacked structure of multiple components is formed, and the metallized connection inside the substrate is used to achieve integrated electrical connection.
It effectively reduces the bottom area of the load point power supply, improves the power density, improves the heat dissipation effect and the parasitic impedance of wiring, and realizes the miniaturization of the power supply module.
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Figure CN120456424A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of electronic packaging, and in particular to a dual-path point-of-load power supply packaging structure. Background Art
[0002] Point-of-load power supplies, with their advantages of stability and fast response, play an important role in digital circuits, FPGA control circuits, motherboards, CPUs, storage and other fields, and are widely used in mobile communication equipment, optical communications, automotive electronics, aerospace and other fields.
[0003] However, traditional point-of-load power supply packaging usually adopts a two-dimensional integration method in which chips and passive components are mounted on the surface of a substrate, and the chips are wire-bonded and the passive components are reflow-soldered to lay flat on the substrate. Therefore, under the same parameter configuration, the density of the point-of-load power supply is difficult to further integrate, and the pace of performance improvement is slowing down.
[0004] In recent years, with the development of semiconductor packaging technology, point-of-load power supplies have continued to develop towards high-density integration, performance improvement, and miniaturization. However, in terms of specific packaging structure, existing point-of-load power supplies still lack corresponding technical solutions. Therefore, in response to the problems existing in the existing technology, this application will provide a dual-channel point-of-load power supply packaging structure to solve them. Summary of the Invention
[0005] 1. Technical problems solved The present invention provides a dual-path point-of-load power supply packaging structure and an assembly process thereof, which solve the problems raised in the background technology.
[0006] (2) Technical solution The present invention provides the following technical solution: a dual-point-of-load power supply packaging structure, including a printed circuit substrate, copper pillars, capacitors, resistors, flip-chips, inductors, and plastic encapsulation material. The flip-chips, inductors, copper pillars, capacitors, and resistors are all mounted on the printed circuit substrate, and the inductors are located above the copper pillars and form a power module main structure together with the copper pillars and the printed circuit substrate. The plastic encapsulation material can encapsulate the power module main structure and fill gaps within the power module main structure.
[0007] Preferably, the material selection of the plastic encapsulation compound includes EME-G760 epoxy resin molding material, which can form the overall shape of the module together with the printed circuit board during subsequent use, and can provide support for the corresponding electronic components.
[0008] Preferably, the material selection of the printed circuit substrate includes a multi-layer PCB substrate of BT material, on which flip chips, inductors, copper pillars, capacitors and resistors can be installed, and the current carrying capacity of the printed circuit substrate is greater than or equal to 3A, and a large-area heat dissipation pad is designed at the center position of the back side of the printed circuit substrate.
[0009] Preferably, the specific structure of the flip chip is a dual-channel PWM controller, and the dual-channel PWM controller includes a first layer PI, an RDL metal copper layer, a UBM layer, a second layer PI and solder ball bumps.
[0010] Preferably, the number of the solder ball bumps is not less than two, the diameter of the solder ball bump is between 70um and 130um, and the spacing between two adjacent solder ball bumps is between 180um and 220um.
[0011] Preferably, the inductor is a miniaturized one-piece molded inductor formed by cold pressing using a T-core process, and there are two inductors provided and placed side by side on the same horizontal plane, and the bottom pads of the inductors are interconnected with the corresponding copper pillars.
[0012] Preferably, the copper column is a cuboid, and the surface of the copper column is covered with a nickel-tin plating layer, and the thickness of the nickel-tin plating layer is greater than or equal to 3um, the height is greater than or equal to 0.5mm, and the tolerance range is ±2um.
[0013] An assembly process for a dual-channel point-of-load power supply package structure includes the following steps: Step 1: Inspect printed circuit boards, copper pillars, capacitors, resistors, flip chips, inductors, and molding compounds before use to ensure all components are qualified. Step 2: performing a high-temperature baking treatment on the printed circuit substrate, specifically baking the printed circuit substrate at 100°C-120°C for 2-3 hours; Step 3: Solder paste printing and SPI testing, that is, using a 0.1mm-0.2mm thick steel mesh to flip-chip pads, copper pillar pads, capacitor pads, and resistor pads on the printed circuit board, and then printing solder paste SnSb5-89P4 on each pad position, followed by SPI testing; Step 4: Place the flip chip, copper pillar and other components and perform AOI inspection. Specifically, use the placement machine to place the flip chip, copper pillar, capacitor and resistor on the corresponding pads, and use the AOI machine to inspect the flip chip, copper pillar, capacitor and resistor; Step 5: Solder the flip chip, copper pillar and other components using a reflow oven; Step 6: Perform reflow cleaning and AOI inspection on the printed circuit board. Use chemical solution to clean the mounted printed circuit board, and then use the AOI machine to inspect the flip chip, copper pillars, capacitors and resistors. Step 7: baking the printed circuit substrate at a high temperature again, specifically baking the printed circuit substrate 1 at 100° C. to 120° C. for 1 to 2 hours; Step 8: Fill the bottom of the flip chip with U8443-14 underfill to reinforce the bottom of the flip chip; Step 9: Print solder paste on the top of the copper pillar and perform SPI testing. Specifically, use a 0.1mm-0.2mm thick steel mesh to print solder paste SnSb5-89P4 on the top of the copper pillar and perform SPI testing. Step 10: Mount the inductor and perform AOI inspection. Use a placement machine to place the inductor on top of the copper pillar. The width between the edge of the inductor and the edge of the printed circuit board must be greater than or equal to 0.2mm. Use an AOI machine to inspect the inductor. Step 11: Reflow the inductor and use a reflow oven to solder the inductor; Step 12: Perform reflow cleaning and AOI inspection on the inductor. Use a chemical solution to clean the mounted printed circuit board 1, and use an AOI machine to inspect the inductor. Step 13: Use a plastic encapsulation compound to encapsulate the main structure of the power module formed through the above steps to step 12. Specifically, the plastic encapsulation compound is preheated and plasma cleaned for 2-3 hours. Then, the plastic encapsulation compound is poured into the main structure of the power module for encapsulation and cured at 160°C-180°C for 8-9 hours. Step 14: Slicing the entire module, specifically, laminating and cutting the entire module, performing plasma water cleaning, high-temperature baking, and baking the printed circuit substrate at 110℃-120℃ for 2-3 hours.
[0014] Beneficial effects The present invention has the following beneficial effects: 1. This dual-channel point-of-load power supply packaging structure specifically places the inductor above the flip chip, capacitors, resistors and other components, and together with the copper pillars and printed circuit board form the basic framework of the module. Subsequently, the module's integrated electrical connection is achieved through metallized connections inside the substrate. The vertical interconnection between the inductor and the printed circuit board realizes a stacked structure of multiple components, effectively reducing the bottom area of the point-of-load power supply by 43.7% and significantly improving the power density. A large-area heat dissipation pad is designed at the bottom center of the printed circuit board, and the inductor, as a heat-generating device, is designed away from the printed circuit board substrate, which can improve the heat dissipation effect of the entire module.
[0015] 2. This dual-channel point-of-load power supply packaging structure uses inductors, copper pillars, and printed circuit boards to form the main structure of the buck circuit point-of-load power supply module, thereby realizing vertical interconnection of components, reducing parasitic impedance of wiring, and improving the power density and volume utilization of the subsequent point-of-load power supply, thereby realizing miniaturization of the power supply module. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 is a schematic top view of a printed circuit substrate of the present invention; Figure 2 is a schematic top view of an inductor of the present invention; Figure 3 Schematic top view of the plastic packaging material of the present invention; Figure 4 Schematic diagram of the temperature curve of the reflow oven in step five of the assembly process of the present invention; Figure 5 FIG. 1 is a schematic diagram of a temperature curve of a reflow oven in step 11 of the assembly process of the present invention.
[0017] In the figure: 1. Printed circuit board; 2. Copper pillars; 3. Solder bumps; 4. Capacitor; 5. Resistor; 6. Flip chip; 7. Inductor; 8. Molding compound. DETAILED DESCRIPTION
[0018] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.
[0019] See also Figure 1-5 A dual-point-of-load power supply packaging structure includes a printed circuit substrate 1, a copper pillar 2, a capacitor 4, a resistor 5, a flip chip 6, an inductor 7, and a molding compound 8. The flip chip 6, the inductor 7, the copper pillar 2, the capacitor 4, and the resistor 5 are all mounted on the printed circuit substrate 1, and the inductor 7 is located above the copper pillar 2 and forms a main structure of the power module with the copper pillar 2 and the printed circuit substrate 1. The copper pillar 2 is specifically a rectangular parallelepiped, and the surface of the copper pillar 2 is covered with a nickel-tin layer. The nickel-tin layer has a thickness greater than or equal to 3 μm, a height greater than or equal to 0.5 mm, and a tolerance range of ±2 μm. The printed circuit substrate 1 is made of a multilayer PCB made of BT material, on which a flip chip 6, an inductor 7, a copper pillar 2, a capacitor 4, and a resistor 5 can be mounted. The printed circuit substrate 1 has a current carrying capacity greater than or equal to 3A. A large heat dissipation pad is designed at the center of the back of the printed circuit substrate 1. The inductor 7 is a miniaturized, one-piece molded inductor formed by cold pressing using a T-core process. Two inductors 7 are provided and placed side by side on the same horizontal plane. The bottom pads of the inductors 7 are connected to the corresponding copper pillars 2. The specific structure of the flip chip 6 is a dual-channel PWM controller, and the dual-channel PWM controller includes a first layer of PI polyimide, an RDL metal copper layer, a second layer of UBM layer of PI polyimide and solder ball bumps 3. The number of solder ball bumps 3 is not less than two, and the diameter of the solder ball bumps 3 is between 70um and 130um, and the spacing between two adjacent solder ball bumps 3 is between 180um and 220um. The plastic encapsulation material 8 can encapsulate the main structure of the power module and fill the internal gaps of the main structure of the power module. The material selection of the plastic encapsulation material 8 includes EME-G760 epoxy resin molding material. During subsequent use, it can form the overall shape of the module together with the printed circuit substrate 1 and can provide support for the corresponding electronic components.
[0020] Example 1 An assembly process for a dual-channel point-of-load power supply package structure includes the following steps: Step 1: Inspect the printed circuit board 1, copper pillars 2, capacitors 4, resistors 5, flip chips 6, inductors 7, and molding compound 8 before use to ensure that all components are qualified; Step 2: performing a high-temperature baking treatment on the printed circuit substrate 1, specifically baking the printed circuit substrate 1 at 100° C.-120° C. for 2-3 hours; Step 3: Solder paste printing and SPI testing, i.e. using a 0.1mm-0.2mm thick steel mesh to flip-chip the pads of the flip chip 6, the pads of the copper pillar 2, the pads of the capacitor 4, and the pads of the resistor 5 on the printed circuit substrate 1, then printing the solder paste SnSb5-89P4 on each pad position, followed by SPI testing; Step 4: Place the flip chip 6, copper pillar 2 and other components and perform AOI inspection. Specifically, use a placement machine to place the flip chip 6, copper pillar 2, capacitor 4 and resistor 5 on the corresponding pads, and use an AOI machine to inspect the flip chip 6, copper pillar 2, capacitor 4 and resistor 5; Step 5: Solder the flip chip 6, copper pillar 2 and other components using a reflow oven; Step 6: Perform reflow cleaning and AOI inspection on the printed circuit board 1. Use a chemical solution to clean the mounted printed circuit board 1. Then use the AOI machine to inspect the flip chip 6, copper pillar 2, capacitor 4 and resistor 5. Step 7: baking the printed circuit substrate 1 again at a high temperature, specifically baking the printed circuit substrate 1 at 100° C. to 120° C. for 1 to 2 hours; Step 8: Fill the bottom of the flip chip 6, specifically use U8443-14 underfill glue to fill and reinforce the bottom of the flip chip 6; Step 9: Print solder paste on the top of copper pillar 2 and perform SPI testing. Specifically, use a 0.1mm-0.2mm thick steel mesh to print solder paste SnSb5-89P4 on the top of copper pillar 2 and perform SPI testing. Step 10: Mount and inspect the inductor 7 using an AOI machine. Place the inductor 7 on top of the copper pillar 2 using a placement machine. Ensure that the width between the edge of the inductor 7 and the edge of the printed circuit board 1 is greater than or equal to 0.2 mm. Inspect the inductor 7 using an AOI machine. Step 11: Reflow soldering the inductor 7 using a reflow soldering furnace; Step 12: Perform reflow cleaning and AOI inspection on the inductor 7. Use a chemical solution to clean the mounted printed circuit board 1, and use an AOI machine to inspect the inductor 7. Step 13: Using a plastic encapsulating compound 8 to encapsulate the main structure of the power module formed through Steps 1 to 12, the plastic encapsulating compound 8 is preheated and plasma cleaned for 2-3 hours. The plastic encapsulating compound 8 is then poured into the main structure of the power module for encapsulation and cured at 160° C. to 180° C. for 8-9 hours. Step 14: Slicing the entire module, specifically laminating and cutting the entire module, cleaning with plasma water, and baking at high temperature. The printed circuit substrate 1 is baked at 110° C.-120° C. for 2-3 hours.
[0021] Example 2 Step 1: inspect the printed circuit board 1, copper pillars 2, capacitors 4, resistors 5, flip chips 6, inductors 7 and molding compound 8 before use to ensure that all components are qualified. The solder bumps 3 provided on the bottom of the flip chip 6 are specifically formed by spin coating polyimide, etching polyimide with a mask aligner or a stepper, sputtering titanium / copper, applying photoresist, exposing with a mask aligner or a stepper, electroplating copper, stripping the resist and etching titanium / copper, sputtering titanium / copper, printing solder paste, and then flowing to form solder bumps 3; Secondly, the printed circuit substrate 1 is specifically a 4-layer substrate made of BT material. The circuits are interconnected by laser drilling and copper electroplating to ensure that the wiring loss of the entire board is less than or equal to 0.5W; Step 2: performing a high-temperature baking treatment on the printed circuit substrate 1, specifically baking the printed circuit substrate 1 at 120°C for 2 hours; Step 3: Solder paste printing and SPI testing, that is, using a 0.1mm thick steel mesh to flip-chip the pads of the flip chip 6, the pads of the copper pillar 2, the pads of the capacitor 4, and the pads of the resistor 5 on the printed circuit substrate 1, and then printing the solder paste SnSb5-89P4 on each pad position, followed by SPI testing; Step 4: Place the flip chip 6, copper pillar 2 and other components and perform AOI inspection. Specifically, use a placement machine to place the flip chip 6, copper pillar 2, capacitor 4 and resistor 5 on the corresponding pads, and use an AOI machine to inspect the flip chip 6, copper pillar 2, capacitor 4 and resistor 5; Step 5: Solder the flip chip 6, copper pillar 2 and other components using a reflow oven; Step 6: Perform reflow cleaning and AOI inspection on the printed circuit board 1. Use a chemical solution to clean the mounted printed circuit board 1. Then use the AOI machine to inspect the flip chip 6, copper pillar 2, capacitor 4 and resistor 5. Step 7: baking the printed circuit substrate 1 again at a high temperature, specifically baking the printed circuit substrate 1 at 100° C. to 120° C. for 1 to 2 hours; Step 8: Fill the bottom of the flip chip 6, specifically use U8443-14 underfill glue to fill and reinforce the bottom of the flip chip 6; Step 9: Print solder paste on the top of copper pillar 2 and perform SPI testing. Specifically, use a 0.1mm thick steel mesh to print solder paste SnSb5-89P4 on the top of copper pillar 2 and perform SPI testing. Step 10: Mount and inspect the inductor 7 using an AOI machine. Place the inductor 7 on top of the copper pillar 2 using a placement machine. Ensure that the width between the edge of the inductor 7 and the edge of the printed circuit board 1 is greater than or equal to 0.2 mm. Inspect the inductor 7 using an AOI machine. Step 11: Reflow soldering the inductor 7 using a reflow soldering furnace; Step 12: Perform reflow cleaning and AOI inspection on the inductor 7. Use a chemical solution to clean the mounted printed circuit board 1, and use an AOI machine to inspect the inductor 7. Step 13: Using a plastic encapsulating compound 8 to encapsulate the main structure of the power module formed through Steps 1 to 12, the plastic encapsulating compound 8 is preheated and plasma cleaned for 2 hours. The plastic encapsulating compound 8 is then poured into the main structure of the power module for encapsulation and cured at 180° C. for 8 hours. Step 14: Slicing the entire module, specifically laminating and cutting the entire module, cleaning with plasma water, and baking at high temperature. The printed circuit substrate 1 is baked at 120° C. for 2 hours.
[0022] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus.
[0023] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.
Claims
1. A dual-path point-of-load power supply packaging structure, comprising a printed circuit substrate (1), a copper pillar (2), a capacitor (4), a resistor (5), a flip chip (6), an inductor (7) and a plastic encapsulation material (8), wherein the flip chip (6), the inductor (7), the copper pillar (2), the capacitor (4) and the resistor (5) are all mounted on the printed circuit substrate (1), and the inductor (7) is located above the copper pillar (2) and forms a power module main structure with the copper pillar (2) and the printed circuit substrate (1), and the plastic encapsulation material (8) can encapsulate the power module main structure and fill the internal gaps of the power module main structure.
2. The dual-point-of-load power supply package structure according to claim 1, wherein: The material selection of the plastic encapsulation material (8) includes EME-G760 epoxy resin molding material.
3. The dual-point-of-load power supply package structure according to claim 1, wherein: The material selection of the printed circuit substrate (1) includes a multi-layer PCB substrate of BT material, and the current carrying capacity of the printed circuit substrate (1) is greater than or equal to 3A. A large-area heat dissipation pad is designed at the center position of the back side of the printed circuit substrate (1).
4. The dual-point-of-load power supply package structure according to claim 1, wherein: The specific structure of the flip chip (6) is a dual-channel PWM controller, and the dual-channel PWM controller includes a first layer of PI (polyimide), an RDL metal copper layer, a UBM layer, a second layer of PI (polyimide), and solder ball bumps (3).
5. A dual-point-of-load power supply package structure according to claim 4, characterized in that: The number of the solder ball bumps (3) is not less than two, the diameter of the solder ball bumps (3) is between 70um and 130um, and the spacing between two adjacent solder ball bumps (3) is between 180um and 220um.
6. The dual-point-of-load power supply package structure according to claim 1, wherein: The inductor (7) is a miniaturized one-piece molded inductor formed by cold pressing using a T-core process, and two inductors (7) are provided and placed side by side on the same horizontal plane, and the bottom pads of the inductors (7) are interconnected with the corresponding copper pillars (2).
7. The dual-point-of-load power supply package structure according to claim 1, wherein: The copper column (2) is specifically a cuboid, and the surface of the copper column (2) is covered with a nickel-tin plating layer, and the thickness of the nickel-tin plating layer is greater than or equal to 3 μm, the height is greater than or equal to 0.5 mm, and the tolerance range is ±2 μm.
8. An assembly process for a dual-channel point-of-load power supply package structure according to any one of claims 1 to 7, characterized in that: The following steps are included: Step 1: inspecting the printed circuit board (1), copper pillars (2), capacitors (4), resistors (5), flip chips (6), inductors (7), and plastic packaging materials (8) before use; Step 2: performing a high-temperature baking treatment on the printed circuit substrate (1); Step 3: solder paste printing and SPI testing, i.e. using a 0.1mm-0.2mm thick steel mesh to flip-chip the pads of the flip chip (6), the pads of the copper pillar (2), the pads of the capacitor (4) and the pads of the resistor (5) on the printed circuit substrate (1), and then printing the solder paste SnSb5-89P4 on each pad position, followed by SPI testing; Step 4: Mount the flip chip (6), copper pillar (2) and other components and perform AOI inspection; Step 5: Soldering components such as the flip chip (6) and the copper pillar (2); Step 6: Perform reflow cleaning and AOI inspection on the printed circuit board (1); Step 7: baking the printed circuit board (1) at a high temperature again; Step 8: Fill the bottom of the flip chip (6); Step 9: Print solder paste on the top of the copper pillar (2) and perform SPI inspection; Step 10: Mount the inductor (7) and perform AOI inspection; Step 11: reflow soldering the inductor (7); Step 12: Perform reflow cleaning and AOI inspection on the inductor (7); Step 13: Use plastic packaging material (8) to plasticize the main structure of the power module formed through the above steps to step 12; Step 14: Slice the entire module.