Back contact battery with specific transparent conductive film layer and manufacturing method and application thereof

Abstract

The invention belongs to the technical field of back contact cells, and particularly relates to a back contact cell with a specific transparent conductive film layer and a manufacturing method and application thereof, comprising a silicon wafer, a semiconductor film layer arranged on the back of the silicon wafer, a transparent conductive film layer arranged on the outer surface of the semiconductor film layer, and a metal fine gate electrode, the metal fine gate electrodes are arranged on the outer surfaces of the corresponding transparent conductive film layers of the preset semiconductor region; the transparent conductive film layer has a sandwich structure comprising a first transparent conductive oxide, a first ultra-thin metal film and a second transparent conductive oxide which are arranged in sequence, and the thickness of the first ultra-thin metal film is 1-10nm; in the extending direction of the metal fine gate electrode, the metal fine gate electrode is provided with at least one partition point, and the interval length W4 of the partition points is 2-5 mm. According to the invention, the consumption of the silver paste can be obviously reduced, the risk of short circuit during subsequent welding strip connection is also reduced, meanwhile, a relatively high double-sided rate can be kept, and the conversion efficiency of the battery is also improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of back-contact batteries, and in particular relates to a back-contact battery with a specific transparent conductive film layer, a preparation method thereof, and applications thereof. Background Art

[0002] Currently, HJT cells or combined passivated back contact cells include two semiconductor layers of different polarities arranged on the back, and a conductive film layer is arranged on the outer surface of the semiconductor layer. The conductive film layer is a transparent conductive film layer or a stack of a transparent conductive film and a metal film. The transparent conductive film layer is generally indium tin oxide ITO. The resistivity of ITO is relatively high, generally 5E-4 Ω·cm. The metal film is generally copper, aluminum, silver and other metals.

[0003] However, when the conductive film layer adopts the above two solutions, different problems may arise, as follows: ① When the conductive film layer is a transparent conductive film layer, it is generally indium tin oxide ITO. The resistivity of ITO is high and the conductivity is poor. At present, the square resistance of the transparent conductive film of HJT battery or joint passivation back contact battery is about 50-200Ω / □. ITO can only be used as a short-distance carrier collection. It requires that in the extension direction of the silver paste fine grid electrode, the disconnection distance W4 between two adjacent silver paste fine grid electrodes is very short, generally not disconnected or the disconnection distance is only within 1mm, thereby increasing the risk of short circuit with the opposite polarity fine grid when the soldering ribbon is connected, and at the same time increasing the amount of silver paste used.

[0004] ② When the conductive film layer is a stack of a transparent conductive film layer and a metal film, the metal film layer is thicker and the transmittance of the conductive film layer in the spectral range that can be used by the solar cell is almost zero. Therefore, the ability of the back side of the cell to absorb light and generate electricity (i.e., the bifaciality) will be greatly reduced, thereby affecting the cell conversion efficiency.

[0005] It should be noted that this part of the present invention only provides background technology related to the present invention and does not necessarily constitute prior art or public known technology. Summary of the Invention

[0006] The purpose of the present invention is to overcome the defects of the conductive film layer structure of the back-contact battery in the prior art, such as the high silver paste consumption and the inability to balance the double-sidedness and battery conversion efficiency. A back-contact battery with a specific transparent conductive film layer and its preparation method and application are provided, which can significantly reduce the silver paste consumption and reduce the risk of short circuit during subsequent soldering ribbon connection, while maintaining a high double-sidedness and improving the battery conversion efficiency.

[0007] To achieve the above objectives, in a first aspect, the present invention provides a back-contact cell having a specific transparent conductive film layer, comprising a silicon wafer, a semiconductor film layer disposed on the back side of the silicon wafer, the semiconductor film layer comprising a first semiconductor layer and a second semiconductor layer alternately disposed along the back side, a transparent conductive film layer disposed on an outer surface of the semiconductor film layer, and a metal fine gate electrode, the metal fine gate electrode being disposed on the outer surface of each corresponding transparent conductive film layer in a predetermined semiconductor region; the transparent conductive film layer having a sandwich structure comprising a first transparent conductive oxide, a first ultra-thin metal film, and a second transparent conductive oxide disposed in sequence, the thickness of the first ultra-thin metal film being 1-10 nm, and the ratio of the thickness of the first ultra-thin metal film to the first transparent conductive oxide and the second transparent conductive oxide being 1:(1-20):(1-20); the average transmittance of the transparent conductive film layer as a whole at a wavelength of 400-1100 nm is greater than 50%, and the sheet resistance of the transparent conductive film layer as a whole is 0.6-6 Ω / □; the metal fine gate electrode has at least one spacer break along the extension direction of the metal fine gate electrode, and the spacing length W4 of the spacer break is 2-5 mm.

[0008] In some preferred embodiments of the present invention, the transparent conductive film layer has one or more sandwich structures, and the corresponding ultra-thin metal films and the corresponding transparent conductive oxides are alternately arranged in the multiple sandwich structures.

[0009] In some preferred embodiments of the present invention, the transparent conductive film layer further comprises: a second ultra-thin metal film provided on the outer surface of the sandwich structure, the second ultra-thin metal film serving as a surface layer.

[0010] In some preferred embodiments of the present invention, the total thickness of the ultra-thin metal film contained in the transparent conductive film layer is 1-12 nm.

[0011] In some preferred embodiments of the present invention, the material of each ultra-thin metal film contained in the transparent conductive film layer is independently selected from metal silver or metal gold.

[0012] In some preferred embodiments of the present invention, the thickness of a single layer of each transparent conductive oxide is 10-60 nm, and the total thickness of each transparent conductive oxide contained in the transparent conductive film layer is 20-100 nm.

[0013] In some preferred embodiments of the present invention, the material of each transparent conductive oxide contained in the transparent conductive film layer is independently selected from at least one of a doped indium oxide-based film and a doped zinc oxide-based film, wherein the doping element of the doped indium oxide-based film is selected from at least one of tin, tungsten, titanium, zinc, and gallium, and the doping element of the doped zinc oxide-based film is selected from at least one of aluminum, gallium, and boron.

[0014] In some preferred embodiments of the present invention, an isolation trench is provided on a portion of the transparent conductive film layer located between two semiconductor regions of different polarities.

[0015] In some preferred embodiments of the present invention, in the semiconductor film layer, both ends of the second semiconductor layer extend outward to cover the back side of the adjacent first semiconductor layer, and a first semiconductor opening region that does not cover the second semiconductor layer is opened on the back side of the first semiconductor layer, and a second semiconductor opening region is formed between adjacent first semiconductor layers. The second semiconductor opening region and the first semiconductor opening region are arranged at intervals, and the area between them is a spacing region; an isolation groove is opened on the portion of the transparent conductive film layer located in the spacing region.

[0016] In some preferred embodiments of the present invention, in the vertical direction along the metal fine gate electrodes, the spaced breakpoints on two adjacent metal fine gate electrodes are cross-arranged.

[0017] In some preferred embodiments of the present invention, the back-contact battery further includes a metal main gate electrode and an insulating block arranged at the interval breakpoint. The metal main gate electrode is arranged vertically with the metal fine gate electrode of the same polarity and is connected at the intersection of the two, and covers the outside of the insulating block on its corresponding axis.

[0018] In some preferred embodiments of the present invention, the first semiconductor layer is a stack comprising a tunneling oxide layer and a first doped polysilicon layer or a stack comprising a first intrinsic silicon layer and a first doped silicon layer, and the second semiconductor layer comprises a second intrinsic silicon layer and a second doped silicon layer.

[0019] In some preferred embodiments of the present invention, the back-contact cell further comprises a front passivation layer and an anti-reflection layer sequentially disposed on the front side of the silicon wafer.

[0020] In a second aspect, the present invention provides a method for preparing a back-contact battery with a specific transparent conductive film layer, which is used to prepare the back-contact battery with a specific transparent conductive film layer described in the first aspect. The preparation method includes: sequentially forming a semiconductor film layer and a transparent conductive film layer with a sandwich structure on the back of a silicon wafer.

[0021] In some preferred embodiments of the present invention, the process of forming the transparent conductive film layer includes: first depositing a sandwich structure, and then depositing a second ultra-thin metal film.

[0022] In some preferred embodiments of the present invention, the preparation method further includes: forming a front passivation layer and an anti-reflection layer in sequence on the front side of the silicon wafer, then forming the transparent conductive film layer, and opening an isolation groove on the transparent conductive film layer, and then forming a metal fine gate electrode.

[0023] In a third aspect, the present invention provides a battery assembly comprising a back-contact battery having a specific transparent conductive film layer as described in the first aspect.

[0024] Beneficial effects: The present invention utilizes the above-mentioned technical solution, particularly employing a sandwich structure comprising a first transparent conductive oxide, a first ultra-thin metal film, and a second transparent conductive oxide disposed in sequence as the transparent conductive film layer, and controlling the overall transmittance of the transparent conductive film layer. This significantly reduces the sheet resistance of the transparent conductive film layer to a suitably low range, thereby improving its conductivity. Because the electrical transmission loss of carriers in the direction of the metal fine grid electrode is actually determined by the parallel resistance of the metal fine grid electrode and the transparent conductive film layer, the improved conductivity of the transparent conductive film layer can correspondingly reduce the consumption of silver paste (the reduction in silver paste consumption includes a reduction in the cross-sectional area or breakpoints of the metal electrode, where the cross-sectional area includes both thickness and width). Furthermore, because the conductivity of the transparent conductive film layer is significantly improved, the spacing length W4 of the metal fine grid electrodes can be significantly increased to a suitable wide range. This effectively reduces electrical transmission losses while further reducing silver paste consumption. It also reduces the risk of short circuits during ribbon connection during the subsequent formation of a battery assembly (such as a battery module), while maintaining a high bifaciality. These synergistic effects contribute to improved battery conversion efficiency.

[0025] Among them, the present invention also controls the thickness of the first ultra-thin metal film to be 1-10nm, which is beneficial to taking into account both transmittance and square resistance; and coordinates the thickness ratio of the first ultra-thin metal film to the first transparent conductive oxide and the second transparent conductive oxide within an appropriate range, which is beneficial to effectively reduce the consumption of silver paste while improving battery reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0027] Figure 1 It is a structural schematic diagram of a specific embodiment of a back contact battery semi-finished product for forming a semiconductor film layer and a front film layer according to the present invention.

[0028] Figure 2 for Figure 1 Schematic diagram of the structure with a transparent conductive film layer formed on the back.

[0029] Figure 3 for Figure 2 Schematic diagram of the structure for forming an isolation trench.

[0030] Figure 4 for Figure 3 Schematic diagram of the structure for forming a metal fine gate electrode and a main gate electrode.

[0031] Figure 5 for Figure 4 Schematic diagram of the structure of the metal fine gate electrode and its interval breakpoint arrangement set in.

[0032] Figure 6 for Figure 5 Schematic diagram of the structure in which the main gate electrode and the insulating block are arranged.

[0033] Figure 7 These are the transmittance curves of two transparent conductive film layers at different wavelengths, where the two transparent conductive film layers are ITO 40nm / Ag 5nm / ITO 20nm and ITO 40nm / Ag 10nm / ITO 20nm.

[0034] Description of Reference Numerals Silicon wafer 1, tunneling oxide layer 2, N-type doped polysilicon layer 3, front passivation layer 4, anti-reflection layer 5, amorphous passivation layer 6, P-type doped amorphous silicon layer 7, transparent conductive oxide 8A, ultra-thin metal film 8B, first metal fine gate electrode 9N, second metal fine gate electrode 9P, second insulating ink 10P, first insulating ink 10N, first main gate electrode 11N, second main gate electrode 11P. DETAILED DESCRIPTION

[0035] In the present invention, unless otherwise specified, directional words such as "up, down, left, right" are generally understood in conjunction with the directions shown in the drawings and actual applications.

[0036] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature identified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

[0037] In the present invention, unless otherwise expressly specified or limited, when a first feature is "above" or "below" a second feature, it may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediary. Furthermore, when a first feature is "above," "above," or "above" a second feature, it may mean that the first feature is directly above or diagonally above the second feature, or simply means that the first feature is at a higher level than the second feature. When a first feature is "below," "below," or "below" a second feature, it may mean that the first feature is directly below or diagonally below the second feature, or simply means that the first feature is at a lower level than the second feature.

[0038] The endpoints of the ranges and any values disclosed herein are not limited to the precise ranges or values, and these ranges or values should be understood to include values close to these ranges. For numerical ranges, the endpoints of each range, the endpoints of each range and individual point values, and the individual point values can be combined to form one or more new numerical ranges, and these numerical ranges should be considered to be specifically disclosed herein. The terms "optional" and "optional" both mean that a range may or may not be included (or may or may not be present).

[0039] In the present invention, the area close to the silicon wafer is considered as the inside, and the area far from the silicon wafer is considered as the outside.

[0040] The present invention provides a back-contact battery with a specific transparent conductive film layer, comprising a silicon wafer, a semiconductor film layer arranged on the back side of the silicon wafer, the semiconductor film layer comprising a first semiconductor layer and a second semiconductor layer alternately arranged along the back side, a transparent conductive film layer arranged on the outer surface of the semiconductor film layer, and a metal fine gate electrode, the metal fine gate electrode being arranged on the outer surface of each corresponding transparent conductive film layer in a preset semiconductor region.

[0041] The transparent conductive film layer has a sandwich structure comprising a first transparent conductive oxide, a first ultra-thin metal film, and a second transparent conductive oxide arranged in sequence. The thickness of the first ultra-thin metal film is 1-10 nm, and the ratio of the thickness of the first ultra-thin metal film to the first transparent conductive oxide and the second transparent conductive oxide is 1:(1-20):(1-20). The transparent conductive film layer as a whole has an average transmittance greater than 50%, preferably greater than 60%, at a wavelength of 400-1100 nm. The sheet resistance of the transparent conductive film layer as a whole is 0.6-6 Ω / □. The metal fine gate electrode has at least one interval break point along the extension direction of the metal fine gate electrode, and the interval length W4 of the interval break point is 2-5 mm.

[0042] The thickness ratio of the first ultra-thin metal film to the first transparent conductive oxide and the second transparent conductive oxide is 1:(1-20):(1-20), specifically 1:(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19 or 20):(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19 or 20), for example, 1:1:1, 1:1:2, 1:1:3, 1:1:4, 1:1:5, 1:1:6, 1:1:7, 1:1:8, 1:1:9 , 1:1:10, 1:1:11, 1:1:12, 1:1:13, 1:1:14, 1:1:15, 1:1:16, 1:1:17, 1:1:18, 1:1:19, 1:1:20, 1:2:1, 1:3:1, 1:4:1, 1:5:1, 1:6:1, 1:7:1, 1:10:1, 1:12:1, 1:15:1, 1:20:1, 1:2:3, 1:2:10, 1:4:4, 1:4:5, 1:4:6, 1:4:10, 1:5:12, etc. and the range between any two point values; for example, 1:(5-20):(3-20) can be preferred.

[0043] The interval length W4 of the interval breakpoints is 2-5 mm, for example, it can be 2 mm, 2.5 mm, 3 mm, 3.5 mm, 4 mm, 4.5 mm, 5 mm, and the range between any two point values.

[0044] The overall square resistance of the transparent conductive film layer is 0.6-6Ω / □, for example, it can be 0.6Ω / □, 1Ω / □, 1.5Ω / □, 2Ω / □, 2.5Ω / □, 3Ω / □, 3.5Ω / □, 4Ω / □, 4.5Ω / □, 5Ω / □, 5.5Ω / □, 6Ω / □ and the range between any two point values.

[0045] In some preferred embodiments of the present invention, the transparent conductive film layer comprises one or more sandwich structures, wherein the corresponding ultrathin metal films and transparent conductive oxides are alternately arranged in the multiple sandwich structures. For example, 8A represents a transparent conductive oxide, and 8B represents an ultrathin metal film. A single sandwich structure within the transparent conductive film layer may be, for example, 8A / 8B / 8A, and multiple sandwich structures may be, for example, 8A / 8B / 8A / 8B, 8A / 8B / 8A / 8A / 8A, and so on. Of course, the two 8A structures within the sandwich structure may be made of the same material or different materials.

[0046] The present invention adopts a solution of multiple sandwich structures, which can effectively reduce the oxidation of the ultra-thin metal film layer, is more conducive to improving the reliability of the battery, and maintains a high battery conversion efficiency.

[0047] In some preferred embodiments of the present invention, the transparent conductive film layer further comprises a second ultrathin metal film disposed on the outer surface of the sandwich structure, with the second ultrathin metal film serving as the surface layer. This preferred embodiment of the present invention further reduces the contact resistance between the transparent conductive film layer and the metal fine gate electrode, maintaining high battery conversion efficiency.

[0048] In some preferred embodiments of the present invention, the total thickness of the ultra-thin metal film contained in the transparent conductive film layer is 1-12 nm, which is more conducive to controlling the transmittance of the metal film and improving the bifaciality while maintaining a high battery conversion efficiency.

[0049] In some preferred embodiments of the present invention, the material of each ultra-thin metal film contained in the transparent conductive film layer is independently selected from metallic silver or metallic gold. Using metallic silver or metallic gold is more conducive to improving transmittance and reducing sheet resistance.

[0050] In some preferred embodiments of the present invention, the thickness of each transparent conductive oxide layer is 10-60 nm, for example, it can be 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, and the range between any two point values.

[0051] Preferably, in the present invention, the sum of the thicknesses of the transparent conductive oxides contained in the transparent conductive film layer is between 20 and 100 nm, for example, it can be 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, and the range between any two point values.

[0052] In some preferred embodiments of the present invention, the material of each transparent conductive oxide contained in the transparent conductive film layer is independently selected from at least one of a doped indium oxide-based film and a doped zinc oxide-based film.

[0053] Preferably, the doping element doping the indium oxide-based film is selected from at least one of tin, tungsten, titanium, zinc, and gallium, and the doping element doping the zinc oxide-based film is selected from at least one of aluminum, gallium, and boron.

[0054] In some preferred embodiments of the present invention, an isolation trench is formed on the portion of the transparent conductive film layer located between the two semiconductor regions of different polarities. It is understood that the semiconductor layer attached to the back of the silicon wafer on both sides of the isolation trench respectively forms two semiconductor regions of different polarities.

[0055] In some preferred embodiments of the present invention, in the semiconductor film layer, both ends of the second semiconductor layer extend outward to cover the back side of the adjacent first semiconductor layer, and a first semiconductor opening region that does not cover the second semiconductor layer is provided on the back side of the first semiconductor layer, forming a second semiconductor opening region between adjacent first semiconductor layers, the second semiconductor opening region and the first semiconductor opening region are spaced apart, and the area between them is a spacer region; an isolation groove is provided on the portion of the transparent conductive film layer located in the spacer region. It is understood that the metal fine gate electrode is provided on the outer surface of the corresponding transparent conductive film layer in the second semiconductor opening region and the first semiconductor opening region. The widths of the second semiconductor opening region, the first semiconductor opening region, and the isolation groove in the present invention can be based on the ranges in the prior art.

[0056] In the present invention, a mask layer is provided between the first semiconductor layer and the second semiconductor layer in the spacer region, or no mask layer is provided.

[0057] Preferably, in the present invention, a portion of the silicon wafer located at the second semiconductor opening region is a textured surface, and a portion of the silicon wafer at a position corresponding to the first semiconductor layer is a polished surface.

[0058] In some preferred embodiments of the present invention, the interval breakpoints on two adjacent metal fine gate electrodes are cross-arranged in the vertical direction along the metal fine gate electrode, which is more conducive to reducing the consumption of silver paste while taking into account current transmission and maintaining a high battery conversion efficiency.

[0059] In some preferred embodiments of the present invention, the back-contact cell further includes a metal main grid electrode and an insulating block disposed at the breakpoint. The metal main grid electrode is arranged perpendicularly to the metal fine grid electrodes of the same polarity and connected at their intersections, and covers the insulating block on their corresponding axes. The insulating block may be, for example, insulating ink, as long as it can insulate the metal electrodes of different polarities.

[0060] The back contact battery of the present invention may further include conventional film layers such as insulating ink for preventing short circuits of gate electrodes of different polarities, which is prior art and will not be described in detail here.

[0061] In some preferred embodiments of the present invention, the first semiconductor layer is a stack comprising a tunneling oxide layer and a first doped polysilicon layer or a stack comprising a first intrinsic silicon layer and a first doped silicon layer, and the second semiconductor layer comprises a second intrinsic silicon layer and a second doped silicon layer. The thickness and corresponding doping concentration of the tunneling oxide layer or each intrinsic silicon layer, the first doped polysilicon layer or the first doped silicon layer, and the second doped silicon layer described in the present invention can refer to the range of the prior art respectively and can be used in the present invention. For example, the thickness of the tunneling oxide layer is 1-2nm, the thickness of each intrinsic silicon layer is 5-15nm; the thickness of the second doped silicon layer is 7-45nm, and the effective doping concentration is 2e18cm-3 -3e20cm -3 The first doped polysilicon layer and the first doped silicon layer independently meet the following requirements: a thickness of 30-250 nm and an effective doping concentration greater than 5e18 cm -3 .

[0062] More preferably, the first semiconductor layer comprises a stack of a tunneling oxide layer and a first doped polysilicon layer, and the second semiconductor layer comprises a second intrinsic silicon layer and a second doped silicon layer. This combined passivation structure, combined with the specific transparent conductive film layer of the present invention, further reduces electrical transmission losses in the metal electrodes and improves battery conversion efficiency.

[0063] In some preferred embodiments of the present invention, the back-contact solar cell further includes a front passivation layer and an anti-reflection layer sequentially disposed on the front surface of the silicon wafer. The materials and thicknesses of the front passivation layer and the anti-reflection layer can refer to those of the prior art. For example, the front passivation layer can be made of any one or more of aluminum oxide, silicon oxide, amorphous silicon, and microcrystalline silicon, and the anti-reflection layer can be made of at least one of silicon nitride, silicon oxynitride, and silicon oxide.

[0064] In a second aspect, the present invention provides a method for preparing a back-contact battery with a specific transparent conductive film layer, which is used to prepare the back-contact battery with a specific transparent conductive film layer described in the first aspect. The preparation method includes: sequentially forming a semiconductor film layer and a transparent conductive film layer with a sandwich structure on the back of a silicon wafer.

[0065] In the present invention, there is no limitation on the preparation process of each film layer contained in the transparent conductive film layer, and reference may be made to the corresponding process in the prior art, as long as the target film layer can be formed.

[0066] In some preferred embodiments of the present invention, the formation process of the transparent conductive film layer includes: first depositing a sandwich structure, and then depositing a second ultra-thin metal film, thereby forming a transparent conductive film layer with an ultra-thin metal film as the surface layer and the sandwich structure.

[0067] In some preferred embodiments of the present invention, the manufacturing method further includes: sequentially forming a front passivation layer and an anti-reflection layer on the front side of the silicon wafer, then forming the transparent conductive film layer, forming an isolation trench in the transparent conductive film layer, and then forming a metal fine gate electrode. The manufacturing method of the present invention may also include the steps of forming a metal main gate electrode and, optionally, insulating ink, which are prior art and will not be further described here.

[0068] In a third aspect, the present invention provides a battery assembly comprising a back-contact battery having a specific transparent conductive film layer as described in the first aspect. The battery assembly, for example, comprises a battery module with a solder strip, and its assembly structure is as described in the prior art.

[0069] The embodiments of the present invention are described in detail below, which are exemplary and only used to explain the present invention, and are not to be construed as limiting the present invention.

[0070] Example 1 A back contact battery is obtained by the following manufacturing method: S101、 Figure 1 As shown, a silicon wafer 1 is provided with a front passivation layer 4 (aluminum oxide) and an anti-reflection layer 5 (silicon nitride) formed on the front side, a polishing area and a texturing area spaced apart along the width direction of the back side, and a first semiconductor layer is provided on the polishing area, wherein the first semiconductor layer comprises a tunneling oxide layer 2 (with a thickness of 1.5 nm) and an N-type doped polysilicon layer 3 (with a thickness of 100 nm and an effective doping concentration of 1e20 cm -3 ), and a second semiconductor layer provided on the texturing area, wherein the second semiconductor layer comprises an amorphous passivation layer 6 (with a thickness of 10 nm) and a P-type doped amorphous silicon layer 7 (with a thickness of 20 nm and an effective doping concentration of 1e20 cm -3 The ends of the second semiconductor layer extend outward to cover a portion of the back surface of the adjacent first semiconductor layer, and a first semiconductor opening region W1 is formed on the back surface of the first semiconductor layer that does not cover the second semiconductor layer. A second semiconductor opening region W2 is formed between adjacent first semiconductor layers. The second semiconductor opening region W2 is spaced apart from the first semiconductor opening region W1, and the area between them is a spacer.

[0071] S102, such as Figure 2 As shown, a transparent conductive film layer is formed on the back surface obtained in S101. The transparent conductive film layer is a transparent conductive oxide 8A / ultra-thin metal film 8B / transparent conductive oxide 8A arranged in sequence along the back surface outward: ITO 40nm / Ag5nm / ITO 20nm. The transmittance curves of the transparent conductive film layer at different wavelengths are shown in FIG. Figure 7 The transparent conductive film layer has an average transmittance of 75% and a square resistance of 6Ω / □ in the wavelength range of 400-1100nm.

[0072] S103, such as Figure 3 As shown, the transparent conductive film layer portion located between the second semiconductor opening region W2 and the first semiconductor opening region W1 on the back side obtained in S102 is etched to form an isolation trench W3; S104, such as Figure 4 、 Figure 5 、 Figure 6 As shown, first metal fine gate electrodes 9N and second metal fine gate electrodes 9P are formed alternately on the second semiconductor opening region W2 and the first semiconductor opening region W1 on the back side obtained in S103. The first metal fine gate electrodes 9N and the second metal fine gate electrodes 9P are provided with spacer points in their extending directions, as shown in FIG. Figure 5 As shown, a second insulating ink 10P is provided at the interval break point provided on the first metal fine gate electrode 9N, and a first insulating ink 10N is provided at the interval break point provided on the second metal fine gate electrode 9P, and then a main gate electrode (specifically composed of a first main gate electrode 11N and a second main gate electrode 11P) connecting the metal fine gate electrodes is formed. The first main gate electrode 11N is perpendicular to the first metal fine gate electrode 9N and is connected at the intersection, and at the corresponding interval break point, the first main gate electrode 11N covers the outside of the first insulating ink 10N, and the second main gate electrode 11P is perpendicular to the second metal fine gate electrode 9P and is connected at the intersection, and at the corresponding interval break point, the second main gate electrode 11P covers the outside of the second insulating ink 10P, as shown. Figure 6 As shown; in its extended direction, the interval length W4 of the interval breakpoints is 3mm. In its vertical direction, the interval breakpoints on two adjacent metal fine gate electrodes are arranged crosswise, as shown Figure 5 As shown in FIG. , each fine gate electrode and main gate electrode are made of silver paste.

[0073] Example 2 The method of Example 1 is followed, except that the transparent conductive film layer is ITO 40nm / Ag 10nm / ITO 20nm. The corresponding transmittance curves of the transparent conductive film layer at different wavelengths are as follows: Figure 7 The transparent conductive film layer has an average transmittance of 52% and a square resistance of 2.8Ω / □ in the wavelength range of 400-1100nm.

[0074] Example 3 The method of Example 1 was followed, except that the transparent conductive film layer had a sandwich structure, specifically ITO 40nm / Ag 5nm / ITO 20nm / Ag 5nm / ITO 20nm. The transparent conductive film layer had an average transmittance of 55% and a sheet resistance of 3.5Ω / □ over a wavelength range of 400-1100nm.

[0075] Example 4 The method of Example 1 was followed, except that the transparent conductive film layer was ITO 40nm / Ag 5nm / ITO 20nm / Ag 5nm. The average transmittance of the transparent conductive film layer was 56% at a wavelength of 400-1100nm, and the sheet resistance was 3.6Ω / □.

[0076] Example 5 The method of Example 1 was followed, except that the first ultra-thin metal film in the transparent conductive film layer was made of gold and had a constant thickness. The overall transparent conductive film layer had an average transmittance of 55% and a sheet resistance of 4Ω / □ at a wavelength of 400-1100nm.

[0077] Example 6 The method of Example 1 is referred to, except that the interval length W4 of the interval breakpoints is 4 mm.

[0078] Example 7 The method of Example 1 is followed, except that the structure of the first semiconductor layer is different, and the passivation structure is a heterojunction. Specifically, the first semiconductor layer is an intrinsic amorphous silicon layer and an N-type doped amorphous silicon layer. The thickness of the intrinsic amorphous silicon layer is 10 nm, the thickness of the N-type doped amorphous silicon layer is 30 nm, and the effective doping concentration is 1e20 cm -3 .

[0079] Comparative Example 1 The method of Example 1 is referred to, except that the transparent conductive film layer is a conventional ITO film layer, the thickness of the ITO film layer is 60nm, the average transmittance at a light wavelength of 400-1100nm is 90%, and the square resistance is 80Ω / □; and the metal fine gate electrode has a spacing length W4 of the interval breakpoints in the extension direction, and the disconnection distance is very short, only 1mm.

[0080] Comparative Example 2 The method of Example 1 is referred to, except that the transparent conductive film layer is a conventional ITO film layer (specifically the same as Comparative Example 1).

[0081] Comparative Example 3 The method of Example 1 was followed, except that the transparent conductive film layer was an ITO film layer and a metal film layer (the first transparent conductive oxide and the first ultra-thin metal film, respectively, of Example 1) disposed in sequence, without a sandwich structure. The transparent conductive film layer had an average transmittance of 76% at a wavelength of 400-1100 nm and a square resistance of 8 Ω / □.

[0082] Comparative Example 4 The method of Example 1 was followed, except that the thickness of the first ultra-thin metal film was 20 nm. The calculated thickness ratio of the first ultra-thin metal film to the first transparent conductive oxide and the second transparent conductive oxide was 1:2:1. The transparent conductive film layer had an average transmittance of 30% and a sheet resistance of 1.3 Ω / □ for light with a wavelength of 400-1100 nm.

[0083] Test Case The back-contact cells obtained in the above-mentioned embodiments and comparative examples were subjected to battery conversion efficiency and bifaciality performance tests, and their silver paste dosage was calculated. The results are shown in Table 1. The corresponding back-contact cells were made into battery modules with the same structure to test their short-circuit conditions and calculate the proportion of short-circuit defects. The results are shown in Table 1. The test method for bifaciality is the ratio of the battery conversion efficiency of the back-light test of the battery to the front-light test of the battery during the IV test. Among them, the performance index silver paste dosage of each embodiment and comparative example is converted with Example 1 as the reference benchmark. The data of Example 1 is the normalized benchmark 1, and the other examples are converted based on Example 1, such as the silver paste dosage of Comparative Example 1 / the silver paste dosage of Example 1 is 2.

[0084] Table 1

[0085] It can be seen from the above results that, compared with the comparative example, the embodiment of the present invention can significantly reduce the consumption of silver paste and reduce the risk of short circuit during subsequent soldering ribbon connection. At the same time, it maintains a high bifaciality while ensuring a high level of battery conversion efficiency.

[0086] Furthermore, according to Examples 1 and 2-7, it can be seen that the preferred solution of the present invention is more conducive to reducing the consumption of silver paste while taking into account the reduction of short circuit risks, high bifaciality, and high battery conversion efficiency.

[0087] The preferred embodiments of the present invention have been described in detail above, but the present invention is not limited thereto. Within the technical concept of the present invention, various simple variations of the technical solution of the present invention may be made, including combining the various technical features in any other appropriate manner. These simple variations and combinations should also be regarded as disclosed in the present invention and fall within the scope of protection of the present invention.

Claims

1. A back-contact cell with a specific transparent conductive film layer, comprising a silicon wafer, a semiconductor film layer disposed on the back side of the silicon wafer, the semiconductor film layer comprising a first semiconductor layer and a second semiconductor layer alternately disposed along the back side, a transparent conductive film layer disposed on the outer surface of the semiconductor film layer, and a metal fine gate electrode, the metal fine gate electrode being disposed on the outer surface of each corresponding transparent conductive film layer in a predetermined semiconductor region, characterized in that: The transparent conductive film layer has a sandwich structure comprising a first transparent conductive oxide, a first ultra-thin metal film, and a second transparent conductive oxide arranged in sequence, wherein the thickness of the first ultra-thin metal film is 1-10 nm, and the ratio of the thickness of the first ultra-thin metal film to the first transparent conductive oxide and the second transparent conductive oxide is 1:(1-20):(1-20); the average transmittance of the transparent conductive film layer as a whole at a wavelength of 400-1100 nm is greater than 50%, and the sheet resistance of the transparent conductive film layer as a whole is 0.6-6 Ω / □; along the extension direction of the metal fine gate electrode, the metal fine gate electrode has at least one interval break point, and the interval length W4 of the interval break point is 2-5 mm.

2. The back contact battery with a specific transparent conductive film layer according to claim 1, characterized in that: The transparent conductive film layer has one or more sandwich structures, and the corresponding ultra-thin metal films and the corresponding transparent conductive oxides are alternately arranged in the multiple sandwich structures.

3. The back contact battery with a specific transparent conductive film layer according to claim 1, characterized in that: The transparent conductive film layer further includes: a second ultra-thin metal film provided on the outer surface of the sandwich structure, the second ultra-thin metal film serving as a surface layer.

4. The back contact battery with a specific transparent conductive film layer according to claim 3, characterized in that: The total thickness of the ultra-thin metal films contained in the transparent conductive film layer is 1-12 nm, and / or the material of each ultra-thin metal film contained in the transparent conductive film layer is independently selected from metal silver or metal gold.

5. The back contact battery having a specific transparent conductive film layer according to any one of claims 1 to 3, characterized in that: The thickness of each single layer of transparent conductive oxide is 10-60 nm, and the total thickness of each transparent conductive oxide contained in the transparent conductive film layer is 20-100 nm; and / or, The material of each transparent conductive oxide contained in the transparent conductive film layer is independently selected from at least one of a doped indium oxide-based film and a doped zinc oxide-based film, wherein the doping element of the doped indium oxide-based film is selected from at least one of tin, tungsten, titanium, zinc, and gallium, and the doping element of the doped zinc oxide-based film is selected from at least one of aluminum, gallium, and boron.

6. The back contact battery with a specific transparent conductive film layer according to claim 1, characterized in that: An isolation groove is provided on a portion of the transparent conductive film layer located between two semiconductor regions of different polarities.

7. The back contact battery with a specific transparent conductive film layer according to claim 1 or 6, characterized in that: In the semiconductor film layer, both ends of the second semiconductor layer extend outward to cover the back side of the adjacent first semiconductor layer, and a first semiconductor opening region that does not cover the second semiconductor layer is opened on the back side of the first semiconductor layer. A second semiconductor opening region is formed between adjacent first semiconductor layers. The second semiconductor opening region and the first semiconductor opening region are arranged at intervals, and the area between them is a spacing region. An isolation groove is opened on the portion of the transparent conductive film layer located in the spacing region.

8. The back contact battery with a specific transparent conductive film layer according to claim 7, characterized in that: In the vertical direction along the metal fine gate electrode, the spaced breakpoints on two adjacent metal fine gate electrodes are arranged crosswise; and / or, The back contact battery also includes a metal main grid electrode and an insulating block arranged at the interval breakpoint. The metal main grid electrode is arranged vertically with the metal fine grid electrode of the same polarity and is connected at the intersection of the two, and covers the insulating block on its corresponding extension axis.

9. The back contact battery with a specific transparent conductive film layer according to claim 1 or 6, characterized in that: The first semiconductor layer is a stacked layer comprising a tunneling oxide layer and a first doped polysilicon layer or a stacked layer comprising a first intrinsic silicon layer and a first doped silicon layer, and the second semiconductor layer comprises a second intrinsic silicon layer and a second doped silicon layer; and / or, The back contact cell also includes a front passivation layer and an anti-reflection layer sequentially arranged on the front side of the silicon wafer.

10. A method for preparing a back contact battery having a specific transparent conductive film layer, characterized in that: It is used to prepare a back-contact battery with a specific transparent conductive film layer as described in any one of claims 1 to 9. The preparation method includes: sequentially forming a semiconductor film layer and a transparent conductive film layer with a sandwich structure on the back of a silicon wafer.

11. The method for preparing a back contact battery having a specific transparent conductive film layer according to claim 10, characterized in that: The formation process of the transparent conductive film layer includes: first depositing a sandwich structure, and then depositing a second ultra-thin metal film; and / or, The preparation method also includes: forming a front passivation layer and an anti-reflection layer in sequence on the front of the silicon wafer, then forming the transparent conductive film layer, opening an isolation groove on the transparent conductive film layer, and then forming a metal fine gate electrode.

12. A battery assembly, characterized in that: It comprises a back contact cell having a specific transparent conductive film layer as claimed in any one of claims 1 to 9.

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