Abnormal power-off processing method for solid state disk, solid state disk, medium and product

Abstract

The invention provides an abnormal power-off processing method for a solid state disk, the solid state disk, a medium and a product, which can be applied to the technical field of storage. The method comprises the following steps: in response to a received abnormal power-off signal, writing to-be-written data into a management file in a storage node based on address information of the to-be-written data and an allocation state corresponding to the address information, and taking the to-be-written data as storage data; in response to the received power-off request, processing the storage data based on states of sub-files in the management file to obtain a processing result, the states including a file storage state and respective write states of a main storage unit and a slave storage unit of the solid state disk; and updating respective metadata information sets in the master storage unit and the slave storage unit based on the processing result to obtain a power-off result which indicates a data storage result in the master storage unit and the slave storage unit under an abnormal power-off condition.

Description

Technical Field

[0001] The present invention relates to the field of storage technology, and in particular to a method for processing abnormal power-off of a solid-state hard disk, a solid-state hard disk, a medium, and a product. Background Art

[0002] Flash memory (Nand Flash) is the core component of solid-state drives (SSDs). Depending on the manufacturing process and the arrangement of storage cells, flash memory can come in various types. Related technologies address unexpected SSD power failures by discarding cached data, increasing capacitance, and utilizing non-volatile storage media. However, these approaches can easily lead to user data loss and a reduced user experience. Increasing capacitance or replacing the SSD increases device costs and impacts the overall stability of the processing system. Summary of the Invention

[0003] In view of the above problems, the present invention provides a method, apparatus, device, medium and program product for handling abnormal power-off of a solid state drive.

[0004] According to a first aspect of the present invention, a method for processing abnormal power-off of a solid-state hard disk is provided, comprising: in response to receiving an abnormal power-off signal, writing the data to be written into a management file in a storage node as storage data based on address information of the data to be written and an allocation status corresponding to the address information; in response to receiving a power-off request, processing the storage data based on the status of a sub-file in the management file to obtain a processing result, wherein the status includes the file storage status and the respective write status of a primary storage unit and a secondary storage unit of the solid-state hard disk; updating the respective metadata information sets in the primary storage unit and the secondary storage unit based on the processing result to obtain a power-off result, wherein the power-off result indicates the data storage result in the primary storage unit and the secondary storage unit under abnormal power-off conditions.

[0005] The second aspect of the present invention provides an abnormal power-off processing device for a solid-state hard disk, comprising: a writing module for, in response to receiving an abnormal power-off signal, writing the data to be written into a management file in a storage node as storage data based on address information of the data to be written and an allocation status corresponding to the address information; a processing module for, in response to receiving a power-off request, processing the storage data based on the status of a sub-file in the management file to obtain a processing result, wherein the status includes the file storage status and the respective write status of a main storage unit and a slave storage unit of the solid-state hard disk; a result determination module for updating the respective metadata information sets in the main storage unit and the slave storage unit based on the processing result to obtain a power-off result, wherein the power-off result indicates the data storage result in the main storage unit and the slave storage unit under abnormal power-off conditions.

[0006] A third aspect of the present invention provides a solid-state hard disk, comprising: a memory; and a processor configured to execute the above-mentioned method for handling abnormal power-off of the solid-state hard disk according to instructions and data stored in the memory.

[0007] The fourth aspect of the present invention further provides a computer-readable storage medium having a computer program or instructions stored thereon, which implements the steps of the above method when the computer program or instructions are executed by a processor.

[0008] The fifth aspect of the present invention further provides a computer program product, comprising a computer program or instructions, which implement the steps of the above method when executed by a processor. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above contents and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0010] Figure 1 A diagram illustrating an application scenario of a method, apparatus, device, medium, and program product for handling abnormal power failure of a solid-state drive according to an embodiment of the present invention is shown;

[0011] Figure 2 A flowchart of a method for handling abnormal power-off of a solid-state drive according to an embodiment of the present invention is shown;

[0012] Figure 3 A schematic diagram showing the layout of physical storage blocks inside a solid-state drive according to an embodiment of the present invention is shown;

[0013] Figure 4A A schematic diagram illustrating an example of five state transition processes in the total page state of a four-layer unit according to an embodiment of the present invention is shown;

[0014] Figure 4B A flowchart of writing the total page status of a four-layer unit according to an embodiment of the present invention is shown;

[0015] Figure 5A shows a flowchart of writing a single-level cell block according to an embodiment of the present invention;

[0016] Figure 5B A flowchart of recovering data of a single-level unit total block cache according to an embodiment of the present invention is shown;

[0017] Figure 6 A schematic diagram of bad block replacement at the same plane position according to an embodiment of the present invention is shown;

[0018] Figure 7 A structural block diagram of a device for processing abnormal power failure of a solid-state hard disk according to an embodiment of the present invention is shown;

[0019] Figure 8 shows a block diagram of a solid state drive according to an embodiment of the present invention;

[0020] Figure 9 A block diagram of an electronic device suitable for implementing a method for processing abnormal power-off of a solid-state drive according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0021] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present invention. In the following detailed description, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of embodiments of the present invention. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concept of the present invention.

[0022] The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. The terms "comprise", "include", etc. used herein indicate the presence of the features, steps, operations and / or components, but do not exclude the presence or addition of one or more other features, steps, operations or components.

[0023] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0024] When expressions such as "at least one of A, B, and C, etc." are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include but is not limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.).

[0025] Flash memory types include single-level cell (SLC), multi-level cell (MLC), triple-level cell (TLC), and quad-level cell (QLC). SLC offers the fastest speed and longest lifespan, but also the highest cost. QLC offers the highest storage density and the lowest cost, but its performance and lifespan are relatively poor. TLC offers a balance of performance and lifespan, and because of its moderate storage density, it is primarily used in low-capacity solid-state drives (SSDs). QLC has a higher storage density and is suitable for higher-capacity SSDs (32TB, 64TB, and 128TB, etc.). In related technologies, QLC is suitable for high-capacity scenarios with moderate performance requirements.

[0026] Basic flash memory operations include read, write, and erase. Before writing data, flash memory can be erased (TLC can be erased approximately 10,000 times, while QLC is typically erased around 3,000 times). The basic unit of flash memory erase is the block, and each block contains multiple word lines. The basic unit of data write is the word line, and flash memory requires that word lines within a block be written sequentially. A QLC word line can contain four pages; the basic unit of data read is the page, and a page is typically 16KB in size.

[0027] The read and erase operations of TLC and QLC are basically the same, but there is a big difference in the write operations: TLC only needs to be programmed once when writing data, while QLC needs to be programmed twice.

[0028] Each layer of QLC flash memory contains multiple word lines. Programming word line (i) on layer (N) affects the data stability of word line (i) on the adjacent layer (N-1). Therefore, word line (i) on layer (N-1) is first coarse-programmed, performing a first charge fill to a voltage slightly lower than the final voltage. After coarse programming of word line (i) on layer (N) is completed, fine programming is performed on word line (i) on layer (N-1), performing a second charge fill to reach the final voltage. This process reduces program disturb between adjacent cells and allows for more accurate control of cell voltage levels, thereby improving data reliability.

[0029] When writing data to QLC, all word lines of a layer must be cached in the dynamic random access memory (Double Data Rate SDRAM, DDR) and cannot be released until the secondary programming is complete. In the event of an abnormal power outage, the backup capacitors in the SSD can only provide power for a short time. The QLC cache data must be written to the flash memory and the logical to physical address translation (L2P) table must be updated to preserve the user data. To save user data within a limited time, the cache data must be written to the flash memory as quickly as possible.

[0030] Flash memory programming times, from fastest to slowest, are as follows: SLC, MLC, TLC, QLC coarse programming, and QLC fine programming. SLC programming is the fastest, taking about 90us to write a word line; QLC programming is the slowest, taking about 2ms for coarse programming and about 5ms for fine programming.

[0031] In some cases, when QLC flash memory experiences an abnormal power outage, the SSD controller discards the data stored in the cache at the moment of power outage to quickly restore the system, and no longer saves or restores this cached data. This saves the SSD from spending a lot of time processing cached data consistency and integrity issues when it powers back on, allowing it to return to a usable state as quickly as possible.

[0032] However, for applications requiring high data integrity, such as databases and financial trading systems, the loss of cached data can cause severe business impact and financial losses. For example, during a database write operation, if some data has already been written to the cache but not yet to the flash memory, losing this data after an abnormal power outage could lead to database inconsistencies and corruption. This data loss could result in the loss of unsaved work and application crashes, severely impacting the user experience and product trust.

[0033] In some examples, by increasing capacitance design, a larger-capacity capacitor bank and a backup power circuit are configured in the SSD. When a power outage is detected, the capacitor bank provides temporary power support for the cached data, giving the controller enough time to save the data in the volatile cache to the QLC flash memory to ensure that the data is not lost.

[0034] However, large-capacity capacitors are relatively expensive, and to achieve better performance and stability, they also require associated management circuits and backup power supply circuits, significantly increasing the cost of the entire SSD. Furthermore, larger-capacity capacitors tend to be bulky, requiring more physical space for installation and layout within the SSD, which can easily increase the overall size of the SSD. This can make it difficult to meet the compact design requirements of space-constrained devices, such as laptops and embedded systems, limiting the product's applicability. Furthermore, the introduction of large-capacity capacitors can affect the SSD's circuit characteristics, potentially altering parameters such as the circuit's frequency response and impedance matching, thereby affecting the stability and reliability of the entire circuit.

[0035] In some cases, DDR is replaced with new, faster non-volatile storage media. However, the research and development of new non-volatile storage media requires significant capital and human resources, and the manufacturing process is complex, requiring extremely high levels of production equipment and process precision. DDR, on the other hand, has a very high data transmission bandwidth, enabling rapid transfer of large amounts of data between the processor and memory. However, non-volatile, fast storage media lags behind DDR in data transmission bandwidth and cannot meet the high bandwidth requirements of the system.

[0036] Based on the above-mentioned problems, the present invention provides a method, apparatus, device, medium, and program product for handling abnormal power-off of a solid-state drive. The method comprises: in response to receiving an abnormal power-off signal, writing the data to be written into a management file in a storage node as storage data based on the address information of the data to be written and the allocation status corresponding to the address information; in response to receiving a power-off request, processing the storage data based on the status of the subfiles in the management file to obtain a processing result, wherein the status includes the file storage status and the write status of the master storage unit and the slave storage unit of the solid-state drive; and updating the metadata information sets of the master storage unit and the slave storage unit based on the processing result to obtain a power-off result, which indicates the data storage results of the master storage unit and the slave storage unit in the event of an abnormal power-off.

[0037] According to an embodiment of the present invention, by writing the data to be written into the management file of the storage node in real time based on both the address information and the allocation status corresponding to the address information, when a power-off request is received, the storage data can be further comprehensively processed based on the file storage status of the sub-file in the management file and the respective write status of the main storage unit and the slave storage unit, the storage result is obtained and the metadata information set is updated to achieve a successful power-off. Since the slave storage unit has a faster write speed than the main storage unit, when an abnormal power-off occurs, the data write operation can be completed in a shorter time by quickly transferring the data in the main storage unit to the slave storage unit, and the capacitor that provides power support for the write operation can have a smaller capacity, which reduces costs while reducing the risk of data loss, further improving user satisfaction and experience.

[0038] Figure 1 A diagram illustrating an application scenario of a method, apparatus, device, medium, and program product for handling abnormal power failure of a solid-state drive according to an embodiment of the present invention is shown.

[0039] like Figure 1 As shown, the application scenario according to this embodiment may include a processor 101 and a memory 102. The processor 101 may be a processor embedded in the memory 102 or independent of the memory 102 to implement data storage and processing functions. The memory 102 may be a storage device that provides storage services through a storage protocol, such as a flash memory.

[0040] The processor 101 can be connected to the memory 102 via a specific interface. The memory 102 can identify the device to be matched through the interface and communicate with it to store or process information.

[0041] The processor 101 can be used to monitor the overall operating status of the system. When an abnormal power failure is detected, such as a power failure or system crash, a notification signal can be immediately sent to the memory 102 to inform it of an impending power failure.

[0042] For example, after notifying the memory 102, the processor 101 may suspend the write operation to the memory 102 and wait for the memory 102 to complete processing the data in the QLC flash cache.

[0043] For example, upon receiving an abnormal power-off notification from processor 101, memory 102 can immediately activate its internal data protection mechanism and prepare to transfer data in the QLC flash cache to a single-level cell (SLC) block. After completing the data write, memory 102 can verify the integrity of the data in the SLC block.

[0044] The memory 102 may send an operation completion signal to the processor 101. After receiving the signal, the processor 101 may confirm that the data has been safely saved and may perform subsequent processing or a safe shutdown operation.

[0045] It should be noted that the method for handling abnormal power-off of a solid-state drive provided in the embodiment of the present invention can generally be executed by the processor 101. Accordingly, the device for handling abnormal power-off of a solid-state drive provided in the embodiment of the present invention can generally be set in the processor 101. The method for handling abnormal power-off of a solid-state drive provided in the embodiment of the present invention can also be executed by a server or server cluster that is different from the processor 101 and can communicate with the processor 101. Accordingly, the device for handling abnormal power-off of a solid-state drive provided in the embodiment of the present invention can also be set in a server or server cluster that is different from the processor 101 and can communicate with the processor 101.

[0046] It should be understood that Figure 1 The number of processors and memories in the embodiment is only illustrative. Any number of processors and memories may be provided according to implementation requirements.

[0047] Figure 2 A flow chart of a method for handling abnormal power-off of a solid-state drive according to an embodiment of the present invention is shown.

[0048] like Figure 2 As shown, the method for handling abnormal power-off of a solid state drive in this embodiment may include operations S210 to S230.

[0049] In operation S210 , in response to receiving an abnormal power-off signal, the data to be written is written into a management file in a storage node as storage data based on address information of the data to be written and an allocation state corresponding to the address information.

[0050] In an embodiment of the present invention, when an abnormal power failure occurs, an abnormal power failure interrupt is triggered, generating an abnormal power failure signal. All functional modules in the processing system can detect the abnormal power failure and process the abnormal power failure logic. The address information can be the address to be written of the data to be written; the allocation status can be the status result of whether the data to be written is currently allocated to the corresponding address to be written. The type of data to be written can be determined according to actual needs, including but not limited to file system data, database data, application data, cache data, and network data.

[0051] A storage node may be a node in a storage unit that stores data to be written. A management file may be a file in a storage unit that temporarily stores data to be written and stores status information for different storage nodes. The stored data may be data temporarily stored in different storage units of a solid-state drive.

[0052] For example, when an abnormal power failure (power off) occurs, an abnormal power failure interrupt signal can be triggered, and the abnormal power failure global flag (Flag) in the system is set to a fixed value. All modules in the processing system can receive the abnormal power failure interrupt signal, thereby processing the abnormal power failure logic; the data reading and writing module in the processing system can write the data to be written into the management file for temporary storage based on the address information of the data to be written and whether the allocation of the address information to be written has been completed, and determine the data temporarily stored in the management file as storage data.

[0053] In operation S220, in response to receiving the power-off request, the stored data is processed based on the status of the sub-file in the management file to obtain a processing result, wherein the status includes the file storage status and the write status of the main storage unit and the slave storage unit of the solid state drive.

[0054] In an embodiment of the present invention, a power-off request may be generated by a processing system in response to an abnormal power outage to notify each functional module in the processing system to promptly execute operations such as data preservation, resource release, and state cleanup, thereby preventing data loss or corruption due to an abnormal power outage. A subfile may be a file within a management file used to temporarily store data. A file storage status may be a state in which the data to be written at the current moment is stored in the corresponding storage file. The write status may be different states corresponding to multiple write phases. The processing result may include multiple processing results corresponding to each of the primary storage unit and the secondary storage unit.

[0055] For example, after receiving a power-off request, the data reading and writing module can write the stored data to the main storage unit or the slave storage unit of the solid-state drive according to the file storage status and the different write status of the stored data in different temporary files to complete the further storage of the current stored data.

[0056] In operation S230, metadata information sets of the master storage unit and the slave storage unit are updated based on the processing result to obtain a power-off result indicating data storage results in the master storage unit and the slave storage unit in the event of an abnormal power-off.

[0057] In an embodiment of the present invention, the metadata information may include logical-to-physical address conversion information, the number of valid storage blocks in the logical unit, and address information of the number of valid storage blocks. The power-off result may include a power-off success result or a power-off failure result based on the data storage result. The master storage unit may be a four-level cell type flash memory, and the slave storage unit may be a single-level cell type flash memory.

[0058] For example, the logical to physical address conversion information, the number of valid storage blocks and the address information of the number of valid storage blocks of the main storage unit and the slave storage unit are updated according to the first result and the second result; after the information is updated successfully, the power-off success result is sent to other functional modules in the system.

[0059] In one feasible embodiment, the functional modules for implementing a data writing method for a solid-state drive in the event of an abnormal power failure may include a front-end module, a data read / write module, a metadata storage module, and a back-end module. The front-end module may be configured to process a host write command, write the host's to-be-written data into the dynamic random access memory, modify the physical address information in the logical-to-physical address translation information set to a cache address, return a write completion message to the host, and send the cached data to the data read / write module for processing.

[0060] The data read / write module receives write requests from the front-end module, allocates write addresses to the flash memory, caches the data to be written, and sends it to the back-end module for writing to the flash memory. It also processes write completion messages from the back-end module and updates the physical address translation information set to the flash memory address. It also manages the total block information for all user data, updating the total number of valid storage blocks and the address information for the valid storage block number. The metadata storage module is responsible for saving metadata information during operation, as well as power-off saving and power-on recovery operations. The back-end module handles read, write, and erase operations on the flash memory.

[0061] According to an embodiment of the present invention, by writing the data to be written into the management file of the storage node in real time based on both the address information and the allocation status corresponding to the address information, when a power-off request is received, the storage data can be further comprehensively processed based on the file storage status of the sub-file in the management file and the respective write status of the main storage unit and the slave storage unit, the storage result is obtained and the metadata information set is updated to achieve a successful power-off. Since the slave storage unit has a faster write speed than the main storage unit, when an abnormal power-off occurs, the data write operation can be completed in a shorter time by quickly transferring the data in the main storage unit to the slave storage unit, and the capacitor that provides power support for the write operation can have a smaller capacity, which reduces costs while reducing the risk of data loss, further improving user satisfaction and experience.

[0062] Figure 3 A schematic diagram showing the layout of physical storage blocks inside a solid-state drive according to an embodiment of the present invention is shown.

[0063] like Figure 3As shown, flash memory (Nand Flash) can contain multiple physical logical units (LUNs). Each LUN can contain the same number of storage blocks. The number of LUNs can be 128, 256, or similar. Read, write, and erase operations can be performed concurrently across all LUNs, while blocks within a LUN can only be read, written, and erased serially. To improve read and write speeds, SSDs can organize multiple consecutive blocks within a LUN into storage planes (Multi Planes), allowing for parallel read, write, and erase operations. The number of storage planes can be 2, 4, or 6. For example, a LUN can include Plane0, Plane1, Plane2, and Plane3. It is understood that a storage plane is an independent data storage and operation unit within the flash memory; a storage multi plane can include multiple storage planes.

[0064] In actual use, the blocks within each LUN can be divided into SLC and QLC areas. The SLC blocks can store metadata, including the logical-to-physical address translation information set (L2P table), storage block information (BlockInformation), the number of valid storage blocks in the logical unit (Vdfc), and the address information of the valid storage block number (Vdfb). This metadata is stored in DDR during SSD operation and can be saved to Nand Flash for persistent storage during power-off. It can be restored from Nand Flash to DDR upon power-on.

[0065] Quad-level cell (QLC) blocks store user data. Every 32 LUNs form a single logical unit (Super LUN). Blocks within these 32 LUNs can form a 31+1 Redundant Array of Independent Disks (RAID) for redundant storage. Blocks in the same position within the 32 LUNs form a single Super Block. For example, if a LUN contains four storage planes, Super Block 0 might include: LUN0 (Blocks 0-3), LUN1 (Blocks 0-3), ..., LUN255 (Blocks 0-3). Each Super Block selects LUNs with good blocks across all planes from the 32 LUNs and stores the RAID calculation results for the remaining 31 LUNs. The status of each Super Block is recorded in the Block Information field. Vdfc and Vdfb fields record the amount and location of valid data within the Super Block. This metadata can be updated in real time in the DDR during SSD operation. Table 1 shows multiple functional modules in the system for executing data writing to the solid-state drive, as shown in Table 1 below.

[0066] Table 1

[0067]

[0068] According to an embodiment of the present invention, based on the address information of the data to be written and the allocation status corresponding to the address information, the data to be written is written into the management file in the storage node as the storage data, including: when the allocation status indicates that the data to be written has the target address information, the data amount of the data to be written is greater than or equal to the first threshold, and the corresponding management file is not allocated, the data to be written is written into the temporary file in the storage node; when the existence of the target management file is detected, the temporary data in the temporary file is written into the target management file to obtain the storage data, wherein the target management file indicates a management file that is currently in an idle state.

[0069] In an embodiment of the present invention, the target address information may be the physical address information of the storage block to be written corresponding to the data to be written at the current moment. The first threshold may be a data volume threshold that satisfies the requirement for simultaneous batch writing to the solid-state drive. The temporary file may be a file used for temporary storage when the amount of data to be written does not meet the requirement for batch writing.

[0070] For example, after the current data to be written has been allocated the corresponding storage block physical address information, the data amount of the current data to be written can be further determined, thereby triggering a data batch write instruction when the data amount is greater than or equal to the first threshold; and writing the batch of data to be written into the target management file.

[0071] In an embodiment of the present invention, the write process for a four-level flash memory cell may include storage block (Open Block) management and abnormal power failure handling. A storage block structure (Open Block State) may be used to store information about the Super Block being written. Table 2 shows the contents of multiple storage block structures, as shown in Table 2 below.

[0072] Table 2

[0073]

[0074] Among them, the total page structure state (Super Page State) can be used to store the state information of one Super Page of the four-layer unit block (QLCSuper Block). The specific content is shown in Table 3 below, which shows the content information of the total page structure.

[0075] Table 3

[0076]

[0077] For host writes and writes triggered by the recycling mechanism, a two-dimensional array Open Block States [Total LUN Num / 32][2] can be defined to store all Open Blocks. Each total logical storage unit (Super LUN) can be set to two Open Blocks to alternate and implement ping-pong use. When powered on, each Super LUN can select two idle Super Blocks to store in the Open Block States and initialize their states. During operation, when the Open Block State [0] is written, it can be switched to Open Block State [1] for writing. At the same time, Open Block State [0] can reselect an idle Super Block for initialization, which can avoid data writing pauses caused by the initialization of the Open Block. It can be understood that LUN can be a logical storage sub-unit in the total logical storage unit.

[0078] The secondary write process of the Open Block State may include: the start page (startPage) and array index (raid Index) of the Open Block State are initialized to 0; when data is written, write space can be requested from the raid Index position of the start Page, and the valid plane number (Valid Plane Num) of the raid Index position is calculated according to the initial bad block table (init Bad Block Bitmap). If the cached data volume reaches the preset threshold (for example, 4Page / Word line * Valid Plane Num * 16KB / Page), the raid Index is incremented by 1, and it is skipped when the parity index (parityIndex) is encountered; when the raid Index is added to 32, the start Page is incremented by 1; until the start Page reaches the word line number (Word line Num) of the four-layer unit, it indicates that this Open Block is full; each Open Block State can include M+1 Super Page States, which are used to cache the initial write data of the first M word lines; when the M+1 word lines complete the initial write, the second write of the first word line can be written; after the second write of the first word line is completed, the M+2 word line is written The first write of a line ensures that at most one Super Page is being written in the backend module. Super PageState has five states: idle, data cache, RAID calculation, first write, and second write.

[0079] Figure 4A A schematic diagram illustrating examples of five state transition processes in the total page state of a four-layer unit according to an embodiment of the present invention is shown.

[0080] like Figure 4A As shown, the initial state of the total page state (Super Page States) of all four-layer units is idle state 41, indicating that it is unused; for each write request of raidIndex0 of the start page (start Page), one idle Super Page State can be applied; if the application is successful, the Super Page State becomes the data cache state 42; if the application fails, the write request can be temporarily stored in the pending write list (Pending Program List), and the write data on the pending program list will be processed after a Super Page State completes the second write and becomes idle;

[0081] For each write data cached by the Super Page State, the raid Cnt is incremented by 1. When the Super Page State caches data for a full stripe (varying according to the init Bad Block Bitmap, with a maximum of 32), its state changes to the RAID calculation state 43, and a RAID calculation request is initiated. The RAID calculation result is saved at the position of the parity Index. The RAID calculation of the Super Page State takes some time. After the RAID calculation is completed, the state of the Super Page State changes to the initial write state 44, and both the write request count (req Cnt) and the write completion count (cpl Cnt) are set to 0, entering the Super Page State write process.

[0082] For the Super Page State that has completed the initial write, its state is changed to the secondary write state 45. For the data completed in the secondary write, the L2P table can be updated to the corresponding QLC address, and the metadata saving module is notified to save the mapping relationship between the logical block address information and the physical block address information.

[0083] Figure 4B The total page state write flow chart of the four-layer cell according to an embodiment of the present invention is shown.

[0084] As Figure 4B shown, the total page state (Super Page State) write process of the four-layer cell may include operations S410 to S430.

[0085] In operation S410, the total page state information is written for the first time or the second time. The Super Page State to be written is found according to the current page (writing Page), with the state being the first write or the second write and req Cnt being 0. The cached data of this Super Page State can be sent to the backend module for writing one by one, and req Cnt is incremented by 1 until raid Cnt indicates that all data has been sent; for each write completion message received, cpl Cnt is incremented by 1 until raid Cnt indicates that all data has been written.

[0086] In operation S420, the state information is updated. For the Super Page State that has completed the first write, its state information can be changed to the second write state, and the values of req Cnt and cpl Cnt are reset to 0. The writing Page is adjusted to page Num - M (in the boundary case, when page Num < M, page Num is adjusted to page Num + 1).

[0087] In operation S430, the writing state is converted to the idle state. For the Super Page State that has completed the second write, its state can be converted to the idle state, and the writing page is adjusted to pageNum+M+1 (in the boundary case, if pageNum+M+1>Wordline Num, the page number is adjusted to pageNum+1). At the same time, the data of the pending program list is processed.

[0088] In an embodiment of the present invention, the following structure may be used to store status information of each single-level cell (SLC SuperBlock), as shown in Table 4 below. Table 4 shows multiple structures in a single-level cell.

[0089] Table 4

[0090]

[0091] In one feasible embodiment, an SLC Super Block storage structure can be added to the metadata information, including the total block array (slc Super Block Array [Total LUN Num / 32]), where Total LUN Num is the total number of physical LUNs in the Nand Flash. Each Super LUN can use one SLC Super Block. This metadata information is saved after cache data is written to the SLC Super Block during an abnormal power-off and restored before the SLC block is read upon power-on.

[0092] When powered on for the first time, the SLC Super Block information can be initialized. The initialization process may include: traversing the total block array slc Super Block Array [Total LUN Num / 32], setting all contents to 0, and setting the total block physical address (flash Addr) to the specified SLC Block location; traversing all blocks on the 32 LUNs in the SLC Super Block, querying the bad block table to check whether it is a bad block. If it is a bad block, a good block can be selected in the QLC Block for replacement, and the identifier of the QLC Block can be filled in the bad block replacement table (remmap Table); erasing the physical block in the SLC Super Block, and if a bad block replacement exists, erasing the replacement block.

[0093] Figure 5A FIG. 1 shows a flowchart of writing a single-level cell block according to an embodiment of the present invention.

[0094] like Figure 5A As shown, in the case of abnormal power-off, the writing process of the SLC Super Block may include operations S501 to S506.

[0095] In operation S501, the data to be written is written sequentially to all pages. The SLC Super Block writes data starting from the start page, writing multiple planes of SLC pages for one LUN at a time. For example, data of size 16KB * Plane Num is written sequentially from LUNs 0 to 30. The RAID XOR calculation result of the first 31 LUNs can be written to LUN 31. After each Super Page is written, the end page is incremented by 1.

[0096] In operation S502, the total page data is evenly written to the total blocks of the single-level cells in the array. Each time a SuperPage of an SLC is written, the array slcSuper Block Array[Total LUNNum / 32] can be polled for writing to balance all SLCSuper Blocks.

[0097] In operation S503, bad blocks are replaced. When writing to each LUN, the remmap table is searched. If there is a bad block to replace, the replacement block recorded in the remmap table can be filled in when writing data, and the backend module will write the data into the replacement block.

[0098] In operation S504, data is filled to achieve redundant storage. When the 32 LUNs of the last Super Page of the SLC Super Block are not fully written, the remaining LUNs can be filled with supplementary data (dummy) to maintain 31+1 RAID redundant storage.

[0099] In operation S505, single-level unit block write errors are handled based on the number of logical storage unit errors. If a write error occurs on a block in one of the 32 LUNs, this error can be ignored and data can be written to other LUNs. Upon power-up, the data on the LUN with the write error can be recovered using the RAID error correction mechanism. If two or more LUNs experience write errors simultaneously (an extremely rare occurrence), this indicates an uncorrectable data error and the disk must be marked as read-only. The physical block with the write error is marked in the grown bad block bitmap and replaced after data recovery is complete on the next power-up.

[0100] In operation S506, information is updated. After the data is written into the SLC Super Block, the L2P table can be updated, the corresponding logical block address is modified to the address of the SLC Super Block, and the L2P table and slcSuper Block Array information are completely saved in the flash memory.

[0101] Figure 5B A flowchart of restoring data of a single-level unit total block cache according to an embodiment of the present invention is shown.

[0102] like Figure 5B As shown, upon abnormal power-on, a method of restoring data cached in a single-level cell super block (SLC Super Block) may include operations S510 to S590.

[0103] In operation S510, the single-level cell block data is initially restored. After the metadata recovery module has restored all metadata information, the data read / write module can begin the SLC Super Block data recovery operation.

[0104] In operation S520, it is determined whether data recovery is required. The array slcSuper Block Array[Total LUN Num / 32] can be traversed to recover data for each SLC Super Block. If the end page number is greater than the start page number, data recovery is required for this SLC Super Block. Otherwise, data recovery is not required.

[0105] In operation S530, the bad block replacement table is queried for data reading and error correction. The data in the SLC Super Block between the start page and the end page (excluding the end page) is read. The remmap table is queried during the reading process. If a bad block replacement exists, the data is read from the replacement block. If the read fails, RAID data error correction is performed using the other 31 copies of data in the SLC Super Block. If RAID error correction fails, the disk is marked as read-only. The physical block where the read failed is marked in the grown bad block bitmap, and the bad block is replaced after data recovery is complete.

[0106] In operation S540 , the data is determined to be valid. For each page of data (16KB) read, the physical block address information recorded in the L2P table is read. If the current read location matches the physical block address information recorded in the L2P table, the data is valid; otherwise, it is invalid. Only valid data is saved in the QLC.

[0107] In operation S550, data is written to the four-layer unit and metadata information is updated. Data read from the SLC is written to the QLC. The QLC write process can refer to the QLC secondary write process design. After the write is completed, the QLC writes M word lines of dummy data (a QLC layer can contain M word lines), writes all the data in the cache to the flash memory, updates the L2P table with the physical block address of the QLC, and notifies the metadata storage module to save the updated L2P table.

[0108] In operation S560, the remaining space is determined. The start page is increased to the end page, and the remaining space of the SLC Super Block after the end page is checked to see if it is larger than the total DDR cache space. If the remaining space is insufficient, the SLC Super Block is erased and the start page and end page are reset to 0.

[0109] In operation S570, a new bad block check is performed. The grown Bad Block Bitmap is checked to see if there is a new bad block. If there is a new bad block, the bad block can be replaced and the entire SLC Super Block is erased, and the start Page and end Page are reset to 0.

[0110] In operation S580, the metadata information is stored, and the metadata storage module is notified to save the metadata information slcSuper Block Array [Total LUN Num / 32] of the SLC Super Block.

[0111] In operation S590 , restoring data of the single-level cell cache ends.

[0112] According to an embodiment of the present invention, the above-mentioned method for handling abnormal power-off of a solid state drive further includes: when the amount of initial data to be written from the front-end module is less than a second threshold, filling the initial data to be written to obtain data to be written.

[0113] In an embodiment of the present invention, the initial data to be written may be data to be written directly sent by the front-end module. The second threshold may be a threshold that satisfies an integer number of stored multi-plane data volumes. The padding data used for the padding process may be data having a certain pattern or fixed content, such as all 0s, all 1s, or other specific padding patterns. Its length and format may be consistent with the actual data to be written to ensure a smooth writing process. The data to be written may be data that meets a certain data volume requirement after the padding process.

[0114] Multiplane writes require a certain data volume, with each plane writing data within a specific page size or other unit. If this volume is insufficient, the device cannot fully utilize the parallel write capabilities of multiple planes, limiting write speed. By adding dummy data to the required multiplane write volume, the device can fully utilize the advantages of multiplane parallel writes, improving write speed and efficiency.

[0115] For example, when an abnormal power failure occurs, the front-end module can abandon the Host write command currently being processed, send all the cached data completed by the Host to the data read-write module, and then send a power-off request to the data read-write module; the data read-write module can continue to receive the data to be written sent by the front-end module, allocate write addresses, and cache the data to be written until it receives the power-off request sent by the front-end module; the Open Block State can save the cached data to the pending ProgramList or Super Page State. For the allocated write address but the Multiplane write is not full, dummy data can be added to make up the Multiplane write.

[0116] According to an embodiment of the present invention, there is no need to wait for a large amount of data to accumulate to fill the write page. By supplementing dummy data to meet the Multiplane write requirement in a timely manner, data can be written to the storage medium more quickly, reducing the delay of the write operation and improving the response speed of the system.

[0117] According to an embodiment of the present invention, the storage data is processed based on the status of the sub-file in the management file to obtain a processing result, including: when the status indicates that the storage data is in a first state stored in the temporary file, the storage data is written to the storage unit to obtain a first processing result; or when the status indicates that the storage data is in a second state stored in the management file, the storage data is processed based on the write status of the storage data to obtain a second processing result.

[0118] In an embodiment of the present invention, the temporary file may be a pending program list in a storage node, and the management file may be a super page state in the storage node. The first processing result may be the result of writing the stored data to the slave storage unit for temporary storage; the second processing result may be the result of writing the stored data to the primary storage unit for scheduled storage.

[0119] For example, after receiving a power-off request, the Open Block State can traverse all cached Super Page States and write each Page (for example, 16KB) within a Super Page that has not yet initiated a second write to the SLC. For Super Pages that have already initiated a second write, the backend module waits for the write to complete, indicating that the data has been written to the QLC. The address information in the L2P table is updated to the QLC address information, and there is no need to write to the SLC. All data cached in the pending program list of the Open Block State can be written to the SLC. The storage data written to the SLC portion is the first processing result, and the storage data written to the QLC portion is the second processing result.

[0120] According to an embodiment of the present invention, a slave storage unit includes multiple logical storage sub-units, and the logical storage sub-units include multiple storage blocks; writing storage data into the slave storage unit includes: writing the storage data and a preset algorithm corresponding to the storage data into the multiple logical sub-units in sequence according to the numbering order of the multiple logical storage sub-units to obtain an intermediate storage result; when the intermediate storage result indicates that the storage data in the sub-file has been written, writing the storage data into multiple total blocks in the block array in sequence, wherein the total block includes multiple storage blocks at the same location information corresponding to each of the multiple logical storage sub-units.

[0121] In an embodiment of the present invention, the preset algorithm may be an XOR checksum algorithm for redundant data storage. If a logical storage sub-unit becomes damaged or erroneous, the damaged data can be restored using the data and checksum information from other logical sub-units. A block array may include multiple total blocks. The intermediate storage result may be the storage result obtained by storing all stored data and the preset algorithm in multiple logical units. Subfiles may be files used to form storage blocks in primary and secondary storage units and may be used for data storage and organization. Each storage block may contain multiple subfiles.

[0122] The method for handling write errors from the total blocks in the storage unit can include: extracting a set of multiplane blocks from the SLC area of each LUN to store user data during an abnormal power outage. 32 LUNs form 31+1 RAID redundant storage, and the SLC blocks within each LUN form a multiplane to write data in parallel.

[0123] If a write error occurs on a block of one of the 32 LUNs, this error can be ignored and data can continue to be written to other LUNs. When power is restored, the data on the LUN with the write error can be recovered through the preset algorithm and RAID error correction mechanism.

[0124] If two or more LUNs experience write errors simultaneously (a very low probability), it indicates an uncorrectable data error and the disk can be marked as read-only. The physical block where the write error occurred can be marked in the grown bad block bitmap and replaced after data recovery is complete at the next power-on.

[0125] According to embodiments of the present invention, 31+1 RAID redundant storage protects cached data written to the SLC while also providing faster write speeds. The SLC utilizes multiplane parallel writes, further accelerating data write speeds and shortening data write times in the event of an abnormal power outage. RAID 5 inherently provides redundancy, and the "31+1" configuration offers even better data protection. Even if a block fails, data can still be recovered using parity information, preventing data loss and ensuring data integrity in the event of an abnormality such as a disk failure.

[0126] In one feasible embodiment, by combining a preset algorithm with a redundant storage structure, a write error during data writing only affects one data storage block, while other storage blocks can still be written normally. For example, if a write error occurs in a storage block (such as a disk failure or data check failure), the error can be marked and isolated using a red-black isolation algorithm. For the errored storage block, subsequent write operations are halted, and error information (such as the storage block address and error type) is recorded. At the same time, writing to other storage blocks is not affected, ensuring that the write operation to other data blocks can be completed normally. This approach ensures normal system operation, preventing the failure of an entire write operation due to a write error in a single data block.

[0127] For example, suppose a database write operation is simultaneously writing multiple data blocks to 32 LUNs. If a block on the 10th LUN experiences a write error, the system can log the error but continue writing the remaining data blocks to the corresponding locations on the remaining 31 LUNs. Upon powering back on, the system can use the RAID 5 parity information to recover the data on the LUN with the write error. Because parity information in RAID 5 is distributed across multiple LUNs, the system can read the data blocks and parity information from other healthy LUNs and use an exclusive OR operation to recalculate the data block on the LUN with the write error.

[0128] For example, assume a normal RAID 5 configuration with three data blocks D1, D2, and D3 stored on LUNs 1, 1LUN2, and 1LUN3, respectively, and parity block P stored on LUN 4 (the LUN numbers here are simplified). If a write error occurs in data block D2 on LUN 2, upon power-on recovery, the system can read D1 and P (P = D1 XOR D2 XOR D3) and perform an XOR operation to obtain D2 = P XOR D1 XOR D3, thereby recovering the erroneous write to data block D2.

[0129] The error handling and recovery mechanism can effectively ensure data integrity and system reliability. In the event of a single LUN write error, the data write operation can be basically carried out normally, and the damaged data can be restored at the appropriate time (power on again) to avoid data loss.

[0130] According to an embodiment of the present invention, the status information of the total block includes abnormal storage block information; the method further includes: in the process of writing the storage data and the preset algorithm into the logical sub-unit, detecting the abnormal storage block information to obtain a detection result; when the detection result indicates that there is an abnormal storage block in the total block, replacing the abnormal storage block with the storage block in the main storage unit at the corresponding position information to obtain an updated total block.

[0131] In an embodiment of the present invention, the abnormal storage block information may be storage block information that cannot be normally written. The detection result may include a result that the abnormal storage block exists in the total blocks and a result that the abnormal storage block does not exist in the total blocks.

[0132] For example, when a bad block exists in the storage block of a slave storage unit, it can be replaced with a QLC block in the same plane position within the LUN where the bad block is located, so that all SLC blocks are good blocks. In this way, when writing data, each LUN can achieve multi-plane parallel writing, and all LUNs can be written concurrently, ensuring the maximum Nand write speed.

[0133] Figure 6 A schematic diagram of bad block replacement at the same plane position according to an embodiment of the present invention is shown.

[0134] like Figure 6 As shown in FIG. 1 , assuming that block 16 on plane 0 is a bad block, a good block 24 can be selected from the block at the Plane 0 position in the main storage unit to replace the bad block 16 in the original secondary storage unit.

[0135] According to an embodiment of the present invention, storage data is processed based on the write status of the storage data, including: when the write status is the first write and the data amount of the storage data is greater than or equal to a third threshold, the storage data is written to the slave storage unit; or when the write status is the second write, the storage data is written to the master storage unit.

[0136] In an embodiment of the present invention, the write status may include a first write, a second write, or a current first write or second write status based on the number of writes. The third threshold may be a threshold that satisfies an integer number of total page data amounts. Whether the stored data is written to the primary storage unit or the secondary storage unit may be determined based on the current write status.

[0137] For example, after an abnormal power outage, when the Super Page State cache is full, no RAID calculation is performed, and the data is no longer sent to the back-end module for writing. Instead, it is sent directly to the SLC for writing. After receiving a power-off request, the Open Block State can traverse all the cached Super Page States and write each Page (for example, 16KB) in the Super Page that has not initiated a second write to the SLC. For the Super Page that has initiated a second write, it can wait for the back-end module to complete the write, which means that the data has been written to the QLC. The address information in the L2P table can be updated to the QLC address without writing to the SLC. In addition, all the data cached in the pending Program List of the Open Block State can be written to the SLC.

[0138] According to an embodiment of the present invention, by traversing all cached Super Page States during power-off and writing each Page within a Super Page that has not yet been rewritten to the SLC, data that has not yet been rewritten can be securely stored in the relatively more reliable and faster-writing SLC storage medium. The SLC has a simple cell structure, with each cell storing one bit of data, offering high durability and data reliability, preventing cached data from being lost due to power outages and ensuring data integrity.

[0139] For Super Pages that have already initiated a second write, waiting for the back-end module to complete writing to QLC can avoid repeated write operations because the data is already being written to the more durable QLC storage medium. Once the back-end module completes writing to QLC, the final storage location record of the data can be completed by updating the logical to physical address translation table to the QLC address, so that the data will not be lost due to power failure. By writing Pages that have not initiated a second write to SLC, the complexity of the write operation is reduced compared to writing all data to QLC. The SLC write speed is relatively fast, and this part of the data can be stored quickly, avoiding a large number of complex data migration and write operations due to power failure.

[0140] According to an embodiment of the present invention, the method also includes: obtaining the subsequent page number at the subsequent moment in the sub-file written for the first time and the previous page number at the previous moment in the sub-file written for the second time; determining the stored data in the target sub-file between the previous page number and the subsequent page number as invalid data to clear the invalid data and the location information of the invalid data.

[0141] The back page number can be the largest file number in the subfile, which is the number of the latest file written in the first write before the abnormal power failure. The front page number can be the smallest file number in the subfile, which is the number of the latest file written in the second write before the abnormal power failure.

[0142] For example, after writing the storage data to the primary storage unit and the secondary storage unit respectively, the smallest number (page Num_X) that has completed secondary writing and the largest number (page Num_Y) that has completed primary writing in the SuperPage State can be traversed. All pages between page Num_X and page Num_Y can be marked as invalid data, and vdfb and vdfc can be cleared; and the start page is set to pageNum_Y+1 and saved in the Block Information of this Open Block.

[0143] According to an embodiment of the present invention, the respective metadata information sets in the main storage unit and the slave storage unit are updated based on the processing results to obtain a power-off result, including: updating the metadata information set when it is determined that the storage data is successfully written into the main storage unit or the slave storage unit; and obtaining a power-off success result when the metadata information set update is completed.

[0144] In an embodiment of the present invention, the original data information set may include a first information set corresponding to the primary storage unit and a second information set corresponding to the secondary storage unit. Once all stored data has been written to the corresponding storage units, the first and second information sets may be updated separately to obtain information set update results. Once all metadata information sets have been updated, it can be determined that the power-off was successful. Furthermore, the power-off success result may be sent to the front-end module for subsequent operations.

[0145] For example, after the SLC Super Block is written, the metadata storage module can be notified to save the L2P table, QLC Block Information, SLC Block Information, vdfb and vdfc information.

[0146] Based on the above-mentioned method for handling abnormal power-off of a solid-state hard disk, the present invention also provides a device for handling abnormal power-off of a solid-state hard disk. Figure 7 The device is described in detail.

[0147] Figure 7 A structural block diagram of a device for processing abnormal power failure of a solid state drive according to an embodiment of the present invention is shown.

[0148] like Figure 7 As shown, the apparatus 700 for processing abnormal power failure of a solid state drive in this embodiment includes a writing module 710 , a processing module 720 and a result determination module 730 .

[0149] The write module 710 is configured to, in response to receiving the abnormal power-off signal, write the data to be written into the management file in the storage node as stored data based on the address information of the data to be written and the allocation status corresponding to the address information. In one embodiment, the write module 710 may be configured to perform operation S210 described above, which will not be further described here.

[0150] Processing module 720 is configured to, in response to receiving the power-off request, process the stored data based on the status of the sub-file in the management file to obtain a processing result, where the status includes the file storage status and the write status of the primary storage unit and the secondary storage unit of the solid-state drive. In one embodiment, processing module 720 may be configured to perform operation S220 described above, which will not be further described here.

[0151] Result determination module 730 is configured to update metadata information sets in the primary storage unit and the secondary storage unit based on the processing results, thereby obtaining a power-off result indicating the data storage results in the primary storage unit and the secondary storage unit in the event of an abnormal power-off. In one embodiment, result determination module 730 may be configured to perform operation S230 described above, which will not be further described herein.

[0152] According to an embodiment of the present invention, the write module 710 includes: a first write submodule and a second write submodule. The first write submodule is configured to write the data to be written to a temporary file in the storage node when the allocation status indicates that the data to be written has target address information, the amount of the data to be written is greater than or equal to a first threshold, and no corresponding management file is allocated; and the second write submodule is configured to write the temporary data in the temporary file to the target management file to obtain storage data when the existence of the target management file is detected, wherein the target management file indicates a management file that is currently in an idle state.

[0153] According to an embodiment of the present invention, the apparatus further comprises: a filling module configured to fill the initial data to be written from the front-end module to obtain data to be written when the amount of the initial data to be written from the front-end module is less than a second threshold.

[0154] According to an embodiment of the present invention, the processing module 720 includes: a third writing submodule and a data processing submodule. The third writing submodule is configured to write the stored data to the slave storage unit to obtain a first processing result when the status indicates that the stored data is stored in a first state in the temporary file; or the data processing submodule is configured to process the stored data based on the write status of the stored data to obtain a second processing result when the status indicates that the stored data is stored in a second state in the management file.

[0155] According to an embodiment of the present invention, a slave storage unit includes multiple logical storage sub-units, each of which includes multiple storage blocks. The third writing sub-module includes a first writing unit and a second writing unit. The first writing unit is configured to sequentially write stored data and a preset algorithm corresponding to the stored data into the multiple logical sub-units according to the numbering sequence of the multiple logical storage sub-units to obtain an intermediate storage result. The second writing unit is configured to sequentially write the stored data into multiple total blocks in a block array when the intermediate storage result indicates that the stored data in the sub-file has been written. The total block includes multiple storage blocks corresponding to the same location information in the multiple logical storage sub-units.

[0156] According to an embodiment of the present invention, the status information of the total block includes abnormal storage block information; the apparatus further comprises: a detection module and a replacement module. The detection module is configured to detect abnormal storage block information and obtain a detection result during the process of writing storage data and a preset algorithm into the logical subunit; and the replacement module is configured to, if the detection result indicates that an abnormal storage block exists in the total block, replace the abnormal storage block with a storage block in the main storage unit at the corresponding position information to obtain an updated total block.

[0157] According to an embodiment of the present invention, the data processing submodule includes: a third writing unit and a fourth writing unit. The third writing unit is configured to write the stored data into the slave storage unit when the write state is initial write and the amount of stored data is greater than or equal to a third threshold; or the fourth writing unit is configured to write the stored data into the master storage unit when the write state is secondary write.

[0158] According to an embodiment of the present invention, the apparatus further includes: a number acquisition module and a data determination module. The number acquisition module is configured to acquire the subsequent page number at the subsequent time in the initially written subfile and the previous page number at the previous time in the secondly written subfile; and the data determination module is configured to determine the data stored in the target subfile between the previous page number and the subsequent page number as invalid data, thereby clearing the invalid data and the location information of the invalid data.

[0159] According to an embodiment of the present invention, the result determination module 730 includes an information set update submodule and a power-off result determination submodule. The information set update submodule is configured to update the metadata information set upon determining that the stored data has been successfully written to the primary storage unit or the secondary storage unit; and the power-off result determination submodule is configured to obtain a power-off success result upon completion of the metadata information set update.

[0160] According to embodiments of the present invention, any multiple modules among the writing module 710, processing module 720, and result determination module 730 may be combined into a single module, or any one of these modules may be split into multiple modules. Alternatively, at least part of the functionality of one or more of these modules may be combined with at least part of the functionality of other modules and implemented in a single module. According to embodiments of the present invention, at least one of the writing module 710, processing module 720, and result determination module 730 may be at least partially implemented as a hardware circuit, such as a field programmable gate array (FPGA), a programmable logic array (PLA), a system on a chip, a system on a substrate, a system on a package, an application-specific integrated circuit (ASIC), or may be implemented in hardware or firmware through any other reasonable means of circuit integration or packaging, or may be implemented in any one of software, hardware, and firmware, or any suitable combination of these. Alternatively, at least one of the writing module 710, processing module 720, and result determination module 730 may be at least partially implemented as a computer program module that, when executed, performs the corresponding functionality.

[0161] Figure 8 A block diagram of a solid state drive according to an embodiment of the present invention is shown.

[0162] like Figure 8As shown, the solid state drive 800 includes a processor 101 and a memory 102; the processor 101 is configured to execute the above-mentioned abnormal power-off processing method of the solid state drive according to the instructions and data stored in the memory.

[0163] Figure 9 A block diagram of an electronic device suitable for implementing a method for processing abnormal power-off of a solid-state drive according to an embodiment of the present invention is shown.

[0164] like Figure 9 As shown, an electronic device 900 according to an embodiment of the present invention includes a first processor 901, which can perform various appropriate actions and processes based on a program stored in a read-only memory (ROM) 902 or a program loaded from a storage unit 908 into a random access memory (RAM) 903. The first processor 901 may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor, and / or a special-purpose microprocessor (e.g., an application-specific integrated circuit (ASIC)). The first processor 901 may also include onboard memory for caching purposes. The first processor 901 may include a single processing unit or multiple processing units for performing different actions of the method flow according to an embodiment of the present invention.

[0165] The RAM 903 stores various programs and data required for the operation of the electronic device 900. The first processor 901, the ROM 902, and the RAM 903 are connected to each other via a bus 904. The first processor 901 executes the programs in the ROM 902 and / or the RAM 903 to perform various operations according to the method flow of the embodiment of the present invention. It should be noted that the programs may also be stored in one or more memories other than the ROM 902 and the RAM 903. The first processor 901 may also execute the programs stored in the one or more memories to perform various operations according to the method flow of the embodiment of the present invention.

[0166] According to an embodiment of the present invention, electronic device 900 may further include an input / output (I / O) interface 905, which is also connected to bus 904. Electronic device 900 may also include one or more of the following components connected to I / O interface 905: an input section 906 including a keyboard, mouse, etc.; an output section 907 including devices such as a cathode ray tube (CRT), liquid crystal display (LCD), and speakers; a storage section 908 including a hard disk; and a communication section 909 including a network interface card such as a LAN card or modem. Communication section 909 performs communication processing via a network such as the Internet. A drive 910 is also connected to I / O interface 905 as needed. Removable media 911, such as a magnetic disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed in drive 910 as needed, so that computer programs read from the removable media can be installed into storage section 908 as needed.

[0167] The present invention also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments, or may exist independently and not incorporated into the device / apparatus / system. The computer-readable storage medium carries one or more programs, which, when executed, implement the method according to the embodiments of the present invention.

[0168] According to an embodiment of the present invention, a computer-readable storage medium may be a non-volatile computer-readable storage medium, and may include, for example, but not limited to: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In the present invention, a computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. For example, according to an embodiment of the present invention, a computer-readable storage medium may include the ROM 902 and / or RAM 903 described above, and / or one or more memories other than ROM 902 and RAM 903.

[0169] Embodiments of the present invention also include a computer program product comprising a computer program containing program code for executing the method shown in the flowchart. When the computer program product is executed in a computer system, the program code causes the computer system to implement the method for handling abnormal power-off of a solid-state drive provided in an embodiment of the present invention.

[0170] The computer program executes the above functions defined in the system / device of the embodiment of the present invention when the first processor 901 executes the computer program. According to the embodiment of the present invention, the system, device, module, unit, etc. described above can be implemented by a computer program module.

[0171] In one embodiment, the computer program may be stored on a tangible storage medium such as an optical storage device or a magnetic storage device. In another embodiment, the computer program may be transmitted and distributed in the form of a signal on a network medium, downloaded and installed via the communication portion 909, and / or installed from a removable medium 911. The program code contained in the computer program may be transmitted using any appropriate network medium, including but not limited to wireless, wired, or any suitable combination thereof.

[0172] In such an embodiment, the computer program can be downloaded and installed from a network via the communication section 909 and / or installed from the removable medium 911. When the computer program is executed by the first processor 901, the above-described functions defined in the system of the embodiment of the present invention are performed. According to the embodiment of the present invention, the systems, devices, means, modules, units, etc. described above can be implemented by computer program modules.

[0173] According to an embodiment of the present invention, the program code for executing the computer program provided by the embodiment of the present invention can be written in any combination of one or more programming languages. Specifically, these computer programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages include, but are not limited to, languages such as Java, C++, Python, "C" or similar programming languages. The program code can be executed entirely on the user computing device, partially on the user device, partially on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (for example, using an Internet service provider to connect via the Internet).

[0174] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present invention. In this regard, each box in the flowchart or block diagram can represent a module, program segment, or a part of code, and the above-mentioned module, program segment, or a part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of boxes in the block diagram or flowchart, can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0175] It will be understood by those skilled in the art that the features described in the various embodiments of the present invention may be combined and / or coupled in various ways, even if such combinations or couplings are not explicitly described in the present invention. In particular, the features described in the various embodiments of the present invention may be combined and / or coupled in various ways without departing from the spirit and teachings of the present invention. All such combinations and / or couplings fall within the scope of the present invention.

[0176] The above describes embodiments of the present invention. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present invention. Although each embodiment has been described separately above, this does not mean that the measures in each embodiment cannot be advantageously used in combination. Without departing from the scope of the present invention, those skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present invention.

Claims

1. A method for handling abnormal power-off of a solid-state drive, characterized in that: The method comprises: In response to receiving the abnormal power-off signal, writing the data to be written into a management file in the storage node as storage data based on address information of the data to be written and an allocation state corresponding to the address information; In response to receiving the power-off request, processing the stored data based on the status of the sub-file in the management file to obtain a processing result, wherein the status includes the file storage status and the write status of the primary storage unit and the secondary storage unit of the solid-state drive; Based on the processing result, the metadata information sets of each of the primary storage unit and the secondary storage unit are updated to obtain a power-off result, where the power-off result indicates the data storage results in the primary storage unit and the secondary storage unit in the event of an abnormal power-off.

2. The method according to claim 1, characterized in that Writing the data to be written into a management file in a storage node as storage data based on address information of the data to be written and an allocation state corresponding to the address information includes: When the allocation status indicates that the data to be written has target address information, the amount of the data to be written is greater than or equal to a first threshold, and no corresponding management file is allocated, writing the data to be written into a temporary file in the storage node; When it is detected that there is a target management file, the temporary data in the temporary file is written into the target management file to obtain the stored data, wherein the target management file represents a management file that is currently in an idle state.

3. The method according to claim 2, characterized in that The method further comprises: When the amount of the initial data to be written from the front-end module is less than a second threshold, padding processing is performed on the initial data to be written to obtain the data to be written.

4. The method according to claim 2, characterized in that Processing the stored data based on the status of the sub-file in the management file to obtain a processing result includes: When the state indicates that the stored data is stored in the first state in the temporary file, writing the stored data into the secondary storage unit to obtain a first processing result; or In a case where the state indicates a second state in which the storage data is stored in the management file, the storage data is processed based on the write state of the storage data to obtain a second processing result.

5. The method according to claim 4, characterized in that The slave storage unit includes a plurality of logical storage sub-units, and the logical storage sub-unit includes a plurality of storage blocks; Writing the stored data into the slave storage unit comprises: Writing the storage data and the preset algorithm corresponding to the storage data into the plurality of logical sub-units in sequence according to the numbering order of the plurality of logical storage sub-units to obtain an intermediate storage result; When the intermediate storage result indicates that the storage data in the sub-file has been written, the storage data is sequentially written into a plurality of total blocks in the block array, wherein the total block includes a plurality of storage blocks at the same location information in each of the plurality of logical storage sub-units.

6. The method according to claim 5, characterized in that The state information of the total block includes abnormal storage block information; The method further comprises: In the process of writing the stored data and the preset algorithm into the logic subunit, detecting the abnormal storage block information and obtaining a detection result; In a case where the detection result indicates that an abnormal storage block exists in the total block, the abnormal storage block is replaced with a storage block in the main storage unit at the corresponding position information to obtain an updated total block.

7. The method according to claim 4, characterized in that Processing the stored data based on a write status of the stored data includes: When the write state is initial write and the amount of the stored data is greater than or equal to a third threshold, writing the stored data into the slave storage unit; or When the write state is double write, the storage data is written into the main storage unit.

8. The method according to claim 7, characterized in that The method further comprises: Obtaining a subsequent page number at a subsequent time in the subfile whose write status is initially written and a previous page number at a previous time in the subfile whose write status is twice written; The stored data in the target sub-file between the preceding page number and the succeeding page number is determined as invalid data, so as to clear the invalid data and the position information of the invalid data.

9. The method according to any one of claims 1 to 8, characterized in that Updating metadata information sets in the primary storage unit and the secondary storage unit based on the processing result to obtain a power-off result includes: If it is determined that the stored data is successfully written into the primary storage unit or the secondary storage unit, updating the metadata information set; When the metadata information set is updated, a power-off success result is obtained.

10. A solid state hard disk, characterized in that: include: Memory; A processor configured to execute the method according to any one of claims 1 to 9 according to the instructions and data stored in the memory.

11. A computer-readable storage medium having a computer program or instruction stored thereon, characterized in that: When the computer program or instructions are executed by a processor, the steps of the method according to any one of claims 1 to 9 are implemented.

12. A computer program product comprising a computer program or instructions, characterized in that When the computer program or instructions are executed by a processor, the steps of the method according to any one of claims 1 to 9 are implemented.

Images