Method for improving adhesion of polymer to surface of gaN high voltage power die

Abstract

The application discloses a method for improving the adhesion of a polymer to a GaN high-voltage power chip surface, which comprises the following steps in sequence: S10, depositing a SiO2 film on a GaN surface, then performing photoresist coating in a yellow light environment, and performing photoetching on the SiO2 film to form a periodic micro groove pattern, then etching to form a SiO2 film groove, and removing the photoresist after the etching is completed; S20, forming a nanoscale pit on the groove bottom of the SiO2 film groove through surface selective wet etching; and S30, coating a polymer on the GaN surface and performing step curing in an N2 atmosphere. The method for improving the adhesion of a polymer to a GaN high-voltage power chip surface can effectively improve the adhesion of a GaN-polymer interface, reduce interface stress and electric leakage, and improve the yield of breakdown voltage.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device processing technology, and in particular to a method for improving the adhesion between polymers and the surface of GaN high-voltage power chips. Background Technology

[0002] Polymer materials, such as polyimide, epoxy resin, polyetheretherketone (PEEK), polyetherimide, and polyphenylene sulfide, generally have low surface energy (~40-50 mJ / m). 2 Problems such as poor chemical compatibility with GaN surfaces (polar surfaces) lead to insufficient interfacial adhesion.

[0003] In addition, the difference in coefficient of thermal expansion (CTE) (GaN: ~5.6ppm / ℃ vs. polymer: ~50ppm / ℃) can easily lead to interfacial delamination after thermal cycling. At the same time, traditional roughening treatments (such as plasma etching) may also damage the surface electrical properties of GaN, making it difficult for it to form stable chemical bonds.

[0004] The above reasons result in weak adhesion when directly coating polymers onto GaN surfaces, making them prone to peeling under long-term humid and hot conditions. Summary of the Invention

[0005] This application provides a method for improving the adhesion between polymers and the surface of GaN high-voltage power chips, which can effectively improve the adhesion of the GaN-polymer interface.

[0006] This application provides a method for improving the adhesion between polymers and the surface of GaN high-voltage power chips, comprising the following steps:

[0007] S10, deposit a SiO2 thin film on the GaN surface, then perform photoresist coating under yellow light, and photolithographically create a periodic micro-groove pattern at the SiO2 thin film position. Then, etch to create SiO2 thin film trenches, and remove the photoresist after etching is complete.

[0008] S20, nanoscale pits are formed at the bottom of the SiO2 thin film trench by selective wet etching.

[0009] S30 involves coating a polymer onto a GaN surface and then performing stepwise curing under a N2 atmosphere.

[0010] In one possible implementation, the SiO2 thin film trench has a width of 1-5 μm and a trench spacing of 2-10 μm.

[0011] In one possible implementation, the depth of the nanoscale pit is 10-20 nm.

[0012] In one possible implementation, in step S10, a SiO2 thin film is deposited on the GaN surface using a PECVD machine, wherein the thickness of the SiO2 thin film is 50-200 nm.

[0013] In one possible implementation, in step S10, before photoresist coating is performed under yellow light, hydrogen bonds in the SiO2 film are first eliminated by RTA high-temperature rapid annealing to reduce micropores.

[0014] In one possible implementation, the surface selective wet etching specifically involves short-time etching using a KOH / NaOH mixed solution for 1-5 minutes.

[0015] In one possible implementation, the concentration of the KOH / NaOH mixed solution is 0.1-1 mol / L, and the temperature is 40-60℃.

[0016] In one possible implementation, in step S30, the GaN surface is first subjected to O2 plasma treatment before the polymer is coated on the GaN surface.

[0017] In one possible implementation, in step S30, the thickness of the polymer is 8-12 μm.

[0018] In one possible implementation, in step S30, the stepped curing specifically involves: sequentially increasing the temperature in stages, wherein the temperature gradient is RT℃→150℃→250℃→350℃.

[0019] Beneficial effects: Compared with the prior art, the method provided in this application for improving the adhesion between polymer and GaN high-voltage power chip surface can effectively improve the adhesion of GaN-polymer interface. The scratch test shows that the critical load is increased from 8N ​​to a maximum of 22N. SEM observation shows that there are no cracks at the interface and the coupling agent is uniformly covered. The damp heat test shows that the peel strength retention rate is 95% after 1000 hours. In addition, electrical verification shows that the average leakage current is reduced from 4.44*10-5 to 3.9*10-5, a reduction of about 13%, and the average breakdown voltage is increased by 28V, with overall convergence.

[0020] These and other objects, features and advantages of the present invention will become fully apparent from the following detailed description. Attached Figure Description

[0021] Figure 1 A schematic flowchart of the method for improving the adhesion between polymers and the surface of GaN high-voltage power chips is shown.

[0022] Figure 2The figure shows the parameter index curves of the improved method of this application for improving the adhesion between polymer and GaN high-voltage power chip surface.

[0023] Figure 3 A schematic diagram showing the presence of gaps between the polymer and GaN in the prior art is shown.

[0024] Figure 4 A schematic diagram shows the improved bonding between the polymer and GaN using the method described in this application.

[0025] Figure 5 A schematic diagram of the leakage current improvement using the method of this application is shown, in which the average reverse leakage current at a voltage level of 1200V is reduced from 4.44*10-5 to 3.9*10-5, a reduction of approximately 13%.

[0026] Figure 6 A schematic diagram of the improved withstand voltage using the method of this application is shown, wherein the average withstand voltage is increased from 1057V to 1085V, an increase of 28V, and the overall withstand voltage level becomes convergent. Detailed Implementation

[0027] The following description is intended to disclose the present invention and enable those skilled in the art to implement it. The preferred embodiments described below are merely examples, and other obvious variations will occur to those skilled in the art. The basic principles of the invention defined in the following description can be applied to other embodiments, modifications, improvements, equivalents, and other technical solutions that do not depart from the spirit and scope of the invention.

[0028] Those skilled in the art should understand that, in the disclosure of this specification, the terms "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the above terms should not be construed as limiting the present invention.

[0029] It is understood that the term "a" should be understood as "at least one" or "one or more", that is, in one embodiment, the number of an element can be one, while in another embodiment, the number of the element can be multiple, and the term "a" should not be understood as a limitation on the number.

[0030] refer to Figures 1 to 6 This application provides a method for improving the adhesion between a polymer and the surface of a GaN high-voltage power chip, comprising the following steps:

[0031] S10. A SiO2 thin film with a thickness of 50-200 nm is deposited on the GaN surface using a PECVD machine or by means of a PECVD machine. The SiO2 thin film is then subjected to high-temperature rapid annealing (RTA) to eliminate hydrogen bonds in the SiO2 thin film, reduce micropores, and rearrange atoms, thereby improving density and pressure resistance. Photoresist is then applied under yellow light, and a stepper is used to photolithographically etch periodic micro-groove patterns on the SiO2 thin film. The SiO2 thin film trenches are then fabricated by Boe etching. After etching, the photoresist is removed, thus completing the fabrication of micro-nano trenches on the GaN surface. The trench width of the SiO2 thin film is 1-5 μm, and the trench spacing is 2-10 μm.

[0032] It is worth mentioning that, with different groove widths and groove spacings, the displayed indicators (mainly critical load and withstand pressure value) vary slightly, but all show significant improvements compared to existing technologies, as detailed in the table below:

[0033]

[0034] Furthermore, the table above lists some data rather than exhaustively listing them. Other pairing methods can also be selected for the groove width and groove spacing data. For example, when the groove width is 2um, the groove spacing can be 6um, 7um, 9um, etc., while when the groove spacing is 4um, the groove width can be 3um, 4um, 5um, etc., as long as it is within the range of 1-5um groove width and 2-10um groove spacing.

[0035] S20, nanoscale pits are formed at the bottom of the SiO2 thin film trench by surface selective wet etching to increase the mechanical anchoring effect. The depth of the nanoscale pits is 10-20 nm, that is, the nanoscale pits can be any value between 10 nm and 20 nm, including all natural numbers and decimals between the two. The surface selective wet etching is specifically performed by using a KOH / NaOH mixed solution for short-time etching, with an etching time of 1-5 minutes. The concentration of the KOH / NaOH mixed solution is 0.1-1 mol / L, and the temperature is 40-60℃.

[0036] S30 is first subjected to O2 plasma treatment to improve the surface energy of GaN. Then, a polymer is coated on the GaN surface with a thickness of 8-12 μm. Then, step curing is performed in an N2 atmosphere. The step curing is specifically performed by sequentially increasing the temperature in stages, with the temperature gradient being RT℃→150℃→250℃→350℃. This can reduce the stress increase caused by curing.

[0037] Therefore, the method provided in this application for improving the adhesion between polymers and GaN high-voltage power chip surfaces is simple to implement and easy to operate. It can effectively improve the adhesion of GaN-polymer interfaces. The polymers include polyimide, epoxy resin, polyether ether ketone (PEEK), polyetherimide, polyphenylene sulfide, etc. Unexpected results have been obtained through various verifications. After the improvement, the interface adhesion was tested. For example, in the standard scratch test, the critical load increased from a maximum of 8N to a maximum of 22N and a minimum of 16N, showing a multiple-level increase.

[0038] SEM observation showed no cracks at the interface and the coupling agent was evenly covered.

[0039] For example, in the damp heat test: after 1000 hours, the peel strength retention rate is still as high as 95%.

[0040] It is also worth noting that the above three indicators show that the adhesion of the GaN-polymer interface is significantly improved. In addition, standard electrical verification shows that the average leakage current decreased from 4.44*10-5 to 3.9*10-5, a reduction of about 13%, and the average breakdown voltage increased by 28V. The overall convergence indicates that while improving the interface adhesion, this method has also been found to significantly improve the electrical characteristics of gallium nitride chips.

[0041] Therefore, the method provided in this application for improving the adhesion between polymer and GaN high-voltage power chip surface can effectively improve the adhesion of GaN-polymer interface, reduce interface stress and leakage current, and improve breakdown voltage yield.

[0042] Those skilled in the art should understand that the embodiments of the present invention described above and shown in the accompanying drawings are merely examples and do not limit the invention. The advantages of the present invention have been fully and effectively realized. The functional and structural principles of the present invention have been demonstrated and explained in the embodiments; any variations or modifications can be made to the implementation of the present invention without departing from these principles.

Claims

1. A method for improving the adhesion between polymers and the surface of GaN high-voltage power chips, characterized in that, The steps are as follows: S10, deposit a SiO2 thin film on the GaN surface, then perform photoresist coating under yellow light, and photolithographically create a periodic micro-groove pattern on the SiO2 thin film. Then, etch to create SiO2 thin film trenches. After etching, remove the photoresist. Before photoresist coating under yellow light, hydrogen bonds in the SiO2 thin film are eliminated by RTA high-temperature rapid annealing to reduce micropores. S20, nanoscale pits are formed at the bottom of the SiO2 thin film trench by selective wet etching. The trench width of the SiO2 thin film trench is 1-5 μm, the trench spacing is 2-10 μm, and the depth of the nanoscale pit is 10-20 nm. S30 involves coating a polymer onto a GaN surface and then performing stepwise curing under a N2 atmosphere.

2. The method for improving the adhesion between polymers and GaN high-voltage power chip surfaces as described in claim 1, characterized in that, In step S10, a SiO2 thin film is deposited on the GaN surface using a PECVD machine, wherein the thickness of the SiO2 thin film is 50-200 nm.

3. The method for improving the adhesion between polymers and GaN high-voltage power chip surfaces as described in claim 1, characterized in that, The surface selective wet etching specifically involves using a KOH / NaOH mixed solution for short-time etching, with an etching time of 1-5 minutes.

4. The method for improving the adhesion between polymers and GaN high-voltage power chip surfaces as described in claim 3, characterized in that, The concentration of the KOH / NaOH mixed solution is 0.1-1 mol / L, and the temperature is 40-60℃.

5. The method for improving the adhesion between polymers and GaN high-voltage power chip surfaces as described in claim 1, characterized in that, In step S30, the GaN surface is first subjected to O2 plasma treatment before the polymer is coated on the GaN surface.

6. The method for improving the adhesion between polymers and GaN high-voltage power chip surfaces as described in claim 1, characterized in that, In step S30, the thickness of the polymer is 8-12 μm.

7. The method for improving the adhesion between polymers and GaN high-voltage power chip surfaces as described in claim 6, characterized in that, In step S30, the step curing is specifically performed by sequentially increasing the temperature in a gradient manner, wherein the temperature gradient is RT℃→150℃→250℃→350℃.

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