Semiconductor leadframe packages and related methods

Abstract

The invention relates to a semiconductor leadframe package and a related method. In an embodiment of a lead frame for a semiconductor package, the lead frame may include a die attach pad, the die attach pad including a swage region; and one or more leads. The swage region may include an alternating pattern therein that includes at least two raised features, where each of the at least two raised features may be configured to support a gripping finger during a wire bonding process.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This document claims the benefit of the filing date of U.S. Provisional Patent Application No. 63 / 552,611, filed on February 12, 2024, to Wang et al., entitled “Semiconductor Power Package,” the disclosure of which is hereby incorporated by reference in its entirety. Technical Field

[0003] Aspects of this document generally relate to semiconductor packages, such as for semiconductor dies. More specific embodiments relate to semiconductor packages having leadframes. Background Art

[0004] Various semiconductor packages have been designed to provide mechanical support or protection against shock and vibration. Other semiconductor packages are designed to provide protection against humidity and other environmental factors. Thermal management of the semiconductor die and components within the semiconductor package also governs various semiconductor package designs. Summary of the Invention

[0005] In an embodiment of a lead frame for a semiconductor package, the lead frame may include a die attach pad including a swaged region and one or more leads. The swaged region may include an alternating pattern therein, the alternating pattern including at least two raised features, wherein each of the at least two raised features may be configured to support a clamping finger during a wire bonding process.

[0006] Embodiments of a leadframe for a semiconductor package may include one, all, or any of the following:

[0007] The swage region extends along two opposing sides of the die attach pad.

[0008] The alternating pattern can be located in a first maximum planar surface of the swaged region and in a second maximum planar surface of the swaged region opposite the first maximum planar surface.

[0009] The alternating pattern may include at least two recessed features in combination with the at least two raised features.

[0010] The at least two depressed features may include a corner comprising an angle of substantially 90 degrees.

[0011] The at least two depressed features may include a corner, the corner including a rounded shape.

[0012] The at least two depressed features may include a corner including a beveled edge, an inner rounded edge, or a rounded edge.

[0013] The at least two depressed features may include a mold lock pattern formed therein.

[0014] The mold lock pattern may be a dimple pattern.

[0015] In an embodiment of a lead frame for a semiconductor package, the lead frame may include a die attach pad including a swaged region and one or more leads. The swaged region may include an alternating indentation pattern therein.

[0016] Embodiments of a leadframe for a semiconductor package may include one, all, or any of the following:

[0017] The two or more raised features of the alternating indentation pattern may be configured to engage with clamping fingers during a wire bonding process.

[0018] The swaged region may extend along two opposing sides of the die attach pad.The alternating indentation pattern may be located in a first maximum planar surface of the swaged region and in a second maximum planar surface of the swaged region opposite the first maximum planar surface.

[0019] The indentations of the alternating indentation pattern may include at least two depressed features.

[0020] The at least two depressed features may include a corner comprising an angle of substantially 90 degrees.

[0021] The at least two depressed features may include a corner, the corner including a rounded shape.

[0022] The at least two depressed features may include a corner including a beveled edge, an inner rounded edge, or a rounded edge.

[0023] The at least two depressed features may include a mold lock pattern formed therein.

[0024] An embodiment of a method for forming a lead frame for a semiconductor package may include providing a die attach pad; a process of stamping, grinding, or punching an alternating pattern into a first maximum flat surface of a swaging area of the die attach pad; and a process of stamping, grinding, or punching a corresponding alternating pattern into a second maximum flat surface of the swaging area of the die attach pad.

[0025] Embodiments of a method of forming a leadframe for a semiconductor package may include one, all, or any of the following:

[0026] The method may include a process of embossing, milling, or stamping a die-lock pattern into two or more of the depressed features of the alternating pattern.

[0027] The mold lock pattern may be a dimple pattern.

[0028] The foregoing and other aspects, features, and advantages will be apparent to those skilled in the art from the detailed description and accompanying drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Embodiments will be described below with reference to the accompanying drawings, in which like reference numerals represent like elements, and:

[0030] Figure 1 is a top view of an embodiment of a lead frame;

[0031] Figure 2 is a perspective view of an embodiment of a lead frame;

[0032] Figure 3 is a perspective view of an embodiment of a lead frame;

[0033] Figure 4 for Figure 3 A perspective view of an embodiment of a lead frame after die attach material is applied thereto;

[0034] Figure 5 for Figure 4 A perspective view of an embodiment of a lead frame after attaching a semiconductor die thereto;

[0035] Figure 6 is a diagram of an embodiment of a lead frame having a semiconductor die thereon during a clamping operation;

[0036] Figure 7 is a cross-sectional view of an embodiment of a lead frame after wire bonding, showing the positions of clamping fingers thereon;

[0037] Figure 8 is a top view of an embodiment of a lead frame with a semiconductor die attached;

[0038] Figure 9 is a top view of another embodiment of a lead frame with a semiconductor die attached;

[0039] Figure 10 is a top view of another embodiment of a lead frame with a semiconductor die attached;

[0040] Figure 11 is a perspective view of an embodiment of a lead frame showing a swaged area;

[0041] Figure 12 is a cross-sectional view of an embodiment of a lead frame after wire bonding, showing the positions of clamping fingers thereon;

[0042] Figure 13 is a diagram of an embodiment of a lead frame having a semiconductor die thereon during a clamping operation;

[0043] Figure 14 a perspective view of an embodiment of a lead frame having a semiconductor die thereon, showing the location of the clamping fingers in the swage area; and

[0044] Figure 15 is a photomicrograph of an embodiment of an alternating pattern of depressions in a swaged area showing an embodiment of a die lock pattern thereon. DETAILED DESCRIPTION

[0045] The present disclosure, its aspects, and embodiments are not limited to the specific components, assembly processes, or method elements disclosed herein. Many additional components, assembly processes, and / or method elements known in the art that are consistent with the intended semiconductor leadframe (leadframe) will readily be used with the specific embodiments of the present disclosure. Thus, for example, although specific embodiments are disclosed, such embodiments and implementation components may include any shape, size, style, type, model, version, measurement, concentration, material, quantity, method element, step, etc., known in the art for such leadframes and implementation components and methods that are consistent with the intended operation and method.

[0046] refer to Figure 1 , shows an embodiment of a lead frame 2 designed for a semiconductor package to house a semiconductor die. The lead frame 2 includes a die attach pad 4 and various leads 6, 8, 10 designed to allow electrical connection to the semiconductor die attached to the die attach pad 4 via wire bonds formed during packaging. The die attach pad 4 includes swaged areas 12, 14 on each side of the maximum flat area of the die attach pad. Figure 2 The swaged areas 12, 14 include recesses / grooves / ledges 16, 18 in the largest flat surface of the swaged areas. These recesses 16, 18 are designed to act as mold locks for the mold compound applied over the leadframe after the semiconductor die is attached to the die attach pads and wire bonds are formed between the leads 6, 8, 10 and the pads on the semiconductor die. The mold compound is used to prevent the ingress of contaminants and helps provide mechanical support for the wire bonds, semiconductor die, and leads during use of the semiconductor package.

[0047] refer to Figure 3 , shows an embodiment of the lead frame 20 in perspective view. Here, the swaged areas 22, 24 also include grooves 26, 28 along the shortest edges of the swaged areas 22, 24, which further aid in mold locking. The die attach pad 30 is located at Figure 3 The die attach process begins as shown in Figure 2. Figure 4, shows the lead frame 20 after application of a die attach material 32 , which in this case is a sintering material designed to form a bond between the die attach pad 30 and the semiconductor die during a subsequent sintering operation.

[0048] refer to Figure 5 , shows the lead frame 20 after a sintering operation has been performed to couple the semiconductor die 34 to the die attach material 32 and to form bonds between the semiconductor die 34 and the die attach pads 30. At this point, the lead frame 20 and semiconductor die 34 are now ready for a wire bonding process that involves forming wire bonds between the other leads / pads of the lead frame 20 and the pads / areas of the semiconductor die. Figures 3 to 5 Sintering is shown in FIG, but other die attach processes and materials may be used, including (by way of non-limiting example) soldering, die attach films, polyimide films, active metal brazing, or other systems and methods for forming a bond between the material of the die and the material of the lead frame.

[0049] refer to Figure 6 , shows a top view of a lead frame 36 having die attach pads 38 with a semiconductor die 40 attached thereto, ready to begin a wire bonding operation. As shown, the lead frame 36 is coupled over an anvil (not shown) and pressed against the anvil using clamping fingers 42 that are fixedly attached around an opening into which the wire bond head extends during wire bonding. The clamping fingers 42 are used to securely hold the lead frame 36 in place against the anvil to prevent the lead frame from moving during wire bonding, thereby ensuring that the bond is placed in the desired location.

[0050] The design rule for the maximum semiconductor die size that can be used for a given die attach pad size specifies a specific amount of tolerance from the edge of the semiconductor die to the edge of the die attach pad or to the edge of the swage area that is not included in the size of the die attach pad. The design rule tolerance is the sum of three tolerances. The first tolerance is from the edge of the clamping finger to the edge of the die attach pad. The second tolerance is the tolerance associated with the placement of the semiconductor die on the die attach pad. The third tolerance is the indexing tolerance between lead frames. Since the size of the swage area is not included in the size of the die attach pad, the swage area size sets the maximum semiconductor die size that can be placed on the die attach pad for a given lead frame size with the design rule tolerance. By way of non-limiting example, the design rule tolerance is 0.6 mm and is composed of 0.3 mm from the edge of the clamping finger to the edge of the die attach pad, 0.2 mm for the semiconductor die placement tolerance, and 0.1 mm for the indexing tolerance. Therefore, if the tolerance of the clamping finger edge to the die attach pad edge is eliminated by moving the clamping finger edge and the die attach pad edge into the swaged area, this will gain 0.3 mm on both sides of the die attach pad, and then a semiconductor die that is 0.6 mm larger in the X or Y dimension can be placed on a die attach pad of the same lead frame size. Note that Figure 6 The ends / tips of the clamping fingers 42 are shown not in the swage area 44, but rather on the surface of the die attach pad 38 itself. This is due in part to the fact that the grooves / ledges / recesses of the swage area 44 are not level with the die attach pad 38 itself, which makes attempts to clamp the lead frame on the swage area 44 difficult to perform within indexing tolerances and other process variations.

[0051] Furthermore, operating at a maximum die size within a given tolerance increases the likelihood that misalignment on the anvil prior to pressing down on the clamping fingers can cause the clamping fingers to contact the semiconductor die, leading to die cracking and efficiency losses. Therefore, using a swage area to eliminate or substantially eliminate the tolerance from the edge of the clamping finger to the edge of the die attach pad while still maintaining the ability to use the swage area as a mold lock would enable larger semiconductor die sizes and reduce efficiency losses. Furthermore, since the clamping fingers may be used in other semiconductor packaging process steps besides wire bonding (sintering, reflow, etc.), there is a need to help reduce efficiency losses due to die chipping and cracking caused by multiple clamping operations.

[0052] Figure 7FIG4 is a cross-sectional view of an embodiment of a lead frame after semiconductor die 46 has been bonded to lead frame 45 and wire bonds 48 have been formed on the lead frame between flip leads 50, 52, 54 and bond wires 56, 58. As shown, die attach pad 60 has a maximum flat surface extending below semiconductor die 46 on which the tips of clamping fingers 62 rest. A swaged area 64 extends from the tips of clamping fingers 62 on the other side, and a tolerance 66 is formed on either side of semiconductor die 46 by Figure 7 By inspection, the size of the swaged area 64 is such that the tips of the clamping fingers 62 are directed toward the semiconductor die 46 , thereby reducing the size of the semiconductor die that can be placed through the width of the two swaged areas 64 .

[0053] refer to Figure 8 , shows an embodiment of a lead frame 68 that includes swaged areas 70 on opposite sides of a die attach pad 72 that include an alternating pattern 74. As shown, the alternating pattern includes two depressed features 76, 78 that are below the surface of the die attach pad 72, while the remainder of the larger flat surface of the swaged area 70 is at the same level as the surface of the die attach pad 72. Figure 8 In the lead frame 68 embodiment of FIG. 1 , the recessed features 76, 78 have corners 80, 82 that form an acute angle that is substantially a 90-degree angle. By way of non-limiting example, the recessed features 76, 78 are formed using a stamping process, a punching process, a grinding process, or any other process that can remove / compress the material in the recessed features below the level of the die attach pad 72. Although in FIG. Figure 8 Two depressed features 76, 78 are shown in FIG, but in other embodiments of this lead frame design, as well as other embodiments shown in this document, more than two depressed features may be included.

[0054] refer to Figure 9 , shows another embodiment of a lead frame 84 that includes a swaged area 86 that includes an alternating pattern 88 that includes two depressed features 90, 92 that have rounded or rounded corners 94, 96. These corners 94, 96 can be formed using any of the methods of forming depressed features previously described in this document. The area between the depressed features 90, 92 is at the same level as the die attach area 96 of the lead frame 84, thereby allowing the tips of the gripping fingers to rest on this area between the depressed features 90, 92, as shown. Figure 8 In the embodiment shown in .

[0055] Figure 10The leadframe embodiment 98 of FIG. 1 shows how the alternating pattern 104 of recessed features 100, 102 in the swaged area 106 may not have corners but may be rounded, thereby forming a concave opening. These recessed features 100, 102 may also be formed using any of the forming processes disclosed herein. Because the swaged area 106 in this leadframe 98 is also at the same level as the die attach area 108 between the recessed features 100, 102, the tips of the leadframe fingers may rest in the swaged area 106.

[0056] Figure 11 A perspective view of a leadframe embodiment 110 is shown that includes a swaged region 112 having an alternating pattern 114 of depressed regions 116, 118, 120 in a first, maximum planar surface 122 of the swaged region 112. In this embodiment, the depressed regions 116, 118, 120 extend beyond an edge 124 of the maximum planar surface 122. This may occur due to the process used to form the depressed regions 116, 118, 120, particularly when stamping or punching is used, which causes the material of the leadframe to travel outward. Also in this embodiment, the depressed regions are found only in the first, maximum planar surface 122 of the swaged region 112, and not on the other side.

[0057] refer to Figure 12 , shows leadframe 126 after semiconductor die 127 has been bonded to die attach area 131 and wirebonded to leads 132, 134, and 136. As shown, leadframe 126 also includes swaged areas 128 on each side, and gripping finger tips 130 can be seen positioned in swaged areas 128. Although not visible in this cross-sectional view, gripping finger tips 130 are positioned in an alternating pattern in swaged area 128, between recessed areas / features in the swaged area. As indicated by the arrows, the maximum possible size of semiconductor die 127 is now increased because arrow 130 represents a possible distance that is greater than the minimum design rule tolerance. This is because the area between the recessed features in this swaged area 128 is now accessible to gripping finger tips 130, which serves as a reliable gripping location at the same level as die attach area 131.

[0058] Figure 13 FIG. 1 is a top view of the lead frame embodiment 138 after bonding a semiconductor die 140 thereto and placing clamping fingers 142 into the area between the depressed features 144, 145 of the swage area 148 on each side of the lead frame 138. Arrows 146 indicate how the clamping fingers 142 can be moved relative to the lead frame 138. Figure 6 The leadframe embodiment of FIG. 1 is moved outwardly away from the semiconductor die because the clamping fingers can be placed in the swaged area 148 .

[0059] refer to Figure 14 , shows a perspective view of a leadframe embodiment 150 with gripping fingers 152 coupled to the leadframe embodiment in a swaged region 154. Here, recessed features 156, 158 are located on both the first and second largest planar surfaces 160, 162 of the swaged region 154. This approach can help improve the mold lock capability of the swaged region 154 after overmolding is complete. The recessed features 156, 158 can be formed using any of the forming methods disclosed herein. In some embodiments of a method of forming a leadframe for a semiconductor package, material of the swaged region 154 adjacent to the die attach pad 163 may be processed on the first largest planar surface 160 of the swaged region 154, followed by processing on the second largest planar surface 162 of the swaged region 154 (or vice versa, sequentially). However, in other method embodiments, both the first and second largest planar surfaces 160, 162 may be processed simultaneously to form the recessed features 156, 158.

[0060] refer to Figure 15 , shows a micrograph in perspective view of a depressed feature 164 after it has been formed in a swaged area 166 to form a zigzag or alternating pattern 167. As can be seen in this micrograph, a dimple pattern 168 is present in the surface of the depressed feature 164, which includes angled edges 170 on each side. The dimple pattern 168 can be included to further aid in mold locking, as material from the mold compound can then fill the areas between the dimples and improve the mechanical bond between the swaged area 166 and the mold compound. A wide variety of mold lock patterns can be designed and formed using the various methods of forming depressed features disclosed herein, such as, by way of non-limiting example, a cubic pattern, a rectangular prism pattern, a triangular prism pattern, a pyramidal pattern, a cone pattern, a line pattern, a groove pattern, an elliptical pattern, or any other three-dimensional closed shape that can be formed into the leadframe material.

[0061] In various implementations of the recessed features, the corners of the recessed features can include beveled edges, inner rounded edges, or rounded edges. The principles disclosed herein can be used to form a wide variety of corner types, shapes, orientations, angles, and configurations. Furthermore, while leadframes are illustrated for use in the various implementations disclosed herein, recessed features can be formed on a wide variety of semiconductor substrate types, as other substrate types also include swaged regions during wire bonding and other processes using clamping fingers. By way of non-limiting example, examples of semiconductor substrate types that can be formed include ceramic substrates, inorganic substrates, direct bond copper (DBC) substrates, active metal brazing (AMB) substrates, laminate substrates, and any other substrate type in which the recessed regions can be formed using methods consistent with the substrate material. Furthermore, while the alternating patterns in the various leadframe embodiments disclosed herein are illustrated as being symmetrical or substantially symmetrical about a line of symmetry spanning the die attach region, in other embodiments, the alternating patterns may be asymmetrical about the line of symmetry. Furthermore, in various embodiments, a different number of recessed features may be present in each swaged region on either side of the die attach region.

[0062] While the above description relates to specific embodiments and implementing components, sub-components, methods and sub-methods of semiconductor leadframes, it will be apparent that numerous modifications may be made without departing from the spirit thereof, and that these embodiments, implementing components, sub-components, methods and sub-methods may be applied to other semiconductor leadframes.

Claims

1. A lead frame for semiconductor packaging, comprising: a die attach pad comprising a swaged area; and one or more leads; wherein the swaged region includes an alternating pattern therein, the alternating pattern including at least two raised features, each of the at least two raised features being configured to support a clamping finger during a wire bonding process. 2 . The lead frame of claim 1 , wherein the swage region extends along two opposing sides of the die attach pad. 3 . The lead frame of claim 1 , wherein the alternating pattern is located in a first maximum planar surface of the swaged region and in a second maximum planar surface of the swaged region opposite the first maximum planar surface. The lead frame of claim 1 , wherein the alternating pattern comprises at least two sunken features in combination with the at least two raised features. The lead frame of claim 4 , wherein the at least two depressed features comprise corners comprising an angle of substantially 90 degrees. The lead frame of claim 4 , wherein the at least two depressed features comprise corners, the corners comprising a rounded shape. 7 . The lead frame of claim 4 , wherein the at least two depressed features comprise corners, the corners comprising beveled edges, rounded edges, or rounded edges. The lead frame of claim 4 , wherein the at least two depressed features include a mold lock pattern formed therein. The lead frame according to claim 8 , wherein the mold lock pattern is a dimple pattern.

10. A lead frame for a semiconductor package, the lead frame comprising: a die attach pad comprising a swaged area; and one or more leads; wherein the swaged region includes an alternating pattern of indentations therein. 11 . The lead frame of claim 10 , wherein two or more raised features of the alternating indentation pattern are configured to engage with clamping fingers during a wire bonding process.

12. The lead frame of claim 10 , wherein the swaging region extends along two opposite sides of the die attach pad, and wherein the alternating indentation pattern is located in a first maximum flat surface of the swaging region and in a second maximum flat surface of the swaging region opposite the first maximum flat surface. 13 . The lead frame of claim 10 , wherein the indentations in the alternating indentation pattern include at least two depressed features.

14. The lead frame of claim 13, wherein the at least two depressed features comprise corners comprising an angle of substantially 90 degrees. 15 . The lead frame of claim 13 , wherein the at least two depressed features comprise corners, the corners comprising a rounded shape. 16 . The lead frame of claim 13 , wherein the at least two depressed features comprise corners, the corners comprising beveled edges, inner rounded edges, or rounded edges. 17 . The lead frame of claim 13 , wherein the at least two depressed features include a mold lock pattern formed therein.

18. A method of forming a lead frame for a semiconductor package, the method comprising: providing a die attach pad; a process of stamping, grinding, or punching an alternating pattern into a first largest flat surface of a swaged area of the die attach pad; as well as A process of stamping, grinding or punching a corresponding alternating pattern into the second largest planar surface of the swaged area of the die attach pad.

19. The method of claim 18, further comprising one of embossing, milling, or stamping a die-lock pattern into two or more of the depressed features of the alternating pattern.

20. The method of claim 19, wherein the mold-lock pattern is a dimple pattern.

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