Display device and manufacturing method thereof

Abstract

The present disclosure relates to a display device and a method of manufacturing the same. The display device includes: a substrate including a pixel therein, the pixel including a plurality of sub-pixels; a first planarization layer disposed on the substrate and configured to have an opening; the bonding layer is arranged on the first planarization layer; and a plurality of light emitting diodes disposed on the adhesive layer in each of the plurality of sub-pixels, the plurality of light emitting diodes being disposed on the adhesive layer in each of the plurality of sub-pixels. The adhesive layer includes a plurality of first regions configured to overlap the plurality of light emitting diodes, a plurality of non-attachment regions respectively disposed adjacent to the first regions, and a second region as a remainder except the plurality of first regions and the non-attachment regions.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of Korean Patent Application No. 10-2024-0017854 filed on February 6, 2024, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a display device and a method of manufacturing the same, and more particularly, to a display device using a light emitting diode (LED) and a method of manufacturing the same. Background Art

[0004] Display devices used for monitors of computers, televisions, mobile phones, and the like include organic light emitting displays (OLEDs) and the like that emit light by themselves, and liquid crystal displays (LCDs) and the like that require a separate light source.

[0005] Display devices have been applied to various fields such as personal mobile devices and monitors of computers, televisions, etc., and research has been conducted on display devices that ensure a reduced size and light weight while ensuring a wide active area.

[0006] Recently, display devices including light-emitting diodes (LEDs) have attracted attention as next-generation display devices. LEDs use inorganic materials rather than organic materials, and offer high reliability and a longer lifespan than liquid crystal displays (LCDs) or organic light-emitting diodes (OLEDs). Furthermore, LEDs exhibit excellent luminous efficiency, strong impact resistance, and high reliability, while ensuring fast lighting speeds and displaying high-brightness images. Summary of the Invention

[0007] An object of the present disclosure is to provide a display device and a method of manufacturing the same, which selectively transfer a portion of a plurality of light emitting diodes of a donor to an area corresponding to a sub-pixel.

[0008] Another object of the present disclosure is to provide a display device and a method for manufacturing the same, wherein a double step is formed in a region to which a light emitting diode is not transferred during a transfer process, and then the non-transferred region is exposed so that only the transferred region has adhesion.

[0009] Another object of the present disclosure is to provide a display device and a method of manufacturing the same, which ensure a simplified transfer process and a reduction in time spent on processing.

[0010] Still another object of the present disclosure is to provide a display device and a method of manufacturing the same, in which a plurality of transfer processes are continuously performed using one donor.

[0011] An object of the present disclosure is to provide a display device and a method of manufacturing the same, which selectively transfer a portion of a plurality of light emitting diodes of a donor to an area corresponding to a sub-pixel.

[0012] According to an exemplary embodiment of the present disclosure, a display device may include: a substrate including pixels, wherein the pixels include a plurality of sub-pixels; a first planarization layer, wherein the first planarization layer is arranged on the substrate, and the first planarization layer is configured to have an opening; an adhesive layer, wherein the adhesive layer is arranged on the first planarization layer; and a plurality of light-emitting diodes, wherein the plurality of light-emitting diodes are arranged on the adhesive layer in each of the plurality of sub-pixels, wherein the adhesive layer may include a plurality of first regions configured to overlap with the plurality of light-emitting diodes, a plurality of non-attachment areas respectively arranged to be adjacent to the first regions, and a second region as a remaining portion other than the plurality of first regions and the plurality of non-attachment regions.

[0013] According to another exemplary embodiment of the present disclosure, a method for manufacturing a display device may include: transferring a plurality of light-emitting diodes on a wafer to a donor; setting a first planarization layer on a substrate of a display panel; patterning the first planarization layer and forming an opening; setting an adhesive layer on the first planarization layer; setting a mask on the adhesive layer and irradiating light; and transferring the plurality of light-emitting diodes on the donor to a display panel, wherein the adhesive layer may include a plurality of first areas overlapping with the mask and non-attached areas exposed from the mask and irradiated with light, the opening may overlap with the plurality of first areas and the non-attached areas, and among the plurality of light-emitting diodes, only the light-emitting diodes contacting the plurality of first areas may be transferred to the display panel.

[0014] Additional details of exemplary embodiments are included in the detailed description and accompanying drawings.

[0015] According to the present disclosure, only the first region of the adhesive layer overlapping the light emitting diode may have adhesive force, so that only a portion of the plurality of light emitting diodes of the donor is selectively transferred.

[0016] According to the present disclosure, the adhesive force of the first region of the adhesive layer corresponding to the light emitting diode can be improved, so that transfer failure can be minimized.

[0017] According to the present disclosure, a plurality of transfer processes can be continuously performed with one donor, so that the number of processes for transferring light emitting diodes from a wafer to a donor and the time taken for processing are reduced.

[0018] Effects of the present disclosure are not limited to the above-mentioned effects, and other effects not mentioned above will be clearly understood by those having ordinary skill in the art from the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and other aspects, features and other advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0020] Figure 1 is a schematic diagram of a display device according to a first embodiment;

[0021] Figure 2 is a partial cross-sectional view of the display device according to the first embodiment;

[0022] Figure 3 is a perspective view of a tiling display device according to a first embodiment;

[0023] Figure 4 is an enlarged plan view of the display device of the first embodiment;

[0024] Figure 5 is a cross-sectional view of the display device according to the first embodiment;

[0025] Figures 6A to 6I is a flowchart for describing a method for manufacturing the display device according to the first embodiment;

[0026] Figures 7A to 7E is a flowchart for describing a method for manufacturing the display device according to the first embodiment;

[0027] Figure 8 is a cross-sectional view of a display device according to a second embodiment;

[0028] Figure 9A is a plan view of a display device according to a second embodiment and a third embodiment;

[0029] Figures 9B to 9E is used to describe Figure 9A A flow chart of a method for manufacturing the region AA';

[0030] Figure 10 is a cross-sectional view of a display device according to a third embodiment;

[0031] Figures 11A to 11C is used to describe Figure 9A A flowchart of a method for manufacturing the region AA'; and

[0032] Figure 12 is a plan view of a display device according to a fourth embodiment. DETAILED DESCRIPTION

[0033] The advantages and features of the present disclosure and the methods for achieving these advantages and features will be clear by reference to the exemplary embodiments described in detail below and the accompanying drawings. However, the present disclosure is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. The exemplary embodiments are provided only as examples so that those skilled in the art can fully understand the content disclosed by the present disclosure and the scope of the present disclosure.

[0034] The shapes, sizes, ratios, angles, quantities, etc. shown in the drawings for describing the exemplary embodiments of the present disclosure are merely examples, and the present disclosure is not limited thereto. In addition, in the following description of the present disclosure, detailed explanations of known related arts may be omitted to avoid unnecessarily obscuring the subject matter of the present disclosure. Terms such as "including," "having," and "consisting of" used herein are generally intended to allow the addition of other components unless these terms are used together with the term "only." Unless expressly stated otherwise, any reference to the singular may include the plural.

[0035] Even if not explicitly stated, the components are interpreted as including the ordinary error range.

[0036] When terms such as "on," "over," "below," and "next to" are used to describe the positional relationship between two parts, one or more parts may be located between the two parts unless these terms are used together with the terms "immediately next to" or "directly."

[0037] When an element or layer is referred to as being “on” another element or layer, it can be directly on the other element or layer, or intervening elements or layers may be present therebetween.

[0038] Although terms such as "first" and "second" are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from other components. Therefore, the first component mentioned below may be the second component in the technical concept of the present disclosure. Throughout the specification, the same reference numerals generally represent the same elements.

[0039] Like reference numerals generally refer to like elements throughout this disclosure.

[0040] The size and thickness of each component shown in the drawings are shown for convenience of explanation, and are not limited to the size and thickness of the components shown in the embodiments of the present disclosure.

[0041] The features of the various embodiments of the present disclosure may be partially or completely coupled or combined with each other, and may be interlocked and operated in various technical ways, and the various embodiments may be performed independently or in association with each other.

[0042] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0043] Figure 1 is a schematic diagram of a display device according to the first embodiment. Figure 1 , among various components of the display device 100, only the display panel PN, the gate driver GD, the data driver DD, and the timing controller TC are shown for convenience of description.

[0044] refer to Figure 1 The display device 100 includes a display panel PN (including a plurality of sub-pixels SP), a gate driver GD and a data driver DD that provide various signals to the display panel PN, and a timing controller TC that controls the gate driver GD and the data driver DD.

[0045] The gate driver GD provides a plurality of scan signals to the plurality of scan lines SL based on a plurality of gate control signals provided from the timing controller TC. Figure 1 In the embodiment, one gate driver GD is disposed at one side of the display panel PN in such a manner that the one gate driver GD is spaced apart from the display panel PN, but the number of the gate drivers GD and the positions of the gate drivers GD are not limited thereto.

[0046] The data driver DD converts image data input from the timing controller TC into data voltages by using reference gamma voltages based on a plurality of data control signals supplied from the timing controller TC. The data driver DD may supply the converted data voltages to a plurality of data lines DL.

[0047] The timing controller TC arranges image data input from the outside and provides the arranged image data to the data driver DD. The timing controller TC can generate gate control signals and data control signals by using synchronization signals (e.g., dot clock signals, data enable signals, and horizontal / vertical synchronization signals) input from the outside. In addition, the timing controller TC can provide the generated gate control signals and generated data control signals to the gate driver GD and the data driver DD, respectively, to control the gate driver GD and the data driver DD.

[0048] The display panel PN, which is a component for displaying images to a user, includes a plurality of sub-pixels SP. In the display panel PN, a plurality of scan lines SL and a plurality of data lines DL intersect each other, and each of the plurality of sub-pixels SP is connected to the scan lines SL and the data lines DL. In addition, although not shown in the figure, each of the plurality of sub-pixels SP can be connected to a high-potential power line, a low-potential power line, a reference line, etc.

[0049] In the display panel PN, an active area AA and a non-active area NA surrounding the active area AA may be defined.

[0050] The active area AA represents the area in the display device 100 where an image is displayed. In the active area AA, a plurality of sub-pixels SP constituting a plurality of pixels PX and a circuit for driving the plurality of sub-pixels SP may be provided. The sub-pixel SP is the smallest unit constituting the active area AA, and n sub-pixels SP (the number is n) may constitute one pixel PX. In each of the plurality of sub-pixels SP, a light-emitting diode, a thin film transistor for driving the light-emitting diode, etc. may be provided. Depending on the type of the display panel PN, the plurality of light-emitting diodes may be defined in different ways. For example, in the case where the display panel PN is an inorganic light-emitting display panel, the light-emitting diode 120 may be a light-emitting diode (LED) or a micro light-emitting diode (LED).

[0051] In the active area AA, a plurality of signal lines may be provided to transmit various signals to the plurality of sub-pixels SP. For example, the plurality of signal lines may include a plurality of data lines DL that provide a data voltage to each of the plurality of sub-pixels SP, a plurality of scan lines SL that provide a gate voltage to each of the plurality of sub-pixels SP, and the like. The plurality of scan lines SL may extend in one direction and connect to the plurality of sub-pixels SP in the active area AA, and the plurality of data lines DL may extend in a direction different from the one direction and connect to the plurality of sub-pixels SP in the active area AA. Furthermore, low-potential power lines and high-potential power lines may be provided in the active area AA, but are not limited thereto.

[0052] The non-active area NA is an area where no image is displayed and may be defined as an area extending from the active area AA. In the non-active area NA, link lines and pad electrodes for transmitting signals to the sub-pixels SP of the active area AA or a driver IC such as a gate driver IC or a data driver IC may be disposed.

[0053] In addition, the non-active area NA may be disposed on the rear surface of the display panel PN (ie, a surface where the sub-pixels SP may not be disposed or may be omitted, and may not be limited to the surface shown in the drawings).

[0054] In addition, drivers such as the gate driver GD, the data driver DD, and the timing controller TC can be connected to the display panel PN in various ways. For example, the gate driver GD can be installed in the non-active area NA based on the gate-in-panel (GIP) method, or can be installed between the multiple sub-pixels SP in the active area AA based on the gate-in-active-area (GIA) method. For example, the data driver DD and the timing controller TC can be formed on a separate flexible film and a separate printed circuit board, and electrically connected to the display panel PN in a manner that the flexible film and the printed circuit board are bonded to the pad electrodes formed in the non-active area NA of the display panel PN. In the case of installing the gate driver GD based on the GIP method, when the data driver DD and the timing controller TC transmit signals to the display panel PN through the pad electrodes of the non-active area NA, it is necessary to ensure a surface area of the non-active area NA that is large enough to set the gate driver GD and the pad electrodes so that the frame can be increased.

[0055] On the contrary, when the gate driver GD is installed in the active area AA based on the GIA method, although the side lines SRL connecting the signal lines on the front surface of the display panel PN and the pad electrodes on the rear surface of the display panel PN are formed to bond the flexible film and the printed circuit board to the rear surface of the display panel PN, the non-active area NA on the front surface of the display panel PN can be minimized. That is, when the gate driver GD, the data driver DD, and the timing controller TC are connected to the display panel PN as described above, a zero bezel can be implemented so that there is substantially no bezel. Figure 2 and Figure 3 A detailed description related to this is provided.

[0056] Figure 2 is a partial cross-sectional view of the display device of the first embodiment. Figure 3 1 is a perspective view of the spliced display device according to the first embodiment.

[0057] In the non-active area NA of the display panel PN, a plurality of pad electrodes for transmitting various signals to the plurality of sub-pixels SP are provided. For example, first pads PAD1 for transmitting signals to the plurality of sub-pixels SP are provided in the non-active area NA on the front surface of the display panel PN, and second pads PAD2 electrically connected to driving components such as a flexible film and a printed circuit board are provided in the non-active area NA on the rear surface of the display panel PN.

[0058] At this time, various signal lines (eg, scan lines SL or data lines DL, etc.) connected to the plurality of sub-pixels SP may extend from the active area AA to the non-active area NA and be electrically connected to the first pad electrode PAD1, although not shown in the drawings.

[0059] Furthermore, side lines SRL are provided along the side surfaces of the display panel PN. The side lines SRL can electrically connect the first pad electrode PAD1 on the front surface of the display panel PN with the second pad electrode PAD2 on the rear surface of the display panel PN. Therefore, signals from the driving components on the rear surface of the display panel PN can be transmitted to the plurality of sub-pixels SP via the second pad electrode PAD2, the side lines SRL, and the first pad electrode PAD1. Consequently, a signal transmission path can be formed from the front surface of the display panel PN to the side and rear surfaces of the display panel PN, minimizing the surface area of the non-active area NA of the display panel PN.

[0060] refer to Figure 3 , a spliced display device TD with a large screen can be implemented by connecting multiple display devices 100. Figure 2 When the spliced display device TD is implemented using the display device 100 with the minimized frame shown, the seam area between the display devices 100 where no image is displayed is minimized, thereby ensuring improved display quality.

[0061] For example, a plurality of sub-pixels SP may constitute one pixel PX, and the distance D1 between the outermost pixels PX of one display device 100 may be the same as the distance D1 between the pixels PX in one display device 100. Therefore, the distance between the pixels PX between the display devices 100 and the display devices 100 may be constant, minimizing the seam area.

[0062] However, providing Figure 2 and Figure 3 The embodiment is taken as an example, and the display device 100 according to the embodiment may be a general display device having a bezel, and is not limited thereto.

[0063] Figure 4 It is an enlarged plan view of the display device of the first embodiment. Figure 5 is a cross-sectional view of the display device of the first embodiment.

[0064] refer to Figure 4 Each display panel PN includes a plurality of pixels PX composed of a plurality of sub-pixels SP. Each of the plurality of sub-pixels SP may include a light-emitting diode and a pixel circuit and independently emits light. For example, the first sub-pixel SP1 may be a red sub-pixel, the second sub-pixel SP2 may be a green sub-pixel, and the third sub-pixel SP3 may be a blue sub-pixel, but is not limited thereto.

[0065] One pixel PX may include one or more first subpixels SP1, one or more second subpixels SP2, and one or more third subpixels SP3. For example, one pixel PX may include two first subpixels SP1, two second subpixels SP2, and two third subpixels SP3.

[0066] Hereinafter, it is assumed that one pixel PX includes a pair of first sub-pixels SP1, a pair of second sub-pixels SP2, and a pair of third sub-pixels SP3. However, the configuration of the pixel is not limited to the above configuration.

[0067] The plurality of sub-pixels SP included in one pixel PX may be arranged to form a pair of rows. For example, one first sub-pixel SP1, one second sub-pixel SP2, and one third sub-pixel SP3 may be continuously arranged in a first row, and the remaining first sub-pixels SP1, the remaining second sub-pixels SP2, and the remaining third sub-pixels SP3 may be continuously arranged in a second row.

[0068] Only one type of subpixel SP may be provided in a column. For example, in a pixel PX, the first subpixel SP1 may be provided only in the first column, the second subpixel SP2 may be provided only in the second column, and the third subpixel SP3 may be provided only in the third column. Furthermore, the area corresponding to the column in which the first subpixel SP1 is provided may be defined as a first area A1, the area corresponding to the column in which the second subpixel SP2 is provided may be defined as a second area A2, and the area corresponding to the column in which the third subpixel SP3 is provided may be defined as a third area A3.

[0069] The plurality of pixels PX may be arranged at regular intervals in the row direction. For example, the plurality of pixels PX may be arranged at intervals of a first length D1 in the row direction. That is, the spacing between the pixels PX may be the first length D1. Furthermore, although not shown in the figure, the plurality of pixels PX may also be arranged at regular intervals in the column direction.

[0070] In a pixel PX, subpixels SP arranged in the same row may be arranged at regular intervals. For example, in a pixel PX, subpixels SP arranged in the same row may be arranged at intervals of the second length D2. That is, the width of each of the plurality of first areas A1, each of the plurality of second areas A2, and each of the plurality of third areas A3 may correspond to the second length D2. Furthermore, in a pixel PX, subpixels SP arranged in the same column may be arranged at intervals of the third length D3.

[0071] In the following, reference Figure 5, a substrate 110, a buffer layer 111, a gate insulating layer 112, a first interlayer insulating layer 113a, a second interlayer insulating layer 113b, a first passivation layer 114a, a first planarizing layer 115a, a second passivation layer 114b, an adhesive layer AD, a second planarizing layer 115b, a third planarizing layer 115c, a protective layer 116, a barrier dam BB, a driving transistor DT, a light emitting diode 120, a reflective layer RF, a first connection electrode CE1, a second connection electrode CE2, a light shielding layer LS and an auxiliary electrode LE are set in each of the multiple sub-pixels SP of the display panel PN of the display device 100 according to the first embodiment.

[0072] The substrate 110 may be made of an insulating material as a member supporting various members included in the display device 100. For example, the substrate 110 may be made of glass or resin, etc. Alternatively, the substrate 110 may be made of a polymer or plastic, or a flexible material.

[0073] On the substrate 110, a light shielding layer LS is provided in each of the plurality of sub-pixels SP. The light shielding layer LS blocks light from being input to the semiconductor layer ACT of the drive transistor DT described below from below the substrate 110. The light shielding layer LS blocks light from being input to the semiconductor layer ACT of the drive transistor DT, thereby minimizing leakage current.

[0074] The buffer layer 111 is provided on the substrate 110 and the light shielding layer LS. The buffer layer 111 can reduce moisture or impurities that penetrate through the substrate 110. The buffer layer 111 may include, for example, a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto. However, the buffer layer 111 may be omitted depending on the type of substrate 110 or the type of transistor, and is not limited thereto.

[0075] The driving transistor DT is disposed on the buffer layer 111. The driving transistor DT includes a semiconductor layer ACT, a gate electrode GE, a source electrode SE, and a drain electrode DE.

[0076] The semiconductor layer ACT is disposed on the buffer layer 111. The semiconductor layer ACT may be made of a semiconductor material such as an oxide semiconductor, amorphous silicon, or polysilicon, but is not limited thereto.

[0077] The gate insulating layer 112 is disposed on the semiconductor layer ACT. The gate insulating layer 112, which is an insulating layer for insulating the semiconductor layer ACT from the gate electrode GE, may include a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

[0078] The gate electrode GE is disposed on the gate insulating layer 112. The gate electrode GE may include a conductive material such as copper Cu, aluminum Al, molybdenum Mo, nickel Ni, titanium Ti, chromium Cr, or an alloy thereof, but is not limited thereto.

[0079] The first interlayer insulating layer 113a and the second interlayer insulating layer 113b are provided on the gate electrode GE. The first interlayer insulating layer 113a and the second interlayer insulating layer 113b have contact holes for allowing each of the source electrode SE and the drain electrode DE to contact the semiconductor layer ACT. The first interlayer insulating layer 113a and the second interlayer insulating layer 113b, which are insulating layers for protecting the configuration thereunder, may include a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but are not limited thereto.

[0080] A source electrode SE and a drain electrode DE electrically connected to the semiconductor layer ACT are disposed on the second interlayer insulating layer 113b. The source electrode SE and the drain electrode DE may include a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof, but are not limited thereto.

[0081] In addition, according to the present disclosure, although the first interlayer insulating layer 113a and the second interlayer insulating layer 113b (i.e., multiple insulating layers) are arranged between the gate electrode GE, the source electrode SE and the drain electrode DE, only one insulating layer can be arranged between the gate electrode GE, the source electrode SE and the drain electrode DE, and is not limited to this.

[0082] In addition, as shown in the figure, in the case where multiple insulating layers such as the first interlayer insulating layer 113a and the second interlayer insulating layer 113b are provided between the gate electrode GE, the source electrode SE and the drain electrode DE, an electrode can be further formed between the first interlayer insulating layer 113a and the second interlayer insulating layer 113b, and the further formed electrode can form a capacitor together with another component provided below the first interlayer insulating layer 113a or on the second interlayer insulating layer 113b.

[0083] An auxiliary electrode LE is provided on the gate insulating layer 112. The auxiliary electrode LE electrically connects the light shielding layer LS below the buffer layer 111 to either the source electrode SE or the drain electrode DE on the second interlayer insulating layer 113 b. For example, since the light shielding layer LS is electrically connected to either the source electrode SE or the drain electrode DE via the auxiliary electrode LE and does not operate as a floating gate, variations in the threshold voltage of the drive transistor DT caused by the floating light shielding layer LS can be minimized. In the drawings, the light shielding layer LS is connected to the drain electrode DE, but the light shielding layer LS may be connected to the source electrode SE and is not limited thereto.

[0084] The first passivation layer 114a is disposed on the driving transistor DT. The first passivation layer 114a, which is an insulating layer for protecting a configuration thereunder, may include a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

[0085] A first planarization layer 115a is disposed on the first passivation layer 114a. The first planarization layer 115a may planarize an upper portion of the substrate 110 on which the drive transistor DT is disposed. The first planarization layer 115a may include a single layer or multiple layers and, for example, may be made of a photoresist or an acryl-based organic material, but is not limited thereto.

[0086] The reflective layer RF is provided on the first planarization layer 115a. While electrically connecting the light emitting diode 120 to the driving transistor DT, the reflective layer RF can reflect light emitted from the light emitting diode 120 toward the upper portion of the light emitting diode 120. The reflective layer RF is made of a conductive material having excellent reflective properties to reflect the light emitted from the light emitting diode 120 toward the upper portion of the light emitting diode 120.

[0087] The second passivation layer 114b is disposed on the reflective layer RF. The second passivation layer 114b, which is an insulating layer for protecting a configuration thereunder, may include a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

[0088] The adhesive layer AD is provided on the second passivation layer 114b. The adhesive layer AD may be coated on the front surface of the substrate 110 and fix the light emitting diode 120 provided on the adhesive layer AD. The adhesive layer AD may be made of a light-curing adhesive material that is cured by light. For example, the adhesive layer AD may be made of an acrylic material including a photosensitizer, but is not limited thereto. The adhesive layer AD may be formed on the front surface of the display panel PN except for the region where the pad electrode is provided. For example, as Figure 2 As shown, in the case where a plurality of first pad electrodes PAD1 are formed on the front surface of the display panel PN, the adhesive layer AD may be formed in the remaining region of the front surface of the display panel PN except for the region where the first pad electrodes PAD1 are formed.

[0089] The adhesive layer AD may include a plurality of first regions AD1 overlapping with the plurality of light emitting diodes 120 and a second region AD2 as a remaining region other than the plurality of first regions AD1. The second regions AD2 of the adhesive layer AD may be cured before the light emitting diodes 120 are transferred to the display panel PN, and the plurality of first regions AD1 of the adhesive layer AD may be cured after the light emitting diodes 120 are transferred to the display panel PN. The plurality of first regions AD1 and the second region AD2 of the adhesive layer AD are cured at different times, so that among the plurality of light emitting diodes 120 provided on the donor, only the light emitting diodes 120 overlapping with the plurality of sub-pixels SP are selectively transferred to the display panel PN. In the following, reference is made to Figures 6A to 6I Provide a detailed description related to this.

[0090] A plurality of light-emitting diodes 120 are provided in each of the plurality of sub-pixels SP on the adhesive layer AD. The plurality of light-emitting diodes 120 may include light-emitting diodes 120 that emit red light, green light, blue light, etc., as elements that emit light by using current, and the plurality of light-emitting diodes 120 may emit light of various colors including white based on the combination of light. For example, the plurality of light-emitting diodes 120 may be light-emitting diodes (LEDs) or micro-LEDs, but are not limited thereto.

[0091] The light emitting diode 120 includes a first semiconductor layer 121 , a light emitting layer 122 , a second semiconductor layer 123 , a first electrode 124 , a second electrode 125 , and an encapsulation film 126 .

[0092] The first semiconductor layer 121 is provided on the adhesive layer AD, and the second semiconductor layer 123 is provided on the first semiconductor layer 121. The first semiconductor layer 121 and the second semiconductor layer 123 may be layers formed in such a manner that a specific material is doped with n-type impurities and p-type impurities. For example, each of the first semiconductor layer 121 and the second semiconductor layer 123 may be a layer in which a material such as gallium nitride (GaN), indium aluminum phosphide (InAlP), gallium arsenide (GaAs), etc. is doped with n-type impurities and p-type impurities. In addition, the p-type impurity may be magnesium, zinc Zn, beryllium Be, etc., and the n-type impurity may be silicon Si, germanium, tin Sn, etc., but is not limited thereto.

[0093] The light emitting layer 122 is provided between the first semiconductor layer 121 and the second semiconductor layer 122. The light emitting layer 122 can receive holes and electrons from the first semiconductor layer 121 and the second semiconductor layer 123 to emit light. The light emitting layer 122 can have a single layer structure or a multiple quantum well (MQW) structure and can be made of, for example, indium gallium nitride (InGaN) or gallium nitride (GaN), etc., but is not limited thereto.

[0094] The first electrode 124 is provided on the first semiconductor layer 121. The first electrode 124 is an electrode for electrically connecting the driving transistor DT and the first semiconductor layer 121. The first electrode 124 may be provided on the upper surface of the first semiconductor layer 121 exposed from the light emitting layer 122 and the second semiconductor layer 123. The first electrode 124 may include a conductive material, for example, a transparent conductive material (such as indium tin oxide (ITO) or indium zinc oxide (IZO)) or an opaque conductive material (such as titanium Ti, gold Au, silver Ag, copper Cu or alloys thereof), but is not limited thereto.

[0095] The second electrode 125 is provided on the second semiconductor layer 123. The second electrode 125 may be provided on the upper surface of the second semiconductor layer 123. The second electrode 125 is an electrode for electrically connecting a power line and the second semiconductor layer 123. The second electrode 125 may include a conductive material, for example, a transparent conductive material (such as indium tin oxide (ITO) or indium zinc oxide (IZO)) or an opaque conductive material (such as titanium Ti, gold Au, silver Ag, copper Cu or an alloy thereof), but is not limited thereto.

[0096] Then, an encapsulation film 126 is provided around the first semiconductor layer 121, the light emitting layer 122, the second semiconductor layer 123, the first electrode 124, and the second electrode 125. The encapsulation film 126 may include an insulating material and protect the first semiconductor layer 121, the light emitting layer 122, and the second semiconductor layer 123. In addition, the encapsulation film 126 may have contact holes exposing the first and second electrodes 124 and 125, so that the first and second connection electrodes CE1 and CE2 and the first and second electrodes 124 and 125 are electrically connected.

[0097] In addition, a portion of the side surface of the first semiconductor layer 121 may be exposed from the packaging film 126. The light-emitting diode 120 manufactured on the wafer may be separated from the wafer and transferred to the display panel PN. However, during the process of separating the light-emitting diode 120 from the wafer, a portion of the packaging film 126 may be torn off. For example, a portion of the packaging film 126 adjacent to the lower edge of the first semiconductor layer 121 may be torn off during the process of separating the light-emitting diode 120 from the wafer, and therefore, a portion of the side surface of the lower side of the first semiconductor layer 121 may be exposed to the outside. However, even if a portion of the lower side of the light-emitting diode 120 is exposed from the packaging film 126, short-circuit failures can be reduced because the first connection electrode CE1 and the second connection electrode CE2 are formed after forming the second planarization layer 115b and the third planarization layer 115c covering the side surface of the first semiconductor layer 121.

[0098] Next, a second planarization layer 115b and a third planarization layer 115c are disposed on the adhesive layer AD and the light-emitting diodes 120. The second planarization layer 115b may overlap a portion of the side surfaces of the plurality of light-emitting diodes 120 to secure and protect the plurality of light-emitting diodes 120. When the third planarization layer 115c is formed to cover the second planarization layer 115b and a portion of the upper side of the light-emitting diodes 120, the third planarization layer 115c may have a contact hole through which the first and second electrodes 124 and 125 of the light-emitting diodes 120 are exposed. The first and second electrodes 124 and 125 of the light-emitting diodes 120 are exposed from the third planarization layer 115c, and the third planarization layer 115c is partially disposed in the region between the first and second electrodes 124 and 125, thereby reducing short circuit failures. The second planarization layer 115b and the third planarization layer 115c may comprise a single layer or multiple layers, and may include, for example, a photoresist or an acrylic organic material, but is not limited thereto. In addition, according to the present disclosure, although the second planarization layer 115 b and the third planarization layer 115 c are provided, the planarization layer may include a single layer and is not limited thereto.

[0099] Furthermore, the third planarization layer 115c may only cover the light-emitting diode 120 and the area adjacent to the light-emitting diode 120. The third planarization layer 115c may be formed only in areas where the bank BB is not formed. The third planarization layer 115c may be provided in the area of the sub-pixel SP surrounded by the bank BB and may be provided in the form of an island. Therefore, the bank BB may be provided on a portion of the upper surface of the second planarization layer 115b, and the third planarization layer 115c may be provided on another portion of the upper surface of the second planarization layer 115b.

[0100] The first connection electrode CE1 and the second connection electrode CE2 are disposed on the third planarization layer 115c. The first connection electrode CE1 is an electrode that electrically connects the second electrode 125 of the light emitting diode 120 and the power line. The first connection electrode CE1 can be electrically connected to the second electrode 125 of the light emitting diode 120 through a contact hole formed in the third planarization layer 115c.

[0101] The second connection electrode CE2 is an electrode that electrically connects the first electrode 124 of the light-emitting diode 120 and the driving transistor DT. The second connection electrode CE2 can be connected to the reflective layer RF of each of the plurality of sub-pixels SP through contact holes formed in the third planarization layer 115c, the second planarization layer 115b, the adhesive layer AD, and the second passivation layer 114b. At this time, the reflective layer RF is also connected to the source electrode SE of the driving transistor DT, so that the source electrode SE of the driving transistor DT and the first electrode 124 of the light-emitting diode 120 are electrically connected via the reflective layer RF and the second connection electrode CE2.

[0102] In the drawing, the first electrode 124 , the second connection electrode CE2 and the reflective layer RF are electrically connected to the source electrode SE of the driving transistor DT, but the first electrode 124 , the second connection electrode CE2 and the reflective layer RF may also be connected to the drain electrode DE of the driving transistor DT and are not limited thereto.

[0103] The bank BB is disposed on the first and second connection electrodes CE1 and CE2, and on the second planarization layer 115b exposed from the third planarization layer 115c. The bank BB may be spaced a predetermined distance from the light-emitting diode 120. For example, the bank BB may be disposed on the second planarization layer 115b such that the bank BB is spaced a predetermined distance from the light-emitting diode 120, or may cover the portion of the second connection electrode CE2 formed in the contact hole of the third and second planarization layers 115c and 115b. The bank BB may include an opaque material to reduce color mixing between the plurality of sub-pixels SP, and may include, for example, black resin, but is not limited thereto.

[0104] The protective layer 116 is disposed on the first and second connection electrodes CE1 and CE2 and the bank BB. The protective layer 116 may include a single or multiple layers of light-transmitting epoxy resin, silicon oxide (SiOx), or silicon nitride (SiNx), but is not limited thereto.

[0105] In the case of the display device 100 of the first embodiment, the adhesive force of the adhesive layer AD can be partially controlled to easily transfer the light emitting diode 120 from the donor when manufacturing the display device 100. Figures 6A to 6I A method of manufacturing the display device 100 of the first embodiment is described.

[0106] Figures 6A to 6I 1 is a flowchart for describing a method for manufacturing a display device according to the first embodiment. Figures 6A to 6I For the sake of convenience, only the light emitting diode 120 is transferred to the Figure 4 Although not shown in the drawings, the process of transferring the light emitting diode 120 to the first sub-pixel SP1 is substantially the same as the process of transferring the light emitting diode 120 to the second sub-pixel SP2 and the third sub-pixel SP3.

[0107] refer to Figure 6A , a wafer WF on which a plurality of light emitting diodes 120 are formed is disposed on the donor DN.

[0108] The wafer WF is a substrate on which multiple light-emitting diodes 120 are formed. To form the multiple light-emitting diodes 120, a material constituting the multiple light-emitting diodes 120, such as gallium nitride (GaN) or indium gallium nitride (InGaN), is formed on the wafer WF to grow a crystalline layer. The crystalline layer is then cut into individual chips, and electrodes are formed. The wafer WF may include, but is not limited to, sapphire, silicon carbide (SiC), gallium nitride (GaN), zinc oxide (ZnO), and the like.

[0109] The donor DN is a transfer member that transfers the plurality of LEDs 120 on the wafer WF to the display panel PN. The plurality of LEDs 120 are transferred to the donor DN with a constant gap, allowing the plurality of LEDs 120 to be transferred to the display panel PN at once. The donor DN may include a polymer resin having viscoelasticity, allowing the plurality of LEDs 120 to adhere to the donor DN.

[0110] After the wafer WF and the donor DN are arranged to face each other, a portion of the plurality of light emitting diodes 120 on the wafer WF can be selectively transferred toward the donor DN. For example, laser LAS can be irradiated toward some of the plurality of light emitting diodes 120 on the wafer WF, and the light emitting diodes 120 can be separated from the wafer WF by the laser and attached to the donor DN.

[0111] refer to Figure 6B and Figure 6A , the plurality of light-emitting diodes 120 transferred to the donor DN can be arranged in the plurality of first areas A1 of the donor DN. The plurality of first areas A1 correspond to the columns in which the plurality of first sub-pixels SP1 are arranged, and the plurality of light-emitting diodes 120 in the plurality of first areas A1 can be transferred to the first sub-pixels SP1. Each of the plurality of first areas A1 can be arranged with a first length D1 gap, which is the same as the gap between the plurality of pixels PX. The distance from the edge of one side of one first area A1 to the edge of one side of an adjacent first area A1 can be the first length D1.

[0112] Furthermore, the donor DN includes a plurality of second areas A2 and a plurality of third areas A3, as well as a plurality of first areas A1. The plurality of second areas A2 correspond to the columns in which the plurality of second sub-pixels SP2 are disposed, and the plurality of third areas A3 correspond to the columns in which the plurality of third sub-pixels SP3 are disposed. Therefore, when the light-emitting diodes 120 are transferred to the plurality of second sub-pixels SP2, the plurality of light-emitting diodes 120 can be disposed in the plurality of second areas A2 of the donor DN. Similarly, when the light-emitting diodes 120 are transferred to the plurality of third sub-pixels SP3, the plurality of light-emitting diodes 120 can be disposed in the plurality of third areas A3 of the donor DN.

[0113] In addition, the plurality of light-emitting diodes 120 transferred to the plurality of first areas A1 of the donor DN may be transferred in such a manner that the plurality of light-emitting diodes 120 form a plurality of groups 120G. Each of the plurality of groups 120G includes a plurality of light-emitting diodes 120. When the donor DN is glued / bonded to the display panel PN, each of the plurality of groups 120G may correspond to one subpixel SP and an area adjacent to the one subpixel SP. For example, when the group 120G is provided in the first subpixel SP1 and an area adjacent to the first subpixel SP1, one group 120G may overlap in an area between an edge of one side of the first subpixel SP1 and an edge of one side of the second subpixel SP2 in the row direction, and in an area between an edge of one side of the first subpixel SP1 and an edge of one side of the adjacent first subpixel SP1 in the column direction.

[0114] The plurality of light-emitting diodes 120 constituting a group 120G may be arranged in the row direction and the column direction with a gap smaller than the gap between the sub-pixels SP. For example, the plurality of light-emitting diodes 120 constituting a group 120G may be arranged in the column direction with a gap smaller than the second length D2, and in the row direction with a gap smaller than the third length D3.

[0115] The number of light-emitting diodes 120 included in each group 120G may vary depending on the frequency of continuous use of one donor DN in the transfer process. For example, in the case where one donor DN is used continuously n times in the transfer process of transferring the light-emitting diode 120 to the display panel PN, n light-emitting diodes 120 may be set in one group 120G. In each of the multiple transfer processes, each of the multiple light-emitting diodes 120 included in one group 120G may be transferred to a sub-pixel SP at a different position. Only the adhesive layer AD of the region to which the multiple light-emitting diodes 120 are to be transferred selectively has adhesive force, so that only one of the multiple light-emitting diodes 120 included in one group 120G is selectively transferred to the sub-pixel SP, and therefore, the transfer process may be performed continuously multiple times with one donor DN. Reference Figures 7A to 7E A detailed description related to this is provided.

[0116] Then refer to Figure 6C and Figure 6D A mask MASK is placed on the display panel PN having the adhesive layer AD, and light LT is irradiated. The mask MASK is placed to cover the region to which the plurality of light emitting diodes 120 are transferred, so that light can be irradiated only to the remaining region to which the plurality of light emitting diodes 120 will not be transferred. Therefore, the adhesive layer AD may include a plurality of first regions AD1 to which the light LT is not irradiated and a second region AD2 to which the light LT is irradiated.

[0117] The plurality of first areas AD1 may correspond to the plurality of sub-pixels SP, respectively, and the second areas AD2 may correspond to the areas between the sub-pixels SP. The second areas AD2 of the adhesive layer AD, which are irradiated by the light LT, may be cured and have no adhesive force, while the plurality of first areas AD1 of the adhesive layer AD, which are not irradiated by the light LT, may have adhesive force. Therefore, of the adhesive layer AD formed on the front surface of the display panel PN, only the plurality of first areas AD1 corresponding to the plurality of sub-pixels SP have adhesive force, and the remaining second areas AD2 of the adhesive layer AD have no adhesive force.

[0118] In addition, reference Figures 6E to 6H , the plurality of light emitting diodes 120 on the donor DN are transferred to the adhesive layer AD of the display panel PN. Figure 6E and Figure 6F , arrange the display panel PN and the donor DN with the adhesive layer AD. After the donor DN is arranged in such a manner that the plurality of light emitting diodes 120 of the donor DN and the adhesive layer AD of the display panel PN face each other, the display panel PN and the donor DN may be glued / bonded. When gluing / bonding the donor DN and the display panel PN, the adhesive layer AD of the display panel PN may overlap with the plurality of light emitting diodes 120 of the donor DN, as shown in FIG. Figure 6F shown.

[0119] In addition, refer to Figure 6G and Figure 6H After gluing the donor DN and the display panel PN and transferring the light emitting diode 120 on the donor DN to the adhesive layer AD, the donor DN may be separated from the display panel PN.

[0120] The light-emitting diodes 120 already attached to the plurality of first regions AD1 of the adhesive layer AD can be separated from the donor DN and transferred to the display panel PN. However, the light-emitting diodes 120 in the second regions AD2 of the adhesive layer AD, which have been previously cured by photolithography and have had their adhesive force removed, can remain attached to the donor DN. Therefore, the light-emitting diodes 120 in the plurality of first regions AD1 of the adhesive layer AD, which have adhesive force due to the lack of light LT, can be separated from the donor DN.

[0121] At this time, since the plurality of LEDs are arranged on the donor DN so that they correspond only to the plurality of first areas A1, the plurality of LEDs 120 of the donor DN can overlap only with the plurality of first areas A1 of the plurality of first subpixels SP1 of the display panel PN. Furthermore, among the plurality of LEDs 120 included in a group 120G, one LED 120 can contact only the first area AD1 of the first area A1 and be transferred to the display panel PN, while the remaining LEDs 120 can contact the second area AD2 and remain on the donor DN. Furthermore, since there are no LEDs 120 in the portions of the donor DN corresponding to the plurality of second areas A2 and the plurality of third areas A3, the LEDs 120 are not transferred to the plurality of first areas AD1 of the plurality of second areas A2 and the plurality of third areas A3. Therefore, the plurality of LEDs 120 can be transferred to all the plurality of first subpixels SP1 arranged in the plurality of first areas A1. Furthermore, the remaining LEDs 120 in each of the plurality of groups 120G of the donor DN can be later transferred to the display panel PN in another transfer process.

[0122] Then, the process of transferring the light emitting diode 120 to the plurality of second sub-pixels SP2 disposed in the plurality of second areas A2 and the process of transferring the light emitting diode 120 to the plurality of third sub-pixels SP3 disposed in the plurality of third areas A3 are repeated, so that the light emitting diode 120 is transferred to all the plurality of sub-pixels SP. Specifically, as Figure 6A and Figure 6B As shown, the plurality of light emitting diodes 120 on the wafer WF can be transferred to the plurality of second regions A2 of the donor DN, and as shown in FIG. Figures 6E-6H As shown, the light emitting diode 120 of the donor DN can be transferred to the plurality of first areas AD1 in the plurality of second areas A2, that is, transferred to the adhesive layer AD of the second sub-pixel SP2. Figure 6A and Figure 6B 、 Figures 6E-6H The process in FIG. 1 also transfers the light emitting diode 120 to the plurality of third sub-pixels SP3.

[0123] Finally, reference Figure 6I After the light emitting diodes 120 are transferred to all the plurality of sub-pixels SP, light LT may be irradiated to the entire adhesive layer AD to cure the entire adhesive layer AD. Light may be irradiated to the entire adhesive layer AD without a separate mask MASK so that the adhesive layer AD is cured throughout the plurality of first regions AD1 thereof.

[0124] In addition, although not shown in the figure, after the adhesive layer AD is cured, a second planarization layer 115b, a third planarization layer 115c, a partition BB, a first connection electrode CE1 and a second connection electrode CE2, a protective layer 116, etc. can be formed on the adhesive layer AD to complete the manufacturing process of the display device 100.

[0125] Therefore, in the display device 100 and the manufacturing method thereof according to one embodiment, the transfer process can be performed so that the plurality of light-emitting diodes 120 can be arranged on the donor DN with a gap smaller than the gap between the plurality of sub-pixels SP, but only the plurality of first regions AD1 corresponding to the plurality of sub-pixels SP in the adhesive layer AD of the display panel PN can have adhesion. Therefore, among the plurality of light-emitting diodes 120 on the donor DN, only the light-emitting diodes 120 arranged to overlap with the plurality of sub-pixels SP, that is, only the light-emitting diodes 120 arranged to overlap with the plurality of sub-pixels SP, can be selectively transferred to the display panel PN, thereby minimizing the possibility of failure (e.g., the light-emitting diodes 120 being transferred to the display panel PN in an area outside the plurality of sub-pixels SP).

[0126] In addition, in the manufacturing method of the display device 100 of one embodiment, the transfer process using one donor DN can be performed multiple times in succession, thereby reducing the time required for the process, and referring to FIG. Figures 7A to 7E Describes a detailed description related to this.

[0127] Figures 7A to 7E is a flowchart for describing a method for manufacturing a display device according to an embodiment. Figures 7A to 7E is a view for describing a process of transferring a plurality of light emitting diodes 120 on a donor DN to a display panel PN in a case where the display panel PN has a larger size than the donor DN.

[0128] refer to Figure 7A , the display panel PN may be larger than the donor DN. For example, since the display panel PN is approximately four times larger than the donor DN, four donor DNs or four transfer processes may be required to transfer the light-emitting diodes 120 to the entire display panel PN. However, in the method for manufacturing the display device 100 of one embodiment, the adhesive layer AD has adhesive force only in the regions corresponding to the plurality of sub-pixels SP, so that only a portion of the plurality of light-emitting diodes 120 disposed on one donor DN is selectively transferred to the display panel PN, and the transfer process using one donor DN can be performed multiple times.

[0129] Hereinafter, for convenience of description, although it is assumed that the size of the display panel PN is about four times that of the donor DN, the aspect ratio of the donor DN and the display panel PN is provided as an example and is not limited thereto.

[0130] At this time, the display panel PN in which the light emitting diodes 120 are transferred to all of the plurality of sub-pixels SP in four transfer processes may include four regions in which one transfer process occurs, for example, a first transfer region AR1, a second transfer region AR2, a third transfer region AR3, and a fourth transfer region AR4. In one transfer process, the light emitting diode 120 may be transferred to any one of the first transfer region AR1, the second transfer region AR2, the third transfer region AR3, and the fourth transfer region AR4.

[0131] In addition, before the light emitting diode 120 is transferred from the donor DN to the display panel PN, a mask MASK is placed on the adhesive layer AD formed entirely on the display panel PN, and light LT is irradiated. This allows the adhesive layer AD to be formed into a plurality of first regions AD1 corresponding to the plurality of sub-pixels SP and having an adhesive force, and a second region AD2 irradiated with light LT and having no adhesive force. Therefore, although the adhesive layer AD can be formed entirely on the display panel PN, the adhesive layer AD can locally have an adhesive force only in the region corresponding to the plurality of sub-pixels SP.

[0132] In addition, all the light-emitting diodes 120 to be transferred to the first transfer area AR1, the second transfer area AR2, the third transfer area AR3, and the fourth transfer area AR4 can be provided on the donor DN. For example, when 15 sub-pixels SP and 15 light-emitting diodes 120 are transferred to each of the first transfer area AR1, the second transfer area AR2, the third transfer area AR3, and the fourth transfer area AR4, 15 groups 120G can be provided on the donor DN, each group including four light-emitting diodes 120. These four light-emitting diodes 120 are respectively used for one of the four transfer processes. That is, 60 light-emitting diodes 120 are provided on the donor DN.

[0133] refer to Figure 7B The donor DN is glued / bonded to the first transfer region AR1 of the display panel PN, so that the plurality of light-emitting diodes 120 on the donor DN can be transferred to the display panel PN. At this time, the plurality of light-emitting diodes 120 on the donor DN may all contact the adhesive layer AD of the first transfer region AR1, but only the light-emitting diodes 120 contacting the plurality of first regions AD1 having adhesive force may be selectively transferred to the first transfer region AR1, while the light-emitting diodes 120 contacting the second regions AD2 may remain on the donor DN.

[0134] In the following, reference Figure 7CWhen gluing / bonding the donor DN to the second transfer area AR2, the donor DN can be shifted so that any one of the multiple light-emitting diodes 120 in each of the multiple groups 120G on the donor DN can contact the multiple first areas AD1 of the adhesive layer AD and can be glued / bonded to the second transfer area AR2. The donor DN and the display panel PN can be arranged so that any one of the multiple light-emitting diodes 120 in each group 120G can overlap with the first area AD1 of the adhesive layer AD, and the donor DN can be glued / bonded to the display panel PN. Thus, the multiple light-emitting diodes 120 of the donor DN can contact the multiple first areas AD1, and the light-emitting diodes 120 can be transferred to the multiple sub-pixels SP in the second transfer area AR2. Furthermore, the remaining light-emitting diodes 120 contacting the second area AD2 of the second transfer area AR2 can remain adhered to the donor DN.

[0135] refer to Figure 7D As described with respect to the transfer process in the second transfer region AR2, the donor DN can be shifted and glued / bonded to the third transfer region AR3. Specifically, after the donor DN is arranged so that any one of the plurality of light-emitting diodes 120 in each group 120G corresponds to the first region AD1 of the adhesive layer AD, the donor DN can be glued to the third transfer region AR3. Thus, any one of the light-emitting diodes 120 in each group 120G can be transferred to the plurality of sub-pixels SP in the third transfer region AR3.

[0136] Finally, reference Figure 7E The donor DN may be arranged so that the remaining light emitting diodes 120 in each of the plurality of groups 120G on the donor DN may correspond to the first region AD1 of the adhesive layer AD, and the donor DN may be glued / bonded to the fourth transfer region AR4. Thus, all of the plurality of light emitting diodes 120 disposed on the donor DN may be transferred to the display panel PN.

[0137] For example, in order to transfer the light-emitting diodes on the donor to a plurality of sub-pixels in a state where the entire adhesive layer has adhesive force, it is only necessary to arrange the light-emitting diodes in an arrangement such that the light-emitting diodes correspond to the plurality of sub-pixels on the donor. If the light-emitting diodes are arranged on an area where the light-emitting diodes do not correspond to the plurality of sub-pixels, a failure may occur in which the light-emitting diodes are even transferred to an area outside the sub-pixels during the gluing / bonding of the donor and the display panel. In this context, in a case where the display panel has a larger size than the donor, a display device can be manufactured by using a plurality of donors, in which the light-emitting diodes are arranged in an arrangement such that the light-emitting diodes correspond to each of the plurality of sub-pixels. However, due to the use of a plurality of donors, the number of processes for selectively transferring the light-emitting diodes on the wafer to each donor may increase, and the time taken for the processes may increase.

[0138] In contrast, in the display device 100 and the method for manufacturing the display device 100 according to one embodiment, multiple light-emitting diodes 120 are transferred to a donor DN at a time, and only the regions of the adhesive layer AD of the display panel PN corresponding to the multiple sub-pixels SP are selectively provided with adhesive force, so that only a portion of the multiple light-emitting diodes 120 on the donor DN can be selectively transferred to the sub-pixels SP. Therefore, the light-emitting diodes 120 can be transferred to multiple regions of the display panel PN using a single donor DN, thereby reducing the number of donor DNs required during the entire transfer process. Consequently, the number of processes required to transfer the light-emitting diodes 120 from the wafer WF to the donor DN and the time required for these processes can be reduced.

[0139] Figure 8 is a cross-sectional view of a display device according to a second embodiment. Figure 9A 1 and 2 are plan views of display devices according to the second and third embodiments. Figures 9B to 9E yes Figure 9A The cross-sectional view of the region AA' and the Figure 9A Flow chart of a method for manufacturing the region AA'.

[0140] As with Figures 1 to 7E The display device 100 of FIG. 1 is compared with FIG. 1 , except for the first planarization layer 115 a and the adhesive layer AD, Figure 8 The configuration of the display device 800 is Figures 1 to 7E The configurations of the display devices 100 are substantially the same, and thus descriptions of the same configurations thereof are omitted. For ease of description, Figures 9B to 9E Only the substrate 110 , the first planarization layer 115 a , and the adhesive layer AD among the components of the display panel PN are shown.

[0141] refer to Figure 8 and Figure 9A, a first planarization layer 115a in the form of an island may be provided on the substrate 110 of the display device 800 of the second embodiment. The first planarization layer 115a may have an opening OP in its third area AD3, and the third area AD3 is an area where the light emitting diode 120 is not transferred. An adhesive layer AD may be provided on the first planarization layer 115a. The adhesive layer AD may include a first area AD1 as an area to which the light emitting diode 120 is transferred, a third area AD3 as an area to which the light emitting diode 120 is not transferred, and a second area AD2 as a remaining area. In this document, the transfer area may also be referred to as an adhesive area, and the non-transfer area may also be referred to as a non-adhesive area. The third area AD3 may overlap with the light emitting diode 120 that is not transferred to the display panel PN during the process of transferring the light emitting diode 120 from the donor DN to the display panel PN.

[0142] The third region AD3 of the adhesive layer AD may form an opening formed at the first planarization layer 115a and thus may form a groove. The thickness of the third region AD3 may be different from the thickness of the first region AD1 and the thickness of the second region AD2.

[0143] refer to Figures 9B to 9E Among the plurality of light emitting diodes 120 already attached to the donor DN, except for the light emitting diodes 120R, 120G, and 120B to be transferred to the first area AD1, the remaining light emitting diodes 120 are not allowed to be transferred to the display panel PN. Figure 9B As shown, a mask MASK is set to cover the area where the plurality of light emitting diodes 120 are to be transferred, as shown in FIG. Figure 9B As shown, light LT is irradiated only to the remaining areas where the plurality of light emitting diodes 120 are not transferred. Therefore, the adhesive layer AD may include a plurality of first areas AD1 where light LT is not irradiated, and second and third areas AD2 and AD3 where light LT is irradiated. As a result, the third areas AD3 of the adhesive layer AD irradiated by light LT may be cured and have no adhesive force, while the first areas AD1 of the adhesive layer AD not irradiated by light LT may have adhesive force.

[0144] Then refer to Figures 9C to 9E , the donor DN is glued / bonded to the display panel PN and then pressurized P so that the light emitting diodes 120R, 120G, 120B can adhere only to the multiple first areas AD1 of the adhesive layer AD, while the light emitting diode 120 disposed on the third area AD3 can remain adhered to the donor DN.

[0145] The plurality of first regions AD1 of the adhesive layer AD, to which the plurality of light emitting diodes 120 are attached, may have a height greater than a height of the third region AD3 of the adhesive layer AD, so that only the plurality of light emitting diodes 120 are transferred to the plurality of first regions AD1. Figure 9D As shown, when the upper surfaces of the plurality of first areas AD1 are higher than the upper surfaces of the third areas AD3, the plurality of light-emitting diodes 120 disposed above the third areas AD3 may not contact the third areas AD3, while the light-emitting diodes 120 disposed above the plurality of first areas AD1 may contact the first areas AD1. Therefore, the light-emitting diodes disposed above the third areas AD3 can remain adhered to the donor DN. Therefore, when the upper surfaces of the plurality of first areas AD1 of the adhesive layer AD, which contact the plurality of light-emitting diodes 120, are formed higher than the upper surfaces of the third areas AD3 of the adhesive layer AD, the plurality of light-emitting diodes 120 can be more securely fixed to the display panel PN.

[0146] In the display device 800 and the method for manufacturing the display device 800 of the second embodiment, the plurality of light-emitting diodes 120 can be arranged on the donor DN with a narrow gap. However, since the first planarization layer 115a has an opening only in the third region AD3, which serves as the non-transfer region of the display panel PN, the transfer process can be performed with the upper surface of the adhesive layer AD in the third region AD3 lower than the upper surface of the adhesive layer AD in the first region AD1. Furthermore, since only the plurality of first regions AD1 of the adhesive layer AD of the display panel PN have adhesive strength, only the light-emitting diodes 120 arranged to overlap with the plurality of first regions AD1 of the adhesive layer AD among the plurality of light-emitting diodes 120 on the donor DN can be selectively transferred to the display panel PN, thereby minimizing the possibility of failure of the light-emitting diodes 120 transferred to the non-transfer region of the display panel PN.

[0147] Figure 10 is a plan view of a display device according to a third embodiment. Figure 8 The display device 800 is compared with the result that, in addition to the step-forming layer DC and the adhesive layer AD, Figure 10 The configuration of the display device 1000 is Figure 8 The configurations of the display devices 800 are substantially the same, and thus descriptions of their identical configurations are omitted.

[0148] refer to Figure 10 The step-forming layer DC may be disposed on the substrate 110 of the display device 1000 of the third embodiment. Specifically, the step-forming layer DC may be disposed on the second passivation layer 114b. The step-forming layer DC may have an opening DCO in a region where the step-forming layer DC overlaps with or is adjacent to the light-emitting diode 120.

[0149] The adhesive layer AD may be disposed on the step-forming layer DC. Due to the opening DCO formed at the step-forming layer DC, the adhesive layer AD may include a first region AD1 having a relatively thick first thickness T1 and a second region AD2 having a second thickness T2 smaller than the first thickness T1.

[0150] Since the first region AD1 of the adhesive layer AD is formed when filling the opening DCO formed in the step-forming layer DC, the first region AD1 of the adhesive layer AD can have a relatively thick first thickness T1. Since the second region AD2 of the adhesive layer AD is formed when covering the upper surface of the step-forming layer DC (with the opening DCO provided between the second region AD2 and the step-forming layer DC), the second region AD2 of the adhesive layer AD can have a second thickness T2 that is less than the first thickness T1. The upper end of the first region AD1 can be lower than the upper end of the second region AD2. The step-forming layer DC may include an organic material (e.g., an acrylic material or polyimide) or an inorganic material (e.g., silicon oxide (SiOx)), but is not limited thereto.

[0151] The plurality of first regions AD1 of the adhesive layer AD that are in contact with the plurality of light-emitting diodes 120 may be provided on the opening DCO. In addition, the second regions AD2 of the adhesive layer AD to which the plurality of light-emitting diodes 120 are not transferred may be provided in an area where the second region AD2 does not overlap with the opening DCO. In the display device 1000 of the third embodiment, the plurality of first regions AD1 of the adhesive layer AD may include a transfer area to which the light-emitting diodes 120 are transferred and a non-transfer area to which the light-emitting diodes 120 are not transferred. In this document, the non-transfer area may also be referred to as a non-attachment area. At this time, the adhesive layer AD may have different heights in the transfer area and the non-transfer area. Figures 11A to 11C Provide a description related to this.

[0152] refer to Figure 10 In the display device 1000 of the third embodiment, the adhesive layer AD may further include a third region AD3, which is a region to which the light-emitting diode 120 is not transferred and overlaps with the opening DCO. Therefore, the adhesive layer AD may include a transfer region to which the light-emitting diode 120 is transferred and a non-transfer region to which the light-emitting diode 120 is not transferred. Herein, the transfer region may also be referred to as an attachment region, and the non-transfer region may also be referred to as a non-attachment region. The third region AD3 may overlap with the light-emitting diode 120 that is not transferred to the display panel PN during the process of transferring the light-emitting diode 120 from the donor DN to the display panel PN.

[0153] The upper end of the first area AD1 may be higher than the upper end of the third area AD3, but is not limited thereto. During the transfer process, among the plurality of light-emitting diodes 120 already attached to the donor DN, the remaining light-emitting diodes 120, except for the light-emitting diodes 120 that will be transferred to the first area AD1, are not allowed to be transferred to the display panel PN. For this purpose, light may be irradiated to the third area AD3 using a mask. Therefore, the third area AD3 of the adhesive layer AD irradiated by the light LT may be cured and have no adhesive force, and the first area AD1 not irradiated by the light LT may have adhesive force. Therefore, among the adhesive layer AD formed on the front surface of the display panel PN, the adhesive layer AD of the plurality of first areas AD1 corresponding to the plurality of sub-pixels SP has adhesive force, and the adhesive layer AD of the third area to which the light-emitting diodes 120 are not transferred has no adhesive force. The third area AD3 may be shaped as a flat rectangle or a flat circle, but is not limited thereto.

[0154] Then, when gluing / bonding the donor DN to the display panel PN, the light emitting diodes 120R, 120G, 120B may adhere only to the plurality of first areas AD1 of the adhesive layer AD, while the light emitting diodes 120 contacting the third area AD3 may remain adhered to the donor DN.

[0155] In the display device 1000 of the third embodiment, the plurality of first regions AD1 of the adhesive layer AD, to which the plurality of light-emitting diodes 120 adhere, have a thickness T1 that is greater than the thickness T2 of the second region AD2 and the thickness T3 of the third region AD3. Therefore, the adhesive force of the plurality of first regions AD1 can be further improved. The plurality of first regions AD1 of the adhesive layer AD, which are in contact with the plurality of light-emitting diodes 120, are thicker than other regions of the adhesive layer AD, allowing the plurality of light-emitting diodes 120 to be more reliably fixed to the display panel PN.

[0156] Furthermore, the third region AD3 can have a thickness T3 similar to the thickness T1 of the first region AD1 and can have a similarly high adhesive force as the first region AD1. However, if a step-forming layer DC is disposed below the third region AD3 and the height of the upper portion of the adhesive layer AD in the third region AD3 becomes similar to the height of the upper portion of the adhesive layer AD in the second region AD2, problems may arise. For example, during the process of transferring the light-emitting diode 120 from the donor DN to the display panel PN using pressure, the upper portion of the adhesive layer AD in the third region AD3, which has been cured by light LT and has lost its adhesive force, is damaged, and the adhesive layer AD in the lower portion of the adhesive layer AD in the third region AD3, which has maintained adhesive force, is exposed. Consequently, the light-emitting diode 120, which was not intended to be transferred, may be transferred to the third region AD3. To prevent this, in the display device 1000 of the third embodiment, the upper end of the adhesive layer AD in the third region AD3 is formed lower than the upper end of the second region AD2, thereby preventing pressure-induced transfer. Furthermore, light LT is irradiated onto the third region AD3, thereby removing the adhesive force of the adhesive layer AD. The surface area of the third region AD3 may be greater than, less than, or equal to the surface area of the opening DCO.

[0157] refer to Figure 10 The display device 1000 of the third embodiment may include a first planarization layer 115a with an opening OP below the third region AD3, which serves as a non-attachment region for the light-emitting diode 120, and a step-forming layer DC in an adjacent region of the first region AD1, which serves as an attachment region for the light-emitting diode 120. Therefore, the step between the upper surface of the first region AD1 and the upper surface of the third region AD3 in the third embodiment may be larger than the step between the upper surfaces of the first region AD1 and the upper surfaces of the third region AD3 in the second embodiment. As a result, the transfer pressure between the light-emitting diode 120 and the third region AD3 is reduced, thereby preventing excessive transfer in the third region AD3.

[0158] Figures 11A to 11C It is used to describe the display device Figure 9A Flow chart of the manufacturing method of the region AA'. Figures 9B to 9E The display device 800 is compared with the result that, in addition to the step-forming layer DC and the adhesive layer AD, Figures 11A to 11C The configuration of the display device and Figures 9B to 9E The configurations of the display devices 800 are substantially the same, and therefore descriptions of the same configurations thereof are omitted. For ease of description, Figures 11A to 11C Only the substrate 110 , the step-forming layer DC, and the adhesive layer AD among the components of the display panel PN are shown.

[0159] refer to Figure 11B and Figure 11C During the transfer of the light-emitting diode 120 from the donor DN to the display panel PN, the light-emitting diode 120 is not transferred in the third region AD3 disposed within the area AA', but remains on the donor DN. In the third embodiment, the adhesive layer AD may have different surface areas in the plurality of first regions AD1 and the plurality of third regions AD3. The thickness T1 of the adhesive layer AD in the first region AD1 may be equal to or greater than the thickness T2 in the second region AD2 and the thickness T3 in the third region AD3.

[0160] Figure 12 is a plan view of a display device according to a fourth embodiment. Figures 8 to 9E The display device 800 is compared with the result that, in addition to the plurality of sub-pixels SP and the adhesive layer AD, Figure 12 The configuration of the display device 1200 is Figures 8 to 9E The configurations of the display devices 800 are substantially the same, and therefore descriptions of the same configurations thereof are omitted. For ease of description, Figure 12 Only the adhesive layer AD and the plurality of sub-pixels SP are shown.

[0161] refer to Figure 12 , additional sub-pixels SPA may be further provided on the substrate 110. The additional sub-pixels SPA are components for additionally transferring the light-emitting diodes 120 when the transfer of the light-emitting diodes 120 to the sub-pixels SP fails and repairing the defective sub-pixels SP. The additional sub-pixels SPA may be provided near a portion of the plurality of sub-pixels SP. For example, the additional sub-pixels SPA may be provided between the plurality of sub-pixels SP in a portion of the plurality of rows. However, in Figure 12 In the embodiment, the arrangement of the additional sub-pixels SPA is provided as an example and is not limited thereto.

[0162] The donor DN and the display panel PN may be glued / bonded, and the light emitting diode 120 may be transferred to the plurality of sub-pixels SP, and then the sub-pixels in which the transfer has failed may be detected. If the light emitting diode 120 is not transferred to the first sub-pixel SP1 among the plurality of sub-pixels SP, or the light emitting diode is transferred out of its proper position, the light emitting diode 120 may be transferred to an additional sub-pixel SPA adjacent to the first sub-pixel SP1 to replace the defective sub-pixel SP.

[0163] For the light emitting diode 120 to be transferred to the additional sub-pixel SPA, a portion of the adhesive layer AD corresponding to the additional sub-pixel SPA may also be formed as the first region AD1. For example, before transferring the plurality of light emitting diodes 120 to the display panel PN, a mask MASK covering the regions of the plurality of sub-pixels SP and the additional sub-pixel SPA is set, and light LT is irradiated to remove the third region AD3 of the adhesive layer AD (see FIG. Figure 9A). Furthermore, the plurality of first areas AD1 not irradiated by light LT (i.e., portions of the adhesive layer AD overlapping the plurality of sub-pixels SP and the plurality of additional sub-pixels SPA) may still have adhesive strength. Therefore, after detecting transfer failure of the display panel PN, the light-emitting diode 120 can be transferred to the first areas AD1 of the additional sub-pixel SPA that have adhesive strength to repair the defective sub-pixel SP. Then, after the repair is complete, the adhesive layer AD1 can be cured by irradiating light LT again onto the plurality of first areas AD1, the second areas AD2, and the third areas AD3.

[0164] Therefore, in the display device 1200 of the fourth embodiment, when forming an additional sub-pixel SPA for repair, the adhesive layer AD corresponding to the additional sub-pixel SPA can also be formed as the first region AD1, so that the light emitting diode 120 is transferred to the display panel PN during the additional transfer process. Therefore, the adhesive layer AD can be designed into various structures in consideration of the repair process, etc.

[0165] Exemplary embodiments of the present disclosure may also be described as follows:

[0166] According to one aspect of the present disclosure, a display device is provided. The display device includes: a substrate, a pixel included in the substrate, and the pixel includes a plurality of sub-pixels. The display device also includes a first planarization layer, which is disposed on the substrate and configured to have an opening. The display device also includes an adhesive layer, which is disposed on the first planarization layer. The display device also includes a plurality of light-emitting diodes, which are disposed on the adhesive layer in each of the plurality of sub-pixels. The adhesive layer includes a plurality of first regions configured to overlap with the plurality of light-emitting diodes, a plurality of non-attachment regions respectively disposed adjacent to the first regions, and a second region as a remaining portion other than the plurality of first regions and the plurality of non-attachment regions.

[0167] The display device may further include a step-forming layer disposed on the first planarization layer.

[0168] The step-forming layer may have an opening in a region where the step-forming layer overlaps with the plurality of first regions and the plurality of non-attachment regions.

[0169] The step-forming layer may be provided in a second region adjacent to the plurality of first regions.

[0170] The plurality of first regions may have a greater thickness than the second region or the non-attachment region.

[0171] The light emitting diodes may not be provided in the plurality of non-attachment areas.

[0172] The plurality of non-attachment areas may include portions that are exposed to light and cured.

[0173] The plurality of first regions may have greater adhesive force than the plurality of non-attachment regions.

[0174] According to another aspect of the present disclosure, a method for manufacturing a display device is provided. The method for manufacturing a display device includes transferring a plurality of light-emitting diodes on a wafer to a donor. The method for manufacturing a display device also includes setting a first planarization layer on a substrate of a display panel. The method for manufacturing a display device also includes setting an adhesive layer on the substrate and the first planarization layer. The method for manufacturing a display device also includes setting a mask on the adhesive layer and irradiating light. The method for manufacturing a display device also includes transferring a plurality of light-emitting diodes on a donor to a display panel. The adhesive layer includes a plurality of first regions overlapping with the mask, and a non-attached region exposed from the mask and irradiated with light, and among the plurality of light-emitting diodes, only the light-emitting diodes contacting the plurality of first regions are transferred to the display panel.

[0175] Disposing a mask on the adhesive layer and irradiating light may include blocking light traveling toward the plurality of first regions to prevent the plurality of first regions from being cured, and irradiating light to the non-attachment region and curing the non-attachment region.

[0176] The manufacturing method of the display device may further include transferring the plurality of light emitting diodes to the display panel, and then irradiating light to the adhesive layer and curing the entire adhesive layer.

[0177] The adhesive layers of the plurality of first regions may have a thickness greater than that of the adhesive layers of the second regions and the adhesive layer of the non-attachment region, and the plurality of first regions may have a greater adhesive force than that of the second region.

[0178] The display panel may include a plurality of sub-pixels, and the plurality of first regions may overlap with the plurality of sub-pixels.

[0179] The plurality of light-emitting diodes transferred from the wafer to the donor may form a plurality of groups, and when the plurality of light-emitting diodes on the donor are transferred to the display panel, each of the plurality of groups may be arranged to overlap with each of the plurality of sub-pixels and an area adjacent to the plurality of sub-pixels.

[0180] At least one light emitting diode among the plurality of light emitting diodes included in each of the plurality of groups may overlap with the plurality of first regions, and the remaining light emitting diodes may overlap with the non-attachment region.

[0181] The display panel may further include additional sub-pixels disposed between the plurality of sub-pixels, and the plurality of first regions of the adhesive layer may correspond to the additional sub-pixels.

[0182] The method for manufacturing a display device may further include transferring the plurality of light-emitting diodes to a display panel and then detecting transfer failure of the plurality of light-emitting diodes. The method for manufacturing a display device may further include transferring the light-emitting diodes to the additional sub-pixel adjacent to the sub-pixel in which the transfer failure occurred. In addition, the method for manufacturing a display device may further include curing the entire adhesive layer.

[0183] The method for manufacturing a display device may further include providing a step-forming layer on the first planarization layer. The method for manufacturing a display device may further include patterning the step-forming layer to form an opening. In addition, the method for manufacturing a display device may further include providing an adhesive layer on the step-forming layer.

[0184] The method for manufacturing a display device may further include patterning a non-transfer region of the first planarization region and forming an opening.

[0185] Although the exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto, and the present disclosure can be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are illustrative in all aspects and do not limit the present disclosure. The scope of protection of the present disclosure should be interpreted based on the appended claims, and all technical concepts within their equivalent scope should be interpreted as falling within the scope of the present disclosure.

Claims

1. A display device comprising: a substrate, the substrate comprising a pixel, the pixel comprising a plurality of sub-pixels; a first planarization layer disposed on the substrate and configured to have an opening; an adhesive layer, the adhesive layer being disposed on the first planarization layer; as well as a plurality of light emitting diodes disposed on the adhesive layer in each of the plurality of sub-pixels; The adhesive layer includes a plurality of first regions configured to overlap with the plurality of light-emitting diodes, a plurality of non-attachment regions respectively arranged adjacent to the first regions, and a second region which is a remaining portion except the plurality of first regions and the plurality of non-attachment regions. 2 . The display device according to claim 1 , further comprising a step-forming layer provided on the first planarizing layer.

3. The display device according to claim 2, wherein: The step-forming layer has an opening in a region where the step-forming layer overlaps with the plurality of first regions and the plurality of non-attachment regions.

4. The display device according to claim 3, wherein The step-forming layer is provided in a second region adjacent to the plurality of first regions.

5. The display device according to claim 1, wherein The plurality of first regions have a thickness greater than that of the second region or the non-attachment region. The display device according to claim 5 , wherein: The light emitting diodes are not provided in the plurality of non-attachment areas.

7. The display device according to claim 5, wherein: The plurality of non-attached areas include portions that are exposed to light and cured.

8. The display device according to claim 5, wherein The plurality of first areas have greater adhesive force than the plurality of non-attachment areas.

9. The display device according to any one of claims 1 to 8, wherein: An upper end of the first region is lower than an upper end of the second region.

10. The display device according to any one of claims 1 to 8, wherein: An upper end of the first region is higher than an upper end of the non-attachment region.

11. A method for manufacturing a display device, comprising: transferring a plurality of light-emitting diodes on the wafer to a donor; Disposing a first planarization layer on a substrate of a display panel; providing an adhesive layer on the substrate and the first planarization layer; placing a mask on the adhesive layer and irradiating light; as well as transferring the plurality of light emitting diodes on the donor to the display panel, wherein the adhesive layer includes a plurality of first regions overlapping with the mask, and a non-attachment region exposed from the mask and irradiated with light, and Among the plurality of light emitting diodes, only the light emitting diodes contacting the plurality of first regions are transferred to the display panel.

12. The manufacturing method according to claim 11, wherein: Disposing a mask on the adhesive layer and irradiating light includes blocking light traveling toward the plurality of first regions to prevent the plurality of first regions from being cured, and irradiating light to the non-attachment region and curing the non-attachment region.

13. The manufacturing method according to claim 12, further comprising: The plurality of light emitting diodes are transferred to the display panel, and then light is irradiated to the adhesive layer and the entire adhesive layer is cured.

14. The manufacturing method according to claim 12, wherein: The adhesive layers of the plurality of first regions have a thickness greater than that of the adhesive layers of the second regions and the adhesive layer of the non-attachment region, and The plurality of first regions have a greater adhesive force than the second region.

15. The manufacturing method according to claim 11, wherein The display panel includes a plurality of sub-pixels, and The plurality of first regions overlap with the plurality of sub-pixels.

16. The manufacturing method according to claim 15, wherein: The plurality of light emitting diodes transferred from the wafer to the donor form a plurality of groups, and When the plurality of light emitting diodes on the donor are transferred to the display panel, each of the plurality of groups is disposed to overlap each of the plurality of sub-pixels and regions adjacent to the plurality of sub-pixels.

17. The manufacturing method according to claim 16, wherein: At least one light emitting diode among the plurality of light emitting diodes included in each of the plurality of groups overlaps with the plurality of first regions, and the remaining light emitting diodes overlap with the non-attachment region.

18. The manufacturing method according to claim 15, wherein: The display panel further includes additional sub-pixels disposed between the plurality of sub-pixels, and The plurality of first regions of the adhesive layer correspond to the additional sub-pixels.

19. The manufacturing method according to claim 18, further comprising: transferring the plurality of light emitting diodes to a display panel, and then detecting a transfer failure of the plurality of light emitting diodes; Transferring the light emitting diode to the additional sub-pixel adjacent to the sub-pixel where the transfer failure occurred; as well as The entire adhesive layer is cured.

20. The manufacturing method according to claim 11, further comprising: providing a step-forming layer on the first planarization layer; patterning the step-forming layer to form an opening; as well as An adhesive layer is provided on the step-forming layer.

21. The manufacturing method according to claim 11, further comprising: The non-transferred area of the first planarized area is patterned to form an opening.

22. The manufacturing method according to claim 14, wherein: An upper end of the first region is lower than an upper end of the second region.

23. The manufacturing method according to any one of claims 11 to 22, wherein: An upper end of the first region is higher than an upper end of the non-attachment region.

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