Carrier synchronization method of receiver, receiver system, medium, product and equipment

Abstract

The invention relates to a carrier synchronization method of a receiver, a receiver system, a medium, a product and equipment, and the method comprises the steps: carrying out the correction processing of carrier frequency offset in the receiver based on a plurality of numerical control frequency control words of a numerical control oscillator in the receiver under the condition that a loop of the receiver is stable, as the frequency control words of the numerical control oscillator can reflect the carrier frequency offset of the receiver, carrier frequency offset correction is carried out based on the multiple numerical control frequency control words, the frequency jitter of the numerical control oscillator can be eliminated, the carrier frequency offset of signals in the receiver is reduced and corrected fundamentally, and the stability of carrier synchronization is improved.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a carrier synchronization method for a receiver, a receiver system, a medium, a product, and a device. Background Art

[0002] In recent years, zero-IF receivers have garnered widespread attention due to their significant advantages, including small size, low power consumption, and low cost. However, carrier synchronization for these receivers is currently performed at the digital signal processing backend, impacting carrier synchronization stability. Summary of the Invention

[0003] The embodiments of the present application provide a carrier synchronization method, receiver system, medium, product, and equipment for a receiver, which can solve the technical problem that the existing carrier synchronization scheme cannot fundamentally reduce the carrier frequency deviation of the receiver and reduce the carrier synchronization stability of the receiver, so as to at least partially solve the above technical problems.

[0004] To achieve the above object, according to a first aspect of the present application, a carrier synchronization method for a receiver is provided, the method comprising:

[0005] When the loop of the receiver is stable, the carrier frequency deviation in the receiver is corrected based on a plurality of digitally controlled frequency control words of a digitally controlled oscillator in the receiver.

[0006] According to a second aspect of the present application, a receiver system is provided, comprising:

[0007] The digital signal processing module is used to correct the carrier frequency deviation in the receiver based on multiple digitally controlled frequency control words of the digitally controlled oscillator in the receiver when the loop of the receiver is stable.

[0008] According to a third aspect of the present application, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the carrier synchronization method of the above-mentioned receiver is implemented.

[0009] According to a fourth aspect of the present application, a computer program product is provided, comprising a computer program, wherein when the computer program is executed by a processor, the carrier synchronization method of the above-mentioned receiver is implemented.

[0010] According to a fifth aspect of the present application, an electronic device is provided, comprising a processor and a memory, wherein the memory stores a plurality of instructions; the processor loads instructions from the memory to execute the steps of the carrier synchronization method of the receiver as described in the first aspect.

[0011] According to the sixth aspect of the present application, a vehicle is provided, comprising the above-mentioned electronic device and / or receiver system. The carrier synchronization method, receiver system, medium, product, and device of the receiver of the embodiment of the present application correct the carrier frequency deviation in the receiver based on multiple digitally controlled frequency control words of the digitally controlled oscillator in the receiver when the loop of the receiver is stable. Since the frequency control word of the digitally controlled oscillator can reflect the size of the carrier frequency deviation of the receiver, the carrier frequency deviation correction based on the multiple digitally controlled frequency control words can eliminate the frequency jitter of the digitally controlled oscillator, fundamentally reduce and correct the carrier frequency deviation of the signal in the receiver, and improve the stability of carrier synchronization.

[0012] Other features and advantages of the present application will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] To more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present application. Those skilled in the art can also derive other drawings based on these drawings without inventive effort.

[0014] In order to more completely understand the present application and its beneficial effects, the following description will be given in conjunction with the accompanying drawings, wherein the same drawing numbers represent the same parts in the following description.

[0015] Figure 1 is a flowchart of a carrier synchronization method for a receiver provided in some embodiments of the present application;

[0016] Figure 2 is a flow chart for determining the crystal oscillator frequency provided in some embodiments of the present application;

[0017] Figure 3 is a graph of the AD9361 crystal oscillator control characteristic provided in some embodiments of the present application;

[0018] Figure 4 is a graph showing the convergence of the crystal oscillator frequency deviation estimation value as the number of received packets increases, provided in some embodiments of the present application;

[0019] Figure 5 is a schematic structural diagram of a receiver system provided in some embodiments of the present application;

[0020] Figure 6 is a schematic structural diagram of an electronic device provided in some embodiments of the present application;

[0021] Figure 7 It is a schematic structural diagram of a vehicle provided in some embodiments of the present application. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0023] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0024] In the description of this application, the word "for example" is used to mean "used as an example, illustration or illustration". Any embodiment described in this application as "for example" is not necessarily to be construed as being more preferred or advantageous than other embodiments. The following description is given to enable any person skilled in the art to implement and use the present invention. In the following description, details are listed for the purpose of explanation. It should be understood that a person of ordinary skill in the art can recognize that the present invention can be implemented without using these specific details. In other examples, well-known structures and processes are not elaborated in detail to avoid obscuring the description of the present invention with unnecessary details. Therefore, the present invention is not intended to be limited to the embodiments shown, but is consistent with the widest scope consistent with the principles and features disclosed in this application.

[0025] In related technologies, a zero-IF receiver is usually used for carrier synchronization. The zero-IF receiver system is mainly composed of a radio frequency front end and a digital signal processing back end. The radio frequency front end is used to perform digital down-conversion, and the digital signal processing back end is used to complete the carrier synchronization of the signal. The inherent frequency offset of the crystal oscillator in the zero-IF receiver is not fundamentally corrected, which affects the stability of carrier synchronization.

[0026] In order to solve the above problems, an embodiment of the present application provides a carrier synchronization method for a receiver, by which the carrier frequency deviation in the receiver is corrected based on multiple digitally controlled frequency control words of the digitally controlled oscillator in the receiver when the loop of the receiver is stable. Since the frequency control word of the digitally controlled oscillator can reflect the size of the carrier frequency deviation of the receiver, the carrier frequency deviation correction based on multiple digitally controlled frequency control words can eliminate the frequency jitter of the digitally controlled oscillator, fundamentally reduce and correct the carrier frequency deviation of the signal in the receiver, and improve the stability of carrier synchronization.

[0027] See also Figure 1 , provides a carrier synchronization method for a receiver, which is applied to an electronic device. The electronic device may be a terminal device or a server. The method includes:

[0028] Step S101 : When the loop of the receiver is stable, correcting the carrier frequency offset in the receiver based on a plurality of digitally controlled frequency control words of a digitally controlled oscillator in the receiver.

[0029] The receiver of this embodiment may be a zero-IF receiver. A numerically controlled oscillator (NCO) in a receiver is a digitally implemented oscillator whose output frequency is controlled by a digital signal. NCOs are commonly used in digital signal processing (DSP) systems and can be located within a digital signal processing module to generate precisely controlled frequency signals, which can be used for frequency synthesis, modulation, and demodulation.

[0030] The frequency control word refers to the frequency of the NCO output signal. The digitally controlled frequency control word in this embodiment is the frequency control word of the NCO. After the loop is stable, the frequency control word is proportional to the carrier frequency deviation in the receiver. The frequency control word can proportionally reflect the size of the carrier frequency deviation.

[0031] The carrier frequency deviation in the receiver is a frequency deviation between a carrier signal of a crystal oscillator in the receiver and a received signal, wherein the received signal may be a signal of a target data packet.

[0032] After the loop in the receiver stabilizes, the NCO's output frequency will oscillate slightly around a stable value. That is, the NCO's frequency control word will jitter within a certain range. If frequency offset correction is performed based solely on a single numerically controlled frequency control word, the jitter cannot be eliminated because frequency offset correction is performed based on either the maximum or minimum frequency control word.

[0033] Specifically, comprehensive processing can be performed based on multiple digital control frequency control words, wherein the comprehensive processing includes but is not limited to taking the average, median, maximum and minimum values of multiple digital control frequency control words and averaging them, and correcting the carrier frequency offset in the receiver based on the digital control frequency control words after comprehensive processing. In this embodiment, for each target data packet, carrier frequency offset correction processing can be performed based on multiple digital control frequency control words, so that clutter and jitter can be filtered, and then the carrier frequency offset can be accurately estimated based on multiple digital control frequency control words, thereby fundamentally reducing and correcting the carrier frequency offset of the signal in the receiver and improving the stability of carrier synchronization. In some embodiments, the method further includes: when the loop of the receiver is stable, based on the target data packet captured by the receiver, obtaining multiple digital control frequency control words for the digital control oscillator in the receiver.

[0034] Among them, the target data packet is the data packet captured by the receiver when its own loop is stable. Loop stability indicates that the loop has basically converged at this time. Therefore, starting from the convergence moment, the frequency control words of multiple sampling time points thereafter can be obtained from the target data packet, and then multiple digital control frequency control words can be obtained to ensure that the digital control frequency control words are basically stable after the loop is stabilized.

[0035] Specifically, when the loop of the receiver is stable, multiple digitally controlled frequency control words corresponding to the digitally controlled oscillator in the receiver can be obtained from the target data packet captured by the receiver. It can be understood that when the loop of the receiver is stable, multiple digitally controlled frequency control words are obtained according to the target data packet, which can ensure that the multiple digitally controlled frequency control words are frequency control words for loop convergence, ensure the validity of the digitally controlled frequency words, and by obtaining multiple digitally controlled frequency control words, it is convenient to subsequently perform comprehensive processing on the multiple digitally controlled frequency control words to eliminate the oscillation jitter of the loop and reduce and correct the frequency deviation in the zero intermediate frequency signal.

[0036] It should be noted that when the loop is unstable, indicating that the loop has not converged, the NCO experiences significant oscillations, resulting in inaccurate digital control frequency words in the NCO, making them unusable for frequency correction. Therefore, when the receiver's loop is stable, acquiring multiple digital control frequency words from the NCO based on the target data packet ensures that the multiple digital control frequency words are those required for loop convergence, thus ensuring the validity of the digital control frequency words.

[0037] In some embodiments, obtaining multiple digitally controlled frequency control words of a digitally controlled oscillator in the receiver based on a target data packet captured by the receiver includes: obtaining a loop stabilization moment of the receiver; and obtaining multiple digitally controlled frequency control words of the digitally controlled oscillator in the receiver from the target data packet captured by the receiver based on the loop stabilization moment.

[0038] In some embodiments, the loop stabilization moment includes the moment when the enable indication signal of the receiver is on a rising edge. The enable indication signal is a signal indicating successful data packet capture. If the data packet is successfully captured, even if the enable indication signal is 1, even if the enable indication signal is on a rising edge, it indicates that the loop has basically converged.

[0039] Specifically, when the enable indication signal of the receiver is at the rising edge, multiple digital control frequency control words dds_data corresponding to the digital control oscillator corresponding to M sampling time points are obtained from the target data packet captured by the receiver. i , i∈[1,M], M is an integer greater than 1. It can be understood that in this embodiment, based on the loop stabilization moment, multiple digital control frequency control words are obtained from the target data packet, which can ensure that each digital control frequency control word is basically stable and its effectiveness is ensured.

[0040] In some embodiments, the correcting processing of the carrier frequency deviation in the receiver based on multiple digitally controlled frequency control words includes: determining the voltage-controlled frequency control word of the voltage-controlled oscillator in the receiver based on multiple digitally controlled frequency control words of the digitally controlled oscillator in the receiver; and correcting the carrier frequency deviation in the receiver based on the voltage-controlled frequency control word.

[0041] A voltage-controlled oscillator (VCO) is an analog circuit whose output frequency can be adjusted by changing an input control voltage. The voltage-controlled frequency control word is the frequency control word of the voltage-controlled oscillator.

[0042] Specifically, the electronic device can adjust the voltage-controlled frequency control word of the VCO based on multiple digitally controlled frequency control words, and then perform carrier frequency deviation correction processing based on the voltage-controlled frequency control word. Since loop jitter can be eliminated and the frequency deviation in the carrier signal can be corrected based on multiple digitally controlled frequency control words, the voltage-controlled frequency control word can be determined based on multiple digitally controlled frequency control words, and the voltage-controlled frequency control word that can be generated is suitable. Carrier frequency deviation correction processing can be performed based on the suitable voltage-controlled frequency control word, which can fundamentally correct the frequency deviation between the crystal oscillator and the received signal, increase carrier synchronization stability, and fundamentally correct the clock error caused by the frequency deviation of the crystal oscillator. It can be understood that in this embodiment, the inherent frequency offset of the crystal oscillator in the receiver can be fundamentally corrected based on the frequency control word of the VCO.

[0043] In some embodiments, the correcting processing of the carrier frequency deviation in the receiver based on the voltage-controlled frequency control word includes: performing digital-to-analog conversion processing on the voltage-controlled frequency control word to generate a target analog voltage signal; and correcting the carrier frequency deviation in the receiver based on the target analog voltage signal.

[0044] Specifically, the voltage-controlled frequency word can be input into a digital-to-analog converter (DAC) to convert the digital signal of the voltage-controlled frequency control word into a target analog voltage signal. According to the target analog voltage signal, the frequency of the crystal oscillator is controlled, and the carrier frequency deviation in the receiver is accurately corrected, thereby increasing the stability of carrier synchronization.

[0045] In some embodiments, determining the voltage-controlled frequency control word of the digitally controlled oscillator in the receiver based on multiple digitally controlled frequency control words includes: determining statistical values of multiple digitally controlled frequency control words to obtain a statistical digitally controlled frequency control word; and determining the voltage-controlled frequency control word of the voltage-controlled oscillator in the receiver based on the statistical digitally controlled frequency control word.

[0046] In some embodiments, the statistical value includes an average value. Determining the statistical value of multiple digital control frequency control words may be calculating the average value of multiple digital control frequency control words to obtain the statistical digital control frequency control word. For example, the M digital control frequency control words dds_data in the above target data packet are i For example, count the CNC frequency control word:

[0047]

[0048] Among them, m_dds_data represents the statistical numerical control frequency control word.

[0049] Specifically, by determining the average value m_dds_data of multiple digitally controlled frequency control words, that is, by taking the average value of the voltage-controlled frequency control words valid within a period of time in the data packet, the error caused by short-term fluctuations can be reduced, and a more reliable statistical frequency control word can be obtained, which helps to eliminate short-term oscillations that may occur during the stabilization process, ensuring that the statistical digitally controlled frequency control word is more stable, and determining the voltage-controlled frequency control word of the voltage-controlled oscillator in the receiver based on the stable statistical digitally controlled frequency control word, thereby ensuring the suitability of the generated voltage-controlled frequency control word, thereby increasing the stability of the VCO loop.

[0050] In some embodiments, determining the voltage-controlled frequency control word of the voltage-controlled oscillator in the receiver based on the statistical digitally controlled frequency control word includes: when the target data packet passes verification, determining the voltage-controlled frequency control word of the voltage-controlled oscillator in the receiver based on the statistical digitally controlled frequency control word.

[0051] The target data packet passing the verification indicates that the receiver has successfully received and verified a data packet. In some embodiments, the verification method for the data packet received by the receiver includes a cyclic redundancy check.

[0052] Among them, the Cyclic Redundancy Check (CRC) is used to detect errors that may occur during data transmission or storage. CRC implements error detection by appending a piece of check data (i.e., CRC check code) after the data. Exemplarily, the process of using CRC for data packet verification can be: first, the check bit is generated, that is, based on polynomial division, the data bit stream is regarded as the coefficient of a polynomial, and the sending end and the receiving end agree on a generating polynomial. The sending end divides the data polynomial by the generating polynomial, and the remainder obtained is appended to the data as a check code; then there is the verification process, that is, after the receiving end receives the data, it uses the same generating polynomial to divide the entire data including the check code. If the remainder is zero, it is considered that the data in the data packet is transmitted correctly; if the remainder is not zero, it means that there is an error in the data in the data packet.

[0053] Specifically, if the target data packet passes verification, the voltage-controlled frequency word of the voltage-controlled oscillator in the receiver is determined based on the statistical digital frequency word. This ensures that no errors occurred during data packet transmission, thereby ensuring the accuracy and reliability of the statistical data frequency word used to determine the voltage-controlled frequency word, and thus ensuring the suitability of the voltage-controlled frequency word.

[0054] In some embodiments, if the target data packet fails verification, the data packet is discarded.

[0055] Specifically, the data packets that fail the verification are discarded, and when the receiver loop is stable, multiple digitally controlled frequency control words of the digitally controlled oscillator in the receiver are obtained based on the target data packet captured by the receiver. When the target data packet passes the verification, the carrier frequency deviation in the receiver is corrected based on the multiple digitally controlled frequency control words to ensure that no errors occur in the transmission of the data packet, improve the stability of the multiple digitally controlled frequency control words, and then accurately estimate the carrier frequency deviation based on the multiple digitally controlled frequency control words, thereby fundamentally reducing and correcting the carrier frequency deviation of the signal in the receiver and improving the stability of carrier synchronization.

[0056] In some embodiments, determining the voltage-controlled frequency control word of the digitally controlled oscillator in the receiver based on the statistical digitally controlled frequency control word includes: determining the statistical digitally controlled frequency control words of N data packets participating in this carrier frequency offset correction; the N data packets include the target data packet, and N is an integer greater than 0; and determining the voltage-controlled frequency control word of the voltage-controlled oscillator in the receiver based on the statistical digitally controlled frequency control words of the N data packets.

[0057] The N data packets participating in this carrier frequency offset correction may include a target data packet, that is, the N data packets are N target data packets that have passed verification.

[0058] Specifically, the voltage-controlled frequency control word of the VCO is determined based on the statistical numerical control frequency control word of N data packets. It can be understood that since the voltage-controlled frequency control word of the VCO is determined based on the statistical numerical control frequency control word of at least one data packet, and the statistical numerical control frequency control word can accurately reflect the carrier frequency deviation, the statistical numerical control frequency of N data packets is used for data verification, without setting a threshold value, which is more accurate and does not require prior information. The VCO update period can be adjusted to adaptively adjust the convergence speed and accuracy, ensuring the convergence accuracy and speed of the VCO loop each time the carrier frequency deviation is corrected, and further improving the stability of carrier synchronization.

[0059] In some embodiments, the value of N is determined based on the residual frequency offset at the start of this carrier frequency offset correction, and the residual frequency offset is the statistical numerical control frequency control word corresponding to the first captured data packet among the N data packets.

[0060] The residual frequency offset may be the carrier frequency offset reflected by the NCO, or may be the statistical numerical control frequency word corresponding to the first captured data packet among the N data packets. In some embodiments, the larger the residual frequency offset at the start of the current carrier frequency offset correction, the smaller the value of N. A larger residual frequency offset indicates a larger frequency offset to be corrected. To improve loop convergence speed, fewer data packets are passed, i.e., the smaller the value of N is, thereby ensuring faster VCO loop convergence.

[0061] Specifically, since the number N of data packets participating in this carrier frequency offset correction will affect the convergence speed of the VCO loop, in this embodiment, the number of data packets participating in this carrier frequency offset correction is determined based on the residual frequency offset at the beginning of this carrier frequency offset correction, ensuring the rationality of the value of N, and thus ensuring the rationality of the VCO loop convergence speed.

[0062] In some embodiments, determining the voltage-controlled frequency control word of the voltage-controlled oscillator in the receiver based on the statistical digitally controlled frequency control words of the N data packets includes: determining a frequency control word adjustment amount based on the statistical digitally controlled frequency control words of the N data packets; and determining the voltage-controlled frequency control word of the voltage-controlled oscillator based on the frequency control word adjustment amount and a current voltage-controlled frequency control word of the voltage-controlled oscillator.

[0063] Specifically, a frequency control word adjustment amount can be determined based on the statistical numerical control frequency control words of N data packets. Then, based on the current voltage-controlled frequency control word of the VCO, compensation is performed according to the frequency control word adjustment amount. For example, the current voltage-controlled frequency control word is added to the frequency control word adjustment amount to obtain the voltage-controlled frequency control word of the VCO for the current carrier frequency offset correction. It can be understood that this embodiment, based on the statistical numerical control frequency control words of N data packets, takes into account the impact of multiple data packets on the loop convergence speed, ensuring that the voltage-controlled frequency control word is adaptively adjusted to achieve a faster convergence speed.

[0064] In some embodiments, determining the frequency control word adjustment amount based on the statistical numerical control frequency control words of the N data packets includes: accumulating the statistical numerical control frequency control words of the N data packets and averaging them to obtain an average frequency control word adjustment amount; and obtaining the frequency control word adjustment amount of the voltage-controlled oscillator based on a gain coefficient and the average frequency control word adjustment amount.

[0065] The average frequency control word adjustment amount is the average value obtained by accumulating the statistical numerical control frequency control words of N data packets.

[0066] The gain coefficient is used to increase the average frequency control word adjustment amount, and this gain coefficient is used to control the convergence accuracy of the VCO loop. In some embodiments, the greater the residual frequency offset at the start of the current carrier frequency offset correction, the greater the gain coefficient. A larger residual frequency offset indicates a larger frequency offset that needs to be corrected. A larger value of N, a smaller gain coefficient, and a slower convergence speed, but smaller convergence oscillations. A smaller value of N, a larger gain coefficient, and a faster convergence speed, but larger convergence oscillations.

[0067] When the residual frequency deviation is large, the smaller the N value, the larger the gain coefficient, thereby ensuring the speed and accuracy of VCO loop convergence; when the residual frequency deviation is small, the larger the N value, the smaller the gain coefficient, thereby ensuring the speed and accuracy of VCO loop convergence.

[0068] Specifically, based on the gain coefficient and the average frequency control word adjustment amount, the frequency control word adjustment amount of the voltage controlled oscillator is obtained. The frequency control word adjustment amount ΔVCO for this carrier frequency offset correction can be determined using the following formula: clk :

[0069]

[0070] Among them, m_dds_data j Represents the statistical numerical control frequency control word of the jth data packet, j∈[1,N], j is a natural number, α represents the gain coefficient, Indicates the average frequency control word adjustment amount.

[0071] It can be understood that in this embodiment, the statistical numerical control frequency control words of N data packets are accumulated and averaged to obtain the average frequency control word adjustment amount, which takes into account the influence of the number of data packets participating in this carrier frequency offset correction on the convergence speed. Based on the gain coefficient, the influence of the gain coefficient on the convergence accuracy is taken into account. Based on the gain coefficient and the average frequency control word adjustment amount, the voltage-controlled frequency control word of the NCO is obtained, thereby achieving the simultaneous consideration of the VCO loop convergence accuracy and convergence speed, and then the carrier frequency offset correction based on the voltage-controlled frequency control word can ensure the loop convergence accuracy and convergence speed, and improve the stability of carrier synchronization.

[0072] In a specific embodiment, the voltage-controlled frequency control word VCO can be calculated using the following formula: clk :

[0073] VCO clk =VCO clk _t+ΔVCO clk ;

[0074] Among them, VCO clk _ t Indicates the current voltage-controlled frequency control word.

[0075] In a specific embodiment, for the first carrier frequency offset correction, the number N1 of data packets participating in the first carrier correction can be determined based on the statistical digital control frequency control word m_dds_data1 of the first received data packet. Generally, when carrier correction is not performed, m_dds_data1 is large, that is, the residual frequency offset is large. In order to improve the convergence speed of the VCO loop, N1 can be taken as a smaller value and the gain coefficient can be taken as a larger value, for example, N1=4, α1=2. According to the average of the statistical digital control frequency control words m_dds_data1, m_dds_data2...m_dds_data4 of the first data packet to the fourth data packet, combined with N1 and α1, and the current voltage-controlled frequency control word VCO clk _t1, determine the voltage-controlled frequency control word VCO for the first carrier frequency offset correction clk1; For the second carrier frequency offset correction, the number N2 of data packets participating in the second carrier correction is determined according to the statistical numerical control frequency control word m_dds_data5 corresponding to the first captured data packet after the first carrier frequency offset correction, that is, the fifth data packet. Under normal circumstances, when the first carrier correction is performed, the residual frequency offset will be reduced relative to the residual frequency offset during the previous carrier frequency offset correction, that is, m_dds_data5 is less than m_dds_data1. The value of N2 can be increased and the value of the gain coefficient can be reduced. For example, N2=6, α2=3, and according to the statistical numerical control frequency control words of the fifth to tenth data packets, m_dds_data5, m_dds_data2…m_dds_data 10 The average of N2 and α2, as well as the current voltage control frequency control word VCO clk _t2, determine the voltage-controlled frequency control word VCO for the second carrier frequency offset correction clk 2; According to the adjustment method of the voltage-controlled frequency control word of the first carrier frequency deviation correction and the second carrier frequency deviation correction, the Lth carrier frequency deviation correction is performed until the carrier frequency deviation reaches a smaller range that does not affect communication, thus achieving carrier synchronization. The above carrier frequency deviation correction method can adjust the VCO update period, adaptively adjust the convergence speed and convergence accuracy, and can fundamentally correct the frequency deviation of the crystal oscillator and the received signal, increase the carrier synchronization stability, and also fundamentally correct the clock error caused by the frequency deviation of the crystal oscillator. In a specific embodiment, as Figure 2 As shown in the figure, the flow chart for determining the crystal oscillator frequency is as follows: Step S01, judging whether the loop has converged according to the enable indication signal of the FPGA, for example, judging whether the enable indication signal is on the rising edge; Step S02, calculating the average value of the NCO frequency control word number of the subsequent M sample points from the convergence moment to obtain m_dds_data. The purpose of averaging here is to ensure that the NCO frequency word oscillates and converges around a certain value after stabilization, so the effective frequency word actually fed back to the upper layer needs to adopt the average of the frequency word output value for a period of time after convergence, thereby eliminating oscillation jitter;

[0076] Step S03, after each data packet is received and verified, the dds_data i As a frequency word received successfully, if the verification fails, the frame will be discarded and the new data frame will be waited for to arrive, and S01 and S02 will be repeated;

[0077] Step S04: Generate a suitable VCO control word. First, the convergence result of each received data packet may have a certain degree of jitter due to noise interference, etc. The average of the m_dds_data feedback results of multiple data packets can be taken as a VCO adjustment frequency word.

[0078] Step S05: Generate a VCO control word and send it to the DAC module to generate a corresponding control voltage to control the crystal oscillator frequency.

[0079] In a specific implementation, the above embodiment is used to verify carrier synchronization. The RF module model used in this experiment is AD9361. The receiver includes a DCXO digitally controlled crystal oscillator. The DCXO is constructed by an external crystal and an internal digitally controlled capacitor. The digital control module can linearly adjust the crystal oscillator frequency through a 16-bit digital-to-analog converter (DAC). First, the linear characteristics of the VCO frequency control characteristics (frequency deviation and clock CLK DATA, such as Figure 3 Figure 2 shows the AD9361 crystal oscillator control characteristic curve. The transmitter and receiver use the same crystal oscillator module with a small inherent frequency deviation difference. The receiver's DAC frequency control word is fixed at 38500, and the transmitter dynamically adjusts the control word size. It can be observed that when the control words at the transmitter and receiver are similar, there is almost no frequency deviation in the received signal. As the absolute value of the frequency control word difference between the two ends increases, the signal frequency deviation increases linearly.

[0080] Secondly, the carrier synchronization scheme of this application was deployed on Xilinx zynq Soc, and relevant communication experiments were carried out, giving the uploaded dds_data i The convergence curve of the mean as the number of received packets increases, such as Figure 4 Figure 2 shows the convergence curve of the estimated crystal oscillator frequency deviation as the number of received packets increases. It can be seen that as the number of received packets increases, the absolute value of the estimated inherent frequency difference between the crystal oscillators gradually decreases, and the VCO control loop tends to stabilize.

[0081] The carrier synchronization method of the above-mentioned receiver corrects the carrier frequency deviation in the receiver based on multiple digitally controlled frequency control words of the digitally controlled oscillator in the receiver when the loop of the receiver is stable. Since the frequency control word of the digitally controlled oscillator can reflect the size of the carrier frequency deviation of the receiver, correcting the carrier frequency deviation based on multiple digitally controlled frequency control words can eliminate the frequency jitter of the digitally controlled oscillator, fundamentally reduce and correct the carrier frequency deviation of the signal in the receiver, and improve the stability of carrier synchronization.

[0082] It should be understood that, although the steps in the flowcharts of the above embodiments are shown in sequence as indicated by the arrows, these steps are not necessarily performed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be performed in other orders. Moreover, at least a portion of the steps in the flowcharts of the above embodiments may include multiple steps or multiple stages, and these steps or stages are not necessarily performed at the same time, but can be performed at different times. The execution order of these steps or stages is not necessarily to be performed in sequence, but can be performed in turn or alternately with other steps or at least a portion of steps or stages in other steps.

[0083] Based on the same inventive concept, the present application also provides a receiver system for implementing the carrier synchronization method for a receiver involved in the above-mentioned embodiment in which the electronic device is the execution subject. The implementation solution provided by this receiver system is similar to the implementation solution described in the above-mentioned method. Therefore, the specific limitations in one or more receiver system embodiments provided below can be referred to the limitations of the carrier synchronization method for a receiver involved in the embodiment in which the electronic device is the execution subject, and will not be repeated here.

[0084] In some embodiments, a receiver system is provided, such as Figure 5 FIG. 1 is a schematic diagram of the structure of a receiver system, which can be integrated into an electronic device and includes:

[0085] The digital signal processing module 501 is configured to correct the carrier frequency deviation in the receiver based on a plurality of digitally controlled frequency control words of a digitally controlled oscillator in the receiver when the loop of the receiver is stable.

[0086] The receiver system includes a radio frequency module for directly outputting a zero intermediate frequency signal to a digital signal processing module.

[0087] The digital signal processing module can be a combination of a field programmable gate array (FPGA) and an ARM processor. The digital signal processing module 501 includes a frequency control word processing module and an NCO.

[0088] Specifically, the digital signal processing module is used to correct the carrier frequency deviation in the receiver based on multiple digitally controlled frequency control words corresponding to the digitally controlled oscillator in the receiver when the receiver loop is stable. Since the frequency control word of the digitally controlled oscillator can reflect the size of the carrier frequency deviation of the receiver, correcting the carrier frequency deviation based on multiple digitally controlled frequency control words can eliminate the frequency jitter of the digitally controlled oscillator, fundamentally reduce and correct the carrier frequency deviation of the signal in the receiver, and improve the stability of carrier synchronization.

[0089] In some embodiments, as Figure 5 As shown, the receiver system also includes a digital-to-analog converter 502; the digital signal processing module 501 is used to determine the voltage-controlled frequency control word of the voltage-controlled oscillator in the receiver based on the multiple digitally controlled frequency control words of the digitally controlled oscillator in the receiver, and send the voltage-controlled frequency control word to the digital-to-analog converter; the digital-to-analog converter 502 is used to correct the carrier frequency deviation in the receiver based on the voltage-controlled frequency control word.

[0090] Specifically, the digital signal processing module is used to determine the voltage-controlled frequency control word of the voltage-controlled oscillator in the receiver based on multiple digitally controlled frequency control words, and to send the voltage-controlled frequency control word to the DAC. The DAC is used to correct the carrier frequency deviation in the receiver based on the voltage-controlled frequency control word to achieve carrier synchronization.

[0091] In some embodiments, as Figure 5 As shown, the receiver system includes a voltage-controlled oscillator 503; the digital-to-analog converter 502 is used to perform digital-to-analog conversion on the voltage-controlled frequency control word to generate a target analog voltage signal and send it to the voltage-controlled oscillator 503; the voltage-controlled oscillator 503 is used to correct the carrier frequency deviation in the receiver based on the target analog voltage signal.

[0092] Specifically, the digital-to-analog converter 502 is used to perform digital-to-analog conversion on the voltage-controlled frequency control word to generate a target analog voltage signal and send it to the voltage-controlled oscillator 503. The voltage-controlled oscillator 503 is used to correct the carrier frequency deviation in the receiver based on the target analog voltage signal to achieve carrier synchronization.

[0093] It can be understood that, compared with the VCO solution alone, the NCO solution in the above-mentioned receiver system can better meet the requirements of fast convergence for each data packet, achieve fast convergence of the loop, and will not cause communication packet loss; from a longer-term perspective, compared with the NCO solution alone, the VCO solution can fundamentally correct the crystal oscillator's inherent frequency offset in the receiver, while increasing the carrier synchronization stability of the receiver system and fundamentally solving the clock error problem caused by the crystal oscillator frequency deviation.

[0094] In some embodiments, an electronic device is provided, whose internal structure diagram can be as follows: Figure 6 As shown. The electronic device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. The processor, the memory and the input / output interface are connected via a system bus, and the communication interface, the display unit and the input device are connected to the system bus via the input / output interface. The processor of the electronic device is used to provide computing and control capabilities. The memory of the electronic device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the electronic device is used to exchange information between the processor and an external device. The communication interface of the electronic device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. When the computer program is executed by the processor, a carrier synchronization method of a receiver is implemented.

[0095] Optionally, the electronic device further includes a display unit. The display unit of the electronic device is used to form a visually visible image and can be a display screen, a projection device, or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen. The input device of the electronic device can be a touch layer covering the display screen, a key, trackball, or touchpad provided on the electronic device housing, or an external keyboard, touchpad, or mouse.

[0096] Those skilled in the art will understand that Figure 6 The structure shown in the figure is only a block diagram of a part of the structure related to the scheme of the present application, and does not constitute a limitation on the control device to which the scheme of the present application is applied. The specific control device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0097] Those skilled in the art will appreciate that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, database or other media used in the embodiments provided in this application may include at least one of non-volatile and volatile memory. Non-volatile memory may include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory may include random access memory (RAM) or external cache memory, etc. For purposes of illustration and not limitation, RAM may be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The processors involved in the various embodiments provided herein may be general-purpose processors, central processing units (CPUs), graphics processors (GPUs), digital signal processors (DSPs), programmable logic devices (PLDs), data processing logic devices based on quantum computing, and the like, without limitation thereto.

[0098] Correspondingly, an embodiment of the present application also provides an electronic device, which may be a terminal device or a server.

[0099] like Figure 6 As shown, Figure 6 Schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device 1000 includes a processor 1001 having one or more processing cores, a memory 1002 having one or more computer-readable storage media, and a computer program stored in the memory 1002 and executable on the processor. The processor 1001 is electrically connected to the memory 1002. It will be understood by those skilled in the art that the electronic device structure shown in the figure does not constitute a limitation of the electronic device, and may include more or fewer components than shown, or combine certain components, or arrange the components differently.

[0100] The processor 1001 is the control center of the electronic device 1000. It connects the various parts of the entire electronic device 1000 using various interfaces and lines. By running or loading software programs and / or units stored in the memory 1002 and calling data stored in the memory 1002, it executes various functions of the electronic device 1000 and processes data, thereby monitoring the entire electronic device 1000. The processor 1001 can be a central processing unit (CPU), a graphics processing unit (GPU), a network processor (NP), etc., and can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of this application.

[0101] In an embodiment of the present application, the processor 1001 in the electronic device 1000 loads instructions corresponding to one or more application processes into the memory 1002 according to the following steps, and the processor 1001 runs the application stored in the memory 1002, thereby implementing various functions, for example, correcting the carrier frequency offset in the receiver based on multiple digitally controlled frequency control words of the digitally controlled oscillator in the receiver when the loop of the receiver is stable. The specific implementation of each of the above operations can be found in the previous embodiments and will not be repeated here.

[0102] Alternatively, as Figure 6 As shown, the electronic device 1000 further includes: a touch screen 1003, a radio frequency circuit 1004, an audio circuit 1005, an input unit 1006, and a power supply 1007. Among them, the processor 1001 is electrically connected to the touch screen 1003, the radio frequency circuit 1004, the audio circuit 1005, the input unit 1006, and the power supply 1007 respectively. Those skilled in the art will understand that Figure 6 The electronic device structure shown in the figure does not constitute a limitation to the electronic device, and may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently.

[0103] The touch display screen 1003 can be used to display a graphical user interface and receive user actions on the operation instructions generated by the graphical user interface. The touch display screen 1003 may include a display panel and a touch panel. Among them, the display panel can be used to display the information input by the user or the information provided to the user and various graphical user interfaces of the electronic device, and these graphical user interfaces can be composed of graphics, text, icons, videos and any combination thereof. Optionally, the display panel can be configured in the form of a liquid crystal display (LCD), an organic light emitting diode (OLED), etc. The touch panel can be used to collect the user's touch operation on or near it (such as the user uses any suitable object or accessory such as a finger, a stylus on the touch panel or near the touch panel), and generate corresponding operation instructions, and the operation instructions execute corresponding programs. Optionally, the touch panel may include two parts: a touch detection device and a touch electronic device. Among them, the touch detection device detects the user's touch direction, detects the signal brought by the touch operation, and transmits the signal to the touch electronic device; the touch electronic device receives the touch information from the touch detection device, converts it into the touch point coordinates, and then sends it to the processor 1001, and can receive the command sent by the processor 1001 and execute it. The touch panel can cover the display panel. When the touch panel detects a touch operation on or near it, it is transmitted to the processor 1001 to determine the type of touch event, and then the processor 1001 provides a corresponding visual output on the display panel according to the type of touch event. In an embodiment of the present application, the touch panel and the display panel can be integrated into the touch display screen 1003 to realize the input and output functions. However, in some embodiments, the touch panel and the touch panel can be used as two independent components to realize the input and output functions. That is, the touch display screen 1003 can also be used as part of the input unit 1006 to realize the input function.

[0104] The RF circuit 1004 may be used to transmit and receive RF signals, so as to establish wireless communication with a network device or other electronic devices through wireless communication, and to transmit and receive signals with the network device or other electronic devices.

[0105] The audio circuit 1005 can be used to provide an audio interface between the user and the electronic device through a speaker and microphone. The audio circuit 1005 can convert the received audio data into an electrical signal and transmit it to the speaker, which then converts it into a sound signal for output. On the other hand, the microphone converts the collected sound signal into an electrical signal, which is received by the audio circuit 1005 and converted into audio data. The audio data is then output to the processor 1001 for processing, and then sent to another electronic device through the radio frequency circuit 1004, or the audio data is output to the memory 1002 for further processing. The audio circuit 1005 may also include an earphone jack to provide communication between external headphones and the electronic device.

[0106] The input unit 1006 may be configured to receive input digital, character information, or user feature information (such as fingerprint, iris, or facial information), and generate keyboard, mouse, joystick, optical, or trackball signal input related to user settings and function control.

[0107] The power supply 1007 is used to supply power to the various components of the electronic device 1000. Optionally, the power supply 1007 can be logically connected to the processor 1001 via a power management system, thereby enabling the power management system to manage charging, discharging, and power consumption. The power supply 1007 can also include one or more DC or AC power supplies, a recharging system, a power failure detection circuit, a power converter or inverter, a power status indicator, and other arbitrary components.

[0108] although Figure 6 Not shown in the figure, the electronic device 1000 may further include a camera, a sensor, a wireless fidelity module, a Bluetooth module, etc., which will not be described in detail here.

[0109] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0110] Those skilled in the art will appreciate that all or part of the steps in the various methods of the above embodiments may be accomplished by instructions, or by controlling related hardware through instructions. The instructions may be stored in a computer-readable storage medium and loaded and executed by a processor.

[0111] To this end, an embodiment of the present application provides a computer-readable storage medium storing multiple computer programs. These computer programs can be loaded by a processor to execute any of the receiver carrier synchronization methods provided in the embodiments of the present application. This computer program can execute the following steps of the receiver carrier synchronization method: when the receiver loop is stable, correcting the carrier frequency offset in the receiver based on multiple digitally controlled frequency control words of a digitally controlled oscillator in the receiver. The specific implementation of each of the above operations can be found in the previous embodiments and will not be repeated here.

[0112] The computer-readable storage medium may include a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0113] Since the computer program stored in the computer-readable storage medium can execute the carrier synchronization method of any receiver provided in the embodiments of the present application, the beneficial effects that can be achieved by the carrier synchronization method of any receiver provided in the embodiments of the present application can be achieved. Please refer to the previous embodiments for details and will not be repeated here.

[0114] According to one aspect of the present application, a computer program product or computer program is also provided, the computer program product or computer program including computer instructions stored in a computer-readable storage medium. A processor of an electronic device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the electronic device to perform the methods provided in various optional implementations of the above embodiments.

[0115] According to one aspect of this application, Figure 7 As shown, a vehicle 10 is also provided, which includes the above electronic device and / or receiver system. The vehicle has all the beneficial effects of the above electronic device, etc., which will not be described in detail in this application.

[0116] The vehicle may be a fuel vehicle, a plug-in hybrid vehicle or a new energy vehicle, etc., and this application does not make any specific restrictions on this.

[0117] In the above-described embodiments of the receiver system, computer-readable storage medium, electronic device, and computer program product, the descriptions of each embodiment have different focuses. For portions not described in detail in a particular embodiment, reference can be made to the relevant descriptions of other embodiments. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific operating processes and beneficial effects of the above-described receiver system, computer-readable storage medium, computer program product, electronic device, and their corresponding units can be referred to in the description of the receiver carrier synchronization method in the above embodiments, and the details will not be repeated here.

[0118] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0119] The above are only preferred embodiments of the present application and do not constitute any form of limitation to the present application. Although the descriptions of each embodiment in the embodiments of the present application have different focuses, for parts that are not described in detail in a certain embodiment, please refer to the relevant embodiments of other embodiments. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A carrier synchronization method for a receiver, characterized in that: The method comprises: When the loop of the receiver is stable, the carrier frequency deviation in the receiver is corrected based on a plurality of digitally controlled frequency control words of a digitally controlled oscillator in the receiver.

2. The method according to claim 1, characterized in that Also includes: When a loop of the receiver is stable, a plurality of digitally controlled frequency control words of a digitally controlled oscillator in the receiver are acquired based on a target data packet captured by the receiver.

3. The method according to claim 2, characterized in that The acquiring, based on the target data packet captured by the receiver, a plurality of digitally controlled frequency control words of a digitally controlled oscillator in the receiver, comprises: Obtaining a loop stabilization moment of the receiver; Based on the loop stabilization moment, a plurality of digitally controlled frequency control words of a digitally controlled oscillator in the receiver are obtained from a target data packet captured by the receiver.

4. The method according to claim 3, characterized in that The loop stabilization moment includes: the moment when the enable indication signal of the receiver is at a rising edge.

5. The method according to claim 1, wherein The correcting process of the carrier frequency offset in the receiver based on the multiple digitally controlled frequency control words of the digitally controlled oscillator in the receiver includes: Determining a voltage-controlled frequency control word of a voltage-controlled oscillator in the receiver based on a plurality of the digitally controlled frequency control words; The carrier frequency offset in the receiver is corrected based on the voltage-controlled frequency control word.

6. The method according to claim 5, characterized in that The correcting the carrier frequency offset in the receiver based on the voltage-controlled frequency control word includes: Performing digital-to-analog conversion on the voltage-controlled frequency control word to generate a target analog voltage signal; A carrier frequency offset correction process is performed on the receiver based on the target analog voltage signal.

7. The method according to claim 5, characterized in that The determining, based on the plurality of digitally controlled frequency control words, a voltage-controlled frequency control word of a digitally controlled oscillator in the receiver comprises: Determining statistical values of a plurality of the numerical control frequency control words to obtain a statistical numerical control frequency control word; A voltage-controlled frequency control word of a voltage-controlled oscillator in the receiver is determined based on the statistical digitally controlled frequency control word.

8. The method according to claim 7, characterized in that The statistical values include average values.

9. The method according to claim 7, characterized in that Determining a voltage-controlled frequency control word of a voltage-controlled oscillator in the receiver based on the statistical digitally controlled frequency control word includes: In a case where the target data packet passes verification, a voltage-controlled frequency control word of a voltage-controlled oscillator in the receiver is determined based on the statistical digitally controlled frequency control word.

10. The method according to claim 9, characterized in that The verification method for the data packets received by the receiver includes a cyclic redundancy check.

11. The method according to claim 9, characterized in that Also includes: If the target data packet fails verification, the data packet is discarded.

12. The method according to claim 9, characterized in that Determining a voltage-controlled frequency control word of a digitally controlled oscillator in the receiver based on the statistical digitally controlled frequency control word includes: Determining statistical numerical control frequency control words of N data packets participating in this carrier frequency offset correction; the N data packets include the target data packet, and N is an integer greater than 0; Based on the statistical digitally controlled frequency control words of the N data packets, a voltage-controlled frequency control word of a voltage-controlled oscillator in the receiver is determined.

13. The method according to claim 12, characterized in that The value of N is determined based on the residual frequency offset at the start of this carrier frequency offset correction, where the residual frequency offset is the statistical numerical control frequency control word corresponding to the first captured data packet among the N data packets.

14. The method according to claim 13, characterized in that The larger the residual frequency offset at the start of the current carrier frequency offset correction, the smaller the value of N.

15. The method according to claim 13, characterized in that The determining the voltage-controlled frequency control word of the voltage-controlled oscillator in the receiver based on the statistical numerically controlled frequency control words of the N data packets includes: Determining a frequency control word adjustment amount based on the statistical numerically controlled frequency control words of the N data packets; The voltage-controlled frequency control word of the voltage-controlled oscillator is determined based on the frequency control word adjustment amount and the current voltage-controlled frequency control word of the voltage-controlled oscillator.

16. The method according to claim 15, characterized in that The determining the frequency control word adjustment amount based on the statistical numerical control frequency control words of the N data packets includes: Accumulating the statistical numerical control frequency control words of the N data packets and averaging them to obtain an average frequency control word adjustment value; The frequency control word adjustment amount of the voltage controlled oscillator is obtained based on the gain coefficient and the average frequency control word adjustment amount.

17. The method according to claim 16, characterized in that The larger the residual frequency offset at the start of the current carrier frequency offset correction, the larger the gain coefficient.

18. A receiver system, characterized in that: include: The digital signal processing module is used to correct the carrier frequency deviation in the receiver based on multiple digitally controlled frequency control words of the digitally controlled oscillator in the receiver when the loop of the receiver is stable.

19. The receiver system according to claim 18, wherein The receiver system also includes a digital-to-analog converter; The digital signal processing module is configured to determine a voltage-controlled frequency control word of a voltage-controlled oscillator in the receiver based on a plurality of digitally controlled frequency control words of the digitally controlled oscillator in the receiver, and send the voltage-controlled frequency control word to the digital-to-analog converter; The digital-to-analog converter is used to correct the carrier frequency offset in the receiver based on the voltage-controlled frequency control word.

20. The receiver system according to claim 19, wherein The receiver system further includes a voltage controlled oscillator; The digital-to-analog converter is used to perform digital-to-analog conversion on the voltage-controlled frequency control word to generate a target analog voltage signal and send it to the voltage-controlled oscillator; The voltage-controlled oscillator is used to correct the carrier frequency offset in the receiver based on the target analog voltage signal.

21. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the carrier synchronization method of the receiver according to any one of claims 1 to 17 is implemented.

22. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the carrier synchronization method of the receiver according to any one of claims 1 to 17 is implemented.

23. An electronic device, characterized in that: include: a memory having a computer program stored thereon; A processor, configured to execute the computer program in the memory to implement the carrier synchronization method for a receiver as described in any one of claims 1 to 17.

24. A vehicle, characterized in that: Comprising the electronic device according to claim 23 and / or the receiver system according to claim 18.

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