Laminated battery and manufacturing method thereof

Abstract

The embodiments of the present disclosure relate to the photovoltaic field and provide a stacked cell and a method for manufacturing the same, wherein the stacked cell may include: a bottom cell, a composite layer, and a perovskite top cell stacked in sequence along a preset direction; the bottom cell includes: a substrate, the substrate includes a relative front and back surface; a doped conductive layer, the doped conductive layer is located on the front or back surface of the substrate; a passivation stack structure, the passivation stack structure covers the surface of the doped conductive layer, the passivation stack structure includes: a plurality of field passivation portions arranged at intervals, the field passivation portions cover part of the surface of the doped conductive layer, and a chemical passivation portion, the chemical passivation portion covers the field passivation portion and the surface of the doped conductive layer not covered by the field passivation portion, which can improve the photoelectric conversion efficiency of the stacked cell.

Description

Technical Field

[0001] The present disclosure relates to the photovoltaic field, and in particular to a laminated battery and a manufacturing method thereof. Background Art

[0002] With the gradual depletion of fossil fuels, solar cells are becoming increasingly popular as a new energy alternative. Solar cells convert sunlight into electricity. They utilize the photovoltaic principle to generate charge carriers, which are then extracted using electrodes, facilitating the efficient use of electrical energy.

[0003] Current solar cells primarily include single-layer cells, such as IBC cells (Interdigitated Back Contact), TOPCON (Tunnel Oxide Passivated Contact), PERC cells (Passivated Emitter and Real Cell), HIT / HJT cells (Heterojunction Technology), and perovskite cells. By employing different film layer configurations and functional limitations, these technologies reduce optical losses and lower the recombination of photogenerated carriers on the silicon substrate surface and within the silicon substrate, thereby improving the photoelectric conversion efficiency of solar cells.

[0004] Research has discovered that perovskite cells are translucent, meaning that photons can pass through them. This means that photovoltaic cells can be added beneath the perovskite cells, thereby surpassing the efficiency limit of a single junction through "stacking." This is known as a tandem cell. The principle of a tandem cell is that a wide-bandgap top cell absorbs high-energy photons, while a narrow-bandgap bottom cell improves photon utilization. The combination of these two can break through the theoretical efficiency limit of a single-junction cell and open up the conversion efficiency ceiling. However, further improvements in the photoelectric conversion efficiency of tandem cells are currently needed. Summary of the Invention

[0005] The embodiments of the present disclosure provide a stacked cell and a method for manufacturing the same, which can at least improve the photoelectric conversion efficiency of the stacked cell.

[0006] According to some embodiments of the present disclosure, on the one hand, the embodiments of the present disclosure provide a stacked battery, comprising: a bottom battery, a composite layer and a perovskite top battery stacked in sequence along a preset direction; the bottom battery comprises: a substrate, the substrate comprising a relative front and back sides; a doped conductive layer, the doped conductive layer being located on the front side or the back side of the substrate; a passivation stacking structure, the passivation stacking structure covering the surface of the doped conductive layer, the passivation stacking structure comprising: a plurality of field passivation portions arranged at intervals, the field passivation portions covering part of the surface of the doped conductive layer, and a chemical passivation portion, the chemical passivation portion covering the field passivation portion and the surface of the doped conductive layer not covered by the field passivation portion.

[0007] In some embodiments, a ratio of an area of ​​an orthographic projection of the field passivation portion on a surface of the doped conductive layer to an area of ​​a surface of the doped conductive layer facing the field passivation portion is 0.2-0.8.

[0008] In some embodiments, a distance between two adjacent field passivation portions is 20 nm to 10 μm.

[0009] In some embodiments, the doped conductive layer is located on the back side, and the stacked battery further includes: a back electrode, which is located on the side of the bottom battery away from the perovskite top battery and is electrically connected to the doped conductive layer, and the orthographic projection of the back electrode on the substrate surface is misaligned with the orthographic projection of the field passivation portion on the substrate surface.

[0010] In some embodiments, the doped conductive layer is located on the front side, and the bottom battery further includes: a second doped conductive layer, the second doped conductive layer covers the back side of the substrate; a second passivation stack structure, the second passivation stack structure includes: a second field passivation portion, the second field passivation portion covers a portion of the surface of the second doped conductive layer, and a second chemical passivation portion, the second chemical passivation portion covers the surface of the second field passivation portion and the surface of the second doped conductive layer not covered by the second field passivation portion.

[0011] In some embodiments, an orthographic projection of the field passivation portion on the substrate surface is offset from an orthographic projection of the second field passivation portion on the substrate surface.

[0012] In some embodiments, the stacked cell further includes: a back electrode, the back electrode being located on a side of the bottom cell away from the perovskite top cell, being electrically connected to the bottom cell, and the orthographic projection of the back electrode on the substrate surface being misaligned with the orthographic projection of the second field passivation portion on the substrate surface.

[0013] In some embodiments, the field passivation portion and the second field passivation portion are made of the same material, that is, metal oxide.

[0014] In some embodiments, the stacked cell further includes: a back electrode, the back electrode being located on a side of the bottom cell away from the perovskite top cell, being electrically connected to the bottom cell, and the orthographic projection of the back electrode on the substrate surface being misaligned with the orthographic projection of the second field passivation portion on the substrate surface.

[0015] In some embodiments, the material of the chemical passivation portion includes: a self-assembled monomolecular material.

[0016] In some embodiments, the self-assembled monomolecular material includes one or more of [2-(9H-carbazol-9-yl)ethyl]phosphonic acid, [4-(9H-carbazol-9-yl)butyl]phosphonic acid, or [4-(3,6-dimethyl-9H-carbazol-9-yl)butyl]phosphonic acid.

[0017] In some embodiments, the material of the doped conductive layer includes doped polysilicon or doped amorphous silicon.

[0018] According to some embodiments of the present disclosure, on the other hand, the embodiments of the present disclosure further provide a method for manufacturing a stacked battery, including: forming a bottom battery, the bottom battery including: a substrate, the substrate including relative front and back sides; a doped conductive layer, the doped conductive layer being located on the front side or the back side of the substrate; a passivation stacking structure, the passivation stacking structure covering the surface of the doped conductive layer, the passivation stacking structure including: a plurality of field passivation portions arranged at intervals, the field passivation portions covering part of the surface of the doped conductive layer, and a chemical passivation portion, the chemical passivation portion covering the field passivation portion and the surface of the doped conductive layer not covered by the field passivation portion; forming a composite layer, the composite layer being located on the surface of the bottom battery; forming a perovskite top battery, the perovskite top battery being located on the surface of the composite layer away from the bottom battery.

[0019] The technical solution provided by the embodiments of the present disclosure has at least the following advantages: a passivation stacking structure is formed on the surface of the doped conductive layer in the bottom battery to complete the passivation of the doped conductive layer while improving the carrier transmission speed, wherein the field passivation part in the passivation stacking structure only covers part of the surface of the doped conductive layer, providing contact space for the chemical passivation part and the doped conductive layer, the passivation effect of the field passivation part is better, and the carrier transmission performance of the chemical passivation part is better. In this way, the passivation of the doped conductive layer can be completed while improving the carrier transmission efficiency, and the performance of the stacked battery can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] One or more embodiments are exemplarily illustrated by the pictures in the corresponding drawings. These exemplified descriptions do not constitute a limitation on the embodiments. Unless otherwise stated, the pictures in the drawings do not constitute a scale limitation. In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the traditional technology, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0021] Figure 1 A schematic structural diagram of a stacked battery provided in one embodiment of the present disclosure;

[0022] Figure 2 A schematic structural diagram of a second laminated battery provided in one embodiment of the present disclosure;

[0023] Figure 3 A schematic structural diagram of a third laminate battery provided in one embodiment of the present disclosure;

[0024] Figure 4 A schematic structural diagram of a fourth laminated battery is provided for one embodiment of the present disclosure;

[0025] Figure 5 A schematic structural diagram of a fifth laminated battery provided in one embodiment of the present disclosure;

[0026] Figure 6 A schematic structural diagram of a sixth laminated battery is provided for one embodiment of the present disclosure;

[0027] Figure 7 A flow chart of a method for manufacturing a stacked battery is provided according to an embodiment of the present disclosure.

[0028] Description of reference numerals:

[0029] 100, bottom cell; 101, composite layer; 102, perovskite top cell; 110, substrate; 120, front; 130, back; 140, doped conductive layer; 150, passivation stack structure; 1501, field passivation part; 1502, chemical passivation part; 160, tunneling layer; 170, second doped conductive layer; 180, passivation layer; 112, first transport layer; 122, perovskite layer; 132, second transport layer; 142, third transport layer; 152, transparent conductive layer; 103, back electrode; 104, front electrode; 1601, intrinsic amorphous silicon layer; 190, second intrinsic amorphous silicon layer; 191, second transparent conductive layer.

[0030] 200, bottom cell; 201, composite layer; 202, perovskite top cell; 210, substrate; 220, front side; 230, back side; 240, doped conductive layer; 250, passivation stack structure; 2501, field passivation part; 2502, chemical passivation part; 260, tunneling layer; 270, second doped conductive layer; 280, passivation layer; 212, first transport layer; 222, perovskite layer; 232, second transport layer; 242, third transport layer; 252, transparent conductive layer; 203, back electrode; 204, front electrode; 2601, intrinsic amorphous silicon layer; 290, second intrinsic amorphous silicon layer; 291, second transparent conductive layer.

[0031] 300, bottom cell; 301, composite layer; 302, perovskite top cell; 310, substrate; 320, front side; 330, back side; 340, doped conductive layer; 350, passivation stack structure; 3501, field passivation part; 3502, chemical passivation part; 360, tunneling layer; 370, second doped conductive layer; 380, passivation layer; 312, first transport layer; 322, perovskite layer; 332, second transport layer; 342, third transport layer; 352, transparent conductive layer; 303, back electrode; 304, front electrode; 3601, intrinsic amorphous silicon layer; 390, second intrinsic amorphous silicon layer; 391, second transparent conductive layer; 305, second passivation stack structure; 315, second field passivation part; 325, second chemical passivation part. DETAILED DESCRIPTION

[0032] As can be seen from the background art, the current voltage opening of tandem cells restricts the improvement of the photoelectric conversion efficiency of the tandem cells.

[0033] The embodiment of the present disclosure forms a passivation stack structure on the surface of the doped conductive layer in the bottom battery to complete the passivation of the doped conductive layer while improving the carrier transmission speed, wherein the field passivation part in the passivation stack structure only covers part of the surface of the doped conductive layer, providing contact space for the chemical passivation part and the doped conductive layer. The field passivation part has a better passivation effect and the chemical passivation part has a better carrier transmission performance. In this way, the passivation of the doped conductive layer can be completed while improving the carrier transmission efficiency, the opening voltage of the stack battery can be increased, and thus the photoelectric conversion efficiency of the stack battery can be improved.

[0034] In the description of the embodiments of the present disclosure, technical terms such as "first" and "second" are used solely to distinguish between different objects and should not be understood to indicate or imply relative importance or to implicitly specify the quantity, specific order, or primary and secondary relationship of the technical features indicated. In the description of the embodiments of the present disclosure, "plurality" means more than two, unless otherwise specifically defined.

[0035] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present disclosure. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0036] In the description of the embodiments of the present disclosure, the term "and / or" is merely a description of an association relationship between associated objects, indicating that three relationships may exist. For example, A and / or B can represent the following three situations: A exists, A and B exist at the same time, and B exists. In addition, the character " / " in this document generally indicates that the associated objects are in an "or" relationship.

[0037] In the description of the embodiments of the present disclosure, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0038] In the description of the embodiments of the present disclosure, the technical terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be understood as limiting the embodiments of the present disclosure.

[0039] In the description of the embodiments of the present disclosure, unless otherwise expressly specified or limited, technical terms such as "installed," "connected," "connected," and "fixed" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integration; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and they can refer to internal connectivity between two components or interaction between two components. Those skilled in the art can understand the specific meanings of the above terms in the embodiments of the present disclosure based on specific circumstances.

[0040] In the accompanying drawings corresponding to the embodiments of the present disclosure, the thickness and area of ​​layers are exaggerated for better understanding and ease of description. When a component (such as a layer, film, region, or substrate) is described as being on or on the surface of another component, the component may be "directly" located on the surface of the other component, or a third component may be present between the two components. Conversely, when a component is described as being on the surface of another component, or as being formed or disposed on the surface of one component, it indicates that there is no third component between the two components. Furthermore, when a component is described as being "substantially" formed on another component, this means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a portion of the edge of the entire surface.

[0041] In the description of the embodiments of the present disclosure, when a component is referred to as "including" another component, unless otherwise specified, this does not exclude other components, and other components may further be included. Furthermore, when a component such as a layer, film, region, or plate is referred to as being "on" another component, it may be "directly on" the other component (i.e., located on the surface of the other component with no other components between them) or another component may be present between them. Furthermore, when a component such as a layer, film, region, or plate is referred to as being "directly on" another component, or when a component such as a layer, film, region, or plate is located on the surface of another component, this means that no other components are located between them.

[0042] The terms used herein in the description of the various embodiments are intended only to describe the specific embodiments and are not intended to be limiting. As used in the description of the various embodiments and the appended claims, "the component" is intended to include the plural form unless the context clearly indicates otherwise. A component includes a layer, film, region, or plate.

[0043] The following describes various embodiments of the present disclosure in detail with reference to the accompanying drawings. However, those skilled in the art will appreciate that many technical details are provided in the various embodiments of the present disclosure to facilitate a better understanding of the present disclosure. However, even without these technical details and the various variations and modifications based on the following embodiments, the technical solutions claimed in the present disclosure can still be implemented.

[0044] refer to Figure 1 and Figure 2 , Figure 1 This is a schematic structural diagram of a stacked battery provided in one embodiment of the present disclosure. Figure 2 A schematic structural diagram of a second laminate battery provided in one embodiment of the present disclosure.

[0045] In some embodiments, the stacked cell may include: a bottom cell 100 , a composite layer 101 , and a perovskite top cell 102 stacked in sequence along a preset direction.

[0046] Among them, the bottom cell 100 may include: a substrate 110, the substrate 110 includes a front side 120 and a back side 130 relative to each other; a doped conductive layer 140, the doped conductive layer 140 is located on the front side 120 and / or the back side 130 of the substrate 110; a passivation stack structure 150, the passivation stack structure 150 covers the surface of the doped conductive layer 140, and the passivation stack structure 150 includes: a plurality of field passivation portions 1501 arranged at intervals, the field passivation portions 1501 cover a portion of the surface of the doped conductive layer 140, and a chemical passivation portion 1502, the chemical passivation portion 1502 covers the field passivation portion 1501 and the surface of the doped conductive layer 140 not covered by the field passivation portion 1501.

[0047] In the embodiment of the present disclosure, a passivation stack structure 150 is formed on the surface of the doped conductive layer 140 in the bottom battery 100 to passivate the doped conductive layer 140 while improving the carrier transmission speed. The field passivation portion 1501 in the passivation stack structure 150 only covers a portion of the surface of the doped conductive layer 140, providing contact space between the chemical passivation portion 1502 and the doped conductive layer 140. The field passivation portion 1501 has a better passivation effect, and the chemical passivation portion 1502 has a better carrier transmission performance. In this way, the passivation of the doped conductive layer 140 can be completed while improving the carrier transmission efficiency, and the opening voltage of the stacked battery can be increased, thereby improving the photoelectric conversion efficiency of the stacked battery.

[0048] In some embodiments, the bottom cell 100 can be any one of a PERC cell (Passivated Emitter and Rear Cell), a PERT cell (Passivated Emitter and Rear Totally-diffused cell), a TOPCon cell (Tunnel Oxide Passivated Contact), a HIT / HJT cell (Heterojunction with Intrinsic Thin layer / Heterojunction Technology), or a BC cell (Back Contact).

[0049] The following description is made by taking the bottom cell 100 as a TOPCon cell as an example. It should be noted that when the bottom cell 100 is a cell of another type, other structures of the bottom cell 100 may be adjusted accordingly.

[0050] refer to Figure 1The doped conductive layer 140 is located on the front side 120 , and the bottom battery 100 may further include: a tunneling layer 160 , the tunneling layer 160 is between the front side 120 of the substrate 110 ; a second doped conductive layer 170 , the second doped conductive layer 170 is located on the back side 130 ; and a passivation layer 180 is located on the surface of the second doped conductive layer 170 away from the substrate 110 .

[0051] The front surface 120 and the back surface 130 of the substrate 110 can both serve as light-receiving surfaces for receiving incident light. The front surface 120 and the back surface 130 of the substrate 110 can also have a suede structure to increase light reflection and improve light utilization.

[0052] In some embodiments, the process of forming the substrate 110 may include providing an initial substrate 110 , and placing the initial substrate 110 in an alkaline solution for etching and cleaning to obtain the substrate 110 .

[0053] The tunneling layer 160 can passivate the substrate 110. Due to the presence of interface state defects at the interface between the substrate 110 and the tunneling layer 160, the interface state density on the back surface 130 of the substrate 110 is relatively high. The increase in the interface state density promotes the recombination of photogenerated carriers, reducing the fill factor, short-circuit current, and open-circuit voltage of the solar cell, thereby reducing the photoelectric conversion efficiency of the solar cell. The tunneling layer 160 is positioned on the surface of the substrate 110 so that the tunneling layer 160 chemically passivates the surface of the substrate 110. Specifically, by saturating the dangling bonds of the substrate 110, the defect state density of the substrate 110 is reduced, and the number of recombination centers in the substrate 110 is reduced, thereby reducing the carrier recombination rate, thereby improving the fill factor, short-circuit current, and open-circuit voltage of the solar cell, and improving the photoelectric conversion efficiency of the solar cell.

[0054] The material of the tunneling layer 160 may include at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, or magnesium fluoride.

[0055] The doped conductive layer 140 can also play a field passivation role, forming an electrostatic field on the surface of the substrate 110 pointing to the interior of the substrate 110, causing minority carriers to escape from the interface, thereby reducing the minority carrier concentration and reducing the carrier recombination rate at the interface of the substrate 110, thereby increasing the open circuit voltage, short circuit current and fill factor of the solar cell, and improving the photoelectric conversion efficiency of the solar cell.

[0056] In some embodiments, the material of doped conductive layer 140 includes doped polysilicon. When bottom cell 100 is a TOPCON cell, the material of doped conductive layer 140 can be doped polysilicon. Doped polysilicon layer is used to achieve selective passivation contact. Doped polysilicon is also compatible with high-temperature processes and can meet lateral conductivity requirements under high-temperature processes.

[0057] The method of forming the doped conductive layer 140 may include: depositing intrinsic polysilicon by PECVD (chemical vapor deposition), and then converting the intrinsic polysilicon into doped polysilicon by doping.

[0058] The passivation stack structure 150 covers the entire surface of the doped conductive layer 140 , thereby performing a passivation function.

[0059] In some embodiments, the ratio of the area of ​​the orthographic projection of the field passivation portion 1501 on the surface of the doped conductive layer 140 to the area of ​​the surface of the doped conductive layer 140 facing the field passivation portion 1501 is 0.2-0.8, for example, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7 or 0.8. In other words, the surface area of ​​the doped conductive layer 140 covered by the field passivation portion 1501 accounts for 20%-80% of the surface area of ​​the doped conductive layer 140, and the doped conductive layer 140 covered by the field passivation portion 1501 accounts for 20%-80% of the surface area of ​​the doped conductive layer 140. The larger the surface area, the better the passivation effect on the doped conductive layer 140. At the same time, if the surface area of ​​the doped conductive layer 140 covered by the field passivation portion 1501 is too large, a larger carrier recombination will be generated between the doped conductive layer 140 and the field passivation portion 1501. Therefore, the surface area of ​​the doped conductive layer 140 covered by the field passivation portion 1501 is set to 20%~80% of the surface area of ​​the doped conductive layer 140. This can passivate the doped conductive layer 140 while avoiding the negative impact of the field passivation portion 1501.

[0060] In some embodiments, the spacing between two adjacent field passivation portions 1501 is 20 nm to 10 μm, for example, 20 nm, 1 μm, 2 μm, 4 μm, 5 μm, 7 μm, 9 μm, or 10 μm. If the spacing between two adjacent field passivation portions 1501 is too small, the manufacturing process of the stacked battery will be more difficult. In addition, the field passivation effects of the two adjacent field passivation portions 1501 may interfere with each other, resulting in a reduction in the field passivation effect. Therefore, the spacing between two adjacent field passivation portions 1501 is greater than 20 nm. If the spacing between two adjacent field passivation portions 1501 is too large, the area covered by the field passivation portion 1501 on the surface of the doped conductive layer 140 is too small, resulting in poor passivation effect. Therefore, the spacing between two adjacent field passivation portions 1501 is less than 10 μm.

[0061] In some embodiments, the thickness of the field passivation portion 1501 is 1 nm to 10 nm, for example, 1 nm, 2 nm, 4 nm, 5 nm, 7 nm, 9 nm, or 10 nm. If the thickness of the field passivation portion 1501 is too thin, the ability of the field passivation portion 1501 to improve the passivation effect will be poor. If the thickness of the field passivation portion 1501 is too thick, it will affect the transmission of carriers. Therefore, setting the thickness of the field passivation portion 1501 to 1 nm is to avoid affecting the efficiency of carrier transmission while taking into account the passivation effect of the field passivation portion 1501.

[0062] In some embodiments, the chemical passivation portion 1502 is directly in contact and electrically connected with the surface of the doped conductive layer 140 so as to transfer the carriers in the doped conductive layer 140 to the composite layer 101 through the chemical passivation portion 1502. The chemical passivation portion 1502 also covers the side walls of the field passivation portion 1501 to form a passivation stack structure 150 together with the field passivation portion 1501, thereby facilitating the subsequent formation of the composite layer 101.

[0063] In some embodiments, the material of the chemical passivation portion 1502 includes a self-assembled monomolecular material. The self-assembled monomolecular material can modify the composite layer 101, reducing the interface state difference between the passivation stack structure and the composite layer 101, thereby improving the carrier transmission efficiency between the passivation stack structure and the composite layer 101. Furthermore, the placement of the chemical passivation portion 1502 between the composite layer 101 and the field passivation portion 1501 can also improve the problem of decreased transmission rate caused by the reduced contact area between the doped conductive layer 140 and the composite layer 101 due to the placement of the field passivation portion 1501.

[0064] It can be understood that in the related art, the composite layer 101 directly covers the surface of the doped conductive layer 140, and the contact interface is the entire surface of the doped conductive layer 140. After the field passivation part 1501 is set, if the composite layer 101 is directly set, the contact area between the composite layer 101 and the doped conductive layer 140 will be reduced. Therefore, a chemical passivation part 1502 is also provided to extract the doped ions in the doped conductive layer 140 through the chemical passivation part 1502, and then transfer them to the composite layer 101, which can also facilitate the transmission of carriers.

[0065] In some embodiments, the self-assembled monomolecular material includes one or more of [2-(9H-carbazol-9-yl)ethyl]phosphonic acid, [4-(9H-carbazol-9-yl)butyl]phosphonic acid, or [4-(3,6-dimethyl-9H-carbazol-9-yl)butyl]phosphonic acid. It is understood that when the doping element in the doped conductive layer 140 is a P-type ion, the self-assembled monomolecular material is configured to be compatible with the doping element in the doped conductive layer 140 to prevent carrier recombination within the chemical passivation portion 1502.

[0066] In some embodiments, the material of the chemical passivation part 1502 may also include fullerene, naphthaleneimide or phenyl, etc. When the doping element in the doped conductive layer 140 is an N-type ion, the material of the chemical passivation part 1502 is set to be fullerene, naphthaleneimide or phenyl, etc., so that the material of the chemical passivation part 1502 can be adapted to the doping element in the doped conductive layer 140 to avoid carrier recombination in the chemical passivation part 1502.

[0067] Forming the passivation stack structure 150 may include: forming a plurality of spaced-apart field passivation portions 1501 by atomic layer deposition, and forming a chemical passivation portion 1502 by spin coating.

[0068] In some embodiments, the thickness of the chemical passivation portion 1502 may be 0.1 nm to 20 nm. If the thickness of the chemical passivation portion 1502 is less than 0.1 nm, holes or depressions may form in the chemical passivation portion 1502, resulting in reduced reliability and passivation effect of the chemical passivation portion 1502. If the thickness of the chemical passivation portion 1502 is greater than 20 nm, carrier transport may be affected.

[0069] In some embodiments, the composite layer 101 includes a transparent conductive oxide (TCO) to provide lateral conductivity and transmit light, such as indium tin oxide (ITO), hydrogenated indium oxide (IO:H), or zinc oxide (ZnO).

[0070] In some embodiments, the composite layer 101 can be formed by magnetron sputtering, wherein magnetron sputtering includes: bombarding the surface of the target material with high-speed particles under the control of a magnetic field, so that atoms or molecules on the surface of the target material are sputtered out to form the composite layer 101. The thickness of the formed composite layer 101 can be 10nm~50nm.

[0071] The perovskite top cell 102 may include: a first transmission layer 112 , a perovskite layer 122 , a second transmission layer 132 , a third transmission layer 142 , and a transparent conductive layer 152 , which are stacked.

[0072] The first transport layer 112 may be a hole transport layer, and the material of the first transport layer 112 may be poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA), 2,2',7,7'-tetrakis[N,N-di(4-methoxyphenyl)amino]-9,9'-spirobifluorene (Spiro-OMeTAD), nickel oxide (NiO x ) or cuprous thiocyanate (CuSCN) and other materials.

[0073] The first transmission layer 112 may be formed by a spin coating process, and the thickness of the first transmission layer 112 may be 5 nm to 15 nm.

[0074] The prepared perovskite precursor solution is spin-coated on the surface of the first transmission layer 112 by spin coating, extracted with ethyl acetate, and then annealed at 100° C. to 140° C. for 10 min to 20 min to obtain the perovskite layer 122 . The thickness of the perovskite layer 122 can be 700 nm to 900 nm.

[0075] The second transport layer 132 and the third transport layer 142 may be electron transport layers, and the electron transport layers may be made of materials such as tin oxide SnOx, titanium dioxide TiO2, fullerenes including C60 and PCBM, and their derivatives.

[0076] In some embodiments, the material of the second transmission layer 132 is C60, and the method of forming the second transmission layer 132 may include: thermal evaporation, which refers to depositing C60 molecules onto the surface of the perovskite layer 122 by thermal evaporation to form the second transmission layer 132. The thickness of the formed second transmission layer 132 is 10nm~20nm.

[0077] The material of the third transmission layer 142 is tin oxide. The third transmission layer 142 can be formed by atomic layer deposition. The thickness of the third transmission layer 142 can be 10 nm to 30 nm.

[0078] The transparent conductive layer 152 may be made of ITO, AZO, FTO or ATO, or a transparent polymer material such as PDMS or PMMA.

[0079] The transparent conductive layer 152 may be formed by DC sputtering, where an electric field is used to accelerate charged ions, causing the ions to collide with atoms on the target surface, and then sputtering the atoms on the target surface toward the third transmission layer 142 to form the transparent conductive layer 152 .

[0080] In some embodiments, the stacked cell may further include: a back electrode 103 and a front electrode 104, wherein the back electrode 103 is located on the side of the crystalline silicon bottom cell 100 away from the composite layer 101 and is electrically connected to the second doped conductive layer 170; the front electrode 104 is located on the side of the perovskite top cell 102 away from the composite layer 101 and is electrically connected to the transparent conductive layer 152.

[0081] In some embodiments, the orthographic projection of the front electrode 104 on the surface of the substrate 110 is misaligned with the orthographic projection of the field passivation portion 1501 on the surface of the substrate 110. By setting the orthographic projection of the front electrode 104 on the surface of the substrate 110 and the orthographic projection of the field passivation portion 1501 on the surface of the substrate 110 to be misaligned, the field passivation portion 1501 can be prevented from affecting the transmission of carriers. It can be understood that the carrier transmission efficiency of the chemical passivation portion 1502 is greater than the carrier transmission efficiency of the field passivation portion 1501. Therefore, setting the orthographic projection of the front electrode 104 on the surface of the substrate 110 and the orthographic projection of the field passivation portion 1501 on the surface of the substrate 110 to be misaligned can improve the transmission efficiency of carriers.

[0082] refer to Figure 2 When the bottom cell 100 is an HJT cell, the bottom cell 100 includes a substrate 110, an intrinsic amorphous silicon layer 1601, a doped conductive layer 140 and a passivation stack structure 150 stacked in sequence on the front side 120 of the substrate 110, and a second intrinsic amorphous silicon layer 190, a second doped conductive layer 170 and a second transparent conductive layer 191 stacked in sequence on the back side 130 of the substrate 110.

[0083] The material of the doped conductive layer 140 can be doped amorphous silicon, and the material of the intrinsic amorphous silicon layer 1601 can be intrinsic amorphous silicon. Setting the doped conductive layer 140 of the HJT cell to be doped amorphous silicon can meet the requirements of the HJT cell for passivation capability and heterojunction formation capability. In addition, doped amorphous silicon can meet the HJT cell's requirements for low-temperature processing.

[0084] The doped conductive layer 140 can be doped with N-type dopant ions, and the second doped conductive layer 170 can be doped with P-type dopant ions. The composite layer 101 introduces electrons in the HJT battery into the perovskite top battery 102, and the second transparent conductive layer 191 introduces holes in the HJT battery into the back electrode 103.

[0085] When the bottom cell 100 is a BC cell, since the electrodes of the BC cell are all located on the back of the BC cell, the stacked cell has three-terminal output, that is, 3-terminal output, and the three-terminal outputs correspond to the two output terminals on the back of the BC cell and the output terminal on the top surface of the perovskite top cell.

[0086] In the embodiment of the present disclosure, a passivation stack structure 150 is formed on the surface of the doped conductive layer 140 in the bottom battery 100 to passivate the doped conductive layer 140 while improving the carrier transmission speed. The field passivation portion 1501 in the passivation stack structure 150 only covers a portion of the surface of the doped conductive layer 140, providing contact space between the chemical passivation portion 1502 and the doped conductive layer 140. The field passivation portion 1501 has a better passivation effect, and the chemical passivation portion 1502 has a better carrier transmission performance. In this way, the passivation of the doped conductive layer 140 can be completed while improving the carrier transmission efficiency, and the opening voltage of the stacked battery can be increased, thereby improving the photoelectric conversion efficiency of the stacked battery.

[0087] An embodiment of the present disclosure also provides another stacked battery. Different from the above-mentioned embodiment, the doped conductive layer in the stacked battery is located on the back side of the substrate. The other stacked battery provided by an embodiment of the present disclosure will be described below with reference to the accompanying drawings. It should be noted that for the parts that are the same as or corresponding to the above-mentioned embodiments, reference can be made to the corresponding description of the above-mentioned embodiments and will not be repeated below.

[0088] refer to Figure 3 and Figure 4 , Figure 3 This is a schematic structural diagram of a third laminate battery provided in one embodiment of the present disclosure. Figure 4 A schematic structural diagram of a fourth type of stacked battery is provided for one embodiment of the present disclosure.

[0089] In some embodiments, the doped conductive layer 240 is located on the back side 230, and the stacked cell further includes: a back electrode 203, which is located on a side of the bottom cell 200 away from the perovskite top cell 202 and is electrically connected to the doped conductive layer 240. The orthographic projection of the back electrode 203 on the surface of the substrate 210 is offset from the orthographic projection of the field passivation portion 2501 on the surface of the substrate 210. By setting the orthographic projection of the back electrode 203 on the surface of the substrate 210 and the orthographic projection of the field passivation portion 2501 on the surface of the substrate 210 to be offset, the field passivation portion 2501 can be prevented from affecting the transport of carriers. It can be understood that the carrier transport efficiency of the chemical passivation portion 2502 is greater than the carrier transport efficiency of the field passivation portion 2501. Therefore, setting the orthographic projection of the back electrode 203 on the surface of the substrate 210 and the orthographic projection of the field passivation portion 2501 on the surface of the substrate 210 to be offset can improve the carrier transport efficiency.

[0090] It should be noted that Figure 3 The front surface 220, the passivation stack structure 250, the tunneling layer 260, the second doped conductive layer 270, the passivation layer 280, the composite layer 201, the perovskite top cell 202, the first transmission layer 212, the perovskite layer 222, the second transmission layer 232, the third transmission layer 242 and the transparent conductive layer 252, the front electrode 204 in the corresponding embodiment can be Figure 1 The front side 120, the passivation stack structure 150, the tunneling layer 160, the second doped conductive layer 170, the passivation layer 180, the composite layer 101, the perovskite top cell 102, the first transmission layer 112, the perovskite layer 122, the second transmission layer 132, the third transmission layer 142, the transparent conductive layer 152, and the front electrode 104 in the corresponding embodiment correspond one to one.

[0091] Figure 4 The front surface 220, the passivation stack structure 250, the intrinsic amorphous silicon layer 2601, the second doped conductive layer 270, the second intrinsic amorphous silicon layer 290, the second transparent conductive layer 291, the composite layer 201, the perovskite top cell 202, the first transmission layer 212, the perovskite layer 222, the second transmission layer 232, the third transmission layer 242 and the transparent conductive layer 252, the front electrode 204 and the Figure 2 The front side 120, the passivation stack structure 150, the intrinsic amorphous silicon layer 1601, the second doped conductive layer 170, the second intrinsic amorphous silicon layer 190, the second transparent conductive layer 191, the composite layer 101, the perovskite top cell 102, the first transmission layer 112, the perovskite layer 122, the second transmission layer 132, the third transmission layer 142, the transparent conductive layer 152, and the front electrode 104 in the corresponding embodiment correspond one to one.

[0092] It should be noted that when the bottom cell is an HJT cell, since the doped conductive layer 240 is located on the back side 230, the second intrinsic amorphous silicon layer 290 is located between the doped conductive layer 240 and the substrate 210, and the intrinsic amorphous silicon layer 2601 is located between the second doped conductive layer 270 and the substrate 210.

[0093] An embodiment of the present disclosure also provides another stacked battery, which is different from the above-mentioned embodiment in that the doped conductive layer in the stacked battery is located on the back side of the substrate, and a second passivation stack structure is also provided on the front side. The other stacked battery provided by an embodiment of the present disclosure will be described below with reference to the accompanying drawings. It should be noted that, for the parts that are the same as or corresponding to the above-mentioned embodiments, reference can be made to the corresponding description of the above-mentioned embodiments and will not be repeated below.

[0094] refer to Figure 5 and Figure 6 , Figure 5 This is a schematic structural diagram of a fifth laminated battery provided in one embodiment of the present disclosure. Figure 6 A structural schematic diagram of a sixth type of stacked battery is provided for one embodiment of the present disclosure.

[0095] In some embodiments, the doped conductive layer 340 is located on the front side 320, and the bottom battery 300 further includes: a second doped conductive layer 370, the second doped conductive layer 370 covers the back side 330 of the substrate 310; a second passivation stack structure 305, the second passivation stack structure 305 includes: a second field passivation portion 315, the second field passivation portion 315 covers a portion of the surface of the second doped conductive layer 370, a second chemical passivation portion 325, the second chemical passivation portion 325 covers the surface of the second field passivation portion 315 and the surface of the second doped conductive layer 370 not covered by the second field passivation portion 315.

[0096] That is, a doped conductive layer 340 is provided on the front side 320 of the substrate 310, a passivation stack structure 350 is provided on the surface of the doped conductive layer 340, a second doped conductive layer 370 is provided on the back side of the substrate 310, and a second passivation stack structure 305 is provided on the surface of the second doped conductive layer 370. The passivation stack structure 350 and the second passivation stack structure 305 are provided at the same time to further improve the performance of the stacked battery.

[0097] In some embodiments, the orthographic projection of the field passivation portion 3501 on the surface of the substrate 310 is offset from the orthographic projection of the second field passivation portion 315 on the surface of the substrate 310. The offset between the field passivation portion 3501 and the second field passivation portion 315 improves the uniformity of the distribution of the passivation material on the bottom cell 300, thereby improving the passivation effect throughout the bottom cell 300 and further improving the reliability of the stacked cell.

[0098] In some embodiments, the orthographic projection of the field passivation portion 3501 on the surface of the substrate 310 coincides with the orthographic projection of the second field passivation portion 315 on the surface of the substrate 310. The orthographic projection of the field passivation portion 3501 and the second field passivation portion 315 facing each other further enhances the passivation effect of the field passivation portion 3501 and the second field passivation portion 315, thereby further improving the reliability of the tandem cell.

[0099] In some embodiments, an orthographic projection of the field passivation portion 3501 on the surface of the substrate 310 partially overlaps with an orthographic projection of the second field passivation portion 315 on the surface of the substrate 310 .

[0100] In some embodiments, the stacked cell further includes a back electrode 303, which is located on a side of the bottom cell 300 away from the perovskite top cell 302 and is electrically connected to the bottom cell 300. The orthographic projection of the back electrode 303 on the surface of the substrate 310 is misaligned with the orthographic projection of the second field passivation portion 315 on the surface of the substrate 310. By misaligning the orthographic projection of the back electrode 303 on the surface of the substrate 310 and the orthographic projection of the second field passivation portion 315 on the surface of the substrate 310, the second field passivation portion 315 can be prevented from affecting the transport of carriers. By using the portion directly opposite the electrode as the second chemical passivation portion 325, the lateral transport of carriers can be reduced, thereby improving the carrier transport efficiency.

[0101] In some embodiments, field passivation portion 3501 and second field passivation portion 315 are made of the same material, which is a metal oxide. First, the same material as that of field passivation portion 3501 and second field passivation portion 315 can reduce the number of materials used in the laminated battery, thereby reducing the manufacturing difficulty of the laminated battery. Second, the metal oxide used in field passivation portion 3501 and second field passivation portion 315 ensures that field passivation portion 3501 and second field passivation portion 315 have a certain dielectric constant. The metal oxide has both field passivation and chemical passivation capabilities, thereby improving the carrier transport capability of passivation stack structure 350 and second passivation stack structure 305.

[0102] In some embodiments, the material of the field passivation portion 3501 and the second field passivation portion 315 can be one or a combination of molybdenum oxide, titanium oxide, aluminum oxide, zinc oxide, tin oxide, silicon oxide, etc.

[0103] It can be understood that the structure of the second field passivation part 315 and the second chemical passivation part 325 in the second passivation stack structure 305 can also refer to the structure of the passivation stack structure 150 in the above embodiment, for example, the spacing between two adjacent second field passivation parts 315 is 20nm~10μm and the ratio of the area of ​​the positive projection of the second field passivation part 315 on the surface of the second doped conductive layer 370 to the area of ​​the surface of the second doped conductive layer 370 facing the second field passivation part 315 is 0.2~0.8, etc.

[0104] It should be noted that Figure 5 The chemical passivation portion 3502, the tunneling layer 360, the passivation layer 380, the composite layer 301, the perovskite top cell 302, the first transmission layer 312, the perovskite layer 322, the second transmission layer 332, the third transmission layer 342 and the transparent conductive layer 352, the front electrode 204 in the corresponding embodiment can be Figure 1The chemical passivation part 1502, tunneling layer 160, passivation layer 180, composite layer 101, perovskite top cell 102, first transmission layer 112, perovskite layer 122, second transmission layer 132, third transmission layer 142, transparent conductive layer 152, and front electrode 104 in the corresponding embodiments can correspond one to one.

[0105] Figure 6 The chemical passivation portion 3502, the intrinsic amorphous silicon layer 3601, the composite layer 301, the second intrinsic amorphous silicon layer 390, the second transparent conductive layer 391, the perovskite top cell 302, the first transmission layer 312, the perovskite layer 322, the second transmission layer 332, the third transmission layer 342 and the transparent conductive layer 352, the front electrode 304 and the Figure 2 The chemical passivation part 1502, the intrinsic amorphous silicon layer 1601, the second intrinsic amorphous silicon layer 190, the second transparent conductive layer 191, the composite layer 101, the perovskite top cell 102, the first transmission layer 112, the perovskite layer 122, the second transmission layer 132, the third transmission layer 142, the transparent conductive layer 152, and the front electrode 104 in the corresponding embodiment correspond one to one.

[0106] Another embodiment of the present disclosure further provides a method for manufacturing a stacked battery, which can be used to form the above-mentioned stacked battery. The following will describe a method for manufacturing a stacked battery provided by another embodiment of the present disclosure in conjunction with the accompanying drawings. It should be noted that, for the parts that are the same or corresponding to the above-mentioned embodiments, reference can be made to the corresponding description of the above-mentioned embodiments, and will not be repeated below.

[0107] refer to Figure 7 , Figure 7 A flowchart corresponding to a method for manufacturing a stacked battery provided in one embodiment of the present disclosure.

[0108] In some embodiments, a method for manufacturing a stacked battery includes: S10. forming a bottom battery, the bottom battery including: a substrate, the substrate including relative front and back sides; a doped conductive layer, the doped conductive layer is located on the front or back side of the substrate; a passivation stack structure, the passivation stack structure covers the surface of the doped conductive layer, the passivation stack structure includes: a plurality of field passivation portions arranged at intervals, the field passivation portions cover part of the surface of the doped conductive layer, and a chemical passivation portion, the chemical passivation portion covers the field passivation portion and the surface of the doped conductive layer not covered by the field passivation portion.

[0109] The manufacturing method of the stacked battery may further include: S11. forming a composite layer, wherein the composite layer is located on the surface of the bottom battery.

[0110] The method for manufacturing a stacked cell may further include: S12. forming a perovskite top cell, wherein the perovskite top cell is located on a surface of the composite layer away from the bottom cell.

[0111] In the process of forming a bottom battery, a passivation stacking structure is formed on the surface of the doped conductive layer in the bottom battery to complete the passivation of the doped conductive layer while improving the carrier transmission speed. Among them, the field passivation part in the passivation stacking structure only covers part of the surface of the doped conductive layer, providing contact space for the chemical passivation part and the doped conductive layer. The passivation effect of the field passivation part is better, and the carrier transmission performance of the chemical passivation part is better. In this way, the passivation of the doped conductive layer can be completed while improving the carrier transmission efficiency, and the performance of the formed stacked battery can be improved.

[0112] Those skilled in the art will appreciate that the above-described embodiments are specific examples for implementing the present disclosure, and in actual applications, various changes may be made to them in form and detail without departing from the spirit and scope of the embodiments of the present disclosure. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the embodiments of the present disclosure. Therefore, the scope of protection of the embodiments of the present disclosure shall be based on the scope defined in the claims.

Claims

1. A laminated battery, characterized in that: include: A bottom cell, a composite layer, and a perovskite top cell stacked in sequence along a preset direction; The bottom cell includes: a substrate, the substrate including a front side and a back side relative to each other; a doped conductive layer, the doped conductive layer being located on the front side and / or the back side of the substrate; a passivation stack structure, the passivation stack structure covering the surface of the doped conductive layer, the passivation stack structure including: a plurality of field passivation portions arranged at intervals, the field passivation portions covering a portion of the surface of the doped conductive layer, and a chemical passivation portion covering the field passivation portion and the surface of the doped conductive layer not covered by the field passivation portion.

2. The laminated battery according to claim 1, characterized in that: The ratio of the area of ​​the orthographic projection of the field passivation portion on the surface of the doped conductive layer to the area of ​​the surface of the doped conductive layer facing the field passivation portion is 0.2-0.

8.

3. The stacked battery according to claim 1, wherein: The distance between two adjacent field passivation parts is 20nm~10μm.

4. The stacked battery according to claim 1, characterized in that The doped conductive layer is located on the back side, and the stacked battery further includes: a back electrode, which is located on the side of the bottom battery away from the perovskite top battery and is electrically connected to the doped conductive layer, and the orthographic projection of the back electrode on the substrate surface is misaligned with the orthographic projection of the field passivation portion on the substrate surface.

5. The laminated battery according to claim 1, wherein: The doped conductive layer is located on the front surface, and the bottom cell further comprises: a second doped conductive layer, wherein the second doped conductive layer covers the back surface of the substrate; A second passivation stack structure, the second passivation stack structure includes: a second field passivation portion, the second field passivation portion covers a portion of the surface of the second doped conductive layer, and a second chemical passivation portion, the second chemical passivation portion covers the surface of the second field passivation portion and the surface of the second doped conductive layer not covered by the second field passivation portion.

6. The laminated battery according to claim 5, characterized in that: An orthographic projection of the field passivation portion on the substrate surface is offset from an orthographic projection of the second field passivation portion on the substrate surface.

7. The laminated battery according to claim 5, characterized in that: The stacked cell also includes: a back electrode, which is located on a side of the bottom cell away from the perovskite top cell and is electrically connected to the bottom cell, and the orthographic projection of the back electrode on the substrate surface is misaligned with the orthographic projection of the second field passivation portion on the substrate surface.

8. The laminated battery according to claim 5, characterized in that: The field passivation portion and the second field passivation portion are made of the same material, that is, metal oxide.

9. The stacked battery according to claim 1, characterized in that: The doped conductive layer is located on the front side, and the stacked battery further includes: a front electrode, which is located on the side of the perovskite top cell away from the bottom cell, and the orthographic projection of the front electrode on the substrate surface is misaligned with the orthographic projection of the field passivation portion on the substrate surface.

10. The stacked battery according to claim 1, characterized in that: The material of the chemical passivation portion includes: a self-assembled monomolecular material.

11. The laminated battery according to claim 10, characterized in that: The self-assembled monomolecular material includes one or more of [2-(9H-carbazol-9-yl)ethyl]phosphonic acid, [4-(9H-carbazol-9-yl)butyl]phosphonic acid or [4-(3,6-dimethyl-9H-carbazol-9-yl)butyl]phosphonic acid.

12. The stacked battery according to claim 1, characterized in that: The material of the doped conductive layer includes doped polysilicon or doped amorphous silicon.

13. A method for manufacturing a stacked battery, characterized in that: include: A bottom cell is formed, the bottom cell comprising: a substrate, the substrate comprising opposite front and back surfaces; a doped conductive layer, the doped conductive layer being located on the front or back surface of the substrate; a passivation stack structure, the passivation stack structure covering a surface of the doped conductive layer, the passivation stack structure comprising: a plurality of field passivation portions arranged at intervals, the field passivation portions covering a portion of the surface of the doped conductive layer, and a chemical passivation portion covering the field passivation portions and a surface of the doped conductive layer not covered by the field passivation portions; forming a composite layer, wherein the composite layer is located on a surface of the bottom cell; A perovskite top cell is formed, wherein the perovskite top cell is located on a surface of the composite layer away from the bottom cell.

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