Display device and method of manufacturing same

Abstract

A display device and a method of manufacturing the same are provided. The display device includes: a first electrode over a substrate; a second electrode over the substrate and spaced apart from the first electrode in the first direction; an inorganic light emitting element in the first auxiliary pixel region, over the first electrode, and connected to the first electrode; an organic light emitting layer over the substrate in a second auxiliary pixel region spaced apart from the first auxiliary pixel region in the first direction, and covering the second electrode; and a third electrode over the organic light emitting layer.

Description

Technical Field

[0001] Embodiments relate to a display device including an inorganic light emitting element and a method of manufacturing the display device. Background Art

[0002] As information technology develops, the importance of display devices as a connection medium between users and information is becoming increasingly apparent. As a result, the use of display devices such as liquid crystal display devices, organic light emitting display devices, plasma display devices, and micro LED display devices is increasing.

[0003] Micro-LED displays can include inorganic light-emitting elements (ILEs). Inorganic ILEs are semiconductor light-emitting elements that convert current into light and have high light-conversion efficiency. Inorganic ILEs are also semi-permanent, environmentally friendly, and have very low energy consumption. Summary of the Invention

[0004] The embodiment provides a display device with improved quality.

[0005] The embodiment provides a method of manufacturing a display device.

[0006] According to one or more embodiments, a display device includes: a first electrode over a substrate; a second electrode over the substrate and spaced apart from the first electrode in a first direction; an inorganic light-emitting element in a first auxiliary pixel region over the first electrode and connected to the first electrode; an organic light-emitting layer over the substrate, in a second auxiliary pixel region spaced apart from the first auxiliary pixel region along the first direction and covering the second electrode; and a third electrode over the organic light-emitting layer.

[0007] The third electrode may be spaced apart from the inorganic light emitting element in a plan view.

[0008] The display device may further include a connection electrode over the substrate in a portion of the second auxiliary pixel region, configured to receive a low power supply voltage and connected to the third electrode.

[0009] The connection electrode may at least partially overlap the third electrode in a plan view.

[0010] The display device may further include a fourth electrode in a portion of the first auxiliary pixel region, over the substrate, and connected to the inorganic light emitting element.

[0011] The fourth electrode may be spaced apart from the third electrode in a plan view.

[0012] The display device may further include a pixel defining layer over the substrate, surrounding the second auxiliary pixel region in plan view, and spaced apart from the third electrode in plan view.

[0013] A portion of the third electrode may be over the organic light emitting layer, and another portion of the third electrode may be over the inorganic light emitting element.

[0014] The third electrode may at least partially overlap the inorganic light emitting element in a plan view.

[0015] The third electrode may be continuously in the first auxiliary pixel region and the second auxiliary pixel region.

[0016] The inorganic light emitting element may include a first semiconductor layer, an active layer over the first semiconductor layer, and a second semiconductor layer over the active layer.

[0017] The display device may further include an insulating layer covering both sides of the first semiconductor layer, both sides of the active layer, both sides of the second semiconductor layer, and an upper surface of the second semiconductor layer.

[0018] The third electrode may be spaced apart from the inorganic light emitting element, with the insulating layer being between the third electrode and the inorganic light emitting element.

[0019] The display device may further include a fourth electrode in a portion of the first auxiliary pixel region, over the substrate, connected to the inorganic light emitting element, and covered by the insulating layer.

[0020] The third electrode may be spaced apart from the fourth electrode with the insulating layer between the third electrode and the fourth electrode.

[0021] The display device may further include a pixel defining layer over the substrate, surrounding the second auxiliary pixel region in a plan view, and covered by the third electrode.

[0022] The organic light emitting layer may be configured to emit green light or red light.

[0023] According to one or more embodiments, a method for manufacturing a display device includes the following steps: forming a first electrode above a substrate; forming a second electrode above the substrate and spaced apart from the first electrode in a first direction; bonding the first electrode and an inorganic light-emitting element; forming an organic light-emitting layer covering the second electrode; and forming a third electrode above the organic light-emitting layer, the third electrode being spaced apart from the inorganic light-emitting element in a plan view.

[0024] The step of bonding the first electrode and the inorganic light emitting element may be performed before the step of forming the organic light emitting layer.

[0025] The method may further include forming a contact hole over the substrate to connect the third electrode and the connection electrode, wherein the connection electrode is configured to be applied with a low power supply voltage.

[0026] The display device according to one or more embodiments may include both an organic light-emitting layer and an inorganic light-emitting element. The organic light-emitting layer may emit red light or green light. Therefore, the light emission efficiency of the red light or green light may be improved.

[0027] In addition, the step of transferring the inorganic light emitting element to the substrate can be performed before forming the organic light emitting layer on the substrate. Therefore, damage to the organic light emitting layer can be reduced or prevented. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0029] Figure 1 is a plan view illustrating a display device according to one or more embodiments.

[0030] Figure 2 is shown along line II'. Figure 1 A cross-sectional view of an example of a display device.

[0031] Figure 3 、 Figure 4 、 Figure 5 、 Figure 6 、 Figure 7 、 Figure 8 and Figure 9 It shows the manufacturing Figure 2 A cross-sectional view of a method of displaying a device.

[0032] Figure 10 is shown along line II'. Figure 1 A cross-sectional view of another example of a display device.

[0033] Figure 11 is shown along line II'. Figure 1 A cross-sectional view of another example of a display device.

[0034] Figure 12 、 Figure 13 、 Figure 14 、 Figure 15 、 Figure 16 、 Figure 17 、 Figure 18 and Figure 19 It shows the manufacturing Figure 11 A cross-sectional view of a method of displaying a device. DETAILED DESCRIPTION

[0035] By referring to the detailed description and drawings of the embodiments, it is easier to understand the aspects of some embodiments of the present disclosure and the methods for implementing them. The described embodiments are provided as examples so that the present disclosure will be thorough and complete and will fully convey the aspects of the present disclosure to those skilled in the art. Therefore, processes, elements and techniques that are redundant, irrelevant or irrelevant to the description of the embodiments, or unnecessary for those of ordinary skill in the art to fully understand the aspects of the present disclosure may be omitted. Unless otherwise indicated, the same figure numerals, characters or combinations thereof represent the same elements throughout the drawings and written descriptions, and therefore, their repeated descriptions may be omitted.

[0036] The described embodiments may have various modifications and may be implemented in different forms and should not be construed as limited to the embodiments shown herein. The use of "may," "might," or "would not" when describing embodiments corresponds to one or more embodiments of the present disclosure.

[0037] It will be understood by those skilled in the art that, in view of the overall disclosure, the present disclosure covers all modifications, equivalents and replacements within the conceptual and technical scope of the present disclosure, each of the features of the embodiments of the present disclosure may be combined with each other in part or in whole, and various technical interlocks and operations are possible, and unless otherwise specified or implied, each embodiment may be implemented independently of each other, or may be implemented together in a related manner.

[0038] In the accompanying drawings, the relative sizes of elements, layers, and regions may be exaggerated for clarity and / or descriptive purposes. In other words, because the sizes and thicknesses of the elements in the drawings are arbitrarily shown for ease of description, the disclosure is not limited thereto. In addition, the use of cross-hatching and / or shading in the drawings is generally provided to clarify the boundaries between adjacent elements. As such, unless otherwise indicated, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for a particular material, material property, size, ratio, commonality between the illustrated elements, and / or any other characteristics, attributes, properties, etc. of an element.

[0039] Various embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of embodiments and / or intermediate structures. As such, variations in the shapes of the illustrations due to, for example, manufacturing techniques and / or tolerances are anticipated. Furthermore, for purposes of describing embodiments according to the concepts of the present disclosure, the specific structural or functional descriptions disclosed herein are merely illustrative. Therefore, the embodiments disclosed herein should not be construed as limited to the illustrated shapes of elements, layers, or regions, but rather include deviations in shapes due to, for example, manufacturing.

[0040] For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and / or a gradient of implant concentration at its edges rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place.

[0041] For ease of explanation, spatially relative terms such as "below," "beneath," "lower," "on the lower side," "beneath," "above," "upper," "upper" (e.g., as in "sidewall"), etc. may be used herein to describe the relationship of one element or feature to another element or feature as illustrated in the drawings. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the drawings. For example, if the device in the drawings is turned over, an element described as "below," "beneath," or "beneath" another element or feature would then be oriented "above" the other element or feature. Thus, the example terms "below" and "beneath" can encompass both an orientation of above and below. The device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein should be interpreted accordingly. Similarly, when a first component is described as being disposed "on" a second component, this indicates that the first component is disposed on the upper or lower side of the second component, and is not limited to its upper side based on the direction of gravity.

[0042] In addition, the phrase "in a plan view" means when viewing an object portion from above, and the phrase "in a schematic cross-sectional view" means when viewing a schematic cross-section taken by vertically cutting an object portion from the side. The term "overlying" or its variations means that a first object can be above, below, or to one side of a second object, and vice versa. In addition, the term "overlying" can include stacking, facing, or facing, extending over, covering, or partially covering, or any other suitable term as will be appreciated and understood by a person of ordinary skill in the art. The expression "not overlapping" can include meanings such as "spaced apart from," "offset from," or "offset from," as well as any other suitable equivalents as will be appreciated and understood by a person of ordinary skill in the art. The terms "facing" and "facing" can mean that a first object can be directly or indirectly opposite to a second object. In the case where a third object is between the first and second objects, the first and second objects, although still facing each other, can be understood to be indirectly opposite to each other.

[0043] It will be understood that when an element, layer, region, or component is referred to as being “formed on,” “on,” “connected to,” or “(operably or communicatively) coupled to” another element, layer, region, or component, the element, layer, region, or component may be directly formed on, directly on, directly connected to, or directly coupled to the other element, layer, region, or component, or indirectly formed on, indirectly on, indirectly connected to, or indirectly coupled to the other element, layer, region, or component such that one or more intervening elements, layers, regions, or components may be present. Additionally, this may be collectively referred to as direct (or indirect) coupling (or connection) as well as integral (or non-integral) coupling (or connection). For example, when a layer, region, or component is referred to as being "electrically connected" or "electrically coupled" to another layer, region, or component, the layer, region, or component may be directly electrically connected to or electrically coupled to the other layer, region, and / or component, or one or more intervening layers, regions, or components may be present. One or more intervening components may include switches, resistors, capacitors, etc. In describing embodiments, unless explicitly described as being directly connected, statements about connection refer to direct or indirect connections, and "directly connected / directly coupled" or "directly on" means that one component is directly connected to or directly coupled to another component, or is on another component without intervening components.

[0044] In addition, in this specification, when a part of a layer, film, region, plate, etc. is formed on another part, the formation direction is not limited to the upward direction, but includes forming the part on the side surface or in the downward direction. On the contrary, when a part of a layer, film, region, plate, etc. is formed "under" another part, this not only includes the case where the part is "directly under" the other part, but also includes the case where there is another part between the part and the other part. At the same time, other expressions such as "between...", "tightly between...", or "adjacent to..." and "directly adjacent to..." that describe the relationship between components can be similarly interpreted. It will be understood that when an element or layer is referred to as "between" two elements or layers, the element or layer can be the only element or layer between the two elements or layers, or one or more intervening elements or layers can also be present.

[0045] For the purposes of this disclosure, when expressions such as “at least one of…” or “any of…” or “one or more of…” precede (or follow) some elements, they modify the entire list of elements and do not modify the individual elements in the list. For example, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” can be interpreted as only X, only Y, only Z, any combination of two or more of X, Y, and Z (such as, for example, XYZ, XYY, YZ, and ZZ), or any variation thereof. Similarly, the expression “at least one of A and B” can include A, B, or A and B. As used herein, “or” generally means “and / or,” and the term “and / or” includes any and all combinations of one or more of the relevant listed items. For example, the expression “A and / or B” can include A, B, or A and B. Similarly, expressions such as “at least one of,” “a plurality of,” “one of,” and other prepositional phrases, when preceding (or following) a list of elements, modify the entire list of elements and do not modify the individual elements of the list. When “C to D” is stated, unless otherwise specified, it means C or greater and D or less.

[0046] It will be understood that while the terms "first," "second," "third," etc. may be used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited by these terms. These terms do not correspond to a particular order, position, or precedence and are used solely to distinguish one element, component, component, region, region, layer, section, or portion from another. Therefore, without departing from the spirit and scope of this disclosure, a first element, component, region, layer, or section described below may be referred to as a second element, component, region, layer, or section. Describing an element as "first" may not require or imply the presence of a second or other element. The terms "first," "second," etc. may also be used herein to distinguish between different categories or sets of elements. For simplicity, the terms "first," "second," etc. may refer to "a first category (or first set)" or "a second category (or second set)," respectively.

[0047] In this example, the x-direction, y-direction, and / or z-direction are not limited to directions corresponding to the three axes of a rectangular coordinate system and can be interpreted in a broader sense. For example, the x-direction, y-direction, and z-direction can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. The same applies to the first direction, the second direction, and / or the third direction.

[0048] The terms used herein are used only for the purpose of describing the embodiments and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "an" are intended to include the plural forms, and the plural forms are intended to include the singular forms, unless the context clearly indicates otherwise. It will also be understood that when the terms "comprises," "having," "comprising," and variations thereof are used in this specification, the description indicates the presence of the stated features, wholes, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or groups thereof.

[0049] When one or more embodiments can be implemented differently, a specific process order can be performed differently from the described order. For example, two consecutively described processes can be performed substantially simultaneously or in a reverse order to the described order.

[0050] As used herein, the terms "substantially," "about," "approximately," and similar terms are used as approximate terms rather than terms of degree, and are intended to account for inherent deviations in measured or calculated values that would be recognized by one of ordinary skill in the art. For example, "substantially" may include a range of + / - 5% of the corresponding value. As used herein, "about" or "approximately" includes the stated value and means: within an acceptable deviation range of the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "about" may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value. In addition, the use of "may" when describing embodiments of the present disclosure refers to "one or more embodiments of the present disclosure."

[0051] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will also be understood that terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and / or in this specification, and should not be interpreted in an idealized or overly formal sense unless expressly defined as such herein.

[0052] Figure 1 is a plan view illustrating a display device according to one or more embodiments.

[0053] Reference Figure 1The display device DD may include a display area DA and a non-display area NDA. The display area DA may be defined as an area that emits light. Alternatively, the non-display area NDA may be defined as an area that does not emit light. For example, the non-display area NDA may (e.g., in a plan view) surround at least a portion of the display area DA.

[0054] A plurality of pixel regions may be located in the display area DA. For example, a first pixel region PX1 and a second pixel region PX2 may be located in the display area DA. Each of the plurality of pixel regions may emit light. Thus, the display area DA of the display device DD may display an image.

[0055] A plurality of pixel regions may be repeatedly arranged in a first direction DR1 and a second direction DR2 crossing the first direction DR1. For example, the second pixel region PX2 may be spaced apart from the first pixel region PX1 in the first direction DR1.

[0056] Each of the plurality of pixel regions may include a plurality of auxiliary pixel regions. For example, the first pixel region PX1 may include a first auxiliary pixel region SPX1, a second auxiliary pixel region SPX2, and a third auxiliary pixel region SPX3. In addition, the second pixel region PX2 may include a fourth auxiliary pixel region SPX4, a fifth auxiliary pixel region SPX5, and a sixth auxiliary pixel region SPX6.

[0057] The first auxiliary pixel region SPX1 may emit a first light, the second auxiliary pixel region SPX2 may emit a second light, and the third auxiliary pixel region SPX3 may emit a third light. For example, the first light may be blue light, the second light may be red light, and the third light may be green light. However, the present disclosure is not limited thereto, and the wavelength of each of the first light, the second light, and the third light may be varied.

[0058] As each of the first auxiliary pixel region SPX1, the second auxiliary pixel region SPX2, and the third auxiliary pixel region SPX3 emits light, the first pixel region PX1 may emit light having a corresponding wavelength. In addition, as each of the fourth auxiliary pixel region SPX4, the fifth auxiliary pixel region SPX5, and the sixth auxiliary pixel region SPX6 emits light, the second pixel region PX2 may emit light having a corresponding wavelength.

[0059] The driver may be located in the non-display area NDA. The driver may provide signals or voltages to the plurality of pixel regions. For example, the driver may include a data driver, a gate driver, and the like.

[0060] In this specification, a first direction DR1 and a second direction DR2 crossing the first direction DR1 may be defined. In addition, a third direction DR3 substantially perpendicular to a plane formed by the first direction DR1 and the second direction DR2 may be defined.

[0061] Figure 2 is shown along line II'. Figure 1 A cross-sectional view of an example of a display device.

[0062] Further references Figure 2 The display device DD may include a substrate 100, a first inorganic light-emitting element LC1, a second inorganic light-emitting element LC2, a light-emitting element LED, a first bonding member 21, a second bonding member 22, a third bonding member 23, a fourth bonding member 24, a first anode electrode 31, a second anode electrode 33, a third anode electrode 35, a first cathode electrode 32, a second cathode electrode 15, a third cathode electrode 36, a first insulating layer PL1, a connecting electrode 34, an organic light-emitting layer EML1, a pixel defining layer PDL and an encapsulation layer TFE.

[0063] The substrate 100 may include a transparent material or an opaque material. The substrate 100 may be formed of a transparent resin substrate. The transparent resin substrate may include a polyimide substrate. In this case, the polyimide substrate may include a first organic layer, a first barrier layer, a second organic layer, and the like.

[0064] Alternatively, the substrate 100 may include a quartz substrate (eg, a synthetic quartz substrate, a fluorine-doped quartz substrate), a calcium fluoride substrate, a soda-lime glass substrate, an alkali-free glass substrate, etc. These materials may be used alone or in combination with each other.

[0065] The substrate 100 may include circuit elements capable of controlling each of the first inorganic light emitting element LC1, the second inorganic light emitting element LC2, and the light emitting element LED. For example, the substrate 100 may include a TFT, a PMOS, an NMOS, a CMOS structure, or the like.

[0066] The first inorganic light emitting element LC1 may include a first semiconductor layer S1, an active layer S2, a second semiconductor layer S3, a first lower electrode 11, and a second lower electrode 12. The second inorganic light emitting element LC2 may include a first semiconductor layer S4, an active layer S5, a second semiconductor layer S6, a third lower electrode 13, and a fourth lower electrode 14. The light emitting element LED may include a second cathode electrode 15, an organic light emitting layer EML1, and a second anode electrode 33.

[0067] The first anode electrode 31 may be located on the substrate 100 (as used herein, "located on" may mean "above"). The first anode electrode 31 may be located in a portion of the first auxiliary pixel region SPX1. The first anode electrode 31 may function as an anode of the first inorganic light-emitting element LC1. For example, the first anode electrode 31 may be referred to as a first electrode.

[0068] For example, the first anode electrode 31 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. In one or more embodiments, the first anode electrode 31 may include molybdenum (Mo), aluminum (Al), chromium (Cr), titanium (Ti), gold (Au), nickel (Ni), neodymium (Nd), copper (Cu), or the like. These materials may be used alone or in combination. However, the present disclosure is not limited thereto, and in one or more other embodiments, the first anode electrode 31 may have a stacked structure including ITO / Ag / ITO.

[0069] The first inorganic light emitting element LC1 may be located in the first auxiliary pixel region SPX1. For example, the first inorganic light emitting element LC1 may be located on the first anode electrode 31. For example, the first lower electrode 11 may be located on the first anode electrode 31. The first inorganic light emitting element LC1 may be electrically connected to the first anode electrode 31 through the first lower electrode 11.

[0070] For example, the first lower electrode 11 may include an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. In one or more embodiments, the first lower electrode 11 may include molybdenum (Mo), aluminum (Al), chromium (Cr), titanium (Ti), gold (Au), nickel (Ni), neodymium (Nd), copper (Cu), etc. These materials may be used alone or in combination with each other.

[0071] In one or more embodiments, the first lower electrode 11 and the first anode electrode 31 may be bonded to each other by a first bonding member 21. For example, the first bonding member 21 may include a solder bump, a solder ball, an anisotropic conductive film, an anisotropic conductive paste, etc. However, the present disclosure is not limited thereto, and the first bonding member 21 may be omitted. For example, the first lower electrode 11 and the first anode electrode 31 may be eutectic bonded.

[0072] The first cathode electrode 32 may be located on the substrate 100. The first cathode electrode 32 may be located in a portion of the first auxiliary pixel region SPX1. For example, the first cathode electrode 32 may be spaced apart from the first anode electrode 31 in the first direction DR1. The first cathode electrode 32 may operate as a cathode of the first inorganic light emitting element LC1. For example, the first cathode electrode 32 may be referred to as a fourth electrode.

[0073] For example, the first cathode electrode 32 may include an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. In one or more embodiments, the first cathode electrode 32 may include molybdenum (Mo), aluminum (Al), chromium (Cr), titanium (Ti), gold (Au), nickel (Ni), neodymium (Nd), copper (Cu), etc. These materials may be used alone or in combination with each other.

[0074] The first inorganic light emitting element LC1 may be located on the first cathode electrode 32. For example, the second lower electrode 12 may be located on the first cathode electrode 32. The first inorganic light emitting element LC1 may be electrically connected to the first cathode electrode 32 through the second lower electrode 12. For example, the second lower electrode 12 and the first lower electrode 11 may include substantially the same material.

[0075] In one or more embodiments, the second lower electrode 12 and the first cathode electrode 32 may be bonded to each other by a second bonding member 22. For example, the second bonding member 22 and the first bonding member 21 may include substantially the same material. However, the present disclosure is not limited thereto, and the second bonding member 22 may be omitted. For example, the second lower electrode 12 and the first cathode electrode 32 may be eutectic bonded.

[0076] The first semiconductor layer S1, the active layer S2, and the second semiconductor layer S3 may be positioned on the first and second lower electrodes 11 and 12. For example, the first semiconductor layer S1, the active layer S2, and the second semiconductor layer S3 may be sequentially stacked on the first and second lower electrodes 11 and 12 along the third direction DR3.

[0077] In one or more embodiments, the first semiconductor layer S1 may include a p-type semiconductor layer. For example, the first semiconductor layer S1 may include a semiconductor material such as GaN, InAlGaN, AlGaN, InGaN, AlN, InN, etc., and may include a p-type semiconductor layer doped with a first conductive dopant (e.g., a p-type dopant) such as Zn, Fe, Mg, Be, Cd, Ag, C, Hg, Li, Ca, etc. For example, the first semiconductor layer S1 may include a GaN semiconductor material doped with the first conductive dopant.

[0078] The active layer S2 may be located on the first semiconductor layer S1. For example, the active layer S2 may include a single well structure, a multi-well structure, a single quantum well structure, a multi-quantum well structure, a quantum dot structure, or a quantum wire structure. For example, the active layer S2 may include a multi-quantum well structure. In this case, the active layer S2 may include a structure in which well layers and barrier layers are alternately stacked. The well layers may include InGaN, and the barrier layers may include GaN or AlGaN, but the present disclosure is not limited thereto.

[0079] The second semiconductor layer S3 may be located on the active layer S2. In one or more embodiments, the second semiconductor layer S3 may include an n-type semiconductor layer. For example, the second semiconductor layer S3 may include a semiconductor material such as GaN, InAlGaN, AlGaN, InGaN, AlN, InN, etc., and may include an n-type semiconductor layer doped with a second conductive dopant (e.g., an n-type dopant) such as Si, Sn, Te, Se, S, O, Ti, Ge, etc. For example, the second semiconductor layer S3 may include a GaN semiconductor material doped with a second conductive dopant. However, the present disclosure is not limited thereto, and in one or more other embodiments, the first semiconductor layer S1 may include an n-type semiconductor layer, and the second semiconductor layer S3 may include a p-type semiconductor layer.

[0080] In one or more embodiments, the first inorganic light emitting element LC1 may be a flip-chip type including a first lower electrode 11 facing the first anode electrode 31 and a second lower electrode 12 facing the first cathode electrode 32. However, the present disclosure is not limited thereto, and in one or more other embodiments, the first inorganic light emitting element LC1 may be a lateral chip type or a vertical chip type.

[0081] The second anode electrode 33 may be located on the substrate 100. The second anode electrode 33 may be located in a portion of the second auxiliary pixel region SPX2. For example, the second anode electrode 33 may be spaced apart from the first anode electrode 31 in the first direction DR1. In addition, the second anode electrode 33 may be spaced apart from the first cathode electrode 32 in the first direction DR1. For example, the second anode electrode 33 may be referred to as a second electrode.

[0082] The second anode electrode 33 can operate as an anode electrode of the light-emitting element LED. For example, the second anode electrode 33 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These materials can be used alone or in combination with each other. In one or more embodiments, the second anode electrode 33 may have a stacked structure including ITO / Ag / ITO.

[0083] The connection electrode 34 may be located on the substrate 100. The connection electrode 34 may be located in a portion of the second auxiliary pixel region SPX2. For example, the connection electrode 34 may be spaced apart from the second anode electrode 33 in the first direction DR1.

[0084] In one or more embodiments, the first width of the connection electrode 34 in the first direction DR1 may be smaller than the second width of the second anode electrode 33 in the first direction DR1. In one or more other embodiments, the first width of the connection electrode 34 and the second width of the second anode electrode 33 may be substantially the same. In one or more other embodiments, the first width of the connection electrode 34 may be larger than the second width of the second anode electrode 33.

[0085] A power supply voltage may be applied to the connection electrode 34. For example, a low power supply voltage such as ELVSS may be applied from the substrate 100 to the connection electrode 34. The power supply voltage may be applied to the second cathode electrode 15 via the connection electrode 34. The connection electrode 34 may at least partially overlap the second cathode electrode 15 in a plan view. For example, the connection electrode 34 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These materials may be used alone or in combination with one another.

[0086] The first insulating layer PL1 may cover the connection electrode 34. Therefore, the first insulating layer PL1 may reduce or prevent the possibility that the connection electrode 34 directly contacts the organic light emitting layer EML1.

[0087] For example, the first insulating layer PL1 may include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), silicon oxycarbide (SiO x C y ), aluminum oxide (AlO x ), aluminum nitride (AlN x )、ZrO x ), hafnium oxide (HfO x ), titanium oxide (TiO x ), etc. These materials may be used alone or in combination with each other.

[0088] An organic light-emitting layer (EML1) may be located on the substrate 100. The organic light-emitting layer (EML1) may be located in the second auxiliary pixel region (SPX2). That is, the organic light-emitting layer (EML1) may be spaced apart from the first inorganic light-emitting element (LC1) in the first direction (DR1). The organic light-emitting layer (EML1) may cover the second anode electrode 33 and the first insulating layer (PL1). The organic light-emitting layer (EML1) may include an organic material that emits light of a color (e.g., a predetermined color).

[0089] The second cathode electrode 15 may be located on the organic light-emitting layer EML1. The second cathode electrode 15 may be located in the second auxiliary pixel region SPX2. In one or more embodiments, the second cathode electrode 15 may be located only in the second auxiliary pixel region SPX2. That is, the second cathode electrode 15 may not be located in the first auxiliary pixel region SPX1 and the fourth auxiliary pixel region SPX4. For example, the second cathode electrode 15 may be referred to as a third electrode.

[0090] That is, the second cathode electrode 15 may be spaced apart from the first inorganic light emitting element LC1 in a plan view. The second cathode electrode 15 may be spaced apart from the first anode electrode 31 and the first cathode electrode 32 in a plan view.

[0091] In addition, the second cathode electrode 15 may be spaced apart from the second inorganic light emitting element LC2 in a plan view. The second cathode electrode 15 may be spaced apart from the third anode electrode 35 and the third cathode electrode 36 in a plan view.

[0092] In one or more embodiments, the second cathode electrode 15 may be spaced apart from a pixel defining layer (PDL) to be described later. However, the present disclosure is not limited thereto, and in one or more other embodiments, the second cathode electrode 15 may cover at least a portion of the pixel defining layer (PDL).

[0093] The second cathode electrode 15 may be connected to the connection electrode 34. For example, the second cathode electrode 15 may be connected to the connection electrode 34 through a contact hole CNT1. The contact hole CNT1 may be defined to pass through the organic light-emitting layer EML1 and the first insulating layer PL1. For example, the second cathode electrode 15 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These materials may be used alone or in combination.

[0094] The pixel defining layer (PDL) may be located on the substrate 100. For example, the pixel defining layer (PDL) may have a shape surrounding the second auxiliary pixel region SPX2 in a plan view. The pixel defining layer (PDL) may have or may define an opening that overlaps the second auxiliary pixel region SPX2 in a plan view. At least a portion of each of the second anode electrode 33, the organic light-emitting layer (EML) 1, and the second cathode electrode 15 may be located in the opening of the pixel defining layer (PDL).

[0095] like Figure 2As shown in , a first portion of the pixel defining layer PDL may be located between the first auxiliary pixel region SPX1 and the second auxiliary pixel region SPX2. That is, the first portion of the pixel defining layer PDL may be located between the first inorganic light-emitting element LC1 and the organic light-emitting layer EML1. In addition, a second portion of the pixel defining layer PDL may be located between the second auxiliary pixel region SPX2 and the fourth auxiliary pixel region SPX4. That is, the second portion of the pixel defining layer PDL may be located between the second inorganic light-emitting element LC2 and the organic light-emitting layer EML1.

[0096] For example, the pixel defining layer (PDL) may include an inorganic material or an organic material. In one or more embodiments, the pixel defining layer (PDL) may include an organic material such as an epoxy resin, a silicone resin, or the like. These materials may be used alone or in combination with one another. In one or more other embodiments, the pixel defining layer (PDL) may further include a light-blocking material containing a black pigment, a black dye, or the like.

[0097] The third anode electrode 35 may be located on the substrate 100. The third anode electrode 35 may be located in a portion of the fourth auxiliary pixel region SPX4. For example, the third anode electrode 35 may be spaced apart from the connection electrode 34 in the first direction DR1. The third anode electrode 35 may operate as an anode of the second inorganic light emitting element LC2. For example, the third anode electrode 35 and the first anode electrode 31 may include substantially the same material.

[0098] The second inorganic light emitting element LC2 may be located in the fourth auxiliary pixel region SPX4. For example, the second inorganic light emitting element LC2 may be located on the third anode electrode 35. For example, the third lower electrode 13 may be located on the third anode electrode 35. The second inorganic light emitting element LC2 may be electrically connected to the third anode electrode 35 through the third lower electrode 13. For example, the third lower electrode 13 and the first lower electrode 11 may include substantially the same material.

[0099] In one or more embodiments, the third lower electrode 13 and the third anode electrode 35 may be bonded to each other by a third bonding member 23. For example, the third bonding member 23 and the first bonding member 21 may include substantially the same material. However, the present disclosure is not limited thereto, and the third bonding member 23 may be omitted. For example, the third lower electrode 13 and the third anode electrode 35 may be eutectic bonded.

[0100] The third cathode electrode 36 may be located on the substrate 100. The third cathode electrode 36 may be located in a portion of the fourth auxiliary pixel region SPX4. For example, the third cathode electrode 36 may be spaced apart from the third anode electrode 35 in the first direction DR1. The third cathode electrode 36 may operate as a cathode of the second inorganic light emitting element LC2. For example, the third cathode electrode 36 and the first cathode electrode 32 may include substantially the same material.

[0101] The second inorganic light emitting element LC2 may be located on the third cathode electrode 36. For example, the fourth lower electrode 14 may be located on the third cathode electrode 36. The second inorganic light emitting element LC2 may be electrically connected to the third cathode electrode 36 through the fourth lower electrode 14. For example, the fourth lower electrode 14 and the first lower electrode 11 may include substantially the same material.

[0102] In one or more embodiments, the fourth lower electrode 14 and the third cathode electrode 36 may be bonded to each other by a fourth bonding member 24. For example, the fourth bonding member 24 and the first bonding member 21 may include substantially the same material. However, the present disclosure is not limited thereto, and the fourth bonding member 24 may be omitted. For example, the fourth lower electrode 14 and the third cathode electrode 36 may be eutectic bonded.

[0103] The first semiconductor layer S4, the active layer S5, and the second semiconductor layer S6 may be positioned on the third and fourth lower electrodes 13 and 14. For example, the first semiconductor layer S4, the active layer S5, and the second semiconductor layer S6 may be sequentially stacked on the third and fourth lower electrodes 13 and 14 along the third direction DR3.

[0104] In one or more embodiments, the first semiconductor layer S4 may include a p-type semiconductor layer. For example, the first semiconductor layer S4 may include a semiconductor material such as GaN, InAlGaN, AlGaN, InGaN, AlN, InN, etc., and may include a p-type semiconductor layer doped with a first conductive dopant (e.g., a p-type dopant) such as Zn, Fe, Mg, Be, Cd, Ag, C, Hg, Li, Ca, etc. For example, the first semiconductor layer S4 may include a GaN semiconductor material doped with the first conductive dopant.

[0105] The active layer S5 may be located on the first semiconductor layer S4. For example, the active layer S5 may include a single well structure, a multi-well structure, a single quantum well structure, a multi-quantum well structure, a quantum dot structure, or a quantum wire structure. For example, the active layer S5 may include a multi-quantum well structure. In this case, the active layer S5 may include a structure in which well layers and barrier layers are alternately stacked. The well layers may include InGaN, and the barrier layers may include GaN or AlGaN, but the present disclosure is not limited thereto.

[0106] The second semiconductor layer S6 may be located on the active layer S5. In one or more embodiments, the second semiconductor layer S6 may include an n-type semiconductor layer. For example, the second semiconductor layer S6 may include a semiconductor material such as GaN, InAlGaN, AlGaN, InGaN, AlN, InN, etc., and may include an n-type semiconductor layer doped with a second conductive dopant (e.g., an n-type dopant) such as Si, Sn, Te, Se, S, O, Ti, Ge, etc. For example, the second semiconductor layer S6 may include a GaN semiconductor material doped with a second conductive dopant. However, the present disclosure is not limited thereto, and in one or more other embodiments, the first semiconductor layer S4 may include an n-type semiconductor layer, and the second semiconductor layer S6 may include a p-type semiconductor layer.

[0107] In one or more embodiments, the second inorganic light emitting element LC2 may be a flip-chip type including a third lower electrode 13 facing the third anode electrode 35 and a fourth lower electrode 14 facing the third cathode electrode 36. However, the present disclosure is not limited thereto, and in one or more other embodiments, the second inorganic light emitting element LC2 may be a lateral chip type or a vertical chip type.

[0108] The encapsulation layer TFE may be located on the substrate 100. The encapsulation layer TFE may cover the first inorganic light emitting element LC1, the second inorganic light emitting element LC2, and the light emitting element LED. The encapsulation layer TFE may reduce or prevent impurities, moisture, and the like from penetrating into the first inorganic light emitting element LC1, the second inorganic light emitting element LC2, and the light emitting element LED from the outside. The encapsulation layer TFE may include at least one inorganic layer and at least one organic layer.

[0109] For example, the inorganic layer may include silicon oxide, silicon nitride, silicon oxynitride, etc. These materials may be used alone or in combination with each other. The organic layer may include a cured polymer material such as polyacrylate.

[0110] Due to the reduced wave function overlap between electrons and holes in the active layer (e.g., active layer S2 or active layer S5), the internal quantum efficiency (IQE) of an inorganic light-emitting element (e.g., first inorganic light-emitting element LC1 or second inorganic light-emitting element LC2) may have a theoretical limit. The luminous efficiency of an inorganic light-emitting element may vary depending on the internal quantum efficiency.

[0111] For example, the internal quantum efficiency of a red inorganic light-emitting element may be lower than that of a blue inorganic light-emitting element. In other words, the luminous efficiency of a red inorganic light-emitting element may be lower than that of a blue inorganic light-emitting element.

[0112] In addition, the internal quantum efficiency of the red inorganic light-emitting element may be lower than that of the green inorganic light-emitting element. In other words, the luminous efficiency of the red inorganic light-emitting element may be lower than that of the green inorganic light-emitting element.

[0113] In addition, the internal quantum efficiency of the green inorganic light-emitting element may be lower than that of the blue inorganic light-emitting element. In other words, the luminous efficiency of the green inorganic light-emitting element may be lower than that of the blue inorganic light-emitting element.

[0114] Here, the red inorganic light emitting element may refer to an inorganic light emitting element capable of emitting red light, the green inorganic light emitting element may refer to an inorganic light emitting element capable of emitting green light, and the blue inorganic light emitting element may refer to an inorganic light emitting element capable of emitting blue light.

[0115] In one or more embodiments, the light-emitting element LED may emit red light. Specifically, the organic light-emitting layer EML1 may emit red light. That is, for red light, the light-emitting element LED including the organic light-emitting layer EML1 may be used instead of the inorganic light-emitting element, thereby improving the luminous efficiency of red light.

[0116] In this case, blue light may be emitted from the first auxiliary pixel region SPX1, and green light may be emitted from the third auxiliary pixel region SPX3. That is, in one or more embodiments, the first inorganic light emitting element LC1 may emit blue light, and the third inorganic light emitting element may emit green light. The third inorganic light emitting element may be located in the third auxiliary pixel region SPX3.

[0117] Alternatively, green light may be emitted from the first auxiliary pixel region SPX1 and blue light may be emitted from the third auxiliary pixel region SPX3. That is, the first inorganic light emitting element LC1 may emit green light and the third inorganic light emitting element may emit blue light.

[0118] However, the present disclosure is not limited thereto, and in one or more other embodiments, the light-emitting element LED may emit green light. That is, the organic light-emitting layer EML1 may emit green light. In this case, a second light-emitting element having a structure substantially identical to that of the light-emitting element LED may be located in the third auxiliary pixel region SPX3. The second light-emitting element may emit red light. That is, green light may be emitted from the second auxiliary pixel region SPX2, and red light may be emitted from the third auxiliary pixel region SPX3.

[0119] That is, as for the green light and the red light, the light emission efficiency of each of the green light and the red light can be improved by using the light emitting element LED and the second light emitting element instead of the inorganic light emitting element.

[0120] In this case, blue light may be emitted from the first auxiliary pixel region SPX1. That is, the first inorganic light-emitting element LC1 may emit blue light. Blue light may have a shorter wavelength and higher energy than red and green light. Therefore, blue light may cause organic materials to break down and their stability may deteriorate. Therefore, it may be appropriate to use an inorganic light-emitting element to emit blue light.

[0121] Alternatively, the light emitting element LED may emit red light, and the second light emitting element may emit green light. That is, blue light may be emitted from the first auxiliary pixel region SPX1, red light may be emitted from the second auxiliary pixel region SPX2, and green light may be emitted from the third auxiliary pixel region SPX3.

[0122] Although reference has been Figure 1 and Figure 2 The first pixel region PX1 including the first, second, and third auxiliary pixel regions SPX1, SPX2, and SPX3 is described, but the present disclosure is not limited thereto, and the second pixel region PX2 may also include substantially the same structure as the first pixel region PX1.

[0123] Figure 3 、 Figure 4 、 Figure 5 、 Figure 6 、 Figure 7 、 Figure 8 and Figure 9 It shows the manufacturing Figure 2 A cross-sectional view of a method of displaying a device.

[0124] Reference Figure 3 , a first anode electrode 31 , a first cathode electrode 32 , a second anode electrode 33 , a connecting electrode 34 , a third anode electrode 35 and a third cathode electrode 36 may be formed on the substrate 100 (as used herein, “formed on” may mean “formed over”).

[0125] The first anode electrode 31 may be formed in a portion of the first auxiliary pixel region SPX1. For example, the first anode electrode 31 may include metal, alloy, metal nitride, conductive metal oxide, transparent conductive material, etc. These materials may be used alone or in combination with each other.

[0126] A first cathode electrode 32 may be formed in a portion of the first auxiliary pixel region SPX1. For example, the first cathode electrode 32 may be spaced apart from the first anode electrode 31 in the first direction DR1. For example, the first cathode electrode 32 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These materials may be used alone or in combination.

[0127] A second anode electrode 33 may be formed in a portion of the second auxiliary pixel region SPX2. For example, the second anode electrode 33 may be spaced apart from the first anode electrode 31 in the first direction DR1. Furthermore, the second anode electrode 33 may be spaced apart from the first cathode electrode 32 in the first direction DR1. For example, the second anode electrode 33 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These materials may be used alone or in combination.

[0128] A connection electrode 34 may be formed in a portion of the second auxiliary pixel region SPX2. For example, the connection electrode 34 may be spaced apart from the second anode electrode 33 in the first direction DR1. For example, the connection electrode 34 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These materials may be used alone or in combination.

[0129] The third anode electrode 35 may be formed in a portion of the fourth auxiliary pixel region SPX4. For example, the third anode electrode 35 may be spaced apart from the connection electrode 34 in the first direction DR1. For example, the third anode electrode 35 and the first anode electrode 31 may include substantially the same material.

[0130] The third cathode electrode 36 may be formed in a portion of the fourth auxiliary pixel region SPX4. For example, the third cathode electrode 36 may be spaced apart from the third anode electrode 35 in the first direction DR1. For example, the third cathode electrode 36 and the first cathode electrode 32 may include substantially the same material.

[0131] In one or more embodiments, the first anode electrode 31, the first cathode electrode 32, the second anode electrode 33, the connecting electrode 34, the third anode electrode 35, and the third cathode electrode 36 may be formed simultaneously or substantially in parallel. For example, a conductive layer may be formed on the substrate 100, and the conductive layer may be etched by an etching process or the like to form the first anode electrode 31, the first cathode electrode 32, the second anode electrode 33, the connecting electrode 34, the third anode electrode 35, and the third cathode electrode 36 simultaneously or substantially in parallel.

[0132] Reference Figure 4 , the first inorganic light emitting element LC1 can be bonded to the first anode electrode 31 and the first cathode electrode 32. For example, the first lower electrode 11 can be bonded to the first anode electrode 31 by the first bonding member 21, and the second lower electrode 12 can be bonded to the first cathode electrode 32 by the second bonding member 22. That is, the first inorganic light emitting element LC1 can be transferred to the substrate 100.

[0133] The first inorganic light-emitting element LC1 may include a first semiconductor layer S1, an active layer S2, a second semiconductor layer S3, and a first lower electrode 11 and a second lower electrode 12. The first semiconductor layer S1, the active layer S2, and the second semiconductor layer S3 may be formed on an epitaxial substrate using an epitaxial growth method. For example, the epitaxial substrate may include a silicon substrate, a sapphire substrate, or the like. After the first semiconductor layer S1, the active layer S2, and the second semiconductor layer S3 are formed, the epitaxial substrate may be removed using a method such as laser lift-off (LLO).

[0134] In one or more embodiments, the first semiconductor layer S1, the active layer S2, and the second semiconductor layer S3 may be formed by metal organic chemical vapor deposition (MOCVD). However, the present disclosure is not limited thereto, and in one or more other embodiments, the first semiconductor layer S1, the active layer S2, and the second semiconductor layer S3 may be formed by various processes such as physical vapor deposition (PVD), electron beam deposition, chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-type thermal evaporation, etc.

[0135] Each of the first lower electrode 11 and the second lower electrode 12 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These materials may be used alone or in combination. In addition, each of the first adhesive member 21 and the second adhesive member 22 may include a solder bump, a solder ball, an anisotropic conductive film, an anisotropic conductive paste, etc.

[0136] The second inorganic light emitting element LC2 may be bonded to the third anode electrode 35 and the third cathode electrode 36. For example, the third lower electrode 13 may be bonded to the third anode electrode 35 via the third bonding member 23, and the fourth lower electrode 14 may be bonded to the third cathode electrode 36 via the fourth bonding member 24. That is, the second inorganic light emitting element LC2 may be transferred to the substrate 100.

[0137] The second inorganic light-emitting element LC2 may include a first semiconductor layer S4, an active layer S5, a second semiconductor layer S6, a third lower electrode 13, and a fourth lower electrode 14. The first semiconductor layer S4, the active layer S5, and the second semiconductor layer S6 may be formed on an epitaxial substrate using an epitaxial growth method. For example, the epitaxial substrate may include a silicon substrate, a sapphire substrate, or the like. After the first semiconductor layer S4, the active layer S5, and the second semiconductor layer S6 are formed, the epitaxial substrate may be removed using a laser lift-off (LLO) method or the like.

[0138] In one or more embodiments, the first semiconductor layer S4, the active layer S5, and the second semiconductor layer S6 may be formed by metal organic chemical vapor deposition (MOCVD). However, the present disclosure is not limited thereto, and in one or more other embodiments, the first semiconductor layer S4, the active layer S5, and the second semiconductor layer S6 may be formed by various processes such as physical vapor deposition (PVD), electron beam deposition, chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-type thermal evaporation, etc.

[0139] Each of the third lower electrode 13 and the fourth lower electrode 14 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These materials may be used alone or in combination. In addition, each of the third adhesive member 23 and the fourth adhesive member 24 may include a solder bump, a solder ball, an anisotropic conductive film, an anisotropic conductive paste, etc.

[0140] Reference Figure 5 , a first insulating layer PL1 may be formed on the substrate 100. The first insulating layer PL1 may cover the connection electrode 34. For example, a preliminary insulating layer may be formed on the substrate 100, and a portion of the preliminary insulating layer may be etched by an etching process or the like to form the first insulating layer PL1.

[0141] For example, the first insulating layer PL1 may include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), silicon oxycarbide (SiO x C y ), aluminum oxide (AlO x ), aluminum nitride (AlN x )、ZrO x ), hafnium oxide (HfO x ), titanium oxide (TiO x ), etc. These materials may be used alone or in combination with each other.

[0142] Reference Figure 6An organic light-emitting layer EML1 may be formed on the substrate 100. The organic light-emitting layer EML1 may be formed in the second auxiliary pixel region SPX2. That is, the organic light-emitting layer EML1 may be spaced apart from the first inorganic light-emitting element LC1 in the first direction DR1. The organic light-emitting layer EML1 may cover the second anode electrode 33 and the first insulating layer PL1. The organic light-emitting layer EML1 may include an organic material for emitting light of a color (e.g., a predetermined color). For example, the organic light-emitting layer EML1 may be formed only in the second auxiliary pixel region SPX2 through an evaporation process using a deposition mask. The deposition mask may be a fine metal mask (FMM).

[0143] Reference Figure 7 , a pixel defining layer PDL may be formed on the substrate 100. For example, the pixel defining layer PDL may surround the second auxiliary pixel region SPX2 in a plan view. That is, the pixel defining layer PDL may cover a portion of the upper surface and side surfaces of the organic light emitting layer EML1.

[0144] Specifically, a first portion of the pixel defining layer (PDL) may be formed between the first auxiliary pixel region SPX1 and the second auxiliary pixel region SPX2. That is, the first portion of the pixel defining layer (PDL) may be formed between the first inorganic light-emitting element LC1 and the organic light-emitting layer EML1. Furthermore, a second portion of the pixel defining layer (PDL) may be formed between the second auxiliary pixel region SPX2 and the fourth auxiliary pixel region SPX4. That is, the second portion of the pixel defining layer (PDL) may be formed between the second inorganic light-emitting element LC2 and the organic light-emitting layer EML1.

[0145] For example, the pixel defining layer (PDL) may include an inorganic material or an organic material. In one or more embodiments, the pixel defining layer (PDL) may include an organic material such as an epoxy resin, a silicone resin, or the like. These materials may be used alone or in combination with one another. In one or more other embodiments, the pixel defining layer (PDL) may further include a light-blocking material containing a black pigment, a black dye, or the like.

[0146] Reference Figure 8, a second cathode electrode 15 may be formed on the organic light-emitting layer EML1. The second cathode electrode 15 may be formed in the second auxiliary pixel region SPX2. In one or more embodiments, the second cathode electrode 15 may be formed only in the second auxiliary pixel region SPX2. That is, the second cathode electrode 15 is not formed in the first auxiliary pixel region SPX1 or the fourth auxiliary pixel region SPX4. That is, the second cathode electrode 15 may be spaced apart from the first inorganic light-emitting element LC1 in a plan view. In addition, the second cathode electrode 15 may be spaced apart from the second inorganic light-emitting element LC2 in a plan view. In addition, the second cathode electrode 15 may be spaced apart from the pixel defining layer PDL in a plan view. For example, a preliminary cathode electrode may be formed on the organic light-emitting layer EML1, the pixel defining layer PDL, the first inorganic light-emitting element LC1, and the second inorganic light-emitting element LC2. A portion of the preliminary cathode electrode may be etched by an etching process or the like to form the second cathode electrode 15.

[0147] For example, the second cathode electrode 15 may include metal, alloy, metal nitride, conductive metal oxide, transparent conductive material, etc. These materials may be used alone or in combination with each other.

[0148] The contact hole CNT1 may be defined through the organic light emitting layer EML1 and the first insulating layer PL1. The second cathode electrode 15 may be electrically connected to the connection electrode 34 through the contact hole CNT1.

[0149] Reference Figure 9 , an encapsulation layer TFE may be formed on the substrate 100. The encapsulation layer TFE may cover the first inorganic light emitting element LC1, the second inorganic light emitting element LC2, and the light emitting element LED. The encapsulation layer TFE may include at least one inorganic layer and at least one organic layer.

[0150] For example, the inorganic layer may include silicon oxide, silicon nitride, silicon oxynitride, etc. These may be used alone or in combination with each other. The organic layer may include a cured polymer material such as polyacrylate.

[0151] If the organic light emitting layer EML1 including an organic material is formed on the substrate 100 before each of the first and second inorganic light emitting elements LC1 and LC2 are transferred to the substrate 100 , damage to the organic light emitting layer EML1 may be caused.

[0152] In one or more embodiments, the step of transferring each of the first and second inorganic light emitting elements LC1 and LC2 to the substrate 100 may be performed before forming the organic light emitting layer EML1 on the substrate 100 .

[0153] That is, the step of bonding the first inorganic light emitting element LC1 to the first anode electrode 31 and the first cathode electrode 32 may be performed before forming the organic light emitting layer EML1 on the substrate 100. In addition, the step of bonding the second inorganic light emitting element LC2 to the third anode electrode 35 and the third cathode electrode 36 may be performed before forming the organic light emitting layer EML1 on the substrate 100. Therefore, damage to the organic light emitting layer EML1 may be reduced or prevented.

[0154] Figure 10 is shown along line II'. Figure 1 A cross-sectional view of another example of a display device.

[0155] In the description Figure 10 The same reference numerals are assigned to the display devices DD' as those of Figure 2 The display device DD has substantially the same elements, and a detailed description thereof may be omitted.

[0156] Reference Figure 10 In one or more embodiments, the second insulating layer PL2 may cover the first inorganic light-emitting element LC1. For example, the second insulating layer PL2 may cover the side surfaces of each of the first semiconductor layer S1, the active layer S2, and the second semiconductor layer S3. Furthermore, the second insulating layer PL2 may cover the upper surface of the second semiconductor layer S3. Furthermore, the second insulating layer PL2 may extend to cover the side surfaces of each of the first lower electrode 11 and the second lower electrode 12.

[0157] In one or more embodiments, the second insulating layer PL2 may extend to cover a side surface of each of the first adhesive member 21 and the second adhesive member 22. In one or more embodiments, the second insulating layer PL2 may extend to cover each of the first anode electrode 31 and the first cathode electrode 32 or at least a portion thereof.

[0158] For example, the second insulating layer PL2 may include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), silicon oxycarbide (SiO x C y ), aluminum oxide (AlO x ), aluminum nitride (AlN x )、ZrO x ), hafnium oxide (HfO x ), titanium oxide (TiO x ), etc. These materials may be used alone or in combination with each other.

[0159] In one or more embodiments, the third insulating layer PL3 may cover the second inorganic light-emitting element LC2. For example, the third insulating layer PL3 may cover the side surfaces of each of the first semiconductor layer S4, the active layer S5, and the second semiconductor layer S6. Furthermore, the third insulating layer PL3 may cover the upper surface of the second semiconductor layer S6. Furthermore, the third insulating layer PL3 may extend to cover the side surfaces of each of the third lower electrode 13 and the fourth lower electrode 14.

[0160] In one or more embodiments, the third insulating layer PL3 may extend to cover a side surface of each of the third bonding member 23 and the fourth bonding member 24. In one or more embodiments, the third insulating layer PL3 may extend to cover each of the third anode electrode 35 and the third cathode electrode 36 or at least a portion thereof.

[0161] For example, the third insulating layer PL3 may include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), silicon oxycarbide (SiO x C y ), aluminum oxide (AlO x ), aluminum nitride (AlN x )、ZrO x ), hafnium oxide (HfO x ), titanium oxide (TiO x ), etc. These materials may be used alone or in combination with each other.

[0162] The second cathode electrode 15' may be located in the first auxiliary pixel region SPX1, the second auxiliary pixel region SPX2, and the fourth auxiliary pixel region SPX4. That is, the second cathode electrode 15' may be located on the first inorganic light emitting element LC1, the organic light emitting layer EML1, and the second inorganic light emitting element LC2.

[0163] In one or more embodiments, the second cathode electrode 15' may be continuously located in the first auxiliary pixel region SPX1, the second auxiliary pixel region SPX2, and the fourth auxiliary pixel region SPX4. That is, the second cathode electrode 15' may be continuously located on the first inorganic light emitting element LC1, the organic light emitting layer EML1, the second inorganic light emitting element LC2, and the pixel defining layer PDL.

[0164] In this case, the light emitting element LED may include a portion of the second cathode electrode 15 ′, the second anode electrode 33 , and the organic light emitting layer EML 1 . The portion of the second cathode electrode 15 ′ may be located in the second auxiliary pixel region SPX2 .

[0165] The second cathode electrode 15' may be spaced apart from the first inorganic light emitting element LC1 with the second insulating layer PL2 interposed therebetween. Furthermore, the second cathode electrode 15' may be spaced apart from the first adhesive member 21 and the second adhesive member 22 with the second insulating layer PL2 interposed therebetween. Furthermore, the second cathode electrode 15' may be spaced apart from the first anode electrode 31 and the first cathode electrode 32 with the second insulating layer PL2 interposed therebetween.

[0166] In one or more embodiments, the second cathode electrode 15' may be located in the display area (eg, Figure 1 display area DA) and non-display area ( Figure 1 The second cathode electrode 15' may be connected to the second connection electrode near the boundary line between the NDA and the second connection electrode. A power supply voltage may be applied to the second cathode electrode 15' via the second connection electrode. For example, a low power supply voltage such as ELVSS may be applied to the second cathode electrode 15' via the second connection electrode. However, the present disclosure is not limited thereto, and the location where the second cathode electrode 15' is connected to the second connection electrode may vary.

[0167] Figure 11 is shown along line II'. Figure 1 A cross-sectional view of another example of a display device.

[0168] Reference Figure 1 and Figure 11 The display device DD" according to one or more other embodiments may include a substrate 100, a transparent electrode F1, a first semiconductor layer F2, an active layer F3, a second semiconductor layer F4, a first anode electrode AD1, a second anode electrode AD2, a third anode electrode AD3, a first cathode electrode CT1, a second cathode electrode CT2, a third cathode electrode CT3, an organic light-emitting layer EML2, an insulating layer IL, and a pixel-defining layer PDL'.

[0169] The first anode electrode AD1, the second anode electrode AD2, and the third anode electrode AD3 may be located on the substrate 100. The first anode electrode AD1 may be located in the first auxiliary pixel region SPX1. For example, the first anode electrode AD1 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These materials may be used alone or in combination.

[0170] The second anode electrode AD2 may be located in the second auxiliary pixel region SPX2. That is, the second anode electrode AD2 may be spaced apart from the first anode electrode AD1 in the first direction DR1. For example, the second anode electrode AD2 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These materials may be used alone or in combination.

[0171] The third anode electrode AD3 may be located in the fourth auxiliary pixel region SPX4. That is, the third anode electrode AD3 may be spaced apart from the second anode electrode AD2 in the first direction DR1. For example, the third anode electrode AD3 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These materials may be used alone or in combination.

[0172] The transparent electrode F1 may be located on the first anode electrode AD1 and the third anode electrode AD3. The transparent electrode F1 may be located in the first auxiliary pixel region SPX1 and the fourth auxiliary pixel region SPX4. The transparent electrode F1 may be omitted from the second auxiliary pixel region SPX2. For example, the transparent electrode F1 may include ITO, IZO, IGO, AZO, or the like. These materials may be used alone or in combination.

[0173] The first semiconductor layer F2 may be located on the transparent electrode F1. The first semiconductor layer F2 may be located in the first and fourth auxiliary pixel regions SPX1 and SPX4. The first semiconductor layer F2 may be omitted from the second auxiliary pixel region SPX2.

[0174] In one or more embodiments, the first semiconductor layer F2 may include a p-type semiconductor layer. For example, the first semiconductor layer F2 may include a semiconductor material such as GaN, InAlGaN, AlGaN, InGaN, AlN, InN, etc., and may include a p-type semiconductor layer doped with a first conductive dopant (e.g., a p-type dopant) such as Zn, Fe, Mg, Be, Cd, Ag, C, Hg, Li, Ca, etc. For example, the first semiconductor layer F2 may include a GaN semiconductor material doped with the first conductive dopant.

[0175] The active layer F3 may be located on the first semiconductor layer F2. The active layer F3 may be located in the first auxiliary pixel region SPX1 and the fourth auxiliary pixel region SPX4. The active layer F3 may be omitted from the second auxiliary pixel region SPX2.

[0176] For example, the active layer F3 may include a single well structure, a multi-well structure, a single quantum well structure, a multi-quantum well structure, a quantum dot structure, or a quantum wire structure. For example, the active layer F3 may include a multi-quantum well structure. In this case, the active layer F3 may include a structure in which well layers and barrier layers are alternately stacked. The well layers may include InGaN, and the barrier layers may include GaN or AlGaN, but the present disclosure is not limited thereto.

[0177] The second semiconductor layer F4 may be located on the active layer F3. The second semiconductor layer F4 may be located in the first auxiliary pixel region SPX1, the second auxiliary pixel region SPX2, and the fourth auxiliary pixel region SPX4. In one or more embodiments, the second semiconductor layer F4 may be continuously located in the first auxiliary pixel region SPX1, the second auxiliary pixel region SPX2, and the fourth auxiliary pixel region SPX4.

[0178] In one or more embodiments, the second semiconductor layer F4 may include an n-type semiconductor layer. For example, the second semiconductor layer F4 may include a semiconductor material such as GaN, InAlGaN, AlGaN, InGaN, AlN, InN, etc., and may include an n-type semiconductor layer doped with a second conductive dopant (e.g., an n-type dopant) such as Si, Sn, Te, Se, S, O, Ti, Ge, etc. For example, the second semiconductor layer F4 may include a GaN semiconductor material doped with the second conductive dopant. However, the present disclosure is not limited thereto, and in one or more other embodiments, the first semiconductor layer F2 may include an n-type semiconductor layer, and the second semiconductor layer F4 may include a p-type semiconductor layer.

[0179] In addition, in one or more embodiments, an undoped semiconductor layer may be further located on the second semiconductor layer F4. The undoped semiconductor layer may include GaN.

[0180] The first cathode electrode CT1 may be located on the second semiconductor layer F4. The first cathode electrode CT1 may be located in the first auxiliary pixel region SPX1. For example, the first cathode electrode CT1 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These materials may be used alone or in combination.

[0181] The second cathode electrode CT2 may be located on the second semiconductor layer F4. The second cathode electrode CT2 may be located in the second auxiliary pixel region SPX2. That is, the second cathode electrode CT2 may be spaced apart from the first cathode electrode CT1 in the first direction DR1. The second cathode electrode CT2 may be electrically connected to the organic light-emitting layer EML2 via a contact hole CNT2. The contact hole CNT2 may be defined to pass through the second semiconductor layer F4 and the insulating layer IL. For example, the second cathode electrode CT2 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These materials may be used alone or in combination.

[0182] The third cathode electrode CT3 may be located on the second semiconductor layer F4. The third cathode electrode CT3 may be located in the fourth auxiliary pixel region SPX4. That is, the third cathode electrode CT3 may be spaced apart from the second cathode electrode CT2 in the first direction DR1. For example, the third cathode electrode CT3 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These materials may be used alone or in combination.

[0183] The pixel-defining layer PDL' may be located on the second semiconductor layer F4. For example, the pixel-defining layer PDL' may have a shape surrounding the second auxiliary pixel region SPX2 in a plan view. The pixel-defining layer PDL' may have or define an opening that overlaps the second auxiliary pixel region SPX2 in a plan view. The second cathode electrode CT2 may be located in the opening of the pixel-defining layer PDL'.

[0184] like Figure 11 As shown in , a first portion of the pixel defining layer PDL' may be located in the first non-emission region BM1. That is, the first portion of the pixel defining layer PDL' may be located between the first auxiliary pixel region SPX1 and the second auxiliary pixel region SPX2. In addition, a second portion of the pixel defining layer PDL' may be located in the second non-emission region BM2. That is, the second portion of the pixel defining layer PDL' may be located between the second auxiliary pixel region SPX2 and the fourth auxiliary pixel region SPX4.

[0185] For example, the pixel defining layer PDL' may include an inorganic material or an organic material. In one or more embodiments, the pixel defining layer PDL' may include an organic material such as an epoxy resin, a silicone resin, or the like. These materials may be used alone or in combination with one another. In one or more other embodiments, the pixel defining layer PDL' may further include a light blocking material containing a black pigment, a black dye, or the like.

[0186] The organic light-emitting layer EML2 may be located in the second auxiliary pixel region SPX2. In one or more embodiments, the organic light-emitting layer EML2 may penetrate the transparent electrode F1, the first semiconductor layer F2, and the active layer F3. In one or more embodiments, the organic light-emitting layer EML2 may further penetrate at least a portion of the second semiconductor layer F4.

[0187] However, the present disclosure is not limited thereto, and in one or more other embodiments, the organic light emitting layer EML2 may not penetrate the second semiconductor layer F4. For example, the organic light emitting layer EML2 may include an organic material that emits light of a color (eg, a predetermined color).

[0188] The insulating layer IL may cover the organic light emitting layer EML2. Specifically, the insulating layer IL may cover the side surface SE1 and the upper surface SE2 of the organic light emitting layer EML2. The upper surface SE2 of the organic light emitting layer EML2 may be a surface facing the second cathode electrode CT2.

[0189] The insulating layer IL may be located in a portion of the first non-emission region BM1. In addition, the insulating layer IL may be located in a portion of the second non-emission region BM2. In addition, the insulating layer IL may be located in the second auxiliary pixel region SPX2.

[0190] For example, the insulating layer IL may include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), silicon oxycarbide (SiO x C y ), aluminum oxide (AlO x ), aluminum nitride (AlN x )、ZrO x ), hafnium oxide (HfO x ), titanium oxide (TiO x ), etc. These materials may be used alone or in combination with each other.

[0191] In one or more embodiments, the organic light emitting layer EML2 may emit red light. That is, red light may be emitted from the second auxiliary pixel region SPX2. That is, for red light, by using the organic light emitting layer EML2 including an organic material, the light emission efficiency of red light may be improved.

[0192] In this case, blue light may be emitted from the first auxiliary pixel region SPX1 and green light may be emitted from the third auxiliary pixel region SPX3. Alternatively, green light may be emitted from the first auxiliary pixel region SPX1 and blue light may be emitted from the third auxiliary pixel region SPX3.

[0193] However, the present disclosure is not limited thereto, and in one or more other embodiments, the organic light-emitting layer EML2 may emit green light. In this case, a second organic light-emitting layer having a structure substantially identical to that of the organic light-emitting layer EML2 may be located in the third auxiliary pixel region SPX3. The second organic light-emitting layer may emit red light. That is, green light may be emitted in the second auxiliary pixel region SPX2, and red light may be emitted in the third auxiliary pixel region SPX3.

[0194] That is, for green light and red light, the light emission efficiency of each of the green light and the red light can be improved by using the organic light emitting layer EML2 and the second organic light emitting layer. In this case, blue light can be emitted from the first auxiliary pixel region SPX1.

[0195] Alternatively, the organic light emitting layer EML2 may emit red light, and the second organic light emitting layer may emit green light. That is, blue light may be emitted from the first auxiliary pixel region SPX1, red light may be emitted from the second auxiliary pixel region SPX2, and green light may be emitted from the third auxiliary pixel region SPX3.

[0196] Although reference has been Figure 1 and Figure 11 The first pixel region PX1 including the first, second, and third auxiliary pixel regions SPX1, SPX2, and SPX3 is described, but the present disclosure is not limited thereto, and the second pixel region PX2 may also include substantially the same structure as the first pixel region PX1.

[0197] Figure 12 、 Figure 13 、 Figure 14 、 Figure 15 、 Figure 16 、 Figure 17 、 Figure 18 and Figure 19 It shows the manufacturing Figure 11 A cross-sectional view of a method of displaying a device.

[0198] Reference Figure 12 The second semiconductor layer F4 may be formed on a growth substrate SUB. The growth substrate SUB may be an epitaxial substrate. For example, the epitaxial substrate may include a silicon substrate, a sapphire substrate, etc. The second semiconductor layer F4 may be formed by an epitaxial growth method.

[0199] In one or more embodiments, the second semiconductor layer F4 may include an n-type semiconductor layer. For example, the second semiconductor layer F4 may include a semiconductor material such as GaN, InAlGaN, AlGaN, InGaN, AlN, InN, etc., and may include an n-type semiconductor layer doped with a second conductive dopant (e.g., an n-type dopant) such as Si, Sn, Te, Se, S, O, Ti, Ge, etc. For example, the second semiconductor layer F4 may include a GaN semiconductor material doped with the second conductive dopant.

[0200] The active layer F3 may be positioned on the second semiconductor layer F4. The active layer F3 may be formed by an epitaxial growth method. For example, the active layer F3 may include a single well structure, a multi-well structure, a single quantum well structure, a multi-quantum well structure, a quantum dot structure, or a quantum wire structure. For example, the active layer F3 may include a multi-quantum well structure. In this case, the active layer F3 may include a structure in which well layers and barrier layers are alternately stacked. The well layers may include InGaN, and the barrier layers may include GaN or AlGaN, but the present disclosure is not limited thereto.

[0201] A first semiconductor layer F2 may be formed on the active layer F3. The first semiconductor layer F2 may be formed by an epitaxial growth method. For example, the first semiconductor layer F2 may include a semiconductor material such as GaN, InAlGaN, AlGaN, InGaN, AlN, InN, etc., and may include a p-type semiconductor layer doped with a first conductive dopant (e.g., a p-type dopant) such as Zn, Fe, Mg, Be, Cd, Ag, C, Hg, Li, Ca, etc. For example, the first semiconductor layer F2 may include a GaN semiconductor material doped with the first conductive dopant.

[0202] A transparent electrode F1 may be formed on the first semiconductor layer F2. For example, the transparent electrode F1 may include ITO, IZO, IGO, AZO, etc. These materials may be used alone or in combination with each other.

[0203] Reference Figure 13 , a mask MK may be formed on the transparent electrode F1. The mask MK may be formed in the first auxiliary pixel region SPX1 and the fourth auxiliary pixel region SPX4. In addition, the mask MK may be formed in a portion of the first non-emission region BM1. In addition, the mask MK may be formed in a portion of the second non-emission region BM2.

[0204] For example, the mask MK may include silicon nitride, silicon dioxide, silicon oxide, etc. These materials may be used alone or in combination with each other.

[0205] Reference Figure 14 , the first opening COP1 may be formed in a portion that does not overlap with the mask MK in a plan view. The first opening COP1 may be formed in the second auxiliary pixel region SPX2. Alternatively, the first opening COP1 may be formed in a portion of the first non-luminous region BM1. Alternatively, the first opening COP1 may be formed in a portion of the second non-luminous region BM2. For example, the first opening COP1 may be formed by an etching process. The first opening COP1 may be defined to pass through the transparent electrode F1, the first semiconductor layer F2, and the active layer F3. Alternatively, the first opening COP1 may be further defined to pass through at least a portion of the second semiconductor layer F4.

[0206] Reference Figure 15 The first opening COP1 may be filled with a preliminary insulating layer PIL. For example, the preliminary insulating layer PIL may include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), silicon oxycarbide (SiO x C y ), aluminum oxide (AlO x ), aluminum nitride (AlN x )、ZrO x ), hafnium oxide (HfO x ), titanium oxide (TiO x ), etc. These materials may be used alone or in combination with each other.

[0207] Reference Figure 15 and Figure 16 , a second opening COP2 may be formed in the preliminary insulating layer PIL. Thus, the insulating layer IL may be formed. The second opening COP2 may be formed in the second auxiliary pixel region SPX2. The second opening COP2 may be formed in substantially the same manner as the method in which the first opening COP1 is formed.

[0208] Reference Figure 17 , the second opening COP2 may be filled with the organic light emitting layer EML 2. For example, the organic light emitting layer EML 2 may include an organic material for emitting light of a color (eg, a predetermined color).

[0209] Reference Figure 17 and Figure 18 A first anode electrode AD1, a second anode electrode AD2, and a third anode electrode AD3 may be formed on the substrate 100. The first anode electrode AD1 may be formed in a portion of the first auxiliary pixel region SPX1. The second anode electrode AD2 may be formed in a portion of the second auxiliary pixel region SPX2. The third anode electrode AD3 may be formed in a portion of the fourth auxiliary pixel region SPX4.

[0210] For example, each of the first to third anode electrodes AD1 , AD2 , and AD3 may include metal, alloy, metal nitride, conductive metal oxide, transparent conductive material, etc. These materials may be used alone or in combination with each other.

[0211] The growth substrate SUB can be removed by laser lift-off (LLO) or the like. The transparent electrode F1 can be bonded to the first anode electrode AD1 and the third anode electrode AD3. Furthermore, the organic light-emitting layer EML2 can be bonded to the second anode electrode AD2. In other words, the transparent electrode F1, the first semiconductor layer F2, the active layer F3, the second semiconductor layer F4, the organic light-emitting layer EML2, and the insulating layer IL can be transferred to the substrate 100.

[0212] A first cathode electrode CT1, a second cathode electrode CT2, and a third cathode electrode CT3 may be formed on the second semiconductor layer F4. The first cathode electrode CT1 may be formed in a portion of the first auxiliary pixel region SPX1. The second cathode electrode CT2 may be formed in a portion of the second auxiliary pixel region SPX2. The third cathode electrode CT3 may be formed in a portion of the fourth auxiliary pixel region SPX4.

[0213] For example, each of the first cathode electrode CT1 , the second cathode electrode CT2 , and the third cathode electrode CT3 may include metal, alloy, metal nitride, conductive metal oxide, transparent conductive material, etc. These materials may be used alone or in combination with each other.

[0214] A contact hole CNT2 may be defined through the second semiconductor layer F4 and the insulating layer IL. The second cathode electrode CT2 may be connected to the organic light emitting layer EML2 through the contact hole CNT2.

[0215] Reference Figure 19 , a pixel defining layer PDL′ may be formed on the second semiconductor layer F4 . The pixel defining layer PDL′ may surround the second auxiliary pixel region SPX2 in a plan view.

[0216] For example, a first portion of the pixel defining layer PDL' may be formed in the first non-emission region BM1. That is, the first portion of the pixel defining layer PDL' may be formed between the first auxiliary pixel region SPX1 and the second auxiliary pixel region SPX2. Furthermore, a second portion of the pixel defining layer PDL' may be formed in the second non-emission region BM2. That is, the second portion of the pixel defining layer PDL' may be formed between the second auxiliary pixel region SPX2 and the fourth auxiliary pixel region SPX4.

[0217] For example, the pixel defining layer PDL' may include an inorganic material or an organic material. In one or more embodiments, the pixel defining layer PDL' may include an organic material such as an epoxy resin, a silicone resin, or the like. These materials may be used alone or in combination with one another. In one or more other embodiments, the pixel defining layer PDL' may further include a light blocking material containing a black pigment, a black dye, or the like.

[0218] The present disclosure can be applied to various display devices. For example, the present disclosure is applicable to various display devices such as display devices for vehicles, ships, and aircraft, portable communication devices, display devices for exhibitions or information transmission, medical display devices, etc.

[0219] The foregoing is illustrative of embodiments and should not be construed as limiting thereof. Although a few embodiments have been described, it will be readily apparent to those skilled in the art that many modifications are possible in the embodiments without materially departing from the novel teachings and advantages of the present invention. Therefore, all such modifications are intended to be included within the scope of the present invention as defined in the claims. Therefore, it will be understood that the foregoing is illustrative of various embodiments and is not to be construed as limited to the disclosed embodiments, and modifications to the disclosed embodiments as well as other embodiments are intended to be included within the scope of the appended claims.

Claims

1. A display device, comprising: a first electrode over the substrate; a second electrode over the substrate and spaced apart from the first electrode in a first direction; an inorganic light emitting element in the first auxiliary pixel region, above the first electrode, and connected to the first electrode; an organic light emitting layer, over the substrate, in a second auxiliary pixel region spaced apart from the first auxiliary pixel region along the first direction, and covering the second electrode; as well as A third electrode is located above the organic light-emitting layer.

2. The display device according to claim 1, wherein The third electrode is spaced apart from the inorganic light emitting element in a plan view. 3 . The display device of claim 2 , further comprising a connection electrode over the substrate in a portion of the second auxiliary pixel region, configured to receive a low power supply voltage and connected to the third electrode.

4. The display device according to claim 3, wherein: The connection electrode at least partially overlaps the third electrode in a plan view. 5 . The display device according to claim 2 , further comprising a fourth electrode provided in a portion of the first auxiliary pixel region, over the substrate, and connected to the inorganic light emitting element.

6. The display device according to claim 5, wherein: The fourth electrode is spaced apart from the third electrode in a plan view. 7 . The display device of claim 1 , further comprising a pixel defining layer over the substrate, surrounding the second auxiliary pixel region in a plan view, and spaced apart from the third electrode in a plan view.

8. The display device according to claim 1, wherein A portion of the third electrode is above the organic light emitting layer, and another portion of the third electrode is above the inorganic light emitting element.

9. The display device according to claim 8, wherein: The third electrode at least partially overlaps the inorganic light emitting element in a plan view.

10. The display device according to claim 8, wherein The third electrode is continuously in the first auxiliary pixel region and the second auxiliary pixel region.

11. The display device according to claim 8, wherein The inorganic light emitting element includes a first semiconductor layer, an active layer above the first semiconductor layer, and a second semiconductor layer above the active layer. 12 . The display device according to claim 11 , further comprising an insulating layer, wherein the insulating layer covers both sides of the first semiconductor layer, both sides of the active layer, both sides of the second semiconductor layer, and an upper surface of the second semiconductor layer.

13. The display device according to claim 12, wherein: The third electrode is spaced apart from the inorganic light emitting element, and the insulating layer is between the third electrode and the inorganic light emitting element. 14 . The display device according to claim 12 , further comprising a fourth electrode, the fourth electrode being connected to the inorganic light emitting element over the substrate in a portion of the first auxiliary pixel region and being covered by the insulating layer.

15. The display device according to claim 14, wherein The third electrode is spaced apart from the fourth electrode, and the insulating layer is between the third electrode and the fourth electrode. 16 . The display device of claim 8 , further comprising a pixel defining layer over the substrate, surrounding the second auxiliary pixel region in a plan view, and covered by the third electrode.

17. The display device according to claim 1, wherein: The organic light emitting layer is configured to emit green light or red light.

18. A method for manufacturing a display device, the method comprising the following steps: forming a first electrode over the substrate; forming a second electrode over the substrate and spaced apart from the first electrode in a first direction; bonding the first electrode to the inorganic light-emitting element; forming an organic light-emitting layer covering the second electrode; as well as A third electrode is formed over the organic light emitting layer, the third electrode being spaced apart from the inorganic light emitting element in a plan view.

19. The method of claim 18, wherein: The step of bonding the first electrode and the inorganic light emitting element is performed before the step of forming the organic light emitting layer.

20. The method according to claim 18, further comprising forming a contact hole over the substrate to connect the third electrode and the connection electrode, in, The connecting electrode is configured to have a low power supply voltage applied thereto.

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