Radio frequency chip de-embedding test structure and method

Abstract

The invention discloses a radio frequency chip de-embedding test structure and method.The structure comprises a first coplanar waveguide structure and a first microstrip-to-waveguide structure which are arranged on a PCB, the first coplanar waveguide structure comprises a signal transmission line and reference grounds which are located on the two sides of the signal transmission line and extend in parallel, and the first microstrip-to-waveguide structure comprises a second coplanar waveguide structure and a third microstrip-to-waveguide structure, the first microstrip-to-waveguide structure comprises a radiation patch located at the tail end of the signal transmission line, an annular closed reference ground surrounding the radiation patch at the tail end of the parallel extension reference ground, and a waveguide arranged on the annular closed reference ground, and the head end of the signal transmission line is used for accessing a radio frequency chip signal; the radiation patch is used for radiating an electromagnetic wave signal into the waveguide, and the waveguide is used for accessing a test instrument. According to the invention, de-embedding design is carried out through the microstrip-to-waveguide structure, the problems of large insertion loss and poor consistency of a traditional method are solved, and the microstrip-to-waveguide structure is relatively stable.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency chip testing, and in particular to a radio frequency chip de-embedding test structure and a de-embedding test method. Background Art

[0002] Testing of radio frequency chips (RFICs) is a key step in ensuring their performance, reliability, and compliance with standards, involving complex testing equipment and methods. R&D testing is an important means to verify design indicators and optimize performance, and de-embedding testing is an important step in chip R&D testing.

[0003] Traditional chip de-embedding test technology uses RF connectors for testing, which results in high losses. Summary of the Invention

[0004] The object of the present invention is to provide a radio frequency chip de-embedding test structure and method, which adopts a microstrip to waveguide connection method to reduce loss.

[0005] To this end, the present invention provides a radio frequency chip de-embedding test structure, including a first coplanar waveguide structure and a first microstrip waveguide structure arranged on a PCB board, wherein the first coplanar waveguide structure includes a signal transmission line and a parallel extended reference ground located on both sides of the signal transmission line, and the first microstrip waveguide structure includes a radiation patch located at the end of the signal transmission line, a ring-shaped closed reference ground surrounding the radiation patch at the end of the parallel extended reference ground, and a waveguide arranged on the ring-shaped closed reference ground, wherein the head end of the signal transmission line is used to access the radio frequency chip signal, the radiation patch is used to radiate the electromagnetic wave signal into the waveguide, and the waveguide is used to access the test instrument.

[0006] The present invention also provides a radio frequency chip de-embedding test method, comprising the following steps: S1, making a radio frequency chip de-embedding test structure on a PCB board, connecting the radio frequency chip signal to be tested to a signal transmission line, connecting a spectrum analyzer to a waveguide, and testing to obtain a power value P1 of the spectrum analyzer; S2, simultaneously mirroring and making two radio frequency chip de-embedding test structures on the PCB board, connecting two interfaces of a vector network analyzer to a waveguide of a de-embedding test structure respectively, and testing to obtain an insertion loss value P2 of the structure; S3, calculating the radio frequency chip transmission power according to the test results of steps S1 and S2, wherein the radio frequency chip transmission power = P1 + P2 / 2.

[0007] The present invention performs de-embedding design through a microstrip-to-waveguide structure, thereby solving the problems of large insertion loss and poor consistency in traditional methods, and the microstrip-to-waveguide structure is relatively stable.

[0008] In addition to the above-described objects, features and advantages, the present invention has other objects, features and advantages. The present invention will be further described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The accompanying drawings, which constitute part of this application, are intended to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are intended to explain the present invention and do not constitute an undue limitation of the present invention. In the accompanying drawings:

[0010] Figure 1 It is a top view of the connection between the microstrip-to-waveguide structure and the chip in the RF chip de-embedding test structure of the present invention;

[0011] Figure 2 It is a side view of the connection between the microstrip-to-waveguide structure and the chip in the RF chip de-embedding test structure of the present invention;

[0012] Figure 3 This is a top view of the microstrip-to-waveguide structure and the coplanar waveguide connected together as a mirror image on the PCB;

[0013] Figure 4 A curve showing the return loss of the microstrip-to-waveguide of the present invention;

[0014] Figure 5 The insertion loss curve of the microstrip-to-waveguide de-embedding structure of the present invention is shown;

[0015] Figure 6 The present invention is a flowchart of a radio frequency chip de-embedding test method. DETAILED DESCRIPTION

[0016] The present invention will be described in detail below with reference to the accompanying drawings and in conjunction with embodiments.

[0017] The present invention first transmits the signal of the RF chip to the PCB end through the transmission mode of coplanar waveguide, performs a microstrip to waveguide structure design at the end of the coplanar waveguide, and then connects to a vector network analyzer or spectrum analyzer through the waveguide to test the RF chip. The power value measured by the spectrum analyzer is recorded as P1.

[0018] Figure 1 The top view of the connection between the microstrip-to-waveguide structure and the chip is shown. The signal of the RF chip 30 is transmitted to the microstrip-to-waveguide structure 20 through the coplanar waveguide structure 10, and the electromagnetic wave signal is radiated to the waveguide 23 by the radiation patch 21.

[0019] The coplanar waveguide structure includes a signal transmission line 11 and a pair of parallel extending reference grounds 12 located on both sides of the signal transmission line.

[0020] The microstrip-to-waveguide structure 20 includes a radiation patch 21 at the end of the signal transmission line 11 , a ring-shaped closed reference ground 22 surrounding the radiation patch 21 at the ends of a pair of parallel extending reference grounds 12 , and a waveguide 23 provided on the ring-shaped closed reference ground 22 .

[0021] The signal transmission line 11, a pair of parallel extended reference grounds 12, a radiating patch 21, and a ring-shaped closed reference ground 22 are obtained by etching corresponding patterns on the conductive layer of the PCB board. The waveguide 23 is a rectangular cross-section tube buckled onto the ring-shaped closed reference ground 22.

[0022] The length of the radiation patch is generally half a wavelength, and the specific length and width values are determined by simulation using simulation software.

[0023] Figure 2 The side view of the microstrip to waveguide structure and chip connection is shown, combined with reference Figure 1 and Figure 2 On the PCB board 400, a pair of parallel extended reference grounds 12 and a ring-shaped closed reference ground 22 are connected to the metal ground 42 through a metal ground hole 41. The radio frequency signal is transmitted to the radiation patch 21 through the coplanar waveguide signal transmission line 11. The radiation patch 21 radiates the electromagnetic wave signal to the waveguide 23. The waveguide interface is connected to the test instrument for testing. The measured power value of the spectrum analyzer is recorded as P1.

[0024] like Figure 3 As shown, a pair of de-embedded structures 100 and 100' are simultaneously fabricated on a PCB. That is, a microstrip-to-waveguide structure and a coplanar waveguide are connected together in a mirror-image manner on the PCB. The waveguides of the two microstrip-to-waveguide structures are simultaneously connected to a network analyzer for testing. The insertion loss value of the de-embedded structure obtained by the test is recorded as P2.

[0025] like Figure 4 As shown, the radio frequency chip de-embedding test method of the present invention includes the following steps S1 to S3.

[0026] S1. Create an RF chip de-embedding test structure on the PCB board, connect the RF chip signal to be tested to the signal transmission line, connect the spectrum analyzer to the waveguide, and test to obtain the power value P1 of the spectrum analyzer.

[0027] S2. Simultaneously mirror-make two RF chip de-embedding test structures on the PCB board. Connect the two interfaces of a vector network analyzer to the waveguides of the de-embedding test structures respectively. That is, the two interfaces are connected to the waveguides of the two de-embedding test structures in a one-to-one correspondence. Test to obtain the insertion loss value P2 of the structure.

[0028] S3. Calculate the radio frequency chip transmit power according to the test results of steps S1 and S2, where the radio frequency chip transmit power = P1 + P2 / 2.

[0029] Figure 5 The return loss of the microstrip-to-waveguide is shown by Figure 5 From the return loss curve shown, it can be seen that the return loss of the microstrip-to-waveguide structure is below -18dB in the frequency range of 75GHz-85GHz, and the performance is very good.

[0030] Figure 6 The insertion loss of the microstrip-to-waveguide de-embedding structure is shown by Figure 6 From the insertion loss curve shown, it can be seen that the insertion loss of the microstrip-to-waveguide de-embedding structure is approximately 2.5dB in the frequency range of 75GHz-85GHz, which is very small.

[0031] The key point of the present invention is the method for testing and de-embedding by connecting a microstrip-to-waveguide structure with a chip. The technical effects it brings are as follows:

[0032] The present invention performs de-embedding design through a microstrip-to-waveguide structure, thereby solving the problems of large insertion loss and poor consistency in traditional methods, and the microstrip-to-waveguide structure is relatively stable.

[0033] The foregoing description is merely an embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A radio frequency chip de-embedding test structure, characterized in that: It includes a first coplanar waveguide structure and a first microstrip-to-waveguide structure arranged on a PCB board, wherein the first coplanar waveguide structure includes a signal transmission line and a parallel extended reference ground located on both sides of the signal transmission line, and the first microstrip-to-waveguide structure includes a radiation patch located at the end of the signal transmission line, a ring-shaped closed reference ground surrounding the radiation patch at the end of the parallel extended reference ground, and a waveguide arranged on the ring-shaped closed reference ground, wherein the head end of the signal transmission line is used to access the radio frequency chip signal, the radiation patch is used to radiate the electromagnetic wave signal into the waveguide, and the waveguide is used to access the test instrument.

2. The RF chip de-embedding test structure according to claim 1, characterized in that: The parallel extended reference ground is connected to the metal ground holes penetrating the PCB board and arranged at equal intervals along the length direction of the microstrip and to the metal ground on the bottom surface of the PCB board.

3. The RF chip de-embedding test structure according to claim 1, wherein: The annular closed reference ground is connected to the metal ground holes that penetrate the PCB board and are arranged at equal intervals along the length direction of the microstrip and the metal ground on the bottom surface of the PCB board.

4. The RF chip de-embedding test structure according to claim 1, wherein: It also includes a second coplanar waveguide structure and a second microstrip-to-waveguide structure arranged on the PCB board, wherein the second coplanar waveguide structure is connected to the first coplanar waveguide structure and arranged in a mirror image, and the second microstrip-to-waveguide structure and the first microstrip-to-waveguide structure are arranged in a mirror image.

5. A radio frequency chip de-embedding test method, characterized in that: The following steps are involved: S1. Fabricate an RF chip de-embedding test structure according to claim 1 on a PCB board, connect the RF chip signal to be tested to a signal transmission line, connect a spectrum analyzer to a waveguide, and measure to obtain a power value P1 from the spectrum analyzer; S2. Simultaneously mirror-image-fabricate two RF chip de-embedding test structures according to any one of claims 1 to 3 on a PCB board, connect two interfaces of a vector network analyzer to the waveguides of each de-embedding test structure, and measure to obtain an insertion loss value P2 of the structure. S3. Calculate the radio frequency chip transmit power according to the test results of steps S1 and S2, where the radio frequency chip transmit power = P1 + P2 / 2.

6. The RF chip de-embedding test method according to claim 5, characterized in that: The spectrum analyzer is replaced by a vector network analyzer.

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